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author | upstream source tree <ports@midipix.org> | 2015-03-15 20:14:05 -0400 |
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committer | upstream source tree <ports@midipix.org> | 2015-03-15 20:14:05 -0400 |
commit | 554fd8c5195424bdbcabf5de30fdc183aba391bd (patch) | |
tree | 976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/config/pdp11/predicates.md | |
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Diffstat (limited to 'gcc/config/pdp11/predicates.md')
-rw-r--r-- | gcc/config/pdp11/predicates.md | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/gcc/config/pdp11/predicates.md b/gcc/config/pdp11/predicates.md new file mode 100644 index 000000000..8b24ba4fc --- /dev/null +++ b/gcc/config/pdp11/predicates.md @@ -0,0 +1,55 @@ +;;- Predicate definitions for the pdp11 for GNU C compiler +;; Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2004, 2005 +;; 2007, 2008, 2010 Free Software Foundation, Inc. +;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). + +;; This file is part of GCC. + +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. + +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + +;; Match CONST_DOUBLE zero for tstd/tstf. +(define_predicate "register_or_const0_operand" + (ior (match_operand 0 "register_operand") + (match_test "op == CONST0_RTX (GET_MODE (op))"))) + +;; Accept integer arguments in the range -4..-2 and 2..4, which are the +;; shift counts for which we unroll a shift. This matches the rule for +;; the "O" constraint. +(define_predicate "expand_shift_operand" + (match_code "const_int") +{ + int sh; + + sh = INTVAL (op); + return (abs (sh) > 1 && abs (sh) <= 4); +}) + +;; Accept anything general_operand accepts, except that registers must +;; be FPU registers. +(define_predicate "float_operand" + (if_then_else (match_code "reg") + (ior + (match_test "REGNO_REG_CLASS (REGNO (op)) == LOAD_FPU_REGS") + (match_test "REGNO_REG_CLASS (REGNO (op)) == NO_LOAD_FPU_REGS")) + (match_test "general_operand (op, mode)"))) + +;; Accept anything nonimmediate_operand accepts, except that registers must +;; be FPU registers. +(define_predicate "float_nonimm_operand" + (if_then_else (match_code "reg") + (ior + (match_test "REGNO_REG_CLASS (REGNO (op)) == LOAD_FPU_REGS") + (match_test "REGNO_REG_CLASS (REGNO (op)) == NO_LOAD_FPU_REGS")) + (match_test "nonimmediate_operand (op, mode)"))) |