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author | upstream source tree <ports@midipix.org> | 2015-03-15 20:14:05 -0400 |
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committer | upstream source tree <ports@midipix.org> | 2015-03-15 20:14:05 -0400 |
commit | 554fd8c5195424bdbcabf5de30fdc183aba391bd (patch) | |
tree | 976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/testsuite/gcc.target/i386/fma4-vector.c | |
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Diffstat (limited to 'gcc/testsuite/gcc.target/i386/fma4-vector.c')
-rw-r--r-- | gcc/testsuite/gcc.target/i386/fma4-vector.c | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/fma4-vector.c b/gcc/testsuite/gcc.target/i386/fma4-vector.c new file mode 100644 index 000000000..da12780d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/fma4-vector.c @@ -0,0 +1,93 @@ +/* Test that the compiler properly optimizes floating point multiply and add + instructions vector into vfmaddps on FMA4 systems. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O2 -mfma4 -ftree-vectorize -mtune=generic" } */ + +extern void exit (int); + +typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__)); +typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__)); + +#define SIZE 10240 + +union { + __m128 f_align; + __m128d d_align; + float f[SIZE]; + double d[SIZE]; +} a, b, c, d; + +void +flt_mul_add (void) +{ + int i; + + for (i = 0; i < SIZE; i++) + a.f[i] = (b.f[i] * c.f[i]) + d.f[i]; +} + +void +dbl_mul_add (void) +{ + int i; + + for (i = 0; i < SIZE; i++) + a.d[i] = (b.d[i] * c.d[i]) + d.d[i]; +} + +void +flt_mul_sub (void) +{ + int i; + + for (i = 0; i < SIZE; i++) + a.f[i] = (b.f[i] * c.f[i]) - d.f[i]; +} + +void +dbl_mul_sub (void) +{ + int i; + + for (i = 0; i < SIZE; i++) + a.d[i] = (b.d[i] * c.d[i]) - d.d[i]; +} + +void +flt_neg_mul_add (void) +{ + int i; + + for (i = 0; i < SIZE; i++) + a.f[i] = (-(b.f[i] * c.f[i])) + d.f[i]; +} + +void +dbl_neg_mul_add (void) +{ + int i; + + for (i = 0; i < SIZE; i++) + a.d[i] = (-(b.d[i] * c.d[i])) + d.d[i]; +} + +int main () +{ + flt_mul_add (); + flt_mul_sub (); + flt_neg_mul_add (); + + dbl_mul_add (); + dbl_mul_sub (); + dbl_neg_mul_add (); + exit (0); +} + +/* { dg-final { scan-assembler "vfmaddps" } } */ +/* { dg-final { scan-assembler "vfmaddpd" } } */ +/* { dg-final { scan-assembler "vfmsubps" } } */ +/* { dg-final { scan-assembler "vfmsubpd" } } */ +/* { dg-final { scan-assembler "vfnmaddps" } } */ +/* { dg-final { scan-assembler "vfnmaddpd" } } */ |