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-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/loop-28.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
new file mode 100644
index 000000000..77d0c47dc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" } */
+
+char x[100000];
+
+void foo(int n)
+{
+ int i;
+
+ for (i = 0; i < n; i++)
+ x[i] = (char) i;
+}
+
+/* There should be 64 MEMs in the unrolled loop and one more in the copy of the loop
+ for the rest of the iterations. */
+
+/* { dg-final { scan-tree-dump-times "MEM" 65 "optimized" } } */
+
+/* There should be no i_a = i_b assignments. */
+/* { dg-final { scan-tree-dump-times "i_.*= i_\[0-9\]*;" 0 "aprefetch" } } */
+
+/* { dg-final { cleanup-tree-dump "optimized" } } */
+/* { dg-final { cleanup-tree-dump "aprefetch" } } */