From 554fd8c5195424bdbcabf5de30fdc183aba391bd Mon Sep 17 00:00:00 2001 From: upstream source tree Date: Sun, 15 Mar 2015 20:14:05 -0400 Subject: obtained gcc-4.6.4.tar.bz2 from upstream website; verified gcc-4.6.4.tar.bz2.sig; imported gcc-4.6.4 source tree from verified upstream tarball. downloading a git-generated archive based on the 'upstream' tag should provide you with a source tree that is binary identical to the one extracted from the above tarball. if you have obtained the source via the command 'git clone', however, do note that line-endings of files in your working directory might differ from line-endings of the respective files in the upstream repository. --- gcc/config/m68k/m68k.opt | 188 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 188 insertions(+) create mode 100644 gcc/config/m68k/m68k.opt (limited to 'gcc/config/m68k/m68k.opt') diff --git a/gcc/config/m68k/m68k.opt b/gcc/config/m68k/m68k.opt new file mode 100644 index 000000000..d5aa9fa76 --- /dev/null +++ b/gcc/config/m68k/m68k.opt @@ -0,0 +1,188 @@ +; Options for the Motorola 68000 port of the compiler. + +; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 3, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; . + +m5200 +Target RejectNegative +Generate code for a 520X + +m5206e +Target RejectNegative +Generate code for a 5206e + +m528x +Target RejectNegative +Generate code for a 528x + +m5307 +Target RejectNegative +Generate code for a 5307 + +m5407 +Target RejectNegative +Generate code for a 5407 + +m68000 +Target RejectNegative +Generate code for a 68000 + +m68010 +Target RejectNegative +Generate code for a 68010 + +m68020 +Target RejectNegative +Generate code for a 68020 + +m68020-40 +Target RejectNegative +Generate code for a 68040, without any new instructions + +m68020-60 +Target RejectNegative +Generate code for a 68060, without any new instructions + +m68030 +Target RejectNegative +Generate code for a 68030 + +m68040 +Target RejectNegative +Generate code for a 68040 + +m68060 +Target RejectNegative +Generate code for a 68060 + +m68302 +Target RejectNegative +Generate code for a 68302 + +m68332 +Target RejectNegative +Generate code for a 68332 + +; Has no effect on gcc +m68851 +Target +Generate code for a 68851 + +m68881 +Target RejectNegative Mask(HARD_FLOAT) +Generate code that uses 68881 floating-point instructions + +malign-int +Target Report Mask(ALIGN_INT) +Align variables on a 32-bit boundary + +march= +Target RejectNegative Joined +Specify the name of the target architecture + +mbitfield +Target Report Mask(BITFIELD) +Use the bit-field instructions + +mc68000 +Target RejectNegative +Generate code for a 68000 + +mc68020 +Target RejectNegative +Generate code for a 68020 + +mcfv4e +Target RejectNegative +Generate code for a ColdFire v4e + +mcpu= +Target RejectNegative Joined +Specify the target CPU + +mcpu32 +Target RejectNegative +Generate code for a cpu32 + +mdiv +Target Report Mask(CF_HWDIV) +Use hardware division instructions on ColdFire + +mfidoa +Target RejectNegative +Generate code for a Fido A + +mhard-float +Target RejectNegative Mask(HARD_FLOAT) MaskExists +Generate code which uses hardware floating point instructions + +mid-shared-library +Target Report Mask(ID_SHARED_LIBRARY) +Enable ID based shared library + +mnobitfield +Target RejectNegative InverseMask(BITFIELD) +Do not use the bit-field instructions + +mnortd +Target RejectNegative InverseMask(RTD) +Use normal calling convention + +mnoshort +Target RejectNegative InverseMask(SHORT) +Consider type 'int' to be 32 bits wide + +mpcrel +Target Report Mask(PCREL) +Generate pc-relative code + +mrtd +Target Report Mask(RTD) +Use different calling convention using 'rtd' + +msep-data +Target Report Mask(SEP_DATA) +Enable separate data segment + +mshared-library-id= +Target RejectNegative Joined UInteger +ID of shared library to build + +mshort +Target Report Mask(SHORT) +Consider type 'int' to be 16 bits wide + +msoft-float +Target RejectNegative InverseMask(HARD_FLOAT) +Generate code with library calls for floating point + +mstrict-align +Target Report Mask(STRICT_ALIGNMENT) +Do not use unaligned memory references + +mtune= +Target RejectNegative Joined +Tune for the specified target CPU or architecture + +mxgot +Target Report Mask(XGOT) +Support more than 8192 GOT entries on ColdFire + +mxtls +Target Report Mask(XTLS) +Support TLS segment larger than 64K -- cgit v1.2.3