From 554fd8c5195424bdbcabf5de30fdc183aba391bd Mon Sep 17 00:00:00 2001
From: upstream source tree <ports@midipix.org>
Date: Sun, 15 Mar 2015 20:14:05 -0400
Subject: obtained gcc-4.6.4.tar.bz2 from upstream website; verified
 gcc-4.6.4.tar.bz2.sig; imported gcc-4.6.4 source tree from verified upstream
 tarball.

downloading a git-generated archive based on the 'upstream' tag
should provide you with a source tree that is binary identical
to the one extracted from the above tarball.

if you have obtained the source via the command 'git clone',
however, do note that line-endings of files in your working
directory might differ from line-endings of the respective
files in the upstream repository.
---
 gcc/testsuite/gcc.target/bfin/20090411-1.c       |  29 +++++
 gcc/testsuite/gcc.target/bfin/20090914-1.c       |  39 ++++++
 gcc/testsuite/gcc.target/bfin/20090914-2.c       |  31 +++++
 gcc/testsuite/gcc.target/bfin/20090914-3.c       |  10 ++
 gcc/testsuite/gcc.target/bfin/arith.c            |  48 ++++++++
 gcc/testsuite/gcc.target/bfin/bfin.exp           |  87 +++++++++++++
 gcc/testsuite/gcc.target/bfin/frmul.c            | 149 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/bfin/hisilh-O0.c        |  46 +++++++
 gcc/testsuite/gcc.target/bfin/hisilh.c           |  46 +++++++
 gcc/testsuite/gcc.target/bfin/l2.c               |  38 ++++++
 gcc/testsuite/gcc.target/bfin/longcall-1.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/longcall-2.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/loop-autoinc.c     |  16 +++
 gcc/testsuite/gcc.target/bfin/mcpu-bf512.c       |  62 ++++++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf514.c       |  62 ++++++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf516.c       |  62 ++++++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf518.c       |  62 ++++++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf522.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf523.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf524.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf525.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf526.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf527.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf531.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf532.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf533.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf534.c       |  27 ++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf536.c       |  27 ++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf537.c       |  27 ++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf538.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf539.c       |  33 +++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf542.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf542m.c      |  41 +++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf544.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf544m.c      |  41 +++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf547.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf547m.c      |  41 +++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf548.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf548m.c      |  41 +++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf549.c       |  37 ++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf549m.c      |  41 +++++++
 gcc/testsuite/gcc.target/bfin/mcpu-bf561.c       |  27 ++++
 gcc/testsuite/gcc.target/bfin/mcpu-default.c     |  93 ++++++++++++++
 gcc/testsuite/gcc.target/bfin/mul-combine.c      |  45 +++++++
 gcc/testsuite/gcc.target/bfin/saveall.c          |  14 +++
 gcc/testsuite/gcc.target/bfin/shift.c            |  73 +++++++++++
 gcc/testsuite/gcc.target/bfin/wmul-1.c           |  18 +++
 gcc/testsuite/gcc.target/bfin/wmul-2.c           |  12 ++
 gcc/testsuite/gcc.target/bfin/workarounds-1.c    |  27 ++++
 gcc/testsuite/gcc.target/bfin/workarounds-2.c    |  27 ++++
 gcc/testsuite/gcc.target/bfin/workarounds-3.c    |  27 ++++
 gcc/testsuite/gcc.target/bfin/workarounds-4.c    |  27 ++++
 gcc/testsuite/gcc.target/bfin/workarounds-any.c  |  27 ++++
 gcc/testsuite/gcc.target/bfin/workarounds-none.c |  27 ++++
 54 files changed, 2155 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/bfin/20090411-1.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/20090914-1.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/20090914-2.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/20090914-3.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/arith.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/bfin.exp
 create mode 100644 gcc/testsuite/gcc.target/bfin/frmul.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/hisilh-O0.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/hisilh.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/l2.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/longcall-1.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/longcall-2.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/loop-autoinc.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf512.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf514.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf516.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf518.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf522.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf523.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf524.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf525.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf526.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf527.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf531.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf532.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf533.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf534.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf536.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf537.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf538.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf539.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf542.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf542m.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf544.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf544m.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf547.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf547m.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf548.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf548m.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf549.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf549m.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-bf561.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mcpu-default.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/mul-combine.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/saveall.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/shift.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/wmul-1.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/wmul-2.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/workarounds-1.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/workarounds-2.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/workarounds-3.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/workarounds-4.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/workarounds-any.c
 create mode 100644 gcc/testsuite/gcc.target/bfin/workarounds-none.c

(limited to 'gcc/testsuite/gcc.target/bfin')

diff --git a/gcc/testsuite/gcc.target/bfin/20090411-1.c b/gcc/testsuite/gcc.target/bfin/20090411-1.c
new file mode 100644
index 000000000..e301518a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/20090411-1.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target bfin-*-* } } */
+/* { dg-options "-O2" } */
+
+typedef short __v2hi __attribute__ ((vector_size (4)));
+typedef __v2hi raw2x16;
+typedef raw2x16 fract2x16;
+typedef short fract16;
+typedef struct complex_fract16
+{
+  fract16 re;
+  fract16 im;
+} __attribute__ ((aligned (4))) complex_fract16;
+
+
+__inline__ __attribute__ ((always_inline))
+     static complex_fract16 csqu_fr16 (complex_fract16 _a)
+{
+  complex_fract16 _x;
+  fract2x16 i =
+    __builtin_bfin_csqu_fr16 (__builtin_bfin_compose_2x16 ((_a).im, (_a).re));
+  (_x).re = __builtin_bfin_extract_lo (i);
+  (_x).im = __builtin_bfin_extract_hi (i);
+  return _x;
+}
+
+complex_fract16 f (complex_fract16 _a)
+{
+  return csqu_fr16 (_a);
+}
diff --git a/gcc/testsuite/gcc.target/bfin/20090914-1.c b/gcc/testsuite/gcc.target/bfin/20090914-1.c
new file mode 100644
index 000000000..104454057
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/20090914-1.c
@@ -0,0 +1,39 @@
+/* { dg-do compile { target bfin-*-* } } */
+
+typedef short __v2hi __attribute__ ((vector_size (4)));
+typedef __v2hi raw2x16;
+typedef raw2x16 fract2x16;
+
+typedef short fract16;
+typedef struct complex_fract16
+{
+  fract16 re;
+  fract16 im;
+} __attribute__ ((aligned (4))) complex_fract16;
+
+typedef union composite_complex_fract16
+{
+  struct complex_fract16 x;
+  long raw;
+} composite_complex_fract16;
+
+__inline__ __attribute__ ((always_inline))
+static complex_fract16 cmsu_fr16 (complex_fract16 _sum,
+				  complex_fract16 _a, complex_fract16 _b)
+{
+  complex_fract16 r;
+  fract2x16 i =
+    __builtin_bfin_cmplx_msu (__builtin_bfin_compose_2x16
+			      ((_sum).im, (_sum).re),
+			      __builtin_bfin_compose_2x16 ((_a).im, (_a).re),
+			      __builtin_bfin_compose_2x16 ((_b).im, (_b).re));
+  (r).re = __builtin_bfin_extract_lo (i);
+  (r).im = __builtin_bfin_extract_hi (i);
+  return r;
+}
+
+composite_complex_fract16
+f (complex_fract16 _sum, complex_fract16 _a, complex_fract16 _b)
+{
+  return (composite_complex_fract16) cmsu_fr16 (_sum, _a, _b);
+}
diff --git a/gcc/testsuite/gcc.target/bfin/20090914-2.c b/gcc/testsuite/gcc.target/bfin/20090914-2.c
new file mode 100644
index 000000000..55255d7a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/20090914-2.c
@@ -0,0 +1,31 @@
+/* { dg-do compile { target bfin-*-* } } */
+
+typedef short fract16;
+typedef short __v2hi __attribute__ ((vector_size (4)));
+typedef __v2hi raw2x16;
+typedef raw2x16 fract2x16;
+typedef struct complex_fract16 {
+  fract16 re;
+  fract16 im;
+} __attribute__((aligned(4))) complex_fract16;
+
+
+__inline__
+__attribute__ ((always_inline))
+static complex_fract16 cmlt_fr16 (complex_fract16 _a,
+				  complex_fract16 _b)
+{
+  complex_fract16 r;
+  fract2x16 i;
+
+  i = __builtin_bfin_cmplx_mul(__builtin_bfin_compose_2x16((_a).im, (_a).re),
+			       __builtin_bfin_compose_2x16((_b).im, (_b).re));
+  (r).re = __builtin_bfin_extract_lo(i);
+  (r).im = __builtin_bfin_extract_hi(i);
+  return r;
+}
+
+
+complex_fract16 f(complex_fract16 a, complex_fract16 b) {
+  return cmlt_fr16(a, b);
+}
diff --git a/gcc/testsuite/gcc.target/bfin/20090914-3.c b/gcc/testsuite/gcc.target/bfin/20090914-3.c
new file mode 100644
index 000000000..fb0a9e16c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/20090914-3.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target bfin-*-* } } */
+typedef long fract32;
+main() {
+  fract32 val_tmp;
+  fract32 val1 = 0x7FFFFFFF;
+  fract32 val2 = 0x40000000;
+  val_tmp = __builtin_bfin_mult_fr1x32x32 (0x06666667, val1);
+  val2 = __builtin_bfin_mult_fr1x32x32 (0x79999999, val2);
+  val2 = __builtin_bfin_add_fr1x32 (val_tmp, val2);
+}
diff --git a/gcc/testsuite/gcc.target/bfin/arith.c b/gcc/testsuite/gcc.target/bfin/arith.c
new file mode 100644
index 000000000..35029ed32
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/arith.c
@@ -0,0 +1,48 @@
+extern void abort (void);
+extern void exit (int);
+
+typedef short  __v2hi __attribute ((vector_size(4)));
+typedef __v2hi fract2x16;
+typedef short fract16;
+
+int main ()
+{
+  fract2x16 a, b, c, d;
+  fract16 t1, t2;
+  a = __builtin_bfin_compose_2x16 (0x3000, 0x2000);
+  b = __builtin_bfin_compose_2x16 (0x7000, 0x5000);
+  c = __builtin_bfin_compose_2x16 (0x7000, 0xc000);
+
+  d = __builtin_bfin_add_fr2x16 (a, b);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x7000 || t2 != 0x7fff)
+    abort ();
+
+  d = __builtin_bfin_sub_fr2x16 (a, b);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != -0x3000 || t2 != -0x4000)
+    abort ();
+
+  d = __builtin_bfin_negate_fr2x16 (c);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x4000 || t2 != -0x7000)
+    abort ();
+  
+  if (__builtin_bfin_add_fr1x32 (0x7fffffff, 1) != 0x7fffffff)
+    abort ();
+
+  if (__builtin_bfin_add_fr1x32 (0x80000000, -1) != 0x80000000)
+    abort ();
+    
+  if (__builtin_bfin_add_fr1x32 (0x80000001, -1) != 0x80000000)
+    abort ();
+    
+  if (__builtin_bfin_add_fr1x32 (0xFEDCBA98, 0x11111111) != 0x0FEDCBA9)
+    abort ();
+    
+  exit (0);
+}
+
diff --git a/gcc/testsuite/gcc.target/bfin/bfin.exp b/gcc/testsuite/gcc.target/bfin/bfin.exp
new file mode 100644
index 000000000..85a50a5ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/bfin.exp
@@ -0,0 +1,87 @@
+# Copyright (C) 2007, 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an BFIN target.
+if ![istarget bfin-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# Like dg-options, but treats certain Blackfin-specific options specially:
+#
+#    -mcpu=*
+#	Select the target cpu. Skip the test if the multilib flags force
+#	a different cpu.
+proc dg-bfin-options {args} {
+    upvar dg-extra-tool-flags extra_tool_flags
+    upvar dg-do-what do_what
+
+    set multilib_cpu ""
+    set cpu ""
+
+    foreach flag [target_info multilib_flags] {
+	regexp "^-mcpu=(.*)" $flag dummy multilib_cpu
+    }
+
+    set flags [lindex $args 1]
+
+    foreach flag $flags {
+	regexp "^-mcpu=(.*)" $flag dummy cpu
+    }
+
+    if {$multilib_cpu == "" || $multilib_cpu == $cpu} {
+	set extra_tool_flags $flags
+    } else {
+	set do_what [list [lindex $do_what 0] "N" "P"]
+    }
+}
+
+# dg-bfin-processors can be used to specify the processors which can
+# run the test case.
+proc dg-bfin-processors {args} {
+    upvar dg-extra-tool-flags extra_tool_flags
+    upvar dg-do-what do_what
+
+    set multilib_cpu ""
+    set cpu ""
+
+    foreach flag [target_info multilib_flags] {
+	regexp "^-mcpu=([^-]*)" $flag dummy multilib_cpu
+    }
+
+    set cpus [lindex $args 1]
+
+    foreach cpu $cpus {
+	if {$multilib_cpu == $cpu} {
+	    return
+	}
+    }
+
+    set do_what [list [lindex $do_what 0] "N" "P"]
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]]	"" ""
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/bfin/frmul.c b/gcc/testsuite/gcc.target/bfin/frmul.c
new file mode 100644
index 000000000..61930bae5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/frmul.c
@@ -0,0 +1,149 @@
+extern void abort (void);
+extern void exit (int);
+
+typedef short  __v2hi __attribute ((vector_size(4)));
+typedef __v2hi fract2x16;
+typedef short fract16;
+
+#define GETVECT(HILO1,HILO2,IN1,IN2)					\
+  __builtin_bfin_compose_2x16 ((HILO2) ? __builtin_bfin_extract_hi (IN1) : __builtin_bfin_extract_lo (IN1), \
+			  (HILO1) ? __builtin_bfin_extract_hi (IN2) : __builtin_bfin_extract_lo (IN2))
+#define DOTEST(IN1, IN2, HL1, HL2, HL3, HL4)					\
+  __builtin_bfin_multr_fr2x16 (GETVECT (HL1, HL2, IN1, IN1), \
+			  GETVECT (HL3, HL4, IN2, IN2))
+
+#define FUNC(HL1, HL2, HL3, HL4) \
+  fract2x16 foo ## HL1 ## HL2 ## HL3 ## HL4 (fract2x16 a, fract2x16 b)\
+  { \
+    return DOTEST(a, b, HL1, HL2, HL3, HL4);\
+  }
+
+FUNC (0, 0, 0, 0)
+FUNC (1, 0, 0, 0)
+FUNC (0, 1, 0, 0)
+FUNC (1, 1, 0, 0)
+FUNC (0, 0, 1, 0)
+FUNC (1, 0, 1, 0)
+FUNC (0, 1, 1, 0)
+FUNC (1, 1, 1, 0)
+FUNC (0, 0, 0, 1)
+FUNC (1, 0, 0, 1)
+FUNC (0, 1, 0, 1)
+FUNC (1, 1, 0, 1)
+FUNC (0, 0, 1, 1)
+FUNC (1, 0, 1, 1)
+FUNC (0, 1, 1, 1)
+FUNC (1, 1, 1, 1)
+
+#define RES1 0x1400
+#define RES2 0x1e00
+#define RES3 0x1c00
+#define RES4 0x2a00
+
+
+int main ()
+{
+  fract2x16 a, b, c;
+  fract16 t1, t2;
+  a = __builtin_bfin_compose_2x16 (0x3000, 0x2000);
+  b = __builtin_bfin_compose_2x16 (0x7000, 0x5000);
+
+  c = foo0000 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES1 || t2 != RES1)
+    abort ();
+
+  c = foo1000 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES2 || t2 != RES1)
+    abort ();
+
+  c = foo0100 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES1 || t2 != RES2)
+    abort ();
+
+  c = foo1100 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES2 || t2 != RES2)
+    abort ();
+
+  c = foo0010 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES3 || t2 != RES1)
+    abort ();
+
+  c = foo1010 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES4 || t2 != RES1)
+    abort ();
+
+  c = foo0110 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES3 || t2 != RES2)
+    abort ();
+
+  c = foo1110 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES4 || t2 != RES2)
+    abort ();
+
+  c = foo0001 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES1 || t2 != RES3)
+    abort ();
+
+  c = foo1001 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES2 || t2 != RES3)
+    abort ();
+
+  c = foo0101 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES1 || t2 != RES4)
+    abort ();
+
+  c = foo1101 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES2 || t2 != RES4)
+    abort ();
+
+  c = foo0011 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES3 || t2 != RES3)
+    abort ();
+
+  c = foo1011 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES4 || t2 != RES3)
+    abort ();
+
+  c = foo0111 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES3 || t2 != RES4)
+    abort ();
+
+  c = foo1111 (a, b);
+  t1 = __builtin_bfin_extract_lo (c);
+  t2 = __builtin_bfin_extract_hi (c);
+  if (t1 != RES4 || t2 != RES4)
+    abort ();
+
+  exit (0);
+}
+
diff --git a/gcc/testsuite/gcc.target/bfin/hisilh-O0.c b/gcc/testsuite/gcc.target/bfin/hisilh-O0.c
new file mode 100644
index 000000000..50786b8be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/hisilh-O0.c
@@ -0,0 +1,46 @@
+/* { dg-do run { target bfin*-*-* } } */
+/* { dg-options "-O0" } */
+#include <stdlib.h>
+typedef short raw2x16 __attribute__ ((vector_size(4)));
+
+int x;
+
+int ll(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisill(a, b);
+    return x;
+}
+
+int lh(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisilh(a, b);
+    return x;
+}
+
+int hl(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisihl(a, b);
+    return x;
+}
+
+int hh(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisihh(a, b);
+    return x;
+}
+
+int main ()
+{
+    raw2x16 a = __builtin_bfin_compose_2x16 (0x1234, 0x5678);
+    raw2x16 b = __builtin_bfin_compose_2x16 (0xFEDC, 0xBA98);
+    if (ll (a, b) != 0xe88e8740)
+	abort ();
+    if (lh (a, b) != 0xff9d5f20)
+	abort ();
+    if (hl (a, b) != 0xfb1096e0)
+	abort ();
+    if (hh (a, b) != 0xffeb3cb0)
+	abort ();
+    
+    return 0;
+}
diff --git a/gcc/testsuite/gcc.target/bfin/hisilh.c b/gcc/testsuite/gcc.target/bfin/hisilh.c
new file mode 100644
index 000000000..4efbfd449
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/hisilh.c
@@ -0,0 +1,46 @@
+/* { dg-do run { target bfin*-*-* } } */
+/* { dg-options "-O2" } */
+#include <stdlib.h>
+typedef short raw2x16 __attribute__ ((vector_size(4)));
+
+int x;
+
+int ll(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisill(a, b);
+    return x;
+}
+
+int lh(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisilh(a, b);
+    return x;
+}
+
+int hl(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisihl(a, b);
+    return x;
+}
+
+int hh(raw2x16 a, raw2x16 b)
+{
+    x = __builtin_bfin_mulhisihh(a, b);
+    return x;
+}
+
+int main ()
+{
+    raw2x16 a = __builtin_bfin_compose_2x16 (0x1234, 0x5678);
+    raw2x16 b = __builtin_bfin_compose_2x16 (0xFEDC, 0xBA98);
+    if (ll (a, b) != 0xe88e8740)
+	abort ();
+    if (lh (a, b) != 0xff9d5f20)
+	abort ();
+    if (hl (a, b) != 0xfb1096e0)
+	abort ();
+    if (hh (a, b) != 0xffeb3cb0)
+	abort ();
+    
+    return 0;
+}
diff --git a/gcc/testsuite/gcc.target/bfin/l2.c b/gcc/testsuite/gcc.target/bfin/l2.c
new file mode 100644
index 000000000..56f64cc82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/l2.c
@@ -0,0 +1,38 @@
+/* { dg-do run { target bfin-*-linux-uclibc } } */
+/* { dg-bfin-processors bf544 bf547 bf548 bf549 bf561} */
+
+#if defined(__ADSPBF544__)
+#define L2_START 0xFEB00000
+#define L2_LENGTH 0x10000
+#else
+#define L2_START 0xFEB00000
+#define L2_LENGTH 0x20000
+#endif
+
+int n __attribute__ ((l2));
+
+int foo (int i) __attribute__ ((l2));
+
+int foo (int a)
+{
+  return a + 1;
+}
+
+int main ()
+{
+  int r;
+  unsigned long *p;
+
+  p = (unsigned long *) foo;
+  if (*p < L2_START || *p >= L2_START + L2_LENGTH)
+    return 1;
+
+  p = (unsigned long *) &n;
+  if ((unsigned long) p < L2_START || (unsigned long) p >= L2_START + L2_LENGTH)
+    return 2;
+
+  if (foo (0) != 1)
+    return 3;
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/bfin/longcall-1.c b/gcc/testsuite/gcc.target/bfin/longcall-1.c
new file mode 100644
index 000000000..138707e9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/longcall-1.c
@@ -0,0 +1,33 @@
+/* { dg-do compile { target bfin-*-* } } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "call\[^\\n\]*foo" } } */
+/* { dg-final { scan-assembler-not "jump\[^\\n\]*foo" } } */
+/* { dg-final { scan-assembler "call\[^\\n\]*baz" } } */
+/* { dg-final { scan-assembler "jump\[^\\n\]*baz" } } */
+/* { dg-final { scan-assembler "call\[^\\n\]*bar" } } */
+/* { dg-final { scan-assembler "jump\[^\\n\]*bar" } } */
+
+extern void foo () __attribute__((longcall));
+extern void bar () __attribute__((shortcall));
+extern void baz ();
+
+int t1 ()
+{
+    foo ();
+    bar ();
+    baz ();
+    return 4;
+}
+
+void t2 ()
+{
+    foo ();
+}
+void t3 ()
+{
+    bar ();
+}
+void t4 ()
+{
+    baz ();
+}
diff --git a/gcc/testsuite/gcc.target/bfin/longcall-2.c b/gcc/testsuite/gcc.target/bfin/longcall-2.c
new file mode 100644
index 000000000..33189b01f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/longcall-2.c
@@ -0,0 +1,33 @@
+/* { dg-do compile { target bfin-*-* } } */
+/* { dg-options "-O2 -mlong-calls" } */
+/* { dg-final { scan-assembler-not "call\[^\\n\]*foo" } } */
+/* { dg-final { scan-assembler-not "jump\[^\\n\]*foo" } } */
+/* { dg-final { scan-assembler-not "call\[^\\n\]*baz" } } */
+/* { dg-final { scan-assembler-not "jump\[^\\n\]*baz" } } */
+/* { dg-final { scan-assembler "call\[^\\n\]*bar" } } */
+/* { dg-final { scan-assembler "jump\[^\\n\]*bar" } } */
+
+extern void foo () __attribute__((longcall));
+extern void bar () __attribute__((shortcall));
+extern void baz ();
+
+int t1 ()
+{
+    foo ();
+    bar ();
+    baz ();
+    return 4;
+}
+
+void t2 ()
+{
+    foo ();
+}
+void t3 ()
+{
+    bar ();
+}
+void t4 ()
+{
+    baz ();
+}
diff --git a/gcc/testsuite/gcc.target/bfin/loop-autoinc.c b/gcc/testsuite/gcc.target/bfin/loop-autoinc.c
new file mode 100644
index 000000000..3dc718298
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/loop-autoinc.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler " = \\\[\[PI\].\\+\\+\\\];" } } */
+extern int x[];
+extern void bar();
+int foo ()
+{
+  int i;
+  int sum = 0;
+  for (i = 0; i < 100; i++) {
+    sum += x[i];
+    if (sum & 1)
+      sum *= sum;
+  }
+  return sum;
+}
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c
new file mode 100644
index 000000000..71fbcf38d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c
@@ -0,0 +1,62 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf512" } */
+
+#ifndef __ADSPBF512__
+#error "__ADSPBF512__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf512" } */
+
+#ifndef __ADSPBF512__
+#error "__ADSPBF512__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c
new file mode 100644
index 000000000..b1ae2a2ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c
@@ -0,0 +1,62 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf514" } */
+
+#ifndef __ADSPBF514__
+#error "__ADSPBF514__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf514" } */
+
+#ifndef __ADSPBF514__
+#error "__ADSPBF514__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c
new file mode 100644
index 000000000..675d2659d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c
@@ -0,0 +1,62 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf516" } */
+
+#ifndef __ADSPBF516__
+#error "__ADSPBF516__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf516" } */
+
+#ifndef __ADSPBF516__
+#error "__ADSPBF516__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c
new file mode 100644
index 000000000..d0675783b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c
@@ -0,0 +1,62 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf518" } */
+
+#ifndef __ADSPBF518__
+#error "__ADSPBF518__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf518" } */
+
+#ifndef __ADSPBF518__
+#error "__ADSPBF518__ is not defined"
+#endif
+
+#ifndef __ADSPBF51x__
+#error "__ADSPBF51x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c
new file mode 100644
index 000000000..58c325e0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf522.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf522" } */
+
+#ifndef __ADSPBF522__
+#error "__ADSPBF522__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c
new file mode 100644
index 000000000..10f71eddb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf523.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf523" } */
+
+#ifndef __ADSPBF523__
+#error "__ADSPBF523__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c
new file mode 100644
index 000000000..d8e30c4f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf524.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf524" } */
+
+#ifndef __ADSPBF524__
+#error "__ADSPBF524__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c
new file mode 100644
index 000000000..0e021e46f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf525.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf525" } */
+
+#ifndef __ADSPBF525__
+#error "__ADSPBF525__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c
new file mode 100644
index 000000000..e3e248a9b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf526.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf526" } */
+
+#ifndef __ADSPBF526__
+#error "__ADSPBF526__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c
new file mode 100644
index 000000000..41f493114
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf527.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf527" } */
+
+#ifndef __ADSPBF527__
+#error "__ADSPBF527__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c
new file mode 100644
index 000000000..ebcf39822
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf531.c
@@ -0,0 +1,33 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf531" } */
+
+#ifndef __ADSPBF531__
+#error "__ADSPBF531__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0006
+#error "__SILICON_REVISION__ is not 0x0006"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0005
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c
new file mode 100644
index 000000000..18ff74a4c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf532.c
@@ -0,0 +1,33 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf532" } */
+
+#ifndef __ADSPBF532__
+#error "__ADSPBF532__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0006
+#error "__SILICON_REVISION__ is not 0x0006"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0005
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c
new file mode 100644
index 000000000..d961d7a72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf533.c
@@ -0,0 +1,33 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf533" } */
+
+#ifndef __ADSPBF533__
+#error "__ADSPBF533__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0006
+#error "__SILICON_REVISION__ is not 0x0006"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0005
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf534.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf534.c
new file mode 100644
index 000000000..cd354596d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf534.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf534" } */
+
+#ifndef __ADSPBF534__
+#error "__ADSPBF534__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf536.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf536.c
new file mode 100644
index 000000000..0ac9ebf9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf536.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf536" } */
+
+#ifndef __ADSPBF536__
+#error "__ADSPBF536__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf537.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf537.c
new file mode 100644
index 000000000..66a87c045
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf537.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c
new file mode 100644
index 000000000..188f8708c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf538.c
@@ -0,0 +1,33 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf538" } */
+
+#ifndef __ADSPBF538__
+#error "__ADSPBF538__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0004
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c
new file mode 100644
index 000000000..acb0d8936
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf539.c
@@ -0,0 +1,33 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf539" } */
+
+#ifndef __ADSPBF539__
+#error "__ADSPBF539__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0004
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c
new file mode 100644
index 000000000..4d95d65de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf542.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf542" } */
+
+#ifndef __ADSPBF542__
+#error "__ADSPBF542__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf542m.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf542m.c
new file mode 100644
index 000000000..74d377045
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf542m.c
@@ -0,0 +1,41 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf542m" } */
+
+#ifndef __ADSPBF542__
+#error "__ADSPBF542__ is not defined"
+#endif
+
+#ifndef __ADSPBF542M__
+#error "__ADSPBF542M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c
new file mode 100644
index 000000000..39314b008
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf544.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf544" } */
+
+#ifndef __ADSPBF544__
+#error "__ADSPBF544__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf544m.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf544m.c
new file mode 100644
index 000000000..a0289378c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf544m.c
@@ -0,0 +1,41 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf544m" } */
+
+#ifndef __ADSPBF544__
+#error "__ADSPBF544__ is not defined"
+#endif
+
+#ifndef __ADSPBF544M__
+#error "__ADSPBF544M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c
new file mode 100644
index 000000000..4036c02f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf547.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf547" } */
+
+#ifndef __ADSPBF547__
+#error "__ADSPBF547__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf547m.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf547m.c
new file mode 100644
index 000000000..e5e1f9b30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf547m.c
@@ -0,0 +1,41 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf547m" } */
+
+#ifndef __ADSPBF547__
+#error "__ADSPBF547__ is not defined"
+#endif
+
+#ifndef __ADSPBF547M__
+#error "__ADSPBF547M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c
new file mode 100644
index 000000000..71d3bb87b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf548.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf548" } */
+
+#ifndef __ADSPBF548__
+#error "__ADSPBF548__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf548m.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf548m.c
new file mode 100644
index 000000000..47afafffe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf548m.c
@@ -0,0 +1,41 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf548m" } */
+
+#ifndef __ADSPBF548__
+#error "__ADSPBF548__ is not defined"
+#endif
+
+#ifndef __ADSPBF548M__
+#error "__ADSPBF548M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c
new file mode 100644
index 000000000..201b1019b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf549.c
@@ -0,0 +1,37 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf549" } */
+
+#ifndef __ADSPBF549__
+#error "__ADSPBF549__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0002
+#error "__SILICON_REVISION__ is not 0x0002"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf549m.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf549m.c
new file mode 100644
index 000000000..8aa7ad560
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf549m.c
@@ -0,0 +1,41 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf549m" } */
+
+#ifndef __ADSPBF549__
+#error "__ADSPBF549__ is not defined"
+#endif
+
+#ifndef __ADSPBF549M__
+#error "__ADSPBF549M__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#if __SILICON_REVISION__ <= 0x0001
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+#else
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf561.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf561.c
new file mode 100644
index 000000000..e2eab3ba3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf561.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf561" } */
+
+#ifndef __ADSPBF561__
+#error "__ADSPBF561__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-default.c b/gcc/testsuite/gcc.target/bfin/mcpu-default.c
new file mode 100644
index 000000000..9109701cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mcpu-default.c
@@ -0,0 +1,93 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "" } */
+
+#ifdef __ADSPBF522__
+#error "__ADSPBF522__ is defined"
+#endif
+#ifdef __ADSPBF523__
+#error "__ADSPBF523__ is defined"
+#endif
+#ifdef __ADSPBF524__
+#error "__ADSPBF524__ is defined"
+#endif
+#ifdef __ADSPBF525__
+#error "__ADSPBF525__ is defined"
+#endif
+#ifdef __ADSPBF526__
+#error "__ADSPBF526__ is defined"
+#endif
+#ifdef __ADSPBF527__
+#error "__ADSPBF527__ is defined"
+#endif
+
+
+#ifdef __ADSPBF531__
+#error "__ADSPBF531__ is defined"
+#endif
+#ifdef __ADSPBF532__
+#error "__ADSPBF532__ is defined"
+#endif
+#ifdef __ADSPBF533__
+#error "__ADSPBF533__ is defined"
+#endif
+#ifdef __ADSPBF534__
+#error "__ADSPBF534__ is defined"
+#endif
+#ifdef __ADSPBF536__
+#error "__ADSPBF536__ is defined"
+#endif
+#ifdef __ADSPBF537__
+#error "__ADSPBF537__ is defined"
+#endif
+#ifdef __ADSPBF538__
+#error "__ADSPBF538__ is defined"
+#endif
+#ifdef __ADSPBF539__
+#error "__ADSPBF539__ is defined"
+#endif
+
+#ifdef __ADSPBF542__
+#error "__ADSPBF542__ is defined"
+#endif
+#ifdef __ADSPBF544__
+#error "__ADSPBF544__ is defined"
+#endif
+#ifdef __ADSPBF547__
+#error "__ADSPBF547__ is defined"
+#endif
+#ifdef __ADSPBF548__
+#error "__ADSPBF548__ is defined"
+#endif
+#ifdef __ADSPBF549__
+#error "__ADSPBF548__ is defined"
+#endif
+
+#ifdef __ADSPBF561__
+#error "__ADSPBF561__ is defined"
+#endif
+
+
+#ifndef __SILICON_REVISION__
+#error "__SILICON_REVISION__ is not defined"
+#else
+#if __SILICON_REVISION__ != 0xffff
+#error "__SILICON_REVISION__ is not 0xFFFF"
+#endif
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is not defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/mul-combine.c b/gcc/testsuite/gcc.target/bfin/mul-combine.c
new file mode 100644
index 000000000..2a811b332
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/mul-combine.c
@@ -0,0 +1,45 @@
+/* Make sure combine eliminates all unnecessary instructions for the
+   sixteen cases of hi/lo multiplications.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-not "<<" } } */
+/* { dg-final { scan-assembler-not "PACK" } } */
+
+extern void abort (void);
+extern void exit (int);
+
+typedef short  __v2hi __attribute ((vector_size(4)));
+typedef __v2hi fract2x16;
+typedef short fract16;
+
+#define GETVECT(HILO1,HILO2,IN1,IN2)					\
+  __builtin_bfin_compose_2x16 ((HILO2) ? __builtin_bfin_extract_hi (IN1) : __builtin_bfin_extract_lo (IN1), \
+			  (HILO1) ? __builtin_bfin_extract_hi (IN2) : __builtin_bfin_extract_lo (IN2))
+#define DOTEST(IN1, IN2, HL1, HL2, HL3, HL4)					\
+  __builtin_bfin_multr_fr2x16 (GETVECT (HL1, HL2, IN1, IN1), \
+			  GETVECT (HL3, HL4, IN2, IN2))
+
+#define FUNC(HL1, HL2, HL3, HL4) \
+  fract2x16 foo ## HL1 ## HL2 ## HL3 ## HL4 (fract2x16 a, fract2x16 b)\
+  { \
+    return DOTEST(a, b, HL1, HL2, HL3, HL4);\
+  }
+
+FUNC (0, 0, 0, 0)
+FUNC (1, 0, 0, 0)
+FUNC (0, 1, 0, 0)
+FUNC (1, 1, 0, 0)
+FUNC (0, 0, 1, 0)
+FUNC (1, 0, 1, 0)
+FUNC (0, 1, 1, 0)
+FUNC (1, 1, 1, 0)
+FUNC (0, 0, 0, 1)
+FUNC (1, 0, 0, 1)
+FUNC (0, 1, 0, 1)
+FUNC (1, 1, 0, 1)
+FUNC (0, 0, 1, 1)
+FUNC (1, 0, 1, 1)
+FUNC (0, 1, 1, 1)
+FUNC (1, 1, 1, 1)
diff --git a/gcc/testsuite/gcc.target/bfin/saveall.c b/gcc/testsuite/gcc.target/bfin/saveall.c
new file mode 100644
index 000000000..19f9decd7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/saveall.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target bfin*-*-* } } */
+/* { dg-options "-fomit-frame-pointer" } */
+
+void foo (void) __attribute__ ((saveall));
+void foo ()
+{
+  asm ("R0 = 0; RETS = R0;");
+}
+
+int main ()
+{
+  foo ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/bfin/shift.c b/gcc/testsuite/gcc.target/bfin/shift.c
new file mode 100644
index 000000000..4a0e9175c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/shift.c
@@ -0,0 +1,73 @@
+extern void abort (void);
+extern void exit (int);
+
+typedef short  __v2hi __attribute ((vector_size(4)));
+typedef __v2hi fract2x16;
+typedef short fract16;
+
+int main ()
+{
+  fract2x16 a, b, c, d;
+  fract16 t1, t2;
+  a = __builtin_bfin_compose_2x16 (0xe005, 0x1000);
+  b = __builtin_bfin_compose_2x16 (0x7000, 0x5000);
+  c = __builtin_bfin_compose_2x16 (0x7000, 0xc000);
+
+  d = __builtin_bfin_shl_fr2x16 (c, 2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if ((unsigned short)t1 != 0x8000 || t2 != 0x7fff)
+    abort ();
+
+  d = __builtin_bfin_shl_fr2x16 (c, -2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if ((unsigned short)t1 != 0xf000 || t2 != 0x1c00)
+    abort ();
+
+  d = __builtin_bfin_shl_fr2x16 (a, 2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x4000 || (unsigned short)t2 != 0x8014)
+    abort ();
+
+  d = __builtin_bfin_shl_fr2x16 (c, -4);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if ((unsigned short)t1 != 0xfc00 || t2 != 0x0700)
+    abort ();
+
+  d = __builtin_bfin_shl_fr2x16 (c, 2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if ((unsigned short)t1 != 0x8000 || t2 != 0x7fff)
+    abort ();
+
+  d = __builtin_bfin_shl_fr2x16 (a, -2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x0400 || (unsigned short)t2 != 0xf801)
+    abort ();
+
+  /* lsh */
+  d = __builtin_bfin_lshl_fr2x16 (c, -4);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x0c00 || t2 != 0x0700)
+    abort ();
+
+  d = __builtin_bfin_lshl_fr2x16 (c, 2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x0000 || t2 != -0x4000)
+    abort ();
+
+  d = __builtin_bfin_lshl_fr2x16 (a, -2);
+  t1 = __builtin_bfin_extract_lo (d);
+  t2 = __builtin_bfin_extract_hi (d);
+  if (t1 != 0x0400 || (unsigned short)t2 != 0x3801)
+    abort ();
+
+  exit (0);
+}
+
diff --git a/gcc/testsuite/gcc.target/bfin/wmul-1.c b/gcc/testsuite/gcc.target/bfin/wmul-1.c
new file mode 100644
index 000000000..f17fc199e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/wmul-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int mac(const short *a, const short *b, int sqr, int *sum)
+{
+  int i;
+  int dotp = *sum;
+
+  for (i = 0; i < 150; i++) {
+    dotp += b[i] * a[i];
+    sqr += b[i] * b[i];
+  }
+
+  *sum = dotp;
+  return sqr;
+}
+
+/* { dg-final { scan-assembler-times "\\(IS\\)" 2 } } */
diff --git a/gcc/testsuite/gcc.target/bfin/wmul-2.c b/gcc/testsuite/gcc.target/bfin/wmul-2.c
new file mode 100644
index 000000000..2f2d2527e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/wmul-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void vec_mpy(int y[], const short x[], short scaler)
+{
+ int i;
+
+ for (i = 0; i < 150; i++)
+   y[i] += ((scaler * x[i]) >> 31);
+}
+
+/* { dg-final { scan-assembler-times "\\(IS\\)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/bfin/workarounds-1.c b/gcc/testsuite/gcc.target/bfin/workarounds-1.c
new file mode 100644
index 000000000..53ca1d7b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/workarounds-1.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcsync-anomaly -mcpu=bf537" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/workarounds-2.c b/gcc/testsuite/gcc.target/bfin/workarounds-2.c
new file mode 100644
index 000000000..c639a204e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/workarounds-2.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mno-specld-anomaly -mcpu=bf537" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/workarounds-3.c b/gcc/testsuite/gcc.target/bfin/workarounds-3.c
new file mode 100644
index 000000000..3209f2348
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/workarounds-3.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-none" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#ifdef __SILICON_REVISION__
+#error "__SILICON_REVISION__ is defined"
+#endif
+
+#ifdef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/workarounds-4.c b/gcc/testsuite/gcc.target/bfin/workarounds-4.c
new file mode 100644
index 000000000..62bd382b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/workarounds-4.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-any" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0xffff
+#error "__SILICON_REVISION__ is not 0xffff"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/workarounds-any.c b/gcc/testsuite/gcc.target/bfin/workarounds-any.c
new file mode 100644
index 000000000..62bd382b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/workarounds-any.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-any" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0xffff
+#error "__SILICON_REVISION__ is not 0xffff"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
diff --git a/gcc/testsuite/gcc.target/bfin/workarounds-none.c b/gcc/testsuite/gcc.target/bfin/workarounds-none.c
new file mode 100644
index 000000000..3209f2348
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bfin/workarounds-none.c
@@ -0,0 +1,27 @@
+/* Test for -mcpu=.  */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-none" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#ifdef __SILICON_REVISION__
+#error "__SILICON_REVISION__ is defined"
+#endif
+
+#ifdef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is defined"
+#endif
+
+#ifdef __WORKAROUND_RETS
+#error "__WORKAROUND_RETS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
-- 
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