From 554fd8c5195424bdbcabf5de30fdc183aba391bd Mon Sep 17 00:00:00 2001 From: upstream source tree Date: Sun, 15 Mar 2015 20:14:05 -0400 Subject: obtained gcc-4.6.4.tar.bz2 from upstream website; verified gcc-4.6.4.tar.bz2.sig; imported gcc-4.6.4 source tree from verified upstream tarball. downloading a git-generated archive based on the 'upstream' tag should provide you with a source tree that is binary identical to the one extracted from the above tarball. if you have obtained the source via the command 'git clone', however, do note that line-endings of files in your working directory might differ from line-endings of the respective files in the upstream repository. --- gcc/testsuite/gcc.target/sh/20080410-1.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 gcc/testsuite/gcc.target/sh/20080410-1.c (limited to 'gcc/testsuite/gcc.target/sh/20080410-1.c') diff --git a/gcc/testsuite/gcc.target/sh/20080410-1.c b/gcc/testsuite/gcc.target/sh/20080410-1.c new file mode 100644 index 000000000..0ba7792c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/20080410-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile { target "sh-*-*" } } */ +/* { dg-options "-O0 -m4 -ml" } */ +/* { dg-final { scan-assembler-not "add\tr0,r0" } } */ + +/* This test checks that chain reloads conflict. I they don't + conflict, the same hard register R0 is used for the both reloads + but in this case the second reload needs an intermediate register + (which is the reload register). As the result we have the + following code + + mov #4,r0 -- first reload + mov r14,r0 -- second reload + add r0,r0 -- second reload + + The right code should be + + mov #4,r0 -- first reload + mov r14,r1 -- second reload + add r0,r1 -- second reload + +*/ + +_Complex float foo_float (); + +void bar_float () +{ + __real foo_float (); +} -- cgit v1.2.3