From 6fdde6b5a18c0d83ebae2eefb13ae72f6d022b38 Mon Sep 17 00:00:00 2001
From: midipix <writeonce@midipix.org>
Date: Wed, 2 Nov 2016 17:57:34 -0400
Subject: build system: code generation: added missing dependency on tree.tag.

---
 project/codegen.mk | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

(limited to 'project')

diff --git a/project/codegen.mk b/project/codegen.mk
index 72d6000..19c6ebe 100644
--- a/project/codegen.mk
+++ b/project/codegen.mk
@@ -75,27 +75,27 @@ build/gen/include/libfirm/nodes.h:	$(SOURCE_DIR)/scripts/templates/nodes.h \
 GEN_EMITTER_TOOL = $(SOURCE_DIR)/ir/be/scripts/generate_emitter.pl
 
 
-$(GEN_BE_DIR_ARM)/emitter.tag:		$(GEN_EMITTER_TOOL) $(GEN_SPEC_ARM)
+$(GEN_BE_DIR_ARM)/emitter.tag:		$(GEN_EMITTER_TOOL) $(GEN_SPEC_ARM) tree.tag
 	$(GEN_EMITTER_TOOL) $(GEN_SPEC_ARM) $(GEN_BE_DIR_ARM)
 	touch $@
 
 
-$(GEN_BE_DIR_AMD64)/emitter.tag:	$(GEN_EMITTER_TOOL) $(GEN_SPEC_AMD64)
+$(GEN_BE_DIR_AMD64)/emitter.tag:	$(GEN_EMITTER_TOOL) $(GEN_SPEC_AMD64) tree.tag
 	$(GEN_EMITTER_TOOL) $(GEN_SPEC_AMD64) $(GEN_BE_DIR_AMD64)
 	touch $@
 
 
-$(GEN_BE_DIR_IA32)/emitter.tag:		$(GEN_EMITTER_TOOL) $(GEN_SPEC_IA32)
+$(GEN_BE_DIR_IA32)/emitter.tag:		$(GEN_EMITTER_TOOL) $(GEN_SPEC_IA32) tree.tag
 	$(GEN_EMITTER_TOOL) $(GEN_SPEC_IA32) $(GEN_BE_DIR_IA32)
 	touch $@
 
 
-$(GEN_BE_DIR_SPARC)/emitter.tag:	$(GEN_EMITTER_TOOL) $(GEN_SPEC_SPARC)
+$(GEN_BE_DIR_SPARC)/emitter.tag:	$(GEN_EMITTER_TOOL) $(GEN_SPEC_SPARC) tree.tag
 	$(GEN_EMITTER_TOOL) $(GEN_SPEC_SPARC) $(GEN_BE_DIR_SPARC)
 	touch $@
 
 
-$(GEN_BE_DIR_TEMPLATE)/emitter.tag:	$(GEN_EMITTER_TOOL) $(GEN_SPEC_TEMPLATE)
+$(GEN_BE_DIR_TEMPLATE)/emitter.tag:	$(GEN_EMITTER_TOOL) $(GEN_SPEC_TEMPLATE) tree.tag
 	$(GEN_EMITTER_TOOL) $(GEN_SPEC_TEMPLATE) $(GEN_BE_DIR_TEMPLATE)
 	touch $@
 
@@ -122,27 +122,27 @@ $(GEN_BE_DIR_TEMPLATE)/gen_TEMPLATE_emitter.h:	$(GEN_BE_DIR_TEMPLATE)/emitter.ta
 GEN_OPCODES_TOOL = $(SOURCE_DIR)/ir/be/scripts/generate_new_opcodes.pl
 
 
-$(GEN_BE_DIR_ARM)/opcodes.tag:		$(GEN_OPCODES_TOOL) $(GEN_SPEC_ARM)
+$(GEN_BE_DIR_ARM)/opcodes.tag:		$(GEN_OPCODES_TOOL) $(GEN_SPEC_ARM) tree.tag
 	$(GEN_OPCODES_TOOL) $(GEN_SPEC_ARM) $(GEN_BE_DIR_ARM)
 	touch $@
 
 
-$(GEN_BE_DIR_AMD64)/opcodes.tag:	$(GEN_OPCODES_TOOL) $(GEN_SPEC_AMD64)
+$(GEN_BE_DIR_AMD64)/opcodes.tag:	$(GEN_OPCODES_TOOL) $(GEN_SPEC_AMD64) tree.tag
 	$(GEN_OPCODES_TOOL) $(GEN_SPEC_AMD64) $(GEN_BE_DIR_AMD64)
 	touch $@
 
 
-$(GEN_BE_DIR_IA32)/opcodes.tag:		$(GEN_OPCODES_TOOL) $(GEN_SPEC_IA32)
+$(GEN_BE_DIR_IA32)/opcodes.tag:		$(GEN_OPCODES_TOOL) $(GEN_SPEC_IA32) tree.tag
 	$(GEN_OPCODES_TOOL) $(GEN_SPEC_IA32) $(GEN_BE_DIR_IA32)
 	touch $@
 
 
-$(GEN_BE_DIR_SPARC)/opcodes.tag:	$(GEN_OPCODES_TOOL) $(GEN_SPEC_SPARC)
+$(GEN_BE_DIR_SPARC)/opcodes.tag:	$(GEN_OPCODES_TOOL) $(GEN_SPEC_SPARC) tree.tag
 	$(GEN_OPCODES_TOOL) $(GEN_SPEC_SPARC) $(GEN_BE_DIR_SPARC)
 	touch $@
 
 
-$(GEN_BE_DIR_TEMPLATE)/opcodes.tag:	$(GEN_OPCODES_TOOL) $(GEN_SPEC_TEMPLATE)
+$(GEN_BE_DIR_TEMPLATE)/opcodes.tag:	$(GEN_OPCODES_TOOL) $(GEN_SPEC_TEMPLATE) tree.tag
 	$(GEN_OPCODES_TOOL) $(GEN_SPEC_TEMPLATE) $(GEN_BE_DIR_TEMPLATE)
 	touch $@
 
@@ -169,27 +169,27 @@ $(GEN_BE_DIR_TEMPLATE)/gen_TEMPLATE_new_nodes.h:	$(GEN_BE_DIR_TEMPLATE)/opcodes.
 GEN_REGALLOC_TOOL = $(SOURCE_DIR)/ir/be/scripts/generate_regalloc_if.pl
 
 
-$(GEN_BE_DIR_ARM)/regalloc.tag:		$(GEN_REGALLOC_TOOL) $(GEN_SPEC_ARM)
+$(GEN_BE_DIR_ARM)/regalloc.tag:		$(GEN_REGALLOC_TOOL) $(GEN_SPEC_ARM) tree.tag
 	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_ARM) $(GEN_BE_DIR_ARM)
 	touch $@
 
 
-$(GEN_BE_DIR_AMD64)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_AMD64)
+$(GEN_BE_DIR_AMD64)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_AMD64) tree.tag
 	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_AMD64) $(GEN_BE_DIR_AMD64)
 	touch $@
 
 
-$(GEN_BE_DIR_IA32)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_IA32)
+$(GEN_BE_DIR_IA32)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_IA32) tree.tag
 	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_IA32) $(GEN_BE_DIR_IA32)
 	touch $@
 
 
-$(GEN_BE_DIR_SPARC)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_SPARC)
+$(GEN_BE_DIR_SPARC)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_SPARC) tree.tag
 	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_SPARC) $(GEN_BE_DIR_SPARC)
 	touch $@
 
 
-$(GEN_BE_DIR_TEMPLATE)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_TEMPLATE)
+$(GEN_BE_DIR_TEMPLATE)/regalloc.tag:	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_TEMPLATE) tree.tag
 	$(GEN_REGALLOC_TOOL) $(GEN_SPEC_TEMPLATE) $(GEN_BE_DIR_TEMPLATE)
 	touch $@
 
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