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author | upstream source tree <ports@midipix.org> | 2015-03-15 20:14:05 -0400 |
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committer | upstream source tree <ports@midipix.org> | 2015-03-15 20:14:05 -0400 |
commit | 554fd8c5195424bdbcabf5de30fdc183aba391bd (patch) | |
tree | 976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/testsuite/gcc.misc-tests/arm-isr.c | |
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Diffstat (limited to 'gcc/testsuite/gcc.misc-tests/arm-isr.c')
-rw-r--r-- | gcc/testsuite/gcc.misc-tests/arm-isr.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.misc-tests/arm-isr.c b/gcc/testsuite/gcc.misc-tests/arm-isr.c new file mode 100644 index 000000000..737f9ffb6 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/arm-isr.c @@ -0,0 +1,51 @@ +extern void abort (); +extern void exit (int); + +#ifndef __thumb__ +/* There used to be a couple of bugs in the ARM's prologue and epilogue + generation for ISR routines. The wrong epilogue instruction would be + generated to restore the IP register if it had to be pushed onto the + stack, and the wrong offset was being computed for local variables if + r0 - r3 had to be saved. This tests for both of these cases. */ + +int z = 9; + +int +bar (void) +{ + return z; +} + +int +foo (int a, int b, int c, int d, int e, int f, int g, int h) +{ + volatile int i = (a + b) - (g + h) + bar (); + volatile int j = (e + f) - (c + d); + + return a + b + c + d + e + f + g + h + i + j; +} + +int foo1 (int a, int b, int c, int d, int e, int f, int g, int h) __attribute__ ((interrupt ("IRQ"))); + +int +foo1 (int a, int b, int c, int d, int e, int f, int g, int h) +{ + volatile int i = (a + b) - (g + h) + bar (); + volatile int j = (e + f) - (c + d); + + return a + b + c + d + e + f + g + h + i + j; +} +#endif + +int +main (void) +{ +#ifndef __thumb__ + if (foo (1, 2, 3, 4, 5, 6, 7, 8) != 32) + abort (); + + if (foo1 (1, 2, 3, 4, 5, 6, 7, 8) != 32) + abort (); +#endif + exit (0); +} |