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authorupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
committerupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
commit554fd8c5195424bdbcabf5de30fdc183aba391bd (patch)
tree976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/testsuite/gcc.target/i386/pr17692.c
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Diffstat (limited to 'gcc/testsuite/gcc.target/i386/pr17692.c')
-rw-r--r--gcc/testsuite/gcc.target/i386/pr17692.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/pr17692.c b/gcc/testsuite/gcc.target/i386/pr17692.c
new file mode 100644
index 000000000..476d8e3de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr17692.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O -mfpmath=sse -msse2" } */
+
+/* The fact that t1 and t2 are uninitialized is critical. With them
+ uninitialized, the register allocator is free to put them in the same
+ hard register, which results in
+
+ xmm0 = xmm0 >= xmm0 ? xmm0 : xmm0
+
+ Which is of course a nop, but one for which we would ICE splitting the
+ pattern. */
+
+double out;
+
+static void foo(void)
+{
+ double t1, t2, t3, t4;
+
+ t4 = t1 >= t2 ? t1 : t2;
+ t4 = t4 >= t3 ? t4 : t3;
+ out = t4;
+}