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authorupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
committerupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
commit554fd8c5195424bdbcabf5de30fdc183aba391bd (patch)
tree976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/testsuite/gcc.target/mips/branch-1.c
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Diffstat (limited to 'gcc/testsuite/gcc.target/mips/branch-1.c')
-rw-r--r--gcc/testsuite/gcc.target/mips/branch-1.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/mips/branch-1.c b/gcc/testsuite/gcc.target/mips/branch-1.c
new file mode 100644
index 000000000..62d6bbb61
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-1.c
@@ -0,0 +1,14 @@
+/* Octeon targets should use "bbit" instructions for these "if" statements,
+ but we test for "bbit" elsewhere. On other targets, we should implement
+ the "if" statements using an "andi" instruction followed by a branch
+ on zero. */
+/* { dg-options "-O2 forbid_cpu=octeon" } */
+
+void bar (void);
+NOMIPS16 void f1 (int x) { if (x & 4) bar (); }
+NOMIPS16 void f2 (int x) { if ((x >> 2) & 1) bar (); }
+NOMIPS16 void f3 (unsigned int x) { if (x & 0x10) bar (); }
+NOMIPS16 void f4 (unsigned int x) { if ((x >> 4) & 1) bar (); }
+/* { dg-final { scan-assembler "\tandi\t.*\tandi\t.*\tandi\t.*\tandi\t" } } */
+/* { dg-final { scan-assembler-not "\tsrl\t" } } */
+/* { dg-final { scan-assembler-not "\tsra\t" } } */