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authorupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
committerupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
commit554fd8c5195424bdbcabf5de30fdc183aba391bd (patch)
tree976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c
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Diffstat (limited to 'gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c')
-rw-r--r--gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c
new file mode 100644
index 000000000..b271e2bf4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c
@@ -0,0 +1,45 @@
+/* { dg-options "-O2 -mabi=64 -mr10k-cache-barrier=store" } */
+
+/* Test that stores to uncached addresses do not get unnecessary
+ cache barriers. */
+
+#define TEST(ADDR) \
+ NOMIPS16 void \
+ test_##ADDR (int n) \
+ { \
+ while (n--) \
+ { \
+ *(volatile char *) (0x##ADDR##UL) = 1; \
+ *(volatile short *) (0x##ADDR##UL + 2) = 2; \
+ *(volatile int *) (0x##ADDR##UL + 4) = 0; \
+ } \
+ }
+
+TEST (9000000000000000)
+TEST (900000fffffffff8)
+
+TEST (9200000000000000)
+TEST (920000fffffffff8)
+
+TEST (9400000000000000)
+TEST (940000fffffffff8)
+
+TEST (9600000000000000)
+TEST (960000fffffffff8)
+
+TEST (b800000000000000)
+TEST (b80000fffffffff8)
+
+TEST (ba00000000000000)
+TEST (ba0000fffffffff8)
+
+TEST (bc00000000000000)
+TEST (bc0000fffffffff8)
+
+TEST (be00000000000000)
+TEST (be0000fffffffff8)
+
+TEST (ffffffffa0000000)
+TEST (ffffffffbffffff8)
+
+/* { dg-final { scan-assembler-not "\tcache\t" } } */