obtained gcc-4.6.4.tar.bz2 from upstream website;upstream

verified gcc-4.6.4.tar.bz2.sig;
imported gcc-4.6.4 source tree from verified upstream tarball.

downloading a git-generated archive based on the 'upstream' tag
should provide you with a source tree that is binary identical
to the one extracted from the above tarball.

if you have obtained the source via the command 'git clone',
however, do note that line-endings of files in your working
directory might differ from line-endings of the respective
files in the upstream repository.

1 files changed, 21 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/powerpc/rs6000-power2-1.c b/gcc/testsuite/gcc.target/powerpc/rs6000-power2-1.c
new file mode 100644
index 000000000..375241ec6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/rs6000-power2-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { ilp32 } } } */
+/* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" } */
+/* This used to ICE as the peephole was not checking to see
+   if the register is a floating point one (I think this cannot
+   happen in real life except in this example).  */
+
+register volatile double t1 __asm__("r14");
+register volatile double t2 __asm__("r15");
+register volatile double t3 __asm__("r16"), t4 __asm__("r17");
+void t(double *a, double *b)
+{
+        t1 = a[-1];
+        t2 = a[0];
+        t3 = a[1];
+        t4 = a[2];
+        b[-1] = t1;
+        b[0] = t2;
+        b[1] = t3;
+        b[2] = t4;
+}
+