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authorupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
committerupstream source tree <ports@midipix.org>2015-03-15 20:14:05 -0400
commit554fd8c5195424bdbcabf5de30fdc183aba391bd (patch)
tree976dc5ab7fddf506dadce60ae936f43f58787092 /gcc/testsuite/gcc.target/sh/rte-delay-slot.c
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Diffstat (limited to 'gcc/testsuite/gcc.target/sh/rte-delay-slot.c')
-rw-r--r--gcc/testsuite/gcc.target/sh/rte-delay-slot.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/sh/rte-delay-slot.c b/gcc/testsuite/gcc.target/sh/rte-delay-slot.c
new file mode 100644
index 000000000..eca5db943
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/rte-delay-slot.c
@@ -0,0 +1,33 @@
+/* { dg-do compile { target "sh-*-*" } } */
+/* { dg-options "-O2" } */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m1 -m2*" } */
+/* { dg-final { scan-assembler-not "\trte\t\n\tmov.l\t@r15\\+" } } */
+
+/* This test checks if the compiler generates a pop instruction
+ in the delay slot after rte. For the sh and sh2, the rte
+ instruction reads the return pc from the stack and any pop
+ in the delay slot crashes the hardware.
+
+ Incorrect code generated
+ mov.l @r15+,r1
+ rte
+ mov.l @r15+,r14
+
+ The right code should be
+
+ mov.l @r15+,r1
+ mov.l @r15+,r14
+ rte
+ nop
+*/
+void INT_MTU2_1_TGIA1 (void)
+ __attribute__ ((interrupt_handler));
+void
+INT_MTU2_1_TGIA1 (void)
+{
+ volatile int i = 0;
+ volatile int x, y;
+
+ for (i = 0; i < 10; i++)
+ y = y + x;
+}