obtained gcc-4.6.4.tar.bz2 from upstream website;upstream

verified gcc-4.6.4.tar.bz2.sig;
imported gcc-4.6.4 source tree from verified upstream tarball.

downloading a git-generated archive based on the 'upstream' tag
should provide you with a source tree that is binary identical
to the one extracted from the above tarball.

if you have obtained the source via the command 'git clone',
however, do note that line-endings of files in your working
directory might differ from line-endings of the respective
files in the upstream repository.

4 files changed, 214 insertions, 0 deletions

diff --git a/libjava/sysdep/pa/descriptor-pa32-hpux.h b/libjava/sysdep/pa/descriptor-pa32-hpux.h
new file mode 100644
index 000000000..6000edb52
--- /dev/null
+++ b/libjava/sysdep/pa/descriptor-pa32-hpux.h
@@ -0,0 +1,91 @@
+/* descriptor-pa32-hpux.h - Given a function pointer, extract and return the
+   actual code address of the corresponding function.
+
+   This is done by checking if the plabel bit is set. If it's not set,
+   return the function pointer.  If it's set, mask it off and extract
+   the address from the function descriptor.  This address may point
+   to an export stub.  If so, extract the branch target from the stub
+   and return it.  Otherwise, the address from the function descriptor
+   is returned.
+
+   Copyright (C) 2006  Free Software Foundation
+
+   This file is part of libgcj.
+
+This software is copyrighted work licensed under the terms of the
+Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
+details.  */
+
+#define UNWRAP_FUNCTION_DESCRIPTOR pa_unwrap_function_descriptor
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Extract bit field from word using HP's numbering (MSB = 0).  */
+#define GET_FIELD(X, FROM, TO)					\
+  ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+
+static inline int
+sign_extend (int x, int len)
+{
+  int signbit = (1 << (len - 1));
+  int mask = (signbit << 1) - 1;
+  return ((x & mask) ^ signbit) - signbit;
+}
+
+/* Extract a 17-bit signed constant from branch instructions.  */
+static inline int
+extract_17 (unsigned word)
+{
+  return sign_extend (GET_FIELD (word, 19, 28)
+		      | GET_FIELD (word, 29, 29) << 10
+		      | GET_FIELD (word, 11, 15) << 11
+		      | (word & 0x1) << 16, 17);
+}
+
+/* Extract a 22-bit signed constant from branch instructions.  */
+static inline int
+extract_22 (unsigned word)
+{
+  return sign_extend (GET_FIELD (word, 19, 28)
+		      | GET_FIELD (word, 29, 29) << 10
+		      | GET_FIELD (word, 11, 15) << 11
+		      | GET_FIELD (word, 6, 10) << 16
+		      | (word & 0x1) << 21, 22);
+}
+
+static void *
+pa_unwrap_function_descriptor (void *addr)
+{
+  unsigned int *tmp_addr;
+
+  /* Check if plabel bit is set in function pointer.  */
+  if (!((unsigned int) addr & 2))
+    return addr;
+
+  tmp_addr = *(unsigned int **) ((unsigned int) addr & ~3);
+
+  /* If TMP_ADDR points to an export stub, adjust it so that it points
+     to the branch target of the stub.  */
+  if ((*tmp_addr & 0xffe0e002) == 0xe8400000		/* bl x,r2 */
+      && *(tmp_addr + 1) == 0x08000240			/* nop */
+      && *(tmp_addr + 2) == 0x4bc23fd1			/* ldw -18(sp),rp */
+      && *(tmp_addr + 3) == 0x004010a1			/* ldsid (rp),r1 */
+      && *(tmp_addr + 4) == 0x00011820			/* mtsp r1,sr0 */
+      && *(tmp_addr + 5) == 0xe0400002)			/* be,n 0(sr0,rp) */
+    /* Extract target address from PA 1.x 17-bit branch.  */
+    tmp_addr += extract_17 (*tmp_addr) + 2;
+  else if ((*tmp_addr & 0xfc00e002) == 0xe800a000	/* b,l x,r2 */
+	   && *(tmp_addr + 1) == 0x08000240		/* nop */
+	   && *(tmp_addr + 2) == 0x4bc23fd1		/* ldw -18(sp),rp */
+	   && *(tmp_addr + 3) == 0xe840d002)		/* bve,n (rp) */
+    /* Extract target address from PA 2.0 22-bit branch.  */
+    tmp_addr += extract_22 (*tmp_addr) + 2;
+
+  return (void *) tmp_addr;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/libjava/sysdep/pa/descriptor-pa64-hpux.h b/libjava/sysdep/pa/descriptor-pa64-hpux.h
new file mode 100644
index 000000000..bc6af6b87
--- /dev/null
+++ b/libjava/sysdep/pa/descriptor-pa64-hpux.h
@@ -0,0 +1,6 @@
+// Given a function pointer, return the code address.
+// If the plabel bit is set, mask it off and return the code from the
+// first word of the function descriptor.  Otherwise, the function
+// pointer is the code address.
+
+#define UNWRAP_FUNCTION_DESCRIPTOR(X) *(void **)((unsigned long) (X) + 16)
diff --git a/libjava/sysdep/pa/descriptor.h b/libjava/sysdep/pa/descriptor.h
new file mode 100644
index 000000000..d9888516d
--- /dev/null
+++ b/libjava/sysdep/pa/descriptor.h
@@ -0,0 +1,7 @@
+// Given a function pointer, return the code address.
+// If the plabel bit is set, mask it off and return the code from the
+// first word of the function descriptor.  Otherwise, the function
+// pointer is the code address.
+
+#define UNWRAP_FUNCTION_DESCRIPTOR(X) \
+  (((unsigned int)(X)) & 2 ? *(void **)(((unsigned int)(X)) & ~3) : (X))
diff --git a/libjava/sysdep/pa/locks.h b/libjava/sysdep/pa/locks.h
new file mode 100644
index 000000000..4edc2d716
--- /dev/null
+++ b/libjava/sysdep/pa/locks.h
@@ -0,0 +1,110 @@
+// locks.h - Thread synchronization primitives. PA-RISC implementation.
+
+/* Copyright (C) 2002, 2005  Free Software Foundation
+
+   This file is part of libgcj.
+
+This software is copyrighted work licensed under the terms of the
+Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
+details.  */
+
+#ifndef __SYSDEP_LOCKS_H__
+#define __SYSDEP_LOCKS_H__
+
+// Integer type big enough for object address.
+typedef size_t obj_addr_t;
+
+template<int _Inst>
+  struct _pa_jv_cas_lock
+  {
+    static volatile int _S_pa_jv_cas_lock;
+  };
+
+template<int _Inst>
+volatile int
+_pa_jv_cas_lock<_Inst>::_S_pa_jv_cas_lock __attribute__ ((aligned (16))) = 1;
+
+// Because of the lack of weak support when using the hpux som
+// linker, we explicitly instantiate the atomicity lock.
+template volatile int _pa_jv_cas_lock<0>::_S_pa_jv_cas_lock;
+
+// Atomically replace *addr by new_val if it was initially equal to old_val.
+// Return true if the comparison is successful.
+// Assumed to have acquire semantics, i.e. later memory operations
+// cannot execute before the compare_and_swap finishes.
+// The following implementation is atomic but it can deadlock
+// (e.g., if a thread dies holding the lock).
+inline static bool
+__attribute__ ((__unused__))
+compare_and_swap(volatile obj_addr_t *addr,
+	 	 obj_addr_t old_val,
+		 obj_addr_t new_val) 
+{
+  bool result;
+  int tmp;
+  volatile int& lock = _pa_jv_cas_lock<0>::_S_pa_jv_cas_lock;
+
+  __asm__ __volatile__ ("ldcw 0(%1),%0\n\t"
+			"cmpib,<>,n 0,%0,.+20\n\t"
+			"ldw 0(%1),%0\n\t"
+			"cmpib,= 0,%0,.-4\n\t"
+			"nop\n\t"
+			"b,n .-20"
+			: "=&r" (tmp)
+			: "r" (&lock)
+			: "memory");
+
+  if (*addr != old_val)
+    result = false;
+  else
+    {
+      *addr = new_val;
+      result = true;
+    }
+
+  /* Reset lock with PA 2.0 "ordered" store.  */
+  __asm__ __volatile__ ("stw,ma %1,0(%0)"
+			: : "r" (&lock), "r" (tmp) : "memory");
+
+  return result;
+}
+
+// Set *addr to new_val with release semantics, i.e. making sure
+// that prior loads and stores complete before this
+// assignment.
+inline static void
+release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
+{
+  __asm__ __volatile__(" " : : : "memory");
+  *(addr) = new_val;
+}
+
+// Compare_and_swap with release semantics instead of acquire semantics.
+// On many architecture, the operation makes both guarantees, so the
+// implementation can be the same.
+inline static bool
+compare_and_swap_release(volatile obj_addr_t *addr,
+	 				             obj_addr_t old,
+						     obj_addr_t new_val) 
+{
+  return compare_and_swap(addr, old, new_val);
+}
+
+// Ensure that subsequent instructions do not execute on stale
+// data that was loaded from memory before the barrier.
+inline static void
+read_barrier()
+{
+  __asm__ __volatile__(" " : : : "memory");
+}
+
+// Ensure that prior stores to memory are completed with respect to other
+// processors.
+inline static void
+write_barrier()
+{
+  __asm__ __volatile__(" " : : : "memory");
+}
+
+#endif
+