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-rw-r--r--gcc/testsuite/gcc.target/mips/dspr2-MULTU.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
new file mode 100644
index 000000000..c457d245a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
@@ -0,0 +1,16 @@
+/* Test MIPS32 DSP REV 2 MULTU instruction. Tune for a CPU that has
+ pipelined multu. */
+/* { dg-do compile } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
+
+/* { dg-final { scan-assembler "\tmultu\t" } } */
+/* { dg-final { scan-assembler "ac1" } } */
+/* { dg-final { scan-assembler "ac2" } } */
+
+typedef unsigned long long a64;
+
+NOMIPS16 a64 test (a64 *a, unsigned int *b, unsigned int *c)
+{
+ a[0] = (a64) b[0] * c[0];
+ a[1] = (a64) b[1] * c[1];
+}