diff options
Diffstat (limited to 'libjava/sysdep/i386')
| -rw-r--r-- | libjava/sysdep/i386/backtrace.h | 120 | ||||
| -rw-r--r-- | libjava/sysdep/i386/locks.h | 81 |
2 files changed, 201 insertions, 0 deletions
diff --git a/libjava/sysdep/i386/backtrace.h b/libjava/sysdep/i386/backtrace.h new file mode 100644 index 000000000..ee793b22a --- /dev/null +++ b/libjava/sysdep/i386/backtrace.h @@ -0,0 +1,120 @@ +// backtrace.h - Fallback backtrace implementation. i386 implementation. + +/* Copyright (C) 2005, 2006 Free Software Foundation + + This file is part of libgcj. + +This software is copyrighted work licensed under the terms of the +Libgcj License. Please consult the file "LIBGCJ_LICENSE" for +details. */ + +#ifndef __SYSDEP_BACKTRACE_H__ +#define __SYSDEP_BACKTRACE_H__ + +#include <java-stack.h> + +#ifdef __CYGWIN__ +/* To allow this to link as a DLL. */ +#define MAIN_FUNC dll_crt0__FP11per_process +extern "C" int MAIN_FUNC () __declspec(dllimport); +#else /* !__CYGWIN__ */ +#define MAIN_FUNC main +extern int MAIN_FUNC (int, char **); +#endif /* ?__CYGWIN__ */ + +/* The context used to keep track of our position while unwinding through + the call stack. */ +struct _Unwind_Context +{ + /* The starting address of the method. */ + _Jv_uintptr_t meth_addr; + + /* The return address in the method. */ + _Jv_uintptr_t ret_addr; +}; + +#ifdef SJLJ_EXCEPTIONS + +#undef _Unwind_GetIPInfo +#define _Unwind_GetIPInfo(ctx,ip_before_insn) \ + (*(ip_before_insn) = 1, (ctx)->ret_addr) + +#undef _Unwind_GetRegionStart +#define _Unwind_GetRegionStart(ctx) \ + ((ctx)->meth_addr) + +#undef _Unwind_Backtrace +#define _Unwind_Backtrace(trace_fn,state_ptr) \ + (fallback_backtrace (trace_fn, state_ptr)) + +#endif /* SJLJ_EXCEPTIONS */ + +/* Unwind through the call stack calling TRACE_FN with STATE for each stack + frame. Returns the reason why the unwinding was stopped. */ +_Unwind_Reason_Code +fallback_backtrace (_Unwind_Trace_Fn trace_fn, _Jv_UnwindState *state) +{ + register _Jv_uintptr_t *_ebp __asm__ ("ebp"); + register _Jv_uintptr_t _esp __asm__ ("esp"); + _Jv_uintptr_t rfp; + _Unwind_Context ctx; + + for (rfp = *_ebp; rfp; rfp = *(_Jv_uintptr_t *)rfp) + { + /* Sanity checks to eliminate dubious-looking frame pointer chains. + The frame pointer should be a 32-bit word-aligned stack address. + Since the stack grows downwards on x86, the frame pointer must have + a value greater than the current value of the stack pointer, it + should not be below the supposed next frame pointer and it should + not be too far off from the supposed next frame pointer. */ + int diff = *(_Jv_uintptr_t *)rfp - rfp; + if ((rfp & 0x00000003) != 0 || rfp < _esp + || diff > 4 * 1024 || diff < 0) + break; + + /* Get the return address in the calling function. This is stored on + the stack just before the value of the old frame pointer. */ + ctx.ret_addr = *(_Jv_uintptr_t *)(rfp + sizeof (_Jv_uintptr_t)); + + /* Try to locate a "pushl %ebp; movl %esp, %ebp" function prologue + by scanning backwards at even addresses below the return address. + This instruction sequence is encoded either as 0x55 0x89 0xE5 or as + 0x55 0x8B 0xEC. We give up if we do not find this sequence even + after scanning 1024K of memory. + FIXME: This is not robust and will probably give us false positives, + but this is about the best we can do if we do not have DWARF-2 unwind + information based exception handling. */ + ctx.meth_addr = (_Jv_uintptr_t)NULL; + _Jv_uintptr_t scan_addr = (ctx.ret_addr & 0xFFFFFFFE) - 2; + _Jv_uintptr_t limit_addr + = (scan_addr > 1024 * 1024) ? (scan_addr - 1024 * 1024) : 2; + for ( ; scan_addr >= limit_addr; scan_addr -= 2) + { + unsigned char *scan_bytes = (unsigned char *)scan_addr; + if (scan_bytes[0] == 0x55 + && ((scan_bytes[1] == 0x89 && scan_bytes[2] == 0xE5) + || (scan_bytes[1] == 0x8B && scan_bytes[2] == 0xEC))) + { + ctx.meth_addr = scan_addr; + break; + } + } + + /* Now call the unwinder callback function. */ + if (trace_fn != NULL) + (*trace_fn) (&ctx, state); + + /* No need to unwind beyond _Jv_RunMain(), _Jv_ThreadStart or + main(). */ + void *jv_runmain + = (void *)(void (*)(JvVMInitArgs *, jclass, const char *, int, + const char **, bool))_Jv_RunMain; + if (ctx.meth_addr == (_Jv_uintptr_t)jv_runmain + || ctx.meth_addr == (_Jv_uintptr_t)_Jv_ThreadStart + || (ctx.meth_addr - (_Jv_uintptr_t)MAIN_FUNC) < 16) + break; + } + + return _URC_NO_REASON; +} +#endif diff --git a/libjava/sysdep/i386/locks.h b/libjava/sysdep/i386/locks.h new file mode 100644 index 000000000..9d130b0f5 --- /dev/null +++ b/libjava/sysdep/i386/locks.h @@ -0,0 +1,81 @@ +/* locks.h - Thread synchronization primitives. X86/x86-64 implementation. + + Copyright (C) 2002 Free Software Foundation + + This file is part of libgcj. + +This software is copyrighted work licensed under the terms of the +Libgcj License. Please consult the file "LIBGCJ_LICENSE" for +details. */ + +#ifndef __SYSDEP_LOCKS_H__ +#define __SYSDEP_LOCKS_H__ + +typedef size_t obj_addr_t; /* Integer type big enough for object */ + /* address. */ + +// Atomically replace *addr by new_val if it was initially equal to old. +// Return true if the comparison succeeded. +// Assumed to have acquire semantics, i.e. later memory operations +// cannot execute before the compare_and_swap finishes. +inline static bool +compare_and_swap(volatile obj_addr_t *addr, + obj_addr_t old, + obj_addr_t new_val) +{ + char result; +#ifdef __x86_64__ + __asm__ __volatile__("lock; cmpxchgq %2, %0; setz %1" + : "=m"(*(addr)), "=q"(result) + : "r" (new_val), "a"(old), "m"(*addr) + : "memory"); +#else + __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1" + : "=m"(*addr), "=q"(result) + : "r" (new_val), "a"(old), "m"(*addr) + : "memory"); +#endif + return (bool) result; +} + +// Set *addr to new_val with release semantics, i.e. making sure +// that prior loads and stores complete before this +// assignment. +// On X86/x86-64, the hardware shouldn't reorder reads and writes, +// so we just have to convince gcc not to do it either. +inline static void +release_set(volatile obj_addr_t *addr, obj_addr_t new_val) +{ + __asm__ __volatile__(" " : : : "memory"); + *(addr) = new_val; +} + +// Compare_and_swap with release semantics instead of acquire semantics. +// On many architecture, the operation makes both guarantees, so the +// implementation can be the same. +inline static bool +compare_and_swap_release(volatile obj_addr_t *addr, + obj_addr_t old, + obj_addr_t new_val) +{ + return compare_and_swap(addr, old, new_val); +} + +// Ensure that subsequent instructions do not execute on stale +// data that was loaded from memory before the barrier. +// On X86/x86-64, the hardware ensures that reads are properly ordered. +inline static void +read_barrier() +{ +} + +// Ensure that prior stores to memory are completed with respect to other +// processors. +inline static void +write_barrier() +{ + /* x86-64/X86 does not reorder writes. We just need to ensure that + gcc also doesn't. */ + __asm__ __volatile__(" " : : : "memory"); +} +#endif |