1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
|
/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-O2 -ffast-math -mcpu=power5 -mabi=no-altivec" } */
/* { dg-final { scan-assembler-times "fabs" 3 } } */
/* { dg-final { scan-assembler-times "fnabs" 3 } } */
/* { dg-final { scan-assembler-times "fsel" 3 } } */
/* { dg-final { scan-assembler-times "fcpsgn" 4 } } */
/* { dg-final { scan-assembler-not "xscpsgndp" } } */
/* Like ppc-target-1.c, but do not enable the altivec abi on 32-bit, so the
power7 code should generate fcpsgn and not xscpsgndp. */
double normal1 (double, double);
double power5 (double, double) __attribute__((__target__("cpu=power5")));
double power6 (double, double) __attribute__((__target__("cpu=power6")));
double power6x (double, double) __attribute__((__target__("cpu=power6x")));
double power7 (double, double) __attribute__((__target__("cpu=power7")));
double power7n (double, double) __attribute__((__target__("cpu=power7,no-vsx")));
double normal2 (double, double);
/* fabs/fnabs/fsel */
double normal1 (double a, double b)
{
return __builtin_copysign (a, b);
}
/* fabs/fnabs/fsel */
double power5 (double a, double b)
{
return __builtin_copysign (a, b);
}
/* fcpsgn */
double power6 (double a, double b)
{
return __builtin_copysign (a, b);
}
/* fcpsgn */
double power6x (double a, double b)
{
return __builtin_copysign (a, b);
}
/* xscpsgndp */
double power7 (double a, double b)
{
return __builtin_copysign (a, b);
}
/* fcpsgn */
double power7n (double a, double b)
{
return __builtin_copysign (a, b);
}
/* fabs/fnabs/fsel */
double normal2 (double a, double b)
{
return __builtin_copysign (a, b);
}
|
