185 files changed, 146263 insertions, 7167 deletions

diff --git a/patches/algol68g-3.3.24_pre.local.patch b/patches/algol68g-3.3.24_pre.local.patch
new file mode 100644
index 00000000..0f79209d
--- /dev/null
+++ b/patches/algol68g-3.3.24_pre.local.patch
@@ -0,0 +1,449 @@
+diff -ru algol68g-3.3.23.orig/configure algol68g-3.3.23/configure
+--- algol68g-3.3.23.orig/configure	2023-09-16 22:21:31.000000000 +0200
++++ algol68g-3.3.23/configure	2023-09-18 15:18:17.972370415 +0200
+@@ -2889,6 +2889,20 @@
+ printf "%s\n" "linux" >&6; }
+   ;;
+ #
++# Midipix.
++#
++*-*-midipix*)
++
++printf "%s\n" "#define BUILD_MIDIPIX 1" >>confdefs.h
++
++
++printf "%s\n" "#define HAVE_IEEE_754 1" >>confdefs.h
++
++{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: midipix" >&5
++printf "%s\n" "midipix" >&6; }
++  ;;
++
++#
+ # Cygwin.
+ #
+ *86-*-cygwin* | *86_64-*-cygwin*)
+@@ -5001,43 +5015,6 @@
+ #
+ # Test on gcc capabilities.
+ #
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking __attribute__((aligned())) supported" >&5
+-printf %s "checking __attribute__((aligned())) supported... " >&6; }
+-
+-if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-typedef int aint __attribute__((aligned(8)));
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-   { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "stop -- C compiler does not support __attribute__aligned directive
+-See \`config.log' for more details" "$LINENO" 5; }
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+   { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for inline" >&5
+ printf %s "checking for inline... " >&6; }
+ if test ${ac_cv_c_inline+y}
+@@ -5552,49 +5529,6 @@
+ fi
+ rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
+ 
+-#
+-# Test on glibc
+-#
+-
+-{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking GNU C library" >&5
+-printf %s "checking GNU C library... " >&6; }
+-if test "$cross_compiling" = yes
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: assuming no" >&5
+-printf "%s\n" "assuming no" >&6; }
+-   enable_generic=yes
+-
+-
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-(void) gnu_get_libc_version();
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-
+-printf "%s\n" "#define HAVE_GNU_C_LIB 1" >>confdefs.h
+-
+-
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-   enable_generic=yes
+-
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+ 
+ #
+ # We know about the platform now.
+@@ -5605,11 +5539,6 @@
+   enable_core=yes
+ fi
+ 
+-if test "x$enable_generic" = "xyes"; then
+-  enable_standard_types=yes
+-  enable_long_types=no
+-fi
+-
+ if test "x$enable_core" = "xyes"; then
+   enable_compiler=no
+   enable_curl=no
+@@ -6648,318 +6577,6 @@
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: optional headers and libraries..." >&5
+ printf "%s\n" "$as_me: optional headers and libraries..." >&6;}
+ 
+-if test "x$enable_standard_types" = "xyes"; then
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking int is 32 bit" >&5
+-printf %s "checking int is 32 bit... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-return sizeof (int) != 4;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-   enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking unsigned is 32 bit" >&5
+-printf %s "checking unsigned is 32 bit... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-return sizeof (unsigned) != 4;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-     enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking uint64_t is 64 bit" >&5
+-printf %s "checking uint64_t is 64 bit... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-#include <stdint.h>
+-int
+-main (void)
+-{
+-return sizeof (uint64_t) != 8;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-     enable_standard_types=no
+-     enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking double is 64 bit" >&5
+-printf %s "checking double is 64 bit... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-return sizeof (double) != 8;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-     enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking long double has 64-bit mantissa" >&5
+-printf %s "checking long double has 64-bit mantissa... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-#include <float.h>
+-int
+-main (void)
+-{
+-return LDBL_MANT_DIG != 64;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-
+-printf "%s\n" "#define HAVE_FLT80 1" >>confdefs.h
+-
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-fi
+-
+-if test "x$enable_standard_types" = "xno"; then
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "stop -- unexpected lengths for int and/or double and/or uint64_t
+-See \`config.log' for more details" "$LINENO" 5; }
+-fi
+-
+-if test "x$enable_long_types" = "xyes"; then
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking 64-bit long long int is available" >&5
+-printf %s "checking 64-bit long long int is available... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-return sizeof (long long) != 8;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-   enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking 64-bit long long unsigned is available" >&5
+-printf %s "checking 64-bit long long unsigned is available... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-return sizeof (long long unsigned) != 8;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-     enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking __float128 is available" >&5
+-printf %s "checking __float128 is available... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-int
+-main (void)
+-{
+-return sizeof (__float128) != 16;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-     enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking __complex128 is available" >&5
+-printf %s "checking __complex128 is available... " >&6; }
+-  if test "$cross_compiling" = yes
+-then :
+-  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+-printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
+-as_fn_error $? "cannot run test program while cross compiling
+-See \`config.log' for more details" "$LINENO" 5; }
+-else $as_nop
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-typedef _Complex float __attribute__((mode(TC))) __complex128;
+-int
+-main (void)
+-{
+-return sizeof (__complex128) != 32;
+-  ;
+-  return 0;
+-}
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"
+-then :
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
+-printf "%s\n" "yes" >&6; }
+-else $as_nop
+-  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
+-printf "%s\n" "no" >&6; }
+-     enable_long_types=no
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-fi
+ 
+ if test "x$enable_long_types" = "xyes"; then
+   if test "x$enable_quadmath" = "xyes"; then
diff --git a/patches/alsa_lib-1.1.8.local.patch b/patches/alsa_lib-1.1.8.local.patch
deleted file mode 100644
index 5ce2742b..00000000
--- a/patches/alsa_lib-1.1.8.local.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-Only in alsa-lib-1.1.8/include: alsa
-diff -ru alsa-lib-1.1.8.orig/include/alsa-symbols.h alsa-lib-1.1.8/include/alsa-symbols.h
---- alsa-lib-1.1.8.orig/include/alsa-symbols.h	2019-01-07 13:55:38.000000000 +0100
-+++ alsa-lib-1.1.8/include/alsa-symbols.h	2019-03-24 06:05:21.993902732 +0100
-@@ -27,7 +27,12 @@
- #endif
- 
- #define INTERNAL_CONCAT2_2(Pre, Post) Pre##Post
-+#ifdef __midipix__
-+/* no .symver support */
-+#define INTERNAL(Name) INTERNAL_CONCAT2_2(, Name)
-+#else
- #define INTERNAL(Name) INTERNAL_CONCAT2_2(__, Name)
-+#endif
- 
- # define symbol_version(real, name, version) \
- 	__asm__ (".symver " ASM_NAME(#real) "," ASM_NAME(#name) "@" #version)
-@@ -45,6 +50,8 @@
- #define use_default_symbol_version(real, name, version) \
-         __asm__ (".weak " ASM_NAME(#name)); \
-         __asm__ (ASM_NAME(#name) " = " ASM_NAME(#real))
-+#elif defined(__midipix__)
-+#define use_default_symbol_version(real, name, version) /* nothing */
- #else
- #define use_default_symbol_version(real, name, version) \
- 	__asm__ (".weak " ASM_NAME(#name)); \
-diff -ru alsa-lib-1.1.8.orig/include/local.h alsa-lib-1.1.8/include/local.h
---- alsa-lib-1.1.8.orig/include/local.h	2019-01-07 13:55:38.000000000 +0100
-+++ alsa-lib-1.1.8/include/local.h	2019-03-23 19:06:39.073662943 +0100
-@@ -254,8 +254,10 @@
- /*
-  */
- #define HAVE_GNU_LD
-+#ifndef __midipix__
- #define HAVE_ELF
- #define HAVE_ASM_PREVIOUS_DIRECTIVE
-+#endif
- 
- /* Stolen from libc-symbols.h in GNU glibc */
- 
diff --git a/patches/autoconf_2_64_host-2.64.local.patch b/patches/autoconf_2_64_host-2.64.local.patch
index c379c23e..29651f5c 100644
--- a/patches/autoconf_2_64_host-2.64.local.patch
+++ b/patches/autoconf_2_64_host-2.64.local.patch
@@ -58,3 +58,27 @@
  	-e 's|@M4[@]|$(M4)|g' \
  	-e 's|@AWK[@]|$(AWK)|g' \
  	-e 's|@VERSION[@]|$(VERSION)|g' \
+--- autoconf-2.69/man/Makefile.am	2022-12-27 15:22:52.186142107 +0800
++++ autoconf-2.69/man/Makefile.am.orig	2012-01-21 21:46:39.000000000 +0800
+@@ -58,7 +58,8 @@
+ 	    --include=$*.x \
+ 	    --include=$(srcdir)/common.x \
+ 	    --source='$(PACKAGE_STRING)' \
+-	    --output=$@.t `echo '$*' | sed 's,.*/,,'`
++	    --output=$@.t \
++	    --no-discard-stderr `echo '$*' | sed 's,.*/,,'`
+ 	if sed $(remove_time_stamp) $@ >$@a.t 2>/dev/null && \
+ 	   sed $(remove_time_stamp) $@.t | cmp $@a.t - >/dev/null 2>&1; then \
+ 		touch $@; \
+--- autoconf-2.69/man/Makefile.in	2022-12-27 15:23:19.743692892 +0800
++++ autoconf-2.69/man/Makefile.in.orig	2012-04-25 10:40:26.000000000 +0800
+@@ -464,7 +464,8 @@
+ 	    --include=$*.x \
+ 	    --include=$(srcdir)/common.x \
+ 	    --source='$(PACKAGE_STRING)' \
+-	    --output=$@.t `echo '$*' | sed 's,.*/,,'`
++	    --output=$@.t \
++	    --no-discard-stderr `echo '$*' | sed 's,.*/,,'`
+ 	if sed $(remove_time_stamp) $@ >$@a.t 2>/dev/null && \
+ 	   sed $(remove_time_stamp) $@.t | cmp $@a.t - >/dev/null 2>&1; then \
+ 		touch $@; \
diff --git a/patches/autoconf_2_69_host-2.69.local.patch b/patches/autoconf_2_69_host-2.69.local.patch
new file mode 100644
index 00000000..b3120b66
--- /dev/null
+++ b/patches/autoconf_2_69_host-2.69.local.patch
@@ -0,0 +1,84 @@
+--- autoconf-2.64/bin/Makefile.in.orig	2009-07-27 04:28:43.000000000 +0100
++++ autoconf-2.64/bin/Makefile.in	2021-05-06 23:48:43.296357404 +0100
+@@ -53,10 +53,10 @@
+ # 02110-1301, USA.
+ 
+ VPATH = @srcdir@
+-pkgdatadir = $(datadir)/@PACKAGE@
+-pkgincludedir = $(includedir)/@PACKAGE@
+-pkglibdir = $(libdir)/@PACKAGE@
+-pkglibexecdir = $(libexecdir)/@PACKAGE@
++pkgdatadir = $(datadir)/@PACKAGE@-2.69
++pkgincludedir = $(includedir)/@PACKAGE@-2.69
++pkglibdir = $(libdir)/@PACKAGE@-2.69
++pkglibexecdir = $(libexecdir)/@PACKAGE@-2.69
+ am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+ install_sh_DATA = $(install_sh) -c -m 644
+ install_sh_PROGRAM = $(install_sh) -c
+@@ -283,9 +283,9 @@
+ 	-e 's|@bindir[@]|$(bindir)|g' \
+ 	-e 's|@pkgdatadir[@]|$(pkgdatadir)|g' \
+ 	-e 's|@prefix[@]|$(prefix)|g' \
+-	-e 's|@autoconf-name[@]|'`echo autoconf | sed '$(transform)'`'|g' \
+-	-e 's|@autoheader-name[@]|'`echo autoheader | sed '$(transform)'`'|g' \
+-	-e 's|@autom4te-name[@]|'`echo autom4te | sed '$(transform)'`'|g' \
++	-e 's|@autoconf-name[@]|'`echo autoconf-2.69 | sed '$(transform)'`'|g' \
++	-e 's|@autoheader-name[@]|'`echo autoheader-2.69 | sed '$(transform)'`'|g' \
++	-e 's|@autom4te-name[@]|'`echo autom4te-2.69 | sed '$(transform)'`'|g' \
+ 	-e 's|@M4[@]|$(M4)|g' \
+ 	-e 's|@M4_DEBUGFILE[@]|$(M4_DEBUGFILE)|g' \
+ 	-e 's|@M4_GNU[@]|$(M4_GNU)|g' \
+--- autoconf-2.64/lib/Makefile.in.orig	2009-07-27 04:28:44.000000000 +0100
++++ autoconf-2.64/lib/Makefile.in	2021-05-07 00:21:50.717431704 +0100
+@@ -34,10 +34,10 @@
+ # along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ 
+ VPATH = @srcdir@
+-pkgdatadir = $(datadir)/@PACKAGE@
+-pkgincludedir = $(includedir)/@PACKAGE@
+-pkglibdir = $(libdir)/@PACKAGE@
+-pkglibexecdir = $(libexecdir)/@PACKAGE@
++pkgdatadir = $(datadir)/@PACKAGE@-2.69
++pkgincludedir = $(includedir)/@PACKAGE@-2.69
++pkglibdir = $(libdir)/@PACKAGE@-2.69
++pkglibexecdir = $(libexecdir)/@PACKAGE@-2.69
+ am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+ install_sh_DATA = $(install_sh) -c -m 644
+ install_sh_PROGRAM = $(install_sh) -c
+@@ -223,9 +223,9 @@
+ 	-e 's|@bindir[@]|$(bindir)|g' \
+ 	-e 's|@pkgdatadir[@]|$(pkgdatadir)|g' \
+ 	-e 's|@prefix[@]|$(prefix)|g' \
+-	-e 's|@autoconf-name[@]|'`echo autoconf | sed '$(transform)'`'|g' \
+-	-e 's|@autoheader-name[@]|'`echo autoheader | sed '$(transform)'`'|g' \
+-	-e 's|@autom4te-name[@]|'`echo autom4te | sed '$(transform)'`'|g' \
++	-e 's|@autoconf-name[@]|'`echo autoconf-2.69 | sed '$(transform)'`'|g' \
++	-e 's|@autoheader-name[@]|'`echo autoheader-2.69 | sed '$(transform)'`'|g' \
++	-e 's|@autom4te-name[@]|'`echo autom4te-2.69 | sed '$(transform)'`'|g' \
+ 	-e 's|@M4[@]|$(M4)|g' \
+ 	-e 's|@AWK[@]|$(AWK)|g' \
+ 	-e 's|@VERSION[@]|$(VERSION)|g' \
+--- autoconf-2.69/man/Makefile.am	2022-12-27 15:22:52.186142107 +0800
++++ autoconf-2.69/man/Makefile.am.orig	2012-01-21 21:46:39.000000000 +0800
+@@ -58,7 +58,8 @@
+ 	    --include=$*.x \
+ 	    --include=$(srcdir)/common.x \
+ 	    --source='$(PACKAGE_STRING)' \
+-	    --output=$@.t `echo '$*' | sed 's,.*/,,'`
++	    --output=$@.t \
++	    --no-discard-stderr `echo '$*' | sed 's,.*/,,'`
+ 	if sed $(remove_time_stamp) $@ >$@a.t 2>/dev/null && \
+ 	   sed $(remove_time_stamp) $@.t | cmp $@a.t - >/dev/null 2>&1; then \
+ 		touch $@; \
+--- autoconf-2.69/man/Makefile.in	2022-12-27 15:23:19.743692892 +0800
++++ autoconf-2.69/man/Makefile.in.orig	2012-04-25 10:40:26.000000000 +0800
+@@ -464,7 +464,8 @@
+ 	    --include=$*.x \
+ 	    --include=$(srcdir)/common.x \
+ 	    --source='$(PACKAGE_STRING)' \
+-	    --output=$@.t `echo '$*' | sed 's,.*/,,'`
++	    --output=$@.t \
++	    --no-discard-stderr `echo '$*' | sed 's,.*/,,'`
+ 	if sed $(remove_time_stamp) $@ >$@a.t 2>/dev/null && \
+ 	   sed $(remove_time_stamp) $@.t | cmp $@a.t - >/dev/null 2>&1; then \
+ 		touch $@; \
diff --git a/patches/autoconf_host-2.69.local.patch b/patches/autoconf_host-2.69.local.patch
new file mode 100644
index 00000000..339ca8d7
--- /dev/null
+++ b/patches/autoconf_host-2.69.local.patch
@@ -0,0 +1,24 @@
+--- autoconf-2.69/man/Makefile.am	2022-12-27 15:22:52.186142107 +0800
++++ autoconf-2.69/man/Makefile.am.orig	2012-01-21 21:46:39.000000000 +0800
+@@ -58,7 +58,8 @@
+ 	    --include=$*.x \
+ 	    --include=$(srcdir)/common.x \
+ 	    --source='$(PACKAGE_STRING)' \
+-	    --output=$@.t `echo '$*' | sed 's,.*/,,'`
++	    --output=$@.t \
++	    --no-discard-stderr `echo '$*' | sed 's,.*/,,'`
+ 	if sed $(remove_time_stamp) $@ >$@a.t 2>/dev/null && \
+ 	   sed $(remove_time_stamp) $@.t | cmp $@a.t - >/dev/null 2>&1; then \
+ 		touch $@; \
+--- autoconf-2.69/man/Makefile.in	2022-12-27 15:23:19.743692892 +0800
++++ autoconf-2.69/man/Makefile.in.orig	2012-04-25 10:40:26.000000000 +0800
+@@ -464,7 +464,8 @@
+ 	    --include=$*.x \
+ 	    --include=$(srcdir)/common.x \
+ 	    --source='$(PACKAGE_STRING)' \
+-	    --output=$@.t `echo '$*' | sed 's,.*/,,'`
++	    --output=$@.t \
++	    --no-discard-stderr `echo '$*' | sed 's,.*/,,'`
+ 	if sed $(remove_time_stamp) $@ >$@a.t 2>/dev/null && \
+ 	   sed $(remove_time_stamp) $@.t | cmp $@a.t - >/dev/null 2>&1; then \
+ 		touch $@; \
diff --git a/patches/bash-5.1.16.local.patch b/patches/bash-5.2.21_pre.local.patch
index 677e7d9c..677e7d9c 100644
--- a/patches/bash-5.1.16.local.patch
+++ b/patches/bash-5.2.21_pre.local.patch
diff --git a/patches/bash_minipix-5.1.16.local.patch b/patches/bash_minipix-5.1.16.local.patch
deleted file mode 120000
index 14ec8331..00000000
--- a/patches/bash_minipix-5.1.16.local.patch
+++ /dev/null
@@ -1 +0,0 @@
-bash-5.1.16.local.patch
\ No newline at end of file
diff --git a/patches/bash_minipix-5.2.21_pre.local.patch b/patches/bash_minipix-5.2.21_pre.local.patch
new file mode 120000
index 00000000..41db15fb
--- /dev/null
+++ b/patches/bash_minipix-5.2.21_pre.local.patch
@@ -0,0 +1 @@
+bash-5.2.21_pre.local.patch
\ No newline at end of file
diff --git a/patches/bdwgc.local.patch b/patches/bdwgc.local.patch
index ede786e7..d7c4214d 100644
--- a/patches/bdwgc.local.patch
+++ b/patches/bdwgc.local.patch
@@ -1,48 +1,47 @@
-diff --git a/include/private/gcconfig.h b/include/private/gcconfig.h
-index b342883..174dd88 100644
---- a/include/private/gcconfig.h
-+++ b/include/private/gcconfig.h
-@@ -109,6 +109,21 @@ EXTERN_C_BEGIN
+diff -ru bdwgc.orig/include/private/gcconfig.h bdwgc/include/private/gcconfig.h
+--- bdwgc.orig/include/private/gcconfig.h	2023-02-07 14:35:54.616933050 +0100
++++ bdwgc/include/private/gcconfig.h	2023-02-07 14:41:11.028698667 +0100
+@@ -110,6 +110,20 @@
  #   define LINUX
  # endif
  
 +# if defined(__midipix__)
-+#    define MIDIPIX
++#   define MIDIPIX
++#   include <fcntl.h>
++#   include <sys/select.h>
 +
-+#    include <fcntl.h>
-+#    include <sys/select.h>
++#   include <psxtypes/psxtypes.h>
++#   include <pemagine/pemagine.h>
++#   include <ntapi/nt_thread.h>
 +
-+#    include <psxtypes/psxtypes.h>
-+#    include <pemagine/pemagine.h>
-+#    include <ntapi/nt_thread.h>
++int __gc_data_start_mark__[1];
++int __gc_data_end_mark__[1];
++#endif
 +
-+     int __gc_data_start_mark__[1];
-+     int __gc_data_end_mark__[1];
-+
-+# endif
 +
  /* And one for NetBSD: */
  # if defined(__NetBSD__)
- #    define NETBSD
-@@ -350,6 +359,16 @@ EXTERN_C_BEGIN
- #    define X86_64
- #    define mach_type_known
+ #   define NETBSD
+@@ -554,7 +554,7 @@
+ #   define mach_type_known
+ # elif (defined(__i386__) || defined(i386) || defined(__X86__)) \
+        && (defined(ANY_BSD) || defined(DARWIN) || defined(EMBOX) \
+-           || defined(LINUX) || defined(QNX))
++           || defined(LINUX) || defined(QNX) || defined(MIDIPIX))
+ #   define I386
+ #   define mach_type_known
+ # elif (defined(__ia64) || defined(__ia64__)) && defined(LINUX)
+@@ -607,7 +607,7 @@
+ # elif (defined(__x86_64) || defined(__x86_64__) || defined(__amd64__) \
+         || defined(__X86_64__)) \
+        && (defined(ANY_BSD) || defined(DARWIN) || defined(LINUX) \
+-           || defined(QNX))
++           || defined(QNX) || defined(MIDIPIX))
+ #   define X86_64
+ #   define mach_type_known
  # endif
-+# if defined(MIDIPIX)
-+#    if defined(__i386__)
-+#      define I386
-+#      define mach_type_known
-+#    endif
-+#    if defined(__x86_64__)
-+#      define X86_64
-+#      define mach_type_known
-+#    endif
-+# endif
- # if defined(LINUX) && (defined(i386) || defined(__i386__))
- #    define I386
- #    define mach_type_known
-@@ -1542,6 +1561,13 @@ EXTERN_C_BEGIN
-           EXTERN_C_BEGIN
+@@ -1464,6 +1478,13 @@
+ #         define SOFT_VDB
  #       endif
  #   endif
 +#   ifdef MIDIPIX
@@ -53,28 +52,28 @@ index b342883..174dd88 100644
 +#      define USE_MMAP_ANON
 +#   endif
  #   ifdef CYGWIN32
- #       define OS_TYPE "CYGWIN32"
  #       define WOW64_THREAD_CONTEXT_WORKAROUND
-@@ -2706,6 +2732,13 @@ EXTERN_C_BEGIN
-           EXTERN_C_BEGIN
+ #       define DATASTART ((ptr_t)GC_DATASTART)  /* From gc.h */
+@@ -2259,6 +2280,13 @@
+ #         define SOFT_VDB
  #       endif
  #   endif
 +#   ifdef MIDIPIX
-+#      define OS_TYPE "MIDIPIX"
-+#      define DATASTART   ((ptr_t)__gc_data_start_mark__)
-+#      define DATAEND     ((ptr_t)__gc_data_end_mark__)
-+#      define STACKBOTTOM (ptr_t)(((nt_tib *)pe_get_teb_address())->stack_base)
-+#      define USE_MMAP_ANON
++#       define OS_TYPE "MIDIPIX"
++#       define DATASTART   ((ptr_t)__gc_data_start_mark__)
++#       define DATAEND     ((ptr_t)__gc_data_end_mark__)
++#       define STACKBOTTOM (ptr_t)(((nt_tib *)pe_get_teb_address())->stack_base)
++#       define USE_MMAP_ANON
 +#   endif
  #   ifdef DARWIN
- #     define OS_TYPE "DARWIN"
  #     define DARWIN_DONT_PARSE_STACK 1
-@@ -3111,7 +3144,7 @@ EXTERN_C_BEGIN
- #if defined(SVR4) || defined(LINUX) || defined(IRIX5) || defined(HPUX) \
-     || defined(OPENBSD) || defined(NETBSD) || defined(FREEBSD) \
-     || defined(DGUX) || defined(BSD) || defined(HAIKU) || defined(HURD) \
--    || defined(AIX) || defined(DARWIN) || defined(OSF1)
-+    || defined(AIX) || defined(DARWIN) || defined(OSF1) || defined(MIDIPIX)
+ #     define STACKBOTTOM ((ptr_t)0x7fff5fc00000)
+@@ -2676,7 +2676,7 @@
+ #if defined(AIX) || defined(ANY_BSD) || defined(BSD) || defined(DARWIN) \
+     || defined(DGUX) || defined(HAIKU) || defined(HPUX) || defined(HURD) \
+     || defined(IRIX5) || defined(LINUX) || defined(OSF1) || defined(QNX) \
+-    || defined(SVR4)
++    || defined(SVR4) || defined(MIDIPIX)
  # define UNIX_LIKE      /* Basic Unix-like system calls work.   */
  #endif
  
diff --git a/patches/bdwgc_pre.local.patch b/patches/bdwgc_pre.local.patch
index dfb7f7a2..20213127 100644
--- a/patches/bdwgc_pre.local.patch
+++ b/patches/bdwgc_pre.local.patch
@@ -20,12 +20,3 @@
        *-*-mingw*)
          AC_DEFINE(GC_WIN32_PTHREADS)
          # Using pthreads-win32 (or other non-Cygwin pthreads) library.
-@@ -810,7 +814,7 @@
-        [AC_COMPILE_IFELSE([AC_LANG_PROGRAM([
- #         ifdef __CYGWIN__
- #           define _GNU_SOURCE 1
--#         elif defined(__linux__) || defined(__GLIBC__) || defined(__GNU__)
-+#         elif defined(__linux__) || defined(__GLIBC__) || defined(__GNU__) || defined(__midipix__)
- #           define _GNU_SOURCE 1
- #         endif
- #         include <pthread.h>
diff --git a/patches/bind-9.13.2_pre.local.patch b/patches/bind-9.13.2_pre.local.patch
new file mode 100644
index 00000000..d7414e0a
--- /dev/null
+++ b/patches/bind-9.13.2_pre.local.patch
@@ -0,0 +1,29 @@
+diff -ru bind-9.13.2.orig/configure bind-9.13.2/configure
+--- bind-9.13.2.orig/configure	2018-07-03 09:51:40.000000000 +0200
++++ bind-9.13.2/configure	2023-09-15 14:41:57.738821487 +0200
+@@ -16616,10 +16616,6 @@
+ $as_echo "yes" >&6; }
+ 		DST_OPENSSL_LIBS="$DST_OPENSSL_LIBS -ldl"
+ 
+-else
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: unknown" >&5
+-$as_echo "unknown" >&6; }
+-		 as_fn_error $? "OpenSSL has unsupported dynamic loading" "$LINENO" 5
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+@@ -18148,14 +18144,6 @@
+ 
+ 
+ 
+-#
+-# NLS
+-#
+-ac_fn_c_check_func "$LINENO" "catgets" "ac_cv_func_catgets"
+-if test "x$ac_cv_func_catgets" = xyes; then :
+-  $as_echo "#define HAVE_CATGETS 1" >>confdefs.h
+-
+-fi
+ 
+ 
+ #
diff --git a/patches/bmake.local.patch b/patches/bmake.local.patch
deleted file mode 100644
index 32bf1d36..00000000
--- a/patches/bmake.local.patch
+++ /dev/null
@@ -1,26 +0,0 @@
---- bmake/boot-strap.orig	2020-02-08 19:30:56.653565539 +0000
-+++ bmake/boot-strap	2020-02-11 11:45:44.426114614 +0000
-@@ -202,7 +202,6 @@
- fi
- 
- op=all
--BMAKE=
- 
- while :
- do
-@@ -391,7 +390,7 @@
- 	    cd $Mydir &&
- 	    MAKESYSPATH=$mksrc SRCTOP=$Mydir OBJTOP=$objdir \
- 	    MAKEOBJDIR='${.CURDIR:S,${SRCTOP:tA},${OBJTOP:tA},}' \
--	    ${BMAKE:-$objdir/bmake} -f $Mydir/Makefile "$@"
-+	    ${BMAKE} -f $Mydir/Makefile TEST_MAKE="${BMAKE}" "$@"
-     )
- }
- 
---- bmake/install-sh.orig	2020-02-15 15:51:24.856000000 +0000
-+++ bmake/install-sh	2020-02-20 15:52:47.596000000 +0000
-@@ -1,3 +1,4 @@
-+#!/bin/sh
- :
- # NAME:
- #	install.sh - portable version of install(1)
diff --git a/patches/bmake_host.local.patch b/patches/bmake_host.local.patch
deleted file mode 100644
index 7973489d..00000000
--- a/patches/bmake_host.local.patch
+++ /dev/null
@@ -1,7 +0,0 @@
---- bmake/install-sh.orig	2020-02-15 15:51:24.856000000 +0000
-+++ bmake/install-sh	2020-02-20 15:52:47.596000000 +0000
-@@ -1,3 +1,4 @@
-+#!/bin/sh
- :
- # NAME:
- #	install.sh - portable version of install(1)
diff --git a/patches/bmake_host/gcc10.patch b/patches/bmake_host/gcc10.patch
deleted file mode 100644
index 18e3e13c..00000000
--- a/patches/bmake_host/gcc10.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -ru bmake.orig/job.c bmake/job.c
---- bmake.orig/job.c	2020-04-09 14:03:57.232919836 +0200
-+++ bmake/job.c	2020-06-14 22:19:09.776490793 +0200
-@@ -180,6 +180,8 @@
- #define ABORT_WAIT	3   	    /* Waiting for jobs to finish */
- #define JOB_TOKENS	"+EI+"	    /* Token to requeue for each abort state */
- 
-+FILE *debug_file;
-+
- /*
-  * this tracks the number of tokens currently "out" to build jobs.
-  */
-diff -ru bmake.orig/make.h bmake/make.h
---- bmake.orig/make.h	2020-02-10 18:07:01.708744511 +0100
-+++ bmake/make.h	2020-06-14 22:18:24.965773603 +0200
-@@ -464,7 +464,7 @@
-  *	There is one bit per module.  It is up to the module what debug
-  *	information to print.
-  */
--FILE *debug_file;		/* Output written here - default stdout */
-+extern FILE *debug_file;	/* Output written here - default stdout */
- extern int debug;
- #define	DEBUG_ARCH	0x00001
- #define	DEBUG_COND	0x00002
diff --git a/patches/bochs-2.6.11.local.patch b/patches/bochs-2.8.local.patch
index a67d0dc4..1cc13e8a 100644
--- a/patches/bochs-2.6.11.local.patch
+++ b/patches/bochs-2.8.local.patch
@@ -1,15 +1,3 @@
-diff -ru bochs-2.6.11.orig/cpu/icache.h bochs-2.6.11/cpu/icache.h
---- bochs-2.6.11.orig/cpu/icache.h      2019-12-09 17:44:36.435957000 +0100
-+++ bochs-2.6.11/cpu/icache.h   2021-07-18 13:10:35.350797475 +0200
-@@ -28,7 +28,7 @@
-
- class bxPageWriteStampTable
- {
--  const Bit32u PHY_MEM_PAGES = 1024*1024;
-+  #define PHY_MEM_PAGES (1024*1024)
-   Bit32u *fineGranularityMapping;
-
- public:
 diff -ru bochs-2.6.9.orig/main.cc bochs-2.6.9/main.cc
 --- bochs-2.6.9.orig/main.cc    2017-02-18 17:28:04.318635000 +0100
 +++ bochs-2.6.9/main.cc 2021-07-18 01:15:37.859411673 +0200
@@ -30,8 +18,8 @@ diff -ru bochs-2.6.9.orig/configure bochs-2.6.9/configure
 
    fi
    case "$target" in
--    *-pc-windows* | *-pc-winnt* | *-cygwin* | *-mingw32*)
-+    *-pc-windows* | *-pc-winnt* | *-cygwin* | *-mingw32* | *-midipix*)
+-    *-pc-windows* | *-pc-winnt* | *-cygwin* | *-mingw32* | *-msys)
++    *-pc-windows* | *-pc-winnt* | *-cygwin* | *-mingw32* | *-msys | *-midipix*)
      NETLOW_OBJS="$NETLOW_OBJS eth_win32.o"
      ethernet_modules="$ethernet_modules win32"
      $as_echo "#define BX_NETMOD_WIN32 1" >>confdefs.h
diff --git a/patches/cdecl-13.0_pre.local.patch b/patches/cdecl-13.0_pre.local.patch
new file mode 100644
index 00000000..e575b83e
--- /dev/null
+++ b/patches/cdecl-13.0_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru cdecl-13.0.orig/configure cdecl-13.0/configure
+--- cdecl-13.0.orig/configure	2022-10-31 01:22:38.000000000 +0100
++++ cdecl-13.0/configure	2022-11-04 20:36:34.626729430 +0100
+@@ -6143,7 +6143,7 @@
+   printf %s "(cached) " >&6
+ else $as_nop
+       # Double quotes because $CC needs to be expanded
+-    for CPP in "$CC -E" "$CC -E -traditional-cpp" cpp /lib/cpp
++    for CPP in "$CC -E" "$CC -E -traditional-cpp"
+     do
+       ac_preproc_ok=false
+ for ac_c_preproc_warn_flag in '' yes
diff --git a/patches/clang_host/clang-0001-Add-Alpine-Linux-distro.patch b/patches/clang_host/clang-0001-Add-Alpine-Linux-distro.patch
deleted file mode 100644
index 6cbed09d..00000000
--- a/patches/clang_host/clang-0001-Add-Alpine-Linux-distro.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 4559c66aabd8b56f7127c8b1f5d22f59d3ca2390 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Thu, 18 Feb 2016 17:40:00 +0100
-Subject: [PATCH 1/7] Add Alpine Linux distro
-
----
- lib/Driver/ToolChains.cpp | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 99c7b8e..70b53bd 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -3374,6 +3374,7 @@ enum Distro {
-   // NB: Releases of a particular Linux distro should be kept together
-   // in this enum, because some tests are done by integer comparison against
-   // the first and last known member in the family, e.g. IsRedHat().
-+  AlpineLinux,
-   ArchLinux,
-   DebianLenny,
-   DebianSqueeze,
-@@ -3497,6 +3498,9 @@ static Distro DetectDistro(const Driver &D, llvm::Triple::ArchType Arch) {
-   if (D.getVFS().exists("/etc/arch-release"))
-     return ArchLinux;
- 
-+  if (D.getVFS().exists("/etc/alpine-release"))
-+    return AlpineLinux;
-+
-   return UnknownDistro;
- }
- 
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0002-Use-z-relro-on-Alpine-Linux.patch b/patches/clang_host/clang-0002-Use-z-relro-on-Alpine-Linux.patch
deleted file mode 100644
index 090ec3d5..00000000
--- a/patches/clang_host/clang-0002-Use-z-relro-on-Alpine-Linux.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 1898d32d22fddf3ba6c88addbd2af0159600b506 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Thu, 18 Feb 2016 17:41:23 +0100
-Subject: [PATCH 2/7] Use "-z relro" on Alpine Linux
-
----
- lib/Driver/ToolChains.cpp | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 70b53bd..46326f0 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -3667,7 +3667,7 @@ Linux::Linux(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
- 
-   Distro Distro = DetectDistro(D, Arch);
- 
--  if (IsOpenSUSE(Distro) || IsUbuntu(Distro)) {
-+  if (IsOpenSUSE(Distro) || IsUbuntu(Distro) || Distro == AlpineLinux) {
-     ExtraOpts.push_back("-z");
-     ExtraOpts.push_back("relro");
-   }
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0003-Use-hash-style-gnu-for-Alpine-Linux.patch b/patches/clang_host/clang-0003-Use-hash-style-gnu-for-Alpine-Linux.patch
deleted file mode 100644
index 4dc9842f..00000000
--- a/patches/clang_host/clang-0003-Use-hash-style-gnu-for-Alpine-Linux.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From b880ea7037ea3232be9ba2e96cc179da92ea4b9c Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Thu, 18 Feb 2016 17:43:51 +0100
-Subject: [PATCH 3/7] Use --hash-style=gnu for Alpine Linux
-
----
- lib/Driver/ToolChains.cpp | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 46326f0..6b0b31d 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -3687,8 +3687,8 @@ Linux::Linux(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
-   // ABI requires a mapping between the GOT and the symbol table.
-   // Android loader does not support .gnu.hash.
-   if (!IsMips && !IsAndroid) {
--    if (IsRedhat(Distro) || IsOpenSUSE(Distro) ||
--        (IsUbuntu(Distro) && Distro >= UbuntuMaverick))
-+    if (IsRedhat(Distro) || IsOpenSUSE(Distro) || Distro == AlpineLinux ||
-+       (IsUbuntu(Distro) && Distro >= UbuntuMaverick))
-       ExtraOpts.push_back("--hash-style=gnu");
- 
-     if (IsDebian(Distro) || IsOpenSUSE(Distro) || Distro == UbuntuLucid ||
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0004-Add-musl-targets-and-dynamic-linker.patch b/patches/clang_host/clang-0004-Add-musl-targets-and-dynamic-linker.patch
deleted file mode 100644
index 6384b088..00000000
--- a/patches/clang_host/clang-0004-Add-musl-targets-and-dynamic-linker.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 4777c16fc6e717a852366fa2a447c852cca3b62d Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Fri, 19 Feb 2016 13:35:08 +0100
-Subject: [PATCH 4/7] Add musl targets and dynamic linker
-
----
- lib/Basic/Targets.cpp      |  2 ++
- lib/CodeGen/TargetInfo.cpp |  6 +++++-
- lib/Driver/ToolChains.cpp  | 15 ++++++++++-----
- lib/Driver/Tools.cpp       | 44 +++++++++++++++++++++++++++++++++++++++++++-
- 4 files changed, 60 insertions(+), 7 deletions(-)
-
-diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
-index af8aea0..1e27c7a 100644
---- a/lib/Basic/Targets.cpp
-+++ b/lib/Basic/Targets.cpp
-@@ -4513,6 +4513,8 @@ public:
-       case llvm::Triple::Android:
-       case llvm::Triple::GNUEABI:
-       case llvm::Triple::GNUEABIHF:
-+      case llvm::Triple::MuslEABI:
-+      case llvm::Triple::MuslEABIHF:
-         setABI("aapcs-linux");
-         break;
-       case llvm::Triple::EABIHF:
-diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
-index 3d1ddef..f6b3474 100644
---- a/lib/CodeGen/TargetInfo.cpp
-+++ b/lib/CodeGen/TargetInfo.cpp
-@@ -4757,6 +4757,8 @@ public:
-     case llvm::Triple::EABIHF:
-     case llvm::Triple::GNUEABI:
-     case llvm::Triple::GNUEABIHF:
-+    case llvm::Triple::MuslEABI:
-+    case llvm::Triple::MuslEABIHF:
-       return true;
-     default:
-       return false;
-@@ -4767,6 +4769,7 @@ public:
-     switch (getTarget().getTriple().getEnvironment()) {
-     case llvm::Triple::EABIHF:
-     case llvm::Triple::GNUEABIHF:
-+    case llvm::Triple::MuslEABIHF:
-       return true;
-     default:
-       return false;
-@@ -7492,7 +7495,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
-         Kind = ARMABIInfo::AAPCS16_VFP;
-       else if (CodeGenOpts.FloatABI == "hard" ||
-                (CodeGenOpts.FloatABI != "soft" &&
--                Triple.getEnvironment() == llvm::Triple::GNUEABIHF))
-+                (Triple.getEnvironment() == llvm::Triple::GNUEABIHF ||
-+                 Triple.getEnvironment() == llvm::Triple::MuslEABIHF)))
-         Kind = ARMABIInfo::AAPCS_VFP;
- 
-       return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind));
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 6b0b31d..0db9644 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -1523,7 +1523,8 @@ bool Generic_GCC::GCCInstallationDetector::getBiarchSibling(Multilib &M) const {
-   case llvm::Triple::arm:
-   case llvm::Triple::thumb:
-     LibDirs.append(begin(ARMLibDirs), end(ARMLibDirs));
--    if (TargetTriple.getEnvironment() == llvm::Triple::GNUEABIHF) {
-+    if (TargetTriple.getEnvironment() == llvm::Triple::GNUEABIHF ||
-+        TargetTriple.getEnvironment() == llvm::Triple::MuslEABIHF) {
-       TripleAliases.append(begin(ARMHFTriples), end(ARMHFTriples));
-     } else {
-       TripleAliases.append(begin(ARMTriples), end(ARMTriples));
-@@ -1532,7 +1533,8 @@ bool Generic_GCC::GCCInstallationDetector::getBiarchSibling(Multilib &M) const {
-   case llvm::Triple::armeb:
-   case llvm::Triple::thumbeb:
-     LibDirs.append(begin(ARMebLibDirs), end(ARMebLibDirs));
--    if (TargetTriple.getEnvironment() == llvm::Triple::GNUEABIHF) {
-+    if (TargetTriple.getEnvironment() == llvm::Triple::GNUEABIHF ||
-+        TargetTriple.getEnvironment() == llvm::Triple::MuslEABIHF) {
-       TripleAliases.append(begin(ARMebHFTriples), end(ARMebHFTriples));
-     } else {
-       TripleAliases.append(begin(ARMebTriples), end(ARMebTriples));
-@@ -3528,7 +3530,8 @@ static std::string getMultiarchTriple(const Driver &D,
-   // regardless of what the actual target triple is.
-   case llvm::Triple::arm:
-   case llvm::Triple::thumb:
--    if (TargetEnvironment == llvm::Triple::GNUEABIHF) {
-+    if (TargetEnvironment == llvm::Triple::GNUEABIHF ||
-+        TargetEnvironment == llvm::Triple::MuslEABIHF) {
-       if (D.getVFS().exists(SysRoot + "/lib/arm-linux-gnueabihf"))
-         return "arm-linux-gnueabihf";
-     } else {
-@@ -3538,7 +3541,8 @@ static std::string getMultiarchTriple(const Driver &D,
-     break;
-   case llvm::Triple::armeb:
-   case llvm::Triple::thumbeb:
--    if (TargetEnvironment == llvm::Triple::GNUEABIHF) {
-+    if (TargetEnvironment == llvm::Triple::GNUEABIHF ||
-+        TargetEnvironment == llvm::Triple::MuslEABIHF) {
-       if (D.getVFS().exists(SysRoot + "/lib/armeb-linux-gnueabihf"))
-         return "armeb-linux-gnueabihf";
-     } else {
-@@ -3969,7 +3973,8 @@ void Linux::AddClangSystemIncludeArgs(const ArgList &DriverArgs,
-     break;
-   case llvm::Triple::arm:
-   case llvm::Triple::thumb:
--    if (getTriple().getEnvironment() == llvm::Triple::GNUEABIHF)
-+    if (getTriple().getEnvironment() == llvm::Triple::GNUEABIHF ||
-+        getTriple().getEnvironment() == llvm::Triple::MuslEABIHF)
-       MultiarchIncludeDirs = ARMHFMultiarchIncludeDirs;
-     else
-       MultiarchIncludeDirs = ARMMultiarchIncludeDirs;
-diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp
-index b7ac24f..ea1ce6f 100644
---- a/lib/Driver/Tools.cpp
-+++ b/lib/Driver/Tools.cpp
-@@ -712,6 +712,7 @@ arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
-     case llvm::Triple::FreeBSD:
-       switch (Triple.getEnvironment()) {
-       case llvm::Triple::GNUEABIHF:
-+      case llvm::Triple::MuslEABIHF:
-         ABI = FloatABI::Hard;
-         break;
-       default:
-@@ -725,6 +726,7 @@ arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
-       switch (Triple.getEnvironment()) {
-       case llvm::Triple::GNUEABIHF:
-       case llvm::Triple::EABIHF:
-+      case llvm::Triple::MuslEABIHF:
-         ABI = FloatABI::Hard;
-         break;
-       case llvm::Triple::GNUEABI:
-@@ -968,6 +970,8 @@ void Clang::AddARMTargetArgs(const llvm::Triple &Triple, const ArgList &Args,
-     case llvm::Triple::Android:
-     case llvm::Triple::GNUEABI:
-     case llvm::Triple::GNUEABIHF:
-+    case llvm::Triple::MuslEABI:
-+    case llvm::Triple::MuslEABIHF:
-       ABIName = "aapcs-linux";
-       break;
-     case llvm::Triple::EABIHF:
-@@ -7857,6 +7861,8 @@ void freebsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA,
-     switch (getToolChain().getTriple().getEnvironment()) {
-     case llvm::Triple::GNUEABIHF:
-     case llvm::Triple::GNUEABI:
-+    case llvm::Triple::MuslEABIHF:
-+    case llvm::Triple::MuslEABI:
-     case llvm::Triple::EABI:
-       CmdArgs.push_back("-meabi=5");
-       break;
-@@ -8199,10 +8205,12 @@ void netbsd::Linker::ConstructJob(Compilation &C, const JobAction &JA,
-     switch (getToolChain().getTriple().getEnvironment()) {
-     case llvm::Triple::EABI:
-     case llvm::Triple::GNUEABI:
-+    case llvm::Triple::MuslEABI:
-       CmdArgs.push_back("armelf_nbsd_eabi");
-       break;
-     case llvm::Triple::EABIHF:
-     case llvm::Triple::GNUEABIHF:
-+    case llvm::Triple::MuslEABIHF:
-       CmdArgs.push_back("armelf_nbsd_eabihf");
-       break;
-     default:
-@@ -8219,10 +8227,12 @@ void netbsd::Linker::ConstructJob(Compilation &C, const JobAction &JA,
-     switch (getToolChain().getTriple().getEnvironment()) {
-     case llvm::Triple::EABI:
-     case llvm::Triple::GNUEABI:
-+    case llvm::Triple::MuslEABI:
-       CmdArgs.push_back("armelfb_nbsd_eabi");
-       break;
-     case llvm::Triple::EABIHF:
-     case llvm::Triple::GNUEABIHF:
-+    case llvm::Triple::MuslEABIHF:
-       CmdArgs.push_back("armelfb_nbsd_eabihf");
-       break;
-     default:
-@@ -8623,11 +8633,43 @@ static void AddLibgcc(const llvm::Triple &Triple, const Driver &D,
-     CmdArgs.push_back("-ldl");
- }
- 
-+static std::string getMuslDynamicLinker(const llvm::Triple::ArchType Arch,
-+                                        const llvm::Triple::EnvironmentType Env) {
-+  switch (Arch) {
-+  case llvm::Triple::arm:
-+  case llvm::Triple::thumb:
-+    return Env == llvm::Triple::MuslEABIHF ?
-+           "/lib/ld-musl-armhf.so.1" : "/lib/ld-musl-arm.so.1";
-+  case llvm::Triple::armeb:
-+  case llvm::Triple::thumbeb:
-+    return Env == llvm::Triple::MuslEABIHF ?
-+           "/lib/ld-musl-armebhf.so.1" : "/lib/ld-musl-armeb.so.1";
-+  case llvm::Triple::aarch64:
-+    return "/lib/ld-musl-aarch64.so.1";
-+  case llvm::Triple::aarch64_be:
-+    return "/lib/ld-musl-aarch64_be.so.1";
-+  case llvm::Triple::mips:
-+    return "/lib/ld-musl-mips.so.1";
-+  case llvm::Triple::mipsel:
-+    return "/lib/ld-musl-mipsel.so.1";
-+  case llvm::Triple::ppc:
-+    return "/lib/ld-musl-powerpc.so.1";
-+  case llvm::Triple::x86:
-+    return "/lib/ld-musl-i386.so.1";
-+//case llvm::Triple::x86_64:
-+  default:
-+    return "/lib/ld-musl-x86_64.so.1";
-+  }
-+  return NULL;
-+}
-+
- static std::string getLinuxDynamicLinker(const ArgList &Args,
-                                          const toolchains::Linux &ToolChain) {
-   const llvm::Triple::ArchType Arch = ToolChain.getArch();
- 
--  if (ToolChain.getTriple().isAndroid()) {
-+  if (ToolChain.getTriple().isMusl()) {
-+    return getMuslDynamicLinker(Arch, ToolChain.getTriple().getEnvironment());
-+  } else if (ToolChain.getTriple().isAndroid()) {
-     if (ToolChain.getTriple().isArch64Bit())
-       return "/system/bin/linker64";
-     else
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0005-Enable-PIE-by-default-for-alpine-linux.patch b/patches/clang_host/clang-0005-Enable-PIE-by-default-for-alpine-linux.patch
deleted file mode 100644
index a1d49eeb..00000000
--- a/patches/clang_host/clang-0005-Enable-PIE-by-default-for-alpine-linux.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From efbdf70c883a356106fc1bcb1c2917ec6c0a6157 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Tue, 23 Feb 2016 09:35:26 +0100
-Subject: [PATCH 5/7] Enable PIE by default for alpine linux
-
-Alpine Linux uses PIE by default.
----
- lib/Driver/ToolChains.cpp |  5 ++++-
- lib/Driver/Tools.cpp      |  4 +++-
- test/Driver/pic.c         | 12 ++++++++++++
- 3 files changed, 19 insertions(+), 2 deletions(-)
-
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 0db9644..82449bf 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -4143,7 +4143,10 @@ void Linux::AddCudaIncludeArgs(const ArgList &DriverArgs,
-   }
- }
- 
--bool Linux::isPIEDefault() const { return getSanitizerArgs().requiresPIE(); }
-+bool Linux::isPIEDefault() const {
-+  return getSanitizerArgs().requiresPIE() ||
-+         Linux::getTriple().getVendorName().compare("alpine") == 0;
-+}
- 
- SanitizerMask Linux::getSupportedSanitizers() const {
-   const bool IsX86 = getTriple().getArch() == llvm::Triple::x86;
-diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp
-index ea1ce6f..8fd3649 100644
---- a/lib/Driver/Tools.cpp
-+++ b/lib/Driver/Tools.cpp
-@@ -7919,7 +7919,9 @@ void freebsd::Linker::ConstructJob(Compilation &C, const JobAction &JA,
-   if (!D.SysRoot.empty())
-     CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot));
- 
--  if (IsPIE)
-+  if (Args.hasArg(options::OPT_nopie))
-+    CmdArgs.push_back("-nopie");
-+  else if (IsPIE)
-     CmdArgs.push_back("-pie");
- 
-   if (Args.hasArg(options::OPT_static)) {
-diff --git a/test/Driver/pic.c b/test/Driver/pic.c
-index aeb2ee3..9b8e0f6 100644
---- a/test/Driver/pic.c
-+++ b/test/Driver/pic.c
-@@ -243,6 +243,18 @@
- // RUN: %clang %s -target i386-pc-openbsd -nopie -### 2>&1 \
- // RUN:   | FileCheck %s --check-prefix=CHECK-NOPIE-LD
- //
-+// On Alpine Linux, we want similar PIE-by-default behavior
-+// RUN: %clang -c %s -target x86_64-alpine-linux-musl -### 2>&1 \
-+// RUN:   | FileCheck %s --check-prefix=CHECK-PIE2
-+// RUN: %clang -c %s -target i686-alpine-linux-musl -### 2>&1 \
-+// RUN:   | FileCheck %s --check-prefix=CHECK-PIE2
-+// RUN: %clang -c %s -target armv6-alpine-linux-musleabihf -### 2>&1 \
-+// RUN:   | FileCheck %s --check-prefix=CHECK-PIE2
-+// RUN: %clang -c %s -target armv7-alpine-linux-musleabihf -### 2>&1 \
-+// RUN:   | FileCheck %s --check-prefix=CHECK-PIE2
-+// RUN: %clang %s -target x86_64-alpine-linux-musl -nopie -### 2>&1 \
-+// RUN:   | FileCheck %s --check-prefix=CHECK-NOPIE-LD
-+//
- // On Android PIC is enabled by default
- // RUN: %clang -c %s -target i686-linux-android -### 2>&1 \
- // RUN:   | FileCheck %s --check-prefix=CHECK-PIC2
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0006-Link-with-z-now-by-default-for-Alpine-Linux.patch b/patches/clang_host/clang-0006-Link-with-z-now-by-default-for-Alpine-Linux.patch
deleted file mode 100644
index a7ad2d8c..00000000
--- a/patches/clang_host/clang-0006-Link-with-z-now-by-default-for-Alpine-Linux.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From e089ab63916eada060fdfffbf7422c9b20bafe84 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Tue, 23 Feb 2016 10:08:17 +0000
-Subject: [PATCH 6/7] Link with -z now by default for Alpine Linux
-
----
- lib/Driver/ToolChains.cpp | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 82449bf..1a8ebf5 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -3671,6 +3671,11 @@ Linux::Linux(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
- 
-   Distro Distro = DetectDistro(D, Arch);
- 
-+  if (Distro == AlpineLinux) {
-+    ExtraOpts.push_back("-z");
-+    ExtraOpts.push_back("now");
-+  }
-+
-   if (IsOpenSUSE(Distro) || IsUbuntu(Distro) || Distro == AlpineLinux) {
-     ExtraOpts.push_back("-z");
-     ExtraOpts.push_back("relro");
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0007-Enable-stack-protector-by-default-for-alpine-linux.patch b/patches/clang_host/clang-0007-Enable-stack-protector-by-default-for-alpine-linux.patch
deleted file mode 100644
index a4cb9261..00000000
--- a/patches/clang_host/clang-0007-Enable-stack-protector-by-default-for-alpine-linux.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From da8ea517105fff702f936695dcfae844ac85260d Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Tue, 23 Feb 2016 10:16:54 +0000
-Subject: [PATCH 7/7] Enable stack protector by default for alpine linux
-
----
- lib/Driver/ToolChains.cpp     |  7 +++++++
- lib/Driver/ToolChains.h       |  1 +
- test/Driver/stack-protector.c | 14 ++++++++++++++
- 3 files changed, 22 insertions(+)
-
-diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
-index 1a8ebf5..59b7601 100644
---- a/lib/Driver/ToolChains.cpp
-+++ b/lib/Driver/ToolChains.cpp
-@@ -4193,6 +4193,13 @@ void Linux::addProfileRTLibs(const llvm::opt::ArgList &Args,
-   ToolChain::addProfileRTLibs(Args, CmdArgs);
- }
- 
-+unsigned Linux::GetDefaultStackProtectorLevel(bool KernelOrKext) const {
-+  StringRef VendorName = Linux::getTriple().getVendorName();
-+  if (VendorName.compare("alpine") == 0)
-+    return 2;
-+  return 1;
-+}
-+
- /// DragonFly - DragonFly tool chain which can call as(1) and ld(1) directly.
- 
- DragonFly::DragonFly(const Driver &D, const llvm::Triple &Triple,
-diff --git a/lib/Driver/ToolChains.h b/lib/Driver/ToolChains.h
-index f940e58..977ea66 100644
---- a/lib/Driver/ToolChains.h
-+++ b/lib/Driver/ToolChains.h
-@@ -796,6 +796,7 @@ public:
-   void AddCudaIncludeArgs(const llvm::opt::ArgList &DriverArgs,
-                           llvm::opt::ArgStringList &CC1Args) const override;
-   bool isPIEDefault() const override;
-+  unsigned GetDefaultStackProtectorLevel(bool KernelOrKext) const override;
-   SanitizerMask getSupportedSanitizers() const override;
-   void addProfileRTLibs(const llvm::opt::ArgList &Args,
-                         llvm::opt::ArgStringList &CmdArgs) const override;
-diff --git a/test/Driver/stack-protector.c b/test/Driver/stack-protector.c
-index 487af56..2fbd39a 100644
---- a/test/Driver/stack-protector.c
-+++ b/test/Driver/stack-protector.c
-@@ -24,6 +24,20 @@
- // SSP-ALL: "-stack-protector" "3"
- // SSP-ALL-NOT: "-stack-protector-buffer-size" 
- 
-+// RUN: %clang -target x86_64-alpine-linux-musl -### %s 2>&1 | FileCheck %s -check-prefix=ALPINE
-+// ALPINE: "-stack-protector" "2"
-+
-+// RUN: %clang -target x86_64-alpine-linux-musl -fstack-protector -### %s 2>&1 | FileCheck %s -check-prefix=ALPINE_SPS
-+// ALPINE_SPS: "-stack-protector" "2"
-+
-+// RUN: %clang -target x86_64-alpine-linux-musl -fstack-protector-all -### %s 2>&1 | FileCheck %s -check-prefix=ALPINE_ALL
-+// ALPINE_ALL: "-stack-protector" "3"
-+// ALPINE_ALL-NOT: "-stack-protector-buffer-size"
-+
-+// RUN: %clang -target x86_64-alpine-linux-musl -fno-stack-protector -### %s 2>&1 | FileCheck %s -check-prefix=ALPINE_NOSSP
-+// ALPINE_NOSSP-NOT: "-stack-protector"
-+// ALPINE_NOSSP-NOT: "-stack-protector-buffer-size"
-+
- // RUN: %clang -target x86_64-scei-ps4 -### %s 2>&1 | FileCheck %s -check-prefix=SSP-PS4
- // RUN: %clang -target x86_64-scei-ps4 -fstack-protector -### %s 2>&1 | FileCheck %s -check-prefix=SSP-PS4
- // SSP-PS4: "-stack-protector" "2"
--- 
-2.7.3
-
diff --git a/patches/clang_host/clang-0008-LLVM_PREFIX.patch b/patches/clang_host/clang-0008-LLVM_PREFIX.patch
deleted file mode 100644
index 8599276c..00000000
--- a/patches/clang_host/clang-0008-LLVM_PREFIX.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- cfe-3.8.1.src/lib/Driver/CMakeLists.txt.orig	2015-07-02 04:45:27.000000000 +0000
-+++ cfe-3.8.1.src/lib/Driver/CMakeLists.txt	2017-01-19 19:22:36.869663323 +0000
-@@ -3,6 +3,8 @@
-   Support
-   )
- 
-+add_definitions(-DLLVM_PREFIX="${LLVM_PREFIX}")
-+
- add_clang_library(clangDriver
-   Action.cpp
-   Compilation.cpp
diff --git a/patches/clzip-1.13_pre.local.patch b/patches/clzip-1.13_pre.local.patch
deleted file mode 100644
index 57175290..00000000
--- a/patches/clzip-1.13_pre.local.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -ru clzip-1.12.orig/configure clzip-1.12/configure
---- clzip-1.12.orig/configure	2021-01-01 16:37:55.000000000 +0100
-+++ clzip-1.12/configure	2021-01-13 12:42:25.898898082 +0100
-@@ -22,7 +22,7 @@
- mandir='$(datarootdir)/man'
- CC=gcc
- CPPFLAGS=
--CFLAGS='-Wall -W -O2'
-+CFLAGS ?= '-Wall -W -O2'
- LDFLAGS=
- 
- # checking whether we are using GNU C.
diff --git a/patches/clzip-1.14_pre.local.patch b/patches/clzip-1.14_pre.local.patch
new file mode 100644
index 00000000..253e1556
--- /dev/null
+++ b/patches/clzip-1.14_pre.local.patch
@@ -0,0 +1,11 @@
+diff -ru clzip-1.14.orig/configure clzip-1.14/configure
+--- clzip-1.14.orig/configure	2024-01-22 13:59:34.000000000 +0100
++++ clzip-1.14/configure	2024-02-27 11:25:03.061274706 +0100
+@@ -22,7 +22,6 @@
+ mandir='$(datarootdir)/man'
+ CC=gcc
+ CPPFLAGS=
+-CFLAGS='-Wall -W -O2'
+ LDFLAGS=
+ MAKEINFO=makeinfo
+ 
diff --git a/patches/cmake_host-3.7.2.local.patch b/patches/cmake_host-3.7.2.local.patch
index 84c27971..978098c3 100644
--- a/patches/cmake_host-3.7.2.local.patch
+++ b/patches/cmake_host-3.7.2.local.patch
@@ -1,3 +1,36 @@
+diff -ru cmake-3.7.2.orig/Utilities/cmcurl/lib/vtls/openssl.c cmake-3.7.2/Utilities/cmcurl/lib/vtls/openssl.c
+--- cmake-3.7.2.orig/Utilities/cmcurl/lib/vtls/openssl.c        2017-01-13 15:05:42.000000000 +0100
++++ cmake-3.7.2/Utilities/cmcurl/lib/vtls/openssl.c     2022-11-04 12:08:55.736358938 +0100
+@@ -108,8 +108,7 @@
+ #define OPENSSL_NO_SSL2
+ #endif
+
+-#if (OPENSSL_VERSION_NUMBER >= 0x10100000L) && /* OpenSSL 1.1.0+ */ \
+-  !defined(LIBRESSL_VERSION_NUMBER)
++#if (OPENSSL_VERSION_NUMBER >= 0x10100000L) /* OpenSSL 1.1.0+ */
+ #define SSLeay_add_ssl_algorithms() SSL_library_init()
+ #define SSLEAY_VERSION_NUMBER OPENSSL_VERSION_NUMBER
+ #define HAVE_X509_GET0_EXTENSIONS 1 /* added in 1.1.0 -pre1 */
+@@ -117,8 +116,7 @@
+ #define HAVE_OPAQUE_RSA_DSA_DH 1 /* since 1.1.0 -pre5 */
+ #endif
+
+-#if (OPENSSL_VERSION_NUMBER >= 0x1000200fL) && /* 1.0.2 or later */ \
+-  !defined(LIBRESSL_VERSION_NUMBER)
++#if (OPENSSL_VERSION_NUMBER >= 0x1000200fL) /* 1.0.2 or later */
+ #define HAVE_X509_GET0_SIGNATURE 1
+ #endif
+
+@@ -1315,8 +1313,7 @@
+   ch = SSL_get_peer_cert_chain(connssl->handle);
+   st = SSL_CTX_get_cert_store(connssl->ctx);
+
+-#if ((OPENSSL_VERSION_NUMBER <= 0x1000201fL) /* Fixed after 1.0.2a */ || \
+-     defined(LIBRESSL_VERSION_NUMBER))
++#if (OPENSSL_VERSION_NUMBER <= 0x1000201fL) /* Fixed after 1.0.2a */
+   /* The authorized responder cert in the OCSP response MUST be signed by the
+      peer cert's issuer (see RFC6960 section 4.2.2.2). If that's a root cert,
+      no problem, but if it's an intermediate cert OpenSSL has a bug where it
 diff -ru cmake-3.7.2.orig/Source/cmServerProtocol.cxx cmake-3.7.2/Source/cmServerProtocol.cxx
 --- cmake-3.7.2.orig/Source/cmServerProtocol.cxx        2017-01-13 15:05:41.000000000 +0100
 +++ cmake-3.7.2/Source/cmServerProtocol.cxx     2021-09-10 19:16:52.942413410 +0200
diff --git a/patches/coreutils/no-chown-cp.patch b/patches/coreutils/no-chown-cp.patch
new file mode 100644
index 00000000..7b68a140
--- /dev/null
+++ b/patches/coreutils/no-chown-cp.patch
@@ -0,0 +1,54 @@
+diff -ru coreutils-9.1.orig/src/copy.c coreutils-9.1/src/copy.c
+--- coreutils-9.1.orig/src/copy.c	2022-04-15 15:53:28.000000000 +0200
++++ coreutils-9.1/src/copy.c	2023-02-07 21:10:41.696869950 +0100
+@@ -859,6 +859,7 @@
+         }
+     }
+ 
++#if 0
+   if (! chown_failure_ok (x))
+     {
+       error (0, errno, _("failed to preserve ownership for %s"),
+@@ -866,6 +867,7 @@
+       if (x->require_preserve)
+         return -1;
+     }
++#endif
+ 
+   return 0;
+ }
+@@ -2877,6 +2879,7 @@
+       if (x->preserve_security_context)
+         restore_default_fscreatecon_or_die ();
+ 
++#if 0
+       if (x->preserve_ownership)
+         {
+           /* Preserve the owner and group of the just-'copied'
+@@ -2900,6 +2903,7 @@
+                  preserving owner/group is a potential security problem.  */
+             }
+         }
++#endif
+     }
+   else
+     {
+diff -ru coreutils-9.1.orig/src/cp.c coreutils-9.1/src/cp.c
+--- coreutils-9.1.orig/src/cp.c	2023-02-07 21:11:39.720870709 +0100
++++ coreutils-9.1/src/cp.c	2023-02-07 21:06:22.167995788 +0100
+@@ -303,6 +303,7 @@
+             }
+         }
+ 
++#if 0
+       if (x->preserve_ownership)
+         {
+           if (lchownat (dst_dirfd, src_name, p->st.st_uid, p->st.st_gid) != 0)
+@@ -318,6 +319,7 @@
+               ignore_value (lchownat (dst_dirfd, src_name, -1, p->st.st_gid));
+             }
+         }
++#endif
+ 
+       if (x->preserve_mode)
+         {
diff --git a/patches/coreutils/uptime.patch b/patches/coreutils/uptime.patch
new file mode 100644
index 00000000..2f2edcc0
--- /dev/null
+++ b/patches/coreutils/uptime.patch
@@ -0,0 +1,42 @@
+diff -ru coreutils-9.1.orig/src/uptime.c coreutils-9.1/src/uptime.c
+--- coreutils-9.1.orig/src/uptime.c	2022-04-08 13:22:18.000000000 +0200
++++ coreutils-9.1/src/uptime.c	2023-09-06 12:26:22.909930119 +0200
+@@ -30,6 +30,11 @@
+ # include <OS.h>
+ #endif
+ 
++#ifdef __midipix__
++#undef sa_handler
++#include <ntapi/ntapi.h>
++#endif
++
+ #include "c-strtod.h"
+ #include "die.h"
+ #include "error.h"
+@@ -59,6 +64,26 @@
+   struct tm *tmn;
+   double avg[3];
+   int loads;
++#ifdef __midipix__
++  ntapi_vtbl *__ntapi;
++  nt_system_time_of_day_information stodi;
++
++  if((ntapi_init(&__ntapi)) == 0)
++    {
++      char buf[BUFSIZ];
++      long long nt_time;
++      __ntapi->zw_query_system_information(NT_SYSTEM_TIME_OF_DAY_INFORMATION, &stodi, sizeof(stodi), NULL);
++      nt_time = (stodi.current_time.quad - stodi.boot_time.quad) / 100000ULL;
++      sprintf(buf, "%u.%02u", nt_time / 100, nt_time % 100);
++      {
++         char *end_ptr;
++         double upsecs = c_strtod (buf, &end_ptr);
++         if (buf != end_ptr)
++           uptime = (0 <= upsecs && upsecs < TYPE_MAXIMUM (time_t)
++                     ? upsecs : -1);
++      }
++    }
++#endif
+ #ifdef HAVE_PROC_UPTIME
+   FILE *fp;
+ 
diff --git a/patches/coreutils_minipix b/patches/coreutils_minipix
new file mode 120000
index 00000000..a4b710b1
--- /dev/null
+++ b/patches/coreutils_minipix
@@ -0,0 +1 @@
+coreutils
\ No newline at end of file
diff --git a/patches/cssc-1.4.1_pre.local.patch b/patches/cssc-1.4.1_pre.local.patch
index 4f69e993..beec73e3 100644
--- a/patches/cssc-1.4.1_pre.local.patch
+++ b/patches/cssc-1.4.1_pre.local.patch
@@ -1,3 +1,26 @@
+diff -ru CSSC-1.4.1.orig/src/Makefile.in CSSC-1.4.1/src/Makefile.in
+--- CSSC-1.4.1.orig/src/Makefile.in     2019-05-07 13:44:57.000000000 +0200
++++ CSSC-1.4.1/src/Makefile.in  2024-03-10 17:07:33.463901630 +0100
+@@ -1199,8 +1199,8 @@
+ generic_CPPFLAGS = -I ../gl/lib -I $(srcdir)/../gl/lib
+ AM_CPPFLAGS = $(generic_CPPFLAGS)
+ AM_CFLAGS = "-DPREFIX=\"$(csscutildir)/\"" $(generic_CPPFLAGS)
+-AM_LDFLAGS = -L../gl/lib
+-LDADD = -lgnulib
++AM_LDFLAGS =
++LDADD = ../gl/lib/libgnulib.la
+ AM_CXXFLAGS = $(WARN_CFLAGS)
+ noinst_LIBRARIES = libcssc.a
+ csscutil_SCRIPTS = sccsdiff
+@@ -1271,7 +1271,7 @@
+ rmdel_LDADD = libcssc.a $(LIBOBJS)
+ prt_LDADD = libcssc.a $(LIBOBJS)
+ val_LDADD = libcssc.a $(LIBOBJS)
+-sccs_LDADD = libcssc.a $(LIBOBJS) -lgnulib
++sccs_LDADD = libcssc.a $(LIBOBJS) ../gl/lib/libgnulib.la
+ all: $(BUILT_SOURCES)
+        $(MAKE) $(AM_MAKEFLAGS) all-am
+
 diff -ru CSSC-1.4.1.orig/configure CSSC-1.4.1/configure
 --- CSSC-1.4.1.orig/configure	2019-05-07 13:44:57.000000000 +0200
 +++ CSSC-1.4.1/configure	2021-04-08 14:11:56.935465623 +0200
diff --git a/patches/curl-7.83.1.local.patch b/patches/curl-7.83.1.local.patch
deleted file mode 100644
index 1b1ea433..00000000
--- a/patches/curl-7.83.1.local.patch
+++ /dev/null
@@ -1,2205 +0,0 @@
---- curl-7.83.1/configure.orig	2022-05-09 11:03:42.000000000 +0200
-+++ curl-7.83.1/configure	2022-05-11 16:30:58.671831912 +0200
-@@ -15337,6 +15337,16 @@
-   dynamic_linker='GNU/Linux ld.so'
-   ;;
- 
-+midipix)
-+  dynamic_linker='ld'
-+  library_names_spec='$libname.lib.a'
-+  need_lib_prefix=no
-+  need_version=no
-+  shlibpath_overrides_runpath=yes
-+  shrext_cmds=.so
-+  version_type=windows
-+  ;;
-+
- netbsdelf*-gnu)
-   version_type=linux
-   need_lib_prefix=no
-@@ -17792,2132 +17802,6 @@
-   return 0
- }
- 
--
--      #
--  if test "$compiler_id" != "unknown"; then
--    #
--    tmp_save_CPPFLAGS="$CPPFLAGS"
--    tmp_save_CFLAGS="$CFLAGS"
--    tmp_CPPFLAGS=""
--    tmp_CFLAGS=""
--    #
--    case "$compiler_id" in
--        #
--      CLANG)
--        #
--                                tmp_CFLAGS="$tmp_CFLAGS -Qunused-arguments"
--                        tmp_CFLAGS="$tmp_CFLAGS -Wno-pointer-bool-conversion"
--        ;;
--        #
--      DEC_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS -std1"
--                tmp_CFLAGS="$tmp_CFLAGS -noansi_alias"
--                tmp_CFLAGS="$tmp_CFLAGS -warnprotos"
--                tmp_CFLAGS="$tmp_CFLAGS -msg_fatal toofewargs,toomanyargs"
--        ;;
--        #
--      GNU_C)
--        #
--                        if test "$compiler_num" -ge "295"; then
--          tmp_CFLAGS="$tmp_CFLAGS -Werror-implicit-function-declaration"
--        fi
--        ;;
--        #
--      HP_UX_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS -z"
--                                tmp_CFLAGS="$tmp_CFLAGS +W 4227,4255"
--        ;;
--        #
--      IBM_C)
--        #
--                tmp_CPPFLAGS="$tmp_CPPFLAGS -qthreaded"
--                                        tmp_CPPFLAGS="$tmp_CPPFLAGS -qnoansialias"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -qhalt=e"
--        ;;
--        #
--      INTEL_UNIX_C)
--        #
--                        tmp_CFLAGS="$tmp_CFLAGS -std=gnu89"
--                                                tmp_CPPFLAGS="$tmp_CPPFLAGS -we140,147,165,266"
--                                        tmp_CPPFLAGS="$tmp_CPPFLAGS -wd279,981,1469"
--        ;;
--        #
--      INTEL_WINDOWS_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--      LCC)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS -n"
--        ;;
--        #
--      SGI_MIPS_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--      SGI_MIPSPRO_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--      SUNPRO_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--      TINY_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--    esac
--    #
--    squeeze tmp_CPPFLAGS
--    squeeze tmp_CFLAGS
--    #
--    if test ! -z "$tmp_CFLAGS" || test ! -z "$tmp_CPPFLAGS"; then
--      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler accepts some basic options" >&5
--printf %s "checking if compiler accepts some basic options... " >&6; }
--      CPPFLAGS="$tmp_save_CPPFLAGS $tmp_CPPFLAGS"
--      CFLAGS="$tmp_save_CFLAGS $tmp_CFLAGS"
--      squeeze CPPFLAGS
--      squeeze CFLAGS
--
--    tmp_compiler_works="unknown"
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--
--int main (void)
--{
--
--      int i = 1;
--      return i;
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_compile "$LINENO"
--then :
--
--    tmp_compiler_works="yes"
--
--else $as_nop
--
--    tmp_compiler_works="no"
--    echo " " >&6
--    sed 's/^/cc-fail: /' conftest.err >&6
--    echo " " >&6
--
--fi
--rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
--    if test "$tmp_compiler_works" = "yes"; then
--    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--
--int main (void)
--{
--
--        int i = 1;
--        return i;
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_link "$LINENO"
--then :
--
--      tmp_compiler_works="yes"
--
--else $as_nop
--
--      tmp_compiler_works="no"
--      echo " " >&6
--      sed 's/^/link-fail: /' conftest.err >&6
--      echo " " >&6
--
--fi
--rm -f core conftest.err conftest.$ac_objext conftest.beam \
--    conftest$ac_exeext conftest.$ac_ext
--  fi
--    if test "x$cross_compiling" != "xyes" &&
--    test "$tmp_compiler_works" = "yes"; then
--
--   case $host_os in
--     darwin*)
--      if test "$cross_compiling" = yes
--then :
--  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
--printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
--as_fn_error $? "cannot run test program while cross compiling
--See \`config.log' for more details" "$LINENO" 5; }
--else $as_nop
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--#       ifdef __STDC__
--#         include <stdlib.h>
--#       endif
--
--int main (void)
--{
--
--        int i = 0;
--        exit(i);
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_run "$LINENO"
--then :
--  tmp_compiler_works="yes"
--
--else $as_nop
--  tmp_compiler_works="no"
--      echo " " >&6
--      echo "run-fail: test program exited with status $ac_status" >&6
--      echo " " >&6
--
--fi
--rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
--  conftest.$ac_objext conftest.beam conftest.$ac_ext
--fi
--
--     ;;
--     *)
--      old=$LD_LIBRARY_PATH
--      LD_LIBRARY_PATH=$CURL_LIBRARY_PATH:$old
--      export LD_LIBRARY_PATH
--      if test "$cross_compiling" = yes
--then :
--  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
--printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
--as_fn_error $? "cannot run test program while cross compiling
--See \`config.log' for more details" "$LINENO" 5; }
--else $as_nop
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--#       ifdef __STDC__
--#         include <stdlib.h>
--#       endif
--
--int main (void)
--{
--
--        int i = 0;
--        exit(i);
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_run "$LINENO"
--then :
--  tmp_compiler_works="yes"
--
--else $as_nop
--  tmp_compiler_works="no"
--      echo " " >&6
--      echo "run-fail: test program exited with status $ac_status" >&6
--      echo " " >&6
--
--fi
--rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
--  conftest.$ac_objext conftest.beam conftest.$ac_ext
--fi
--
--      LD_LIBRARY_PATH=$old # restore
--     ;;
--   esac
--
--  fi
--    if test "$tmp_compiler_works" = "yes"; then
--
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
--printf "%s\n" "yes" >&6; }
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: compiler options added: $tmp_CFLAGS $tmp_CPPFLAGS" >&5
--printf "%s\n" "$as_me: compiler options added: $tmp_CFLAGS $tmp_CPPFLAGS" >&6;}
--
--  else
--
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
--printf "%s\n" "no" >&6; }
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: compiler options rejected: $tmp_CFLAGS $tmp_CPPFLAGS" >&5
--printf "%s\n" "$as_me: WARNING: compiler options rejected: $tmp_CFLAGS $tmp_CPPFLAGS" >&2;}
--                CPPFLAGS="$tmp_save_CPPFLAGS"
--        CFLAGS="$tmp_save_CFLAGS"
--
--  fi
--
--    fi
--    #
--  fi
--
--
--        #
--  if test "$compiler_id" != "unknown"; then
--    #
--    tmp_save_CFLAGS="$CFLAGS"
--    tmp_save_CPPFLAGS="$CPPFLAGS"
--    #
--    tmp_options=""
--    tmp_CFLAGS="$CFLAGS"
--    tmp_CPPFLAGS="$CPPFLAGS"
--    #
--    if test "$want_debug" = "yes"; then
--      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler accepts debug enabling options" >&5
--printf %s "checking if compiler accepts debug enabling options... " >&6; }
--      tmp_options="$flags_dbg_yes"
--    fi
--    #
--    if test "$flags_prefer_cppflags" = "yes"; then
--      CPPFLAGS="$tmp_CPPFLAGS $tmp_options"
--      CFLAGS="$tmp_CFLAGS"
--    else
--      CPPFLAGS="$tmp_CPPFLAGS"
--      CFLAGS="$tmp_CFLAGS $tmp_options"
--    fi
--    squeeze CPPFLAGS
--    squeeze CFLAGS
--  fi
--
--
--        #
--  if test "$compiler_id" != "unknown"; then
--    #
--    tmp_save_CFLAGS="$CFLAGS"
--    tmp_save_CPPFLAGS="$CPPFLAGS"
--    #
--    tmp_options=""
--    tmp_CFLAGS="$CFLAGS"
--    tmp_CPPFLAGS="$CPPFLAGS"
--    honor_optimize_option="yes"
--    #
--                        #
--    if test "$want_optimize" = "assume_no" ||
--       test "$want_optimize" = "assume_yes"; then
--      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler optimizer assumed setting might be used" >&5
--printf %s "checking if compiler optimizer assumed setting might be used... " >&6; }
--
--
--  ac_var_match_word="no"
--  for word1 in $tmp_CFLAGS; do
--    for word2 in $flags_opt_all; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--  if test "$ac_var_match_word" = "yes"; then
--
--        honor_optimize_option="no"
--
--
--  fi
--
--
--
--  ac_var_match_word="no"
--  for word1 in $tmp_CPPFLAGS; do
--    for word2 in $flags_opt_all; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--  if test "$ac_var_match_word" = "yes"; then
--
--        honor_optimize_option="no"
--
--
--  fi
--
--      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $honor_optimize_option" >&5
--printf "%s\n" "$honor_optimize_option" >&6; }
--      if test "$honor_optimize_option" = "yes"; then
--        if test "$want_optimize" = "assume_yes"; then
--          want_optimize="yes"
--        fi
--        if test "$want_optimize" = "assume_no"; then
--          want_optimize="no"
--        fi
--      fi
--    fi
--    #
--    if test "$honor_optimize_option" = "yes"; then
--
--    ac_var_stripped=""
--  for word1 in $tmp_CFLAGS; do
--    ac_var_strip_word="no"
--    for word2 in $flags_opt_all; do
--      if test "$word1" = "$word2"; then
--        ac_var_strip_word="yes"
--      fi
--    done
--    if test "$ac_var_strip_word" = "no"; then
--      ac_var_stripped="$ac_var_stripped $word1"
--    fi
--  done
--    tmp_CFLAGS="$ac_var_stripped"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_stripped=""
--  for word1 in $tmp_CPPFLAGS; do
--    ac_var_strip_word="no"
--    for word2 in $flags_opt_all; do
--      if test "$word1" = "$word2"; then
--        ac_var_strip_word="yes"
--      fi
--    done
--    if test "$ac_var_strip_word" = "no"; then
--      ac_var_stripped="$ac_var_stripped $word1"
--    fi
--  done
--    tmp_CPPFLAGS="$ac_var_stripped"
--  squeeze tmp_CPPFLAGS
--
--      if test "$want_optimize" = "yes"; then
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler accepts optimizer enabling options" >&5
--printf %s "checking if compiler accepts optimizer enabling options... " >&6; }
--        tmp_options="$flags_opt_yes"
--      fi
--      if test "$want_optimize" = "no"; then
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler accepts optimizer disabling options" >&5
--printf %s "checking if compiler accepts optimizer disabling options... " >&6; }
--        tmp_options="$flags_opt_off"
--      fi
--      if test "$flags_prefer_cppflags" = "yes"; then
--        CPPFLAGS="$tmp_CPPFLAGS $tmp_options"
--        CFLAGS="$tmp_CFLAGS"
--      else
--        CPPFLAGS="$tmp_CPPFLAGS"
--        CFLAGS="$tmp_CFLAGS $tmp_options"
--      fi
--      squeeze CPPFLAGS
--      squeeze CFLAGS
--
--    tmp_compiler_works="unknown"
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--
--int main (void)
--{
--
--      int i = 1;
--      return i;
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_compile "$LINENO"
--then :
--
--    tmp_compiler_works="yes"
--
--else $as_nop
--
--    tmp_compiler_works="no"
--    echo " " >&6
--    sed 's/^/cc-fail: /' conftest.err >&6
--    echo " " >&6
--
--fi
--rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
--    if test "$tmp_compiler_works" = "yes"; then
--    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--
--int main (void)
--{
--
--        int i = 1;
--        return i;
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_link "$LINENO"
--then :
--
--      tmp_compiler_works="yes"
--
--else $as_nop
--
--      tmp_compiler_works="no"
--      echo " " >&6
--      sed 's/^/link-fail: /' conftest.err >&6
--      echo " " >&6
--
--fi
--rm -f core conftest.err conftest.$ac_objext conftest.beam \
--    conftest$ac_exeext conftest.$ac_ext
--  fi
--    if test "x$cross_compiling" != "xyes" &&
--    test "$tmp_compiler_works" = "yes"; then
--
--   case $host_os in
--     darwin*)
--      if test "$cross_compiling" = yes
--then :
--  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
--printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
--as_fn_error $? "cannot run test program while cross compiling
--See \`config.log' for more details" "$LINENO" 5; }
--else $as_nop
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--#       ifdef __STDC__
--#         include <stdlib.h>
--#       endif
--
--int main (void)
--{
--
--        int i = 0;
--        exit(i);
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_run "$LINENO"
--then :
--  tmp_compiler_works="yes"
--
--else $as_nop
--  tmp_compiler_works="no"
--      echo " " >&6
--      echo "run-fail: test program exited with status $ac_status" >&6
--      echo " " >&6
--
--fi
--rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
--  conftest.$ac_objext conftest.beam conftest.$ac_ext
--fi
--
--     ;;
--     *)
--      old=$LD_LIBRARY_PATH
--      LD_LIBRARY_PATH=$CURL_LIBRARY_PATH:$old
--      export LD_LIBRARY_PATH
--      if test "$cross_compiling" = yes
--then :
--  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
--printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
--as_fn_error $? "cannot run test program while cross compiling
--See \`config.log' for more details" "$LINENO" 5; }
--else $as_nop
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--#       ifdef __STDC__
--#         include <stdlib.h>
--#       endif
--
--int main (void)
--{
--
--        int i = 0;
--        exit(i);
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_run "$LINENO"
--then :
--  tmp_compiler_works="yes"
--
--else $as_nop
--  tmp_compiler_works="no"
--      echo " " >&6
--      echo "run-fail: test program exited with status $ac_status" >&6
--      echo " " >&6
--
--fi
--rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
--  conftest.$ac_objext conftest.beam conftest.$ac_ext
--fi
--
--      LD_LIBRARY_PATH=$old # restore
--     ;;
--   esac
--
--  fi
--    if test "$tmp_compiler_works" = "yes"; then
--
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
--printf "%s\n" "yes" >&6; }
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: compiler options added: $tmp_options" >&5
--printf "%s\n" "$as_me: compiler options added: $tmp_options" >&6;}
--
--  else
--
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
--printf "%s\n" "no" >&6; }
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: compiler options rejected: $tmp_options" >&5
--printf "%s\n" "$as_me: WARNING: compiler options rejected: $tmp_options" >&2;}
--                CPPFLAGS="$tmp_save_CPPFLAGS"
--        CFLAGS="$tmp_save_CFLAGS"
--
--  fi
--
--    fi
--    #
--  fi
--
--
--        #
--  if test "$compiler_id" != "unknown"; then
--    #
--    tmp_save_CPPFLAGS="$CPPFLAGS"
--    tmp_save_CFLAGS="$CFLAGS"
--    tmp_CPPFLAGS=""
--    tmp_CFLAGS=""
--    #
--    case "$compiler_id" in
--        #
--      CLANG)
--        #
--        if test "$want_warnings" = "yes"; then
--          tmp_CFLAGS="$tmp_CFLAGS -pedantic"
--
--    ac_var_added_warnings=""
--  for warning in all extra; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in pointer-arith write-strings; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in shadow; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in inline nested-externs; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in missing-declarations; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in missing-prototypes; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          tmp_CFLAGS="$tmp_CFLAGS -Wno-long-long"
--
--    ac_var_added_warnings=""
--  for warning in float-equal; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in no-multichar sign-compare; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in undef; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          tmp_CFLAGS="$tmp_CFLAGS -Wno-format-nonliteral"
--
--    ac_var_added_warnings=""
--  for warning in endif-labels strict-prototypes; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in declaration-after-statement; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in cast-align; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          tmp_CFLAGS="$tmp_CFLAGS -Wno-system-headers"
--
--    ac_var_added_warnings=""
--  for warning in shorten-64-to-32; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          #
--                    if test "$compiler_num" -ge "101"; then
--
--    ac_var_added_warnings=""
--  for warning in unused; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "208"; then
--
--    ac_var_added_warnings=""
--  for warning in vla; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "209"; then
--
--    ac_var_added_warnings=""
--  for warning in shift-sign-overflow; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "302"; then
--            case $host_os in
--            cygwin* | mingw*)
--                                          ;;
--            *)
--
--    ac_var_added_warnings=""
--  for warning in missing-variable-declarations; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--              ;;
--            esac
--          fi
--          #
--                    if test "$compiler_num" -ge "306"; then
--
--    ac_var_added_warnings=""
--  for warning in double-promotion; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "309"; then
--
--    ac_var_added_warnings=""
--  for warning in comma; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            # avoid the varargs warning, fixed in 4.0
--            # https://bugs.llvm.org/show_bug.cgi?id=29140
--            if test "$compiler_num" -lt "400"; then
--              tmp_CFLAGS="$tmp_CFLAGS -Wno-varargs"
--            fi
--          fi
--                    if test "$compiler_num" -ge "700"; then
--
--    ac_var_added_warnings=""
--  for warning in assign-enum; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in extra-semi-stmt; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--        fi
--        ;;
--        #
--      DEC_C)
--        #
--        if test "$want_warnings" = "yes"; then
--                    tmp_CFLAGS="$tmp_CFLAGS -msg_enable level3"
--        fi
--        ;;
--        #
--      GNU_C)
--        #
--        if test "$want_warnings" = "yes"; then
--          #
--                              if test "x$cross_compiling" != "xyes" ||
--            test "$compiler_num" -ge "300"; then
--            tmp_CFLAGS="$tmp_CFLAGS -pedantic"
--          fi
--          #
--
--    ac_var_added_warnings=""
--  for warning in all; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          tmp_CFLAGS="$tmp_CFLAGS -W"
--          #
--                    if test "$compiler_num" -ge "104"; then
--
--    ac_var_added_warnings=""
--  for warning in pointer-arith write-strings; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--                        if test "x$cross_compiling" != "xyes" ||
--              test "$compiler_num" -ge "300"; then
--
--    ac_var_added_warnings=""
--  for warning in unused shadow; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            fi
--          fi
--          #
--                    if test "$compiler_num" -ge "207"; then
--
--    ac_var_added_warnings=""
--  for warning in inline nested-externs; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--                        if test "x$cross_compiling" != "xyes" ||
--              test "$compiler_num" -ge "300"; then
--
--    ac_var_added_warnings=""
--  for warning in missing-declarations; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in missing-prototypes; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            fi
--          fi
--          #
--                    if test "$compiler_num" -ge "295"; then
--            tmp_CFLAGS="$tmp_CFLAGS -Wno-long-long"
--
--    ac_var_added_warnings=""
--  for warning in bad-function-cast; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "296"; then
--
--    ac_var_added_warnings=""
--  for warning in float-equal; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            tmp_CFLAGS="$tmp_CFLAGS -Wno-multichar"
--
--    ac_var_added_warnings=""
--  for warning in sign-compare; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in undef; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "297"; then
--            tmp_CFLAGS="$tmp_CFLAGS -Wno-format-nonliteral"
--          fi
--          #
--                    if test "$compiler_num" -ge "300"; then
--                                                            tmp_CFLAGS="$tmp_CFLAGS"
--          fi
--          #
--                    if test "$compiler_num" -ge "303"; then
--
--    ac_var_added_warnings=""
--  for warning in endif-labels strict-prototypes; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "304"; then
--
--    ac_var_added_warnings=""
--  for warning in declaration-after-statement; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in old-style-definition; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "400"; then
--            tmp_CFLAGS="$tmp_CFLAGS -Wstrict-aliasing=3"
--          fi
--          #
--                    if test "$compiler_num" -ge "402"; then
--
--    ac_var_added_warnings=""
--  for warning in cast-align; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "403"; then
--
--    ac_var_added_warnings=""
--  for warning in type-limits old-style-declaration; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in missing-parameter-type empty-body; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in clobbered ignored-qualifiers; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in conversion; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            tmp_CFLAGS="$tmp_CFLAGS -Wno-sign-conversion"
--
--    ac_var_added_warnings=""
--  for warning in vla; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--                        tmp_CFLAGS="$tmp_CFLAGS -ftree-vrp"
--          fi
--          #
--                    if test "$compiler_num" -ge "405"; then
--                        if test "$curl_cv_have_def__WIN32" = "yes"; then
--              tmp_CFLAGS="$tmp_CFLAGS -Wno-pedantic-ms-format"
--            fi
--          fi
--          #
--                    if test "$compiler_num" -ge "406"; then
--
--    ac_var_added_warnings=""
--  for warning in double-promotion; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "408"; then
--            tmp_CFLAGS="$tmp_CFLAGS -Wformat=2"
--          fi
--          #
--                    if test "$compiler_num" -ge "500"; then
--            tmp_CFLAGS="$tmp_CFLAGS -Warray-bounds=2"
--          fi
--          #
--                    if test "$compiler_num" -ge "600"; then
--
--    ac_var_added_warnings=""
--  for warning in shift-negative-value; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            tmp_CFLAGS="$tmp_CFLAGS -Wshift-overflow=2"
--
--    ac_var_added_warnings=""
--  for warning in null-dereference; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            tmp_CFLAGS="$tmp_CFLAGS -fdelete-null-pointer-checks"
--
--    ac_var_added_warnings=""
--  for warning in duplicated-cond; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in unused-const-variable; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--                    if test "$compiler_num" -ge "700"; then
--
--    ac_var_added_warnings=""
--  for warning in duplicated-branches; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in restrict; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in alloc-zero; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--            tmp_CFLAGS="$tmp_CFLAGS -Wformat-overflow=2"
--            tmp_CFLAGS="$tmp_CFLAGS -Wformat-truncation=2"
--            if test "$compiler_num" -lt "1200"; then
--                            tmp_CFLAGS="$tmp_CFLAGS -Wimplicit-fallthrough=4"
--            fi
--          fi
--          #
--                    if test "$compiler_num" -ge "1000"; then
--
--    ac_var_added_warnings=""
--  for warning in arith-conversion; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in enum-conversion; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--          fi
--          #
--        fi
--        #
--                if test "$compiler_num" -ge "300"; then
--          tmp_CFLAGS="$tmp_CFLAGS -Wno-system-headers"
--        else
--                              if test "x$cross_compiling" = "xyes"; then
--            if test "$compiler_num" -ge "104"; then
--                            tmp_CFLAGS="$tmp_CFLAGS -Wno-unused -Wno-shadow"
--            fi
--            if test "$compiler_num" -ge "207"; then
--                            tmp_CFLAGS="$tmp_CFLAGS -Wno-missing-declarations"
--              tmp_CFLAGS="$tmp_CFLAGS -Wno-missing-prototypes"
--            fi
--          fi
--        fi
--        ;;
--        #
--      HP_UX_C)
--        #
--        if test "$want_warnings" = "yes"; then
--                    tmp_CFLAGS="$tmp_CFLAGS +w1"
--        fi
--        ;;
--        #
--      IBM_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--      INTEL_UNIX_C)
--        #
--        if test "$want_warnings" = "yes"; then
--          if test "$compiler_num" -gt "600"; then
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wall -w2"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wcheck"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wcomment"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wdeprecated"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wmissing-prototypes"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wp64"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wpointer-arith"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wreturn-type"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wshadow"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wuninitialized"
--                        tmp_CPPFLAGS="$tmp_CPPFLAGS -Wunused-function"
--          fi
--        fi
--                tmp_CFLAGS="$tmp_CFLAGS -fno-omit-frame-pointer"
--                tmp_CFLAGS="$tmp_CFLAGS -fno-strict-aliasing"
--                tmp_CFLAGS="$tmp_CFLAGS -fp-model precise"
--        ;;
--        #
--      INTEL_WINDOWS_C)
--        #
--                tmp_CFLAGS="$tmp_CFLAGS"
--        ;;
--        #
--      LCC)
--        #
--        if test "$want_warnings" = "yes"; then
--                                                  tmp_CFLAGS="$tmp_CFLAGS"
--        fi
--        ;;
--        #
--      SGI_MIPS_C)
--        #
--        if test "$want_warnings" = "yes"; then
--                    tmp_CFLAGS="$tmp_CFLAGS -fullwarn"
--        fi
--        ;;
--        #
--      SGI_MIPSPRO_C)
--        #
--        if test "$want_warnings" = "yes"; then
--                    tmp_CFLAGS="$tmp_CFLAGS -fullwarn"
--                              tmp_CFLAGS="$tmp_CFLAGS -woff 1209"
--        fi
--        ;;
--        #
--      SUNPRO_C)
--        #
--        if test "$want_warnings" = "yes"; then
--                    tmp_CFLAGS="$tmp_CFLAGS -v"
--        fi
--        ;;
--        #
--      TINY_C)
--        #
--        if test "$want_warnings" = "yes"; then
--
--    ac_var_added_warnings=""
--  for warning in all; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in write-strings; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--
--    ac_var_added_warnings=""
--  for warning in unsupported; do
--
--  ac_var_match_word="no"
--  for word1 in $CFLAGS; do
--    for word2 in -Wno-$warning -W$warning; do
--      if test "$word1" = "$word2"; then
--        ac_var_match_word="yes"
--      fi
--    done
--  done
--
--    if test "$ac_var_match_word" = "no"; then
--      ac_var_added_warnings="$ac_var_added_warnings -W$warning"
--    fi
--  done
--    tmp_CFLAGS="$tmp_CFLAGS $ac_var_added_warnings"
--  squeeze tmp_CFLAGS
--
--        fi
--        ;;
--        #
--    esac
--    #
--    squeeze tmp_CPPFLAGS
--    squeeze tmp_CFLAGS
--    #
--    if test ! -z "$tmp_CFLAGS" || test ! -z "$tmp_CPPFLAGS"; then
--      { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler accepts strict warning options" >&5
--printf %s "checking if compiler accepts strict warning options... " >&6; }
--      CPPFLAGS="$tmp_save_CPPFLAGS $tmp_CPPFLAGS"
--      CFLAGS="$tmp_save_CFLAGS $tmp_CFLAGS"
--      squeeze CPPFLAGS
--      squeeze CFLAGS
--
--    tmp_compiler_works="unknown"
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--
--int main (void)
--{
--
--      int i = 1;
--      return i;
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_compile "$LINENO"
--then :
--
--    tmp_compiler_works="yes"
--
--else $as_nop
--
--    tmp_compiler_works="no"
--    echo " " >&6
--    sed 's/^/cc-fail: /' conftest.err >&6
--    echo " " >&6
--
--fi
--rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext
--    if test "$tmp_compiler_works" = "yes"; then
--    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--
--int main (void)
--{
--
--        int i = 1;
--        return i;
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_link "$LINENO"
--then :
--
--      tmp_compiler_works="yes"
--
--else $as_nop
--
--      tmp_compiler_works="no"
--      echo " " >&6
--      sed 's/^/link-fail: /' conftest.err >&6
--      echo " " >&6
--
--fi
--rm -f core conftest.err conftest.$ac_objext conftest.beam \
--    conftest$ac_exeext conftest.$ac_ext
--  fi
--    if test "x$cross_compiling" != "xyes" &&
--    test "$tmp_compiler_works" = "yes"; then
--
--   case $host_os in
--     darwin*)
--      if test "$cross_compiling" = yes
--then :
--  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
--printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
--as_fn_error $? "cannot run test program while cross compiling
--See \`config.log' for more details" "$LINENO" 5; }
--else $as_nop
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--#       ifdef __STDC__
--#         include <stdlib.h>
--#       endif
--
--int main (void)
--{
--
--        int i = 0;
--        exit(i);
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_run "$LINENO"
--then :
--  tmp_compiler_works="yes"
--
--else $as_nop
--  tmp_compiler_works="no"
--      echo " " >&6
--      echo "run-fail: test program exited with status $ac_status" >&6
--      echo " " >&6
--
--fi
--rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
--  conftest.$ac_objext conftest.beam conftest.$ac_ext
--fi
--
--     ;;
--     *)
--      old=$LD_LIBRARY_PATH
--      LD_LIBRARY_PATH=$CURL_LIBRARY_PATH:$old
--      export LD_LIBRARY_PATH
--      if test "$cross_compiling" = yes
--then :
--  { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
--printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;}
--as_fn_error $? "cannot run test program while cross compiling
--See \`config.log' for more details" "$LINENO" 5; }
--else $as_nop
--  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
--/* end confdefs.h.  */
--
--
--#       ifdef __STDC__
--#         include <stdlib.h>
--#       endif
--
--int main (void)
--{
--
--        int i = 0;
--        exit(i);
--
-- ;
-- return 0;
--}
--
--_ACEOF
--if ac_fn_c_try_run "$LINENO"
--then :
--  tmp_compiler_works="yes"
--
--else $as_nop
--  tmp_compiler_works="no"
--      echo " " >&6
--      echo "run-fail: test program exited with status $ac_status" >&6
--      echo " " >&6
--
--fi
--rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
--  conftest.$ac_objext conftest.beam conftest.$ac_ext
--fi
--
--      LD_LIBRARY_PATH=$old # restore
--     ;;
--   esac
--
--  fi
--    if test "$tmp_compiler_works" = "yes"; then
--
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
--printf "%s\n" "yes" >&6; }
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: compiler options added: $tmp_CFLAGS $tmp_CPPFLAGS" >&5
--printf "%s\n" "$as_me: compiler options added: $tmp_CFLAGS $tmp_CPPFLAGS" >&6;}
--
--  else
--
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
--printf "%s\n" "no" >&6; }
--        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: compiler options rejected: $tmp_CFLAGS $tmp_CPPFLAGS" >&5
--printf "%s\n" "$as_me: WARNING: compiler options rejected: $tmp_CFLAGS $tmp_CPPFLAGS" >&2;}
--                CPPFLAGS="$tmp_save_CPPFLAGS"
--        CFLAGS="$tmp_save_CFLAGS"
--
--  fi
--
--    fi
--    #
--  fi
--
--
--if test "$compiler_id" = "INTEL_UNIX_C"; then
--  #
--  if test "$compiler_num" -ge "1000"; then
--        CFLAGS="$CFLAGS -shared-intel"
--  elif test "$compiler_num" -ge "900"; then
--        CFLAGS="$CFLAGS -i-dynamic"
--  fi
--  #
--fi
--
--CURL_CFLAG_EXTRAS=""
--if test X"$want_werror" = Xyes; then
--  CURL_CFLAG_EXTRAS="-Werror"
--  if test "$compiler_id" = "GNU_C"; then
--            if test "$compiler_num" -ge "500"; then
--      CURL_CFLAG_EXTRAS="$CURL_CFLAG_EXTRAS -pedantic-errors"
--    fi
--  fi
--fi
--
--
--
-   { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler halts on compilation errors" >&5
- printf %s "checking if compiler halts on compilation errors... " >&6; }
-   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
---- curl-7.83.1/curl-config.in.orig	2022-05-09 09:52:19.000000000 +0200
-+++ curl-7.83.1/curl-config.in	2022-05-11 16:28:11.191258534 +0200
-@@ -155,11 +155,7 @@
-         ;;
- 
-     --libs)
--        if test "X@libdir@" != "X/usr/lib" -a "X@libdir@" != "X/usr/lib64"; then
--           CURLLIBDIR="-L@libdir@ "
--        else
--           CURLLIBDIR=""
--        fi
-+        CURLLIBDIR=""
-         if test "X@ENABLE_SHARED@" = "Xno"; then
-           echo ${CURLLIBDIR}-lcurl @LIBCURL_LIBS@
-         else
---- curl-7.83.1/src/Makefile.in.orig	2022-05-09 11:03:44.000000000 +0200
-+++ curl-7.83.1/src/Makefile.in	2022-05-12 17:27:11.606680950 +0200
-@@ -260,9 +260,9 @@
- am_curl_OBJECTS = $(am__objects_8)
- curl_OBJECTS = $(am_curl_OBJECTS)
- @USE_EXPLICIT_LIB_DEPS_FALSE@curl_DEPENDENCIES =  \
--@USE_EXPLICIT_LIB_DEPS_FALSE@	$(top_builddir)/lib/libcurl.la
-+@USE_EXPLICIT_LIB_DEPS_FALSE@	$(top_builddir)/lib/.libs/libcurl.a
- @USE_EXPLICIT_LIB_DEPS_TRUE@curl_DEPENDENCIES =  \
--@USE_EXPLICIT_LIB_DEPS_TRUE@	$(top_builddir)/lib/libcurl.la
-+@USE_EXPLICIT_LIB_DEPS_TRUE@	$(top_builddir)/lib/.libs/libcurl.a
- AM_V_P = $(am__v_P_@AM_V@)
- am__v_P_ = $(am__v_P_@AM_DEFAULT_V@)
- am__v_P_0 = false
-@@ -814,8 +814,8 @@
- 
- # CURL_FILES comes from Makefile.inc
- curl_SOURCES = $(CURL_FILES)
--@USE_EXPLICIT_LIB_DEPS_FALSE@curl_LDADD = $(top_builddir)/lib/libcurl.la @NSS_LIBS@ @SSL_LIBS@ @ZLIB_LIBS@ @CURL_NETWORK_AND_TIME_LIBS@
--@USE_EXPLICIT_LIB_DEPS_TRUE@curl_LDADD = $(top_builddir)/lib/libcurl.la @LIBCURL_LIBS@
-+@USE_EXPLICIT_LIB_DEPS_FALSE@curl_LDADD = $(top_builddir)/lib/.libs/libcurl.a @NSS_LIBS@ @SSL_LIBS@ @ZLIB_LIBS@ @CURL_NETWORK_AND_TIME_LIBS@
-+@USE_EXPLICIT_LIB_DEPS_TRUE@curl_LDADD = $(top_builddir)/lib/.libs/libcurl.a @LIBCURL_LIBS@
- 
- # if unit tests are enabled, build a static library to link them with
- @BUILD_UNITTESTS_TRUE@noinst_LTLIBRARIES = libcurltool.la
---- curl-7.83.1/lib/multihandle.h.orig	2022-05-09 09:52:19.000000000 +0200
-+++ curl-7.83.1/lib/multihandle.h	2022-05-12 17:53:13.903809251 +0200
-@@ -70,10 +70,6 @@
- 
- #define CURLPIPE_ANY (CURLPIPE_MULTIPLEX)
- 
--#if !defined(CURL_DISABLE_SOCKETPAIR)
--#define ENABLE_WAKEUP
--#endif
--
- /* value for MAXIMUM CONCURRENT STREAMS upper limit */
- #define INITIAL_MAX_CONCURRENT_STREAMS ((1U << 31) - 1)
- 
diff --git a/patches/curl-8.7.1.local.patch b/patches/curl-8.7.1.local.patch
new file mode 100644
index 00000000..87364a70
--- /dev/null
+++ b/patches/curl-8.7.1.local.patch
@@ -0,0 +1,20 @@
+diff -ru curl-8.7.1.orig/configure curl-8.7.1/configure
+--- curl-8.7.1.orig/configure	2024-04-08 23:55:17.997659030 +0200
++++ curl-8.7.1/configure	2024-04-09 00:03:10.404057041 +0200
+@@ -15627,6 +15627,16 @@
+   hardcode_libdir_flag_spec='-L$libdir'
+   ;;
+ 
++midipix*)
++  version_type=linux # correct to gnu/linux during the next big refactor
++  need_lib_prefix=no
++  need_version=no
++  library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext'
++  soname_spec='$libname$release$shared_ext$major'
++  shlibpath_var=LD_LIBRARY_PATH
++  ;;
++
++
+ # This must be glibc/ELF.
+ linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
+   version_type=linux # correct to gnu/linux during the next big refactor
diff --git a/patches/curl-8.7.1_pre.local.patch b/patches/curl-8.7.1_pre.local.patch
new file mode 100644
index 00000000..568e1bd8
--- /dev/null
+++ b/patches/curl-8.7.1_pre.local.patch
@@ -0,0 +1,56 @@
+diff -ru curl-8.7.1.orig/curl-config.in curl-8.7.1/curl-config.in
+--- curl-8.7.1.orig/curl-config.in      2024-03-06 22:16:03.000000000 +0100
++++ curl-8.7.1/curl-config.in   2024-04-09 00:07:35.445813553 +0200
+@@ -152,13 +152,13 @@
+         if test "X@includedir@" = "X/usr/include"; then
+           echo "$CPPFLAG_CURL_STATICLIB"
+         else
+-          echo "${CPPFLAG_CURL_STATICLIB}-I@includedir@"
++          echo "$CPPFLAG_CURL_STATICLIB"
+         fi
+         ;;
+
+     --libs)
+         if test "X@libdir@" != "X/usr/lib" -a "X@libdir@" != "X/usr/lib64"; then
+-           CURLLIBDIR="-L@libdir@ "
++           CURLLIBDIR=""
+         else
+            CURLLIBDIR=""
+         fi
+diff -ru curl-8.7.1.orig/m4/curl-compilers.m4 curl-8.7.1/m4/curl-compilers.m4
+--- curl-8.7.1.orig/m4/curl-compilers.m4	2024-03-25 09:48:59.000000000 +0100
++++ curl-8.7.1/m4/curl-compilers.m4	2024-04-08 23:23:12.804956865 +0200
+@@ -41,33 +41,6 @@
+   flags_opt_off="unknown"
+   #
+   flags_prefer_cppflags="no"
+-  #
+-  CURL_CHECK_COMPILER_DEC_C
+-  CURL_CHECK_COMPILER_HPUX_C
+-  CURL_CHECK_COMPILER_IBM_C
+-  CURL_CHECK_COMPILER_INTEL_C
+-  CURL_CHECK_COMPILER_CLANG
+-  CURL_CHECK_COMPILER_GNU_C
+-  CURL_CHECK_COMPILER_SGI_MIPSPRO_C
+-  CURL_CHECK_COMPILER_SGI_MIPS_C
+-  CURL_CHECK_COMPILER_SUNPRO_C
+-  CURL_CHECK_COMPILER_TINY_C
+-  #
+-  if test "$compiler_id" = "unknown"; then
+-  cat <<_EOF 1>&2
+-***
+-*** Warning: This configure script does not have information about the
+-*** compiler you are using, relative to the flags required to enable or
+-*** disable generation of debug info, optimization options or warnings.
+-***
+-*** Whatever settings are present in CFLAGS will be used for this run.
+-***
+-*** If you wish to help the curl project to better support your compiler
+-*** you can report this and the required info on the libcurl development
+-*** mailing list: https://lists.haxx.selistinfo/curl-library/
+-***
+-_EOF
+-  fi
+ ])
+ 
+ 
diff --git a/patches/cvs-1.12.13.local.patch b/patches/cvs-1.12.13.local.patch
new file mode 100644
index 00000000..5d024d6e
--- /dev/null
+++ b/patches/cvs-1.12.13.local.patch
@@ -0,0 +1,29 @@
+diff -ru cvs-1.12.13.orig/src/main.c cvs-1.12.13/src/main.c
+--- cvs-1.12.13.orig/src/main.c	2022-10-20 15:44:42.306215161 +0200
++++ cvs-1.12.13/src/main.c	2022-10-20 15:50:55.838352069 +0200
+@@ -24,10 +24,6 @@
+ #include "strftime.h"
+ #include "xgethostname.h"
+ 
+-#ifdef USE_LIBBSD
+-uint32_t arc4random(void);
+-#endif
+-
+ const char *program_name;
+ const char *program_path;
+ const char *cvs_cmd_name;
+@@ -749,10 +745,13 @@
+ 
+     /* Calculate the cvs global session ID */
+ 
++	int random;
++	getentropy(&random, sizeof(int));
++
+     global_session_id = Xasprintf("1%010llX%04X%04X",
+       (unsigned long long)time(NULL),
+       (unsigned int)(getpid() & 0xFFFF),
+-      (unsigned int)(arc4random() & 0xFFFF));
++      (unsigned int)random & 0xFFFF);
+ 
+     TRACE (TRACE_FUNCTION, "main: Session ID is %s", global_session_id);
+ 
diff --git a/patches/cvs-1.12.13_pre.local.patch b/patches/cvs-1.12.13_pre.local.patch
new file mode 100644
index 00000000..3f94dbcf
--- /dev/null
+++ b/patches/cvs-1.12.13_pre.local.patch
@@ -0,0 +1,16025 @@
+diff -ru cvs-1.12.13.orig/src/Makefile.in cvs-1.12.13/src/Makefile.in
+--- cvs-1.12.13.orig/src/Makefile.in    2005-10-03 15:37:18.000000000 +0200
++++ cvs-1.12.13/src/Makefile.in 2022-10-20 16:25:44.014173101 +0200
+@@ -150,7 +150,7 @@
+	release.$(OBJEXT) remove.$(OBJEXT) repos.$(OBJEXT) \
+	root.$(OBJEXT) rsh-client.$(OBJEXT) run.$(OBJEXT) \
+	scramble.$(OBJEXT) server.$(OBJEXT) stack.$(OBJEXT) \
+-	status.$(OBJEXT) subr.$(OBJEXT) tag.$(OBJEXT) update.$(OBJEXT) \
++	status.$(OBJEXT) subr.$(OBJEXT) suck.$(OBJEXT) tag.$(OBJEXT) update.$(OBJEXT) \
+	version.$(OBJEXT) vers_ts.$(OBJEXT) watch.$(OBJEXT) \
+	wrapper.$(OBJEXT) zlib.$(OBJEXT)
+ cvs_OBJECTS = $(am_cvs_OBJECTS)
+@@ -304,8 +304,6 @@
+ AM_CPPFLAGS = -I$(top_srcdir)/lib -I$(top_builddir)/lib \
+               -I$(top_srcdir)/diff $(ZLIB_CPPFLAGS)
+
+-bin_SCRIPTS = cvsbug
+-
+ # The cvs executable
+ cvs_SOURCES = \
+	add.c \
+@@ -361,6 +359,7 @@
+	stack.c stack.h \
+	status.c \
+	subr.c subr.h \
++	suck.c \
+	tag.c \
+	update.c \
+	version.c \
+--- cvs-1.12.13+real.orig/AUTHORS
++++ cvs-1.12.13+real/AUTHORS
+@@ -57,6 +57,12 @@
+ There have been many, many contributions not listed here.  Consult the
+ individual ChangeLog files in each directory for a more complete idea.
+ 
++The de-facto (if not… yet… de-iure) new upstream of GNU CVS 1.12.x is
++MirBSD, which also provides the Debian packages incorporating original
++development work and fixes by mirabilos <m@mirbsd.org> and some inspired
++by changes to GNU CVS 1.11.1p1 from other BSDs and by changes from the
++previous Debian package.
++
+ In addition to the above contributors, the following Beta testers
+ deserve special mention for their support.  This is only a partial
+ list; if you have helped in this way and would like to be listed, let
+@@ -88,3 +94,6 @@
+ Many contributors have added code to the "contrib" directory.  See the
+ README file there for a list of what is available.  There is also a
+ contributed GNU Emacs CVS-mode in tools/pcl-cvs.
++
++
++$MirOS: src/gnu/usr.bin/cvs/AUTHORS,v 1.7 2021/01/30 02:05:54 tg Exp $
+--- cvs-1.12.13+real.orig/DEVEL-CVS
++++ cvs-1.12.13+real/DEVEL-CVS
+@@ -7,7 +7,8 @@
+ Policies regarding the CVS source repository:
+ 
+ By checking items into the repository, developers agree to permit
+-distribution of such items under the terms of the GNU Public License.
++distribution of such items under the terms of the GNU General Public
++License.
+ 
+ ----------------------------------------------------------------------
+ Procedure for dealing with people who want to be developers:
+--- cvs-1.12.13+real.orig/FAQ
++++ cvs-1.12.13+real/FAQ
+@@ -3097,7 +3097,7 @@
+    If you want to allow read access, check out an entire tree somewhere.
+    You have to do this anyway to build it.
+    
+-   Note: If you are using a stupid file system that can't inherit file
++   Note: If you are using a stupid filesystem that can't inherit file
+    groups from the parent directory (even with the "setgid" (Octal 2000)
+    bit set), you might have to modify CVS (or RCS) to reset the group
+    every time you create a new file. I have not tested this.
+@@ -7234,7 +7234,7 @@
+ 
+    It will respond:
+    
+-   Directory /Repos/<dir> added to the repository
++   Directory /Repos/<dir> put under version control
+    
+    and will create both a matching directory in the Repository and a
+    ./CVS administrative directory within the local <dir> directory.
+@@ -7541,7 +7541,7 @@
+    available on Sun, HP, SGI and OSF/1 platforms.
+    
+    ClearCase uses a special Unix filesystem type, called "mvfs" for
+-   "multi-version file system". Conceptually, mvfs adds another dimension
++   "multi-version filesystem". Conceptually, mvfs adds another dimension
+    to a regular Unix filesystem. The new axis is used to store the
+    different versions of files and to provide a tree-hierarchical view of
+    a collection of objects that might be scattered across any number of
+@@ -7644,7 +7644,7 @@
+     
+    Shapetools includes a build mechanism (called Shape, not surprisingly)
+    that is aware of the version mechanism, and some dependency tracking.
+-   It is based on a file system extension called Attributed File System,
++   It is based on a filesystem extension called Attributed Filesystem,
+    which allows arbitrary-sized "attributes" to be associated with a
+    file. Files are version controlled in a manner similar to RCS.
+    Configurations are managed through the Shapefile, an extension of the
+--- cvs-1.12.13+real.orig/MINOR-BUGS
++++ cvs-1.12.13+real/MINOR-BUGS
+@@ -59,3 +59,15 @@
+   belong under the "checkout" function?  Perhaps it is more logically
+   grouped with the "history" function or we should create a new "info"
+   function?
++
++
++Note that it is the opinion of the MirBSD founder that the CVSROOT
++environment variable ought to *never* be set at all. This prevents
++a lot of trouble. Almost all CVS tutorials stating otherwise (or
++recommending pserver) are perceived bogus.
++
++"cvs annotate -b" does not do what people would expect, I think,
++but neither does it do that under MidnightBSD/DragonFly, where
++it came from.
++
++$MirOS: src/gnu/usr.bin/cvs/MINOR-BUGS,v 1.5 2016/11/08 23:04:31 tg Exp $
+--- cvs-1.12.13+real.orig/NEWS
++++ cvs-1.12.13+real/NEWS
+@@ -1,3 +1,11 @@
++Changes since 1.12.13:
++**********************
++
++* many which are only documented in MirBSD CVS
++
++* A new command line option, --allow-root-regexp, was added which allows
++  acceptable repositories to be specified using a list of regular expressions.
++
+ Changes since 1.12.12:
+ **********************
+ 
+@@ -669,7 +677,7 @@
+   from the server.
+ 
+ * The configure script now tests whether it is building CVS on a case
+-  insensitive file system.  If it is, CVS assumes that all file systems on this
++  insensitive filesystem.  If it is, CVS assumes that all filesystems on this
+   platform will be case insensitive.  This is useful for getting the case
+   insensitivity flag set correctly when compiling on Mac OS X and under Cygwin
+   on Windows.  Autodetection can be overridden using the
+--- cvs-1.12.13+real.orig/TODO
++++ cvs-1.12.13+real/TODO
+@@ -33,14 +33,14 @@
+ 66. Length of the CVS temporary files must be limited to 14 characters for
+     System-V stupid support.  As well as the length on the CVS.adm files.
+ 
+-72. Consider re-design of the module -t options to use the file system more
++72. Consider re-design of the module -t options to use the filesystem more
+     intuitively.
+ 
+ 73. Consider an option (in .cvsrc?) to automatically add files that are new
+     and specified to commit.
+ 
+ 79. Might be nice to have some sort of interface to Sun's Translucent
+-    (?) File System and tagged revisions.
++    (?) filesystem and tagged revisions.
+ 
+ 82. Maybe the import stuff should allow an arbitrary revision to be
+     specified.
+@@ -215,7 +215,7 @@
+      machine or directory.  But there are other cases, like where the
+      user might want to change from :pserver: to :ext:, use a different
+      server (if there are two server machines which share the
+-     repository using a networked file system), etc.
++     repository using a networked filesystem), etc.
+ 
+      The status quo is a bit of a mess (as of, say, CVS 1.9).  It is
+      that the -d global option has two moderately different uses.  One
+@@ -334,7 +334,7 @@
+ 
+ 165. The "import" command will create RCS files automatically, but will
+      screw-up when trying to create long file names on short file name
+-     file systems.  Perhaps import should be a bit more cautious.
++     filesystems.  Perhaps import should be a bit more cautious.
+ 
+ 166. There really needs to be a "Getting Started" document which describes
+      some of the new CVS philosophies.  Folks coming straight from SCCS or
+--- cvs-1.12.13+real.orig/contrib/README
++++ cvs-1.12.13+real/contrib/README
+@@ -74,6 +74,7 @@
+ 			if it does not already.
+ 			Copied from the C-News distribution.
+ 
++	/usr/share/doc/cvs/intro.txt in Debian:
+ 	intro.doc	A user's view of what you need to know to get
+ 			started with CVS.
+ 			Contributed by <Steven.Pemberton@cwi.nl>.
+--- cvs-1.12.13+real.orig/contrib/cvs_acls.html
++++ cvs-1.12.13+real/contrib/cvs_acls.html
+@@ -280,7 +280,7 @@
+ <p>A final note about the repository matching pattern.  The example above
+ uses ``ALL'' but note that this means that the cvs_acls script will run
+ for each and every commit in your repository.  Obviously, in a large
+-repository this adds up to a lot of overhead that may not be necesary. 
++repository this adds up to a lot of overhead that may not be necessary.
+ A better strategy is to use a repository pattern that is more specific 
+ to the areas that you wish to secure.</p>
+ <p>3. Install this file as $CVSROOT/CVSROOT/cvs_acls and make it executable.</p>
+--- cvs-1.12.13+real.orig/contrib/cvs_acls.in
++++ cvs-1.12.13+real/contrib/cvs_acls.in
+@@ -309,7 +309,7 @@
+ A final note about the repository matching pattern.  The example above
+ uses "ALL" but note that this means that the cvs_acls script will run
+ for each and every commit in your repository.  Obviously, in a large
+-repository this adds up to a lot of overhead that may not be necesary. 
++repository this adds up to a lot of overhead that may not be necessary.
+ A better strategy is to use a repository pattern that is more specific 
+ to the areas that you wish to secure.
+ 
+--- cvs-1.12.13+real.orig/contrib/rcs2log.1
++++ cvs-1.12.13+real/contrib/rcs2log.1
+@@ -1,3 +1,4 @@
++.\" $MirOS: src/gnu/usr.bin/cvs/contrib/rcs2log.1,v 1.2 2011/05/06 22:44:59 tg Exp $
+ .\"
+ .\" Copyright 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
+ .\"
+@@ -25,17 +26,17 @@
+ .Sh SYNOPSIS
+ .Nm rcs2log
+ .Bk -words
++.Op Fl nRv
+ .Op Fl c Ar changelog
+ .Op Fl h Ar hostname
+ .Op Fl i Ar indent
+ .Op Fl l Ar length
+-.Op Fl R
++.Op Fl L Ar file
+ .Op Fl r Ar option
+ .Op Fl t Ar tabwidth
+ .Op Fl u Ar login<TAB>fullname<TAB>mailaddr
+-.Op Fl v
+-.Op Fl -help
+-.Op Fl -version
++.Op Fl \-help
++.Op Fl \-version
+ .Op Ar file ...
+ .Ek
+ .Sh DESCRIPTION
+@@ -62,6 +63,14 @@
+ Try to limit log lines to
+ .Ar length
+ characters (default 79).
++.It Fl L Ar file
++Use rlog-format
++.Ar file
++for source of logs.
++.It Fl n
++Obsolete, use
++.Fl u
++instead (whose syntax differs).
+ .It Fl R
+ If no
+ .Ar file Ns Li (s)
+@@ -83,9 +92,9 @@
+ .Ar mailaddr .
+ .It Fl v
+ Append RCS revision to file names in log lines.
+-.It Fl -help
++.It Fl \-help
+ Output help.
+-.It Fl -version
++.It Fl \-version
+ Output version number.
+ .El
+ .Sh SEE ALSO
+--- cvs-1.12.13+real.orig/contrib/rcs2log.sh
++++ cvs-1.12.13+real/contrib/rcs2log.sh
+@@ -1,4 +1,5 @@
+ #! /bin/sh
++# $MirOS: src/gnu/usr.bin/cvs/contrib/rcs2log.sh,v 1.6 2011/05/06 22:44:59 tg Exp $
+ 
+ # Copyright (C) 1995-2005 The Free Software Foundation, Inc.
+ 
+@@ -31,6 +32,7 @@
+   -i INDENT  Indent change log lines by INDENT spaces (default 8).
+   -l LENGTH  Try to limit log lines to LENGTH characters (default 79).
+   -L FILE  Use rlog-format FILE for source of logs.
++  -n  Obsolete, use -u instead (whose syntax differs).
+   -R  If no FILEs are given and RCS is used, recurse through working directory.
+   -r OPTION  Pass OPTION to subsidiary log command.
+   -t TABWIDTH  Tab stops are every TABWIDTH characters (default 8).
+@@ -199,7 +201,7 @@
+ 	m[9]="Oct"; m[10]="Nov"; m[11]="Dec"
+ '
+ 
+-logdir=`$MKTEMP -d $TMPDIR/rcs2log.XXXXXX`
++logdir=$($MKTEMP -d $TMPDIR/rcs2log.XXXXXXXXXX)
+ test -n "$logdir" || exit
+ llogout=$logdir/l
+ trap exit 1 2 13 15
+@@ -632,7 +634,7 @@
+ # Sort the log entries, first by date+time (in reverse order),
+ # then by author, then by log entry, and finally by file name and revision
+ # (just in case).
+-sort -t"$SOH" +2 -4r +4 +0 |
++sort -t"$SOH" -k 3,4r -k 5 -k 1 |
+ 
+ # Finally, reformat the sorted log entries.
+ $AWK -F"$SOH" '
+--- cvs-1.12.13+real.orig/contrib/sccs2rcs.in
++++ cvs-1.12.13+real/contrib/sccs2rcs.in
+@@ -1,4 +1,5 @@
+ #! @CSH@ -f
++# $MirOS: src/gnu/usr.bin/cvs/contrib/sccs2rcs.in,v 1.2 2011/05/06 21:50:27 tg Exp $
+ 
+ # Copyright (C) 1995-2005 The Free Software Foundation, Inc.
+ 
+@@ -219,7 +220,7 @@
+ 	# we expected in the output we have other problems.
+ 	# Note: Solaris awk does not like the following line. Use gawk
+ 	# mawk, or nawk instead.
+-	set date = `sccs prs -r$rev $file | @AWK@ '/^D / {print (substr($3,0,2)+0<70?20:19) $3, $4; exit}'`
++	set date = `sccs prs -r$rev $file | @AWK@ '/^D / {print (substr($3,1,2)+0<70?20:19) $3, $4; exit}'`
+         set author = `sccs prs -r$rev $file | @AWK@ '/^D / {print $5; exit}'`
+         echo ""
+         echo "==> file $file, rev=$rev, date=$date, author=$author"
+--- cvs-1.12.13+real.orig/debian/NEWS
++++ cvs-1.12.13+real/debian/NEWS
+@@ -0,0 +1,88 @@
++cvs (2:1.12.13+real-23) unstable; urgency=low
++
++  Starting from this version, environment variables that are
++  defined but empty are handled the same as undefined ones,
++  except CVSREAD and CVSREADONLYFS (whose mere presence in
++  the environment enables the functionality).
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Fri, 28 Apr 2017 19:10:30 +0200
++
++cvs (2:1.12.13+real-22) unstable; urgency=low
++
++  Newly created repositories (from “cvs init”) now rely on
++  CVSUMASK for the permissions of the “history” and “val-tags”
++  files instead of creating them as world-writable.
++
++  Newly created repositories contain a LogHistory configuration
++  setting to only record write operations in the “history” file.
++
++  If you are used to the previous behaviour, you can restore it
++  by altering (or removing, in which case the (commented-out)
++  default of logging everything will be used) the LogHistory
++  configuration setting and changing the permissions on the
++  “history” and “val-tags” files so that every user can write
++  into them.
++
++  If you did not deliberately open your repository to all users
++  on your system, you might wish to change all existing repos
++  to this behaviour. To do this, check out the CVSROOT module,
++  edit the “config” file adding “LogHistory=TMAR”, check that
++  change in, release the CVSROOT module, and chmod the “history”
++  and “val-tags” files to either 0664 (if all users in the same
++  group should be able to commit) or 0644 (if only you wish to
++  commit), possibly 0660 or 0600 is non-committers should also
++  be denied reading.
++
++  Contact me (mirabilos) in #cvs on irc.freenode.net if you have
++  any questions about this change or require further support.
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 28 Mar 2017 19:54:01 +0200
++
++cvs (2:1.12.13+real-7) unstable; urgency=high
++
++  rcs2log no longer lives in the PATH, the contributed script
++  and its manpage are in /usr/share/cvs/contrib/rcs2log now.
++
++  Some contrib files (and their documentation) are no longer
++  shipped with the binary package (antique, insecure, useless).
++
++  -rHEAD in "cvs diff" now, consistently with all other cvs
++  subcommands, means "tip of the trunk (MAIN branch)"; to
++  access the tip of the another branch, use its name; as a
++  compatibility aid, -r.bhead (only in diff) points to the
++  tip of the sticky branch.
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sun, 04 Dec 2011 20:10:09 +0000
++
++cvs (2:1.12.13+real-5) unstable; urgency=low
++
++  This cvs package is a totally new packaging and has almost
++  nothing in common with what was in Debian before. The most
++  visible changes are outlined below:
++
++  pserver is no longer officially supported; the cvs package
++  does not install any service, inetd, or something similar.
++  If you want to set up a CVS server, use SSH, as shown in:
++  * http://www.stremler.net/Code/cvs_tricks/cvs-over-ssh.html
++  * http://www.stremler.net/Code/cvs_tricks/cvs-over-ssh-advanced.html
++  * http://www.stremler.net/Code/cvs_tricks/cvs-over-ssh-advanced2.html
++
++  Consequentially, PAM is also no longer supported, and this
++  package does not set up or manage any repositories; that's
++  the system administrator's job now.
++
++  For running "cvs admin" tasks the user must be a member of
++  the new "_cvsadmin" system group, or the repository be set
++  up (UserAdminOptions in CVSROOT/config) to allow everyone.
++
++  The date format for $Id$ and similar in checkouts has been
++  switched back from ISO 8601 to the standard RCS format, to
++  keep checksums over checkouts/exports consistent. This, as
++  well as the fact that only the :local: and :extssh: access
++  methods are officially supported, is not negotiable.
++
++  Please direct feature requests upstream, not to the BTS. I
++  do quite an amount of hacking CVS, but prefer to care only
++  about the packaging bits with "full power" in Debian.
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sat, 11 Jun 2011 05:01:49 +0000
+--- cvs-1.12.13+real.orig/debian/changelog
++++ cvs-1.12.13+real/debian/changelog
+@@ -0,0 +1,335 @@
++cvs (2:1.12.13+real-28) unstable; urgency=medium
++
++  [ Helmut Grohne ]
++  * Reduce Build-Depends: (Closes: #981313)
++    - Drop unused bsdmainutils and procps
++    - Reduce texlive-{fonts,latex}-recommended to texlive-base
++
++  [ Thorsten Glaser ]
++  * Bump Policy; keep dh5-style build system for now, though (the
++    “good reason” is that the freeze is near)
++  * Bump debhelper
++  * Use /usr/share/dpkg/buildtools.mk to determine ${CC}
++  * Modernise way of setting {C,CPP,LD}FLAGS
++  * Update maintainer scripts
++  * Fix hyphens in cvs-switchroot(1)
++  * Drop pre-wheezy code from maintainer scripts, package relationships
++  * Apply B-D reduction from Helmut Grohne
++  * Update lintian overrides; install (doc-base-referenced) intro.doc
++    to /usr/share/doc/cvs/ not /usr/share/cvs/contrib/ and as intro.txt
++  * Fix several warnings in the code spotted by newer GCC
++  * Reword texinfo documentation to plug overfull/underfull \hbox warnings
++  * Fix texinfo node links for commands (referenced in multiple places)
++  * Plug a memleak, a timing issue and a Y2038 issue on ILP32 and ensure time
++    can’t run backwards within a single invocation
++  * Fix bug in configure.in where old format string support wasn’t disabled
++  * Work around a bug in GCC’s warnings
++  * Retain support for old info format strings for now
++  * Note that running the sanity testsuite needs procps in a comment
++  * corresponding to MirBSD CVS 0AB9.1
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sun, 31 Jan 2021 18:17:11 +0100
++
++cvs (2:1.12.13+real-27) unstable; urgency=low
++
++  * Hardcode path to /bin/mktemp during configure to build reproducibly
++  * Policy 4.3.0.1 (verbosity changes; R³:no)
++  * Use new lintian source override location
++  * Update lintian overrides
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 05 Feb 2019 19:31:19 +0100
++
++cvs (2:1.12.13+real-26) unstable; urgency=low
++
++  * Policy 4.1.3 (no changes)
++  * Debhelper 11, prompted by lintian…
++  * Update VCS-* to new repository caused by Alioth deprecation
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Fri, 05 Jan 2018 20:06:42 +0100
++
++cvs (2:1.12.13+real-25) unstable; urgency=low
++
++  * Update from MirBSD (0AB8.4)
++    - support LOGM response
++  * Policy 4.1.1 (no changes)
++  * Use “?=” in debian/rules for dpkg-architecture fields (lintian)
++  * Update watch file
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sun, 19 Nov 2017 18:10:56 +0100
++
++cvs (2:1.12.13+real-24) unstable; urgency=high
++
++  * Update from MirBSD
++    - fix for CVE-2017-12836 (Closes: #871810)
++    - more robust $CVSROOT parsing
++  * Policy 4.0.1
++    - add nodoc build option
++      ‣ I’m unclear on how this mixes with build profiles and/or
++        Build-Depends exclusion; should I exclude ghostscript,
++        groff, texinfo, texlive-* with <!nodocs> now, or are
++        DEB_BUILD_OPTIONS=nodoc and the profile independent of
++        each other? Info and patches welcome.
++  * Drop explicit (thus redundant) autotools-dev B-D (lintian)
++  * Update lintian overrides
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sat, 12 Aug 2017 22:18:41 +0200
++
++cvs (2:1.12.13+real-23) unstable; urgency=low
++
++  * Improve documentation:
++    - on CVSREADONLYFS
++    - regarding the formerly world-writable files
++    - fix typos, thanks lintian
++  * Remove testsuite logfiles on clean properly
++  * With most environment variables, handle them being defined but
++    empty as undefined, not enabled (fixes the testsuite creating
++    spurious ~/.in and ~/.out files); exceptions:
++    - CVS_PASSWORD (just triggers an error, as previously)
++    - CVSREAD, CVSREADONLYFS (mere presence enables them)
++    Note this in the Debian NEWS file
++  * Fix some spelling in the/and comments
++  * Emit better errors when multiple LogHistory config options occur
++  * Fix some corner cases in the testsuite
++  * Repair the noredirect-writeproxy testsuite mode
++  * Apply the OpenBSD patch for flowcontrol with fast HDD and slow network
++  * Override a false positive lintian warning
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Fri, 28 Apr 2017 21:33:27 +0200
++
++cvs (2:1.12.13+real-22) unstable; urgency=low
++
++  * cvs init: Change default history logging configuration
++    to only log write operations by adding “LogHistory=TMAR”
++  * Testsuite: Alter to cope with this explicit option
++  * cvs init: Rely on CVSUMASK for history and val-tags files
++    in newly created repositories (Closes: #858769)
++  * Add a NEWS.Debian entry verbosely documenting this change
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 28 Mar 2017 20:01:39 +0200
++
++cvs (2:1.12.13+real-21) unstable; urgency=medium
++
++  [ Sylvain Beucler ]
++  * Add --allow-root-regexp option, for Savannah
++
++  [ Thorsten Glaser ]
++  * Always add --build=/--host= to avoid config.guess being too smart
++  * Fix testsuite for --allow-root-regexp in the “deny” case
++  * Some minor documentation fixes (wording and formatting)
++  * Remove unnecessary autopoint from Build-Depends; optimise them
++  * Harmonise PDF version 1.4 across all generated PDFs
++  * Generate all PDFs using the PA4 paper size (prints on Letter and A4)
++  * Disable parallel build because the testsuite is not safe
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Mon, 09 Jan 2017 23:19:38 +0000
++
++cvs (2:1.12.13+real-20) unstable; urgency=low
++
++  * Do not spew into syslog when 'cvs pserver' is called from a tty
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Wed, 09 Nov 2016 04:17:18 +0100
++
++cvs (2:1.12.13+real-19) unstable; urgency=low
++
++  * Update from MirBSD CVS:
++    - Fix some spelling mistakes
++    - Greatly improve the manpage introduction (even going so far
++      as to add a “how not to be totally lost in info” section)
++    - Improve documentation cross-references
++    - Apply TCP_NODELAY patch from CVS mailing list
++  * Switch (experimentally) to debhelper compat 10
++  * Enhances cvs2svn (>= 2.4.0-4~) as it’s added relevant patches
++  * Make cross-buildable (Closes: #842847)
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 08 Nov 2016 23:22:39 +0000
++
++cvs (2:1.12.13+real-18) unstable; urgency=low
++
++  [ esr ]
++  * Correct a bug in the manpage
++
++  [ Sergei Trofimovich ]
++  * Fix a memory leak
++
++  [ Thorsten Glaser ]
++  * Several sanity and getdate fixes
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sun, 23 Oct 2016 00:34:10 +0200
++
++cvs (2:1.12.13+real-17) unstable; urgency=medium
++
++  * Fix a use-after-free bug
++  * Correctly use autoconf to detect long double
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sat, 22 Oct 2016 05:42:39 +0200
++
++cvs (2:1.12.13+real-16) unstable; urgency=medium
++
++  * Take back the package (Closes: #764397)
++  * Fix typo in changelog entry for cvs (2:1.12.13+real-9) and others
++  * Bump Policy; no changes
++  * Update code with bugfixes from MirBSD 0AB7.2 (Closes: #839669)
++  * Actually use correct getdate implementation
++  * groff now needs an explicit ghostscript dependency for ps2pdf
++  * Remove stuff unnecessary with dh-autoreconf
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sat, 22 Oct 2016 02:58:34 +0200
++
++cvs (2:1.12.13+real-15) unstable; urgency=low
++
++  * QA upload.
++  * Orphan the package.
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 07 Oct 2014 17:58:58 +0000
++
++cvs (2:1.12.13+real-14) unstable; urgency=low
++
++  * debian/control: Move VCS-* fields to Alioth collab-maint git
++  * Remove now-useless RCS IDs
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 08 Jul 2014 16:10:54 +0200
++
++cvs (2:1.12.13+real-12) unstable; urgency=medium
++
++  * Add texlive-fonts-recommended B-D (thanks Norbert Preining)
++    to fix FTBFS in sid (thanks Daniel Schepler) (Closes: #739138)
++  * Policy 3.9.5 (no changes AFAICT)
++  * Check distfile with upstream signing key (thanks lintian)
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sun, 16 Feb 2014 14:07:36 +0000
++
++cvs (2:1.12.13+real-11) unstable; urgency=medium
++
++  * Add workaround for eglibc crypt(3) returning NULL
++  * If DEB_BUILD_OPTIONS contains “sanity” run testsuite after build
++  * Drop obsolete texi2html B-D (thanks lintian) that was unused anyway
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Thu, 18 Jul 2013 21:52:12 +0000
++
++cvs (2:1.12.13+real-10) unstable; urgency=low
++
++  [ Daniel Schepler ]
++  * Use dh-autoreconf to regenerate configure script and avoid unnecessary
++    compilation of mktime.c, which doesn't work on x32 as is.
++  * Add texlive-latex-recommended to fix just another FTBFS
++
++  [ Thorsten Glaser ]
++  * Do not compress *.pdf files (cf. #704093)
++  * Allow root to commit
++  * Policy 3.9.4
++  * Make cvs.texinfo compatible with newer makeinfo (Closes: #711298)
++  * Actually use a fixed mktime.m4 (Closes: #698908)
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Wed, 26 Jun 2013 19:40:39 +0000
++
++cvs (2:1.12.13+real-9) unstable; urgency=low
++
++  * Fix watch file: mangle Epoch away, too
++  * Remove old conffile /etc/pam.d/cvs (Closes: #669957)
++  * Policy 3.9.3 (no changes)
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sun, 22 Apr 2012 15:10:16 +0000
++
++cvs (2:1.12.13+real-8) unstable; urgency=high
++
++  * Brown paper bag change: sanity.sh (the testsuite) was corrupted
++    during checkout of the packaging VCS in the -7 (all PASS again)
++  * Bonus change: use hardening build flags; fix resulting warnings
++  * Urgency due to riding on the previous upload’s security fix
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 07 Feb 2012 20:39:42 +0000
++
++cvs (2:1.12.13+real-7) unstable; urgency=high
++
++  * Drop unsafe scripts from contrib, add NEWS entry for that
++    (Closes: #658947)
++  * debian/rules: cleanup (remove install/check, dh_installdirs;
++    switch to dh_prep if extant)
++  * Use -Wl,--as-needed for the link to appease dpkg-shlibdebs
++  * Update maintainer scripts from template jupp (better comments)
++  * Drop csh-using contrib script from package, with NEWS entry
++  * Demote rcs2log(1) to contrib, add NEWS entry
++  * Stop shipping a patch to rcs(1) with the binary package, ffs
++  * Don’t ship cvshelp.man either, it’s antiquated and not useful
++  * Fix meaning of -rHEAD for the diff subcommand (with NEWS entry)
++  * Make the testsuite again usable (full PASS)
++  * Apply suggested patch for CVE-2012-0804 from Petr Pisar
++  * Update lintian overrides
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Tue, 07 Feb 2012 18:01:44 +0000
++
++cvs (2:1.12.13+real-6) unstable; urgency=low
++
++  * d/watch: mangle the +real away until 1.12.14 is out,
++    as this is an artefact from the old (epoch 1) packaging
++  * Demote mksh to Suggests, recommended (hah!) by many
++    (Closes: #631110) (merges back
++    2:1.12.13+real-5debianderivatethatcannotbenamed1)
++  * Honour Policy §11.4; fix by YOSHINO Yoshihito (Closes: #631936)
++  * Use upstream-source-in-CVS packaging, clean up
++  * d/rules: Add build-{arch,indep} targets as aliases to build
++  * Bring d/copyright more in sync with this distfile’s reality
++  * d/control: Reword package description. (Closes: #631826)
++  * If sleeping at exit, sleep another 20 ms (2 HZ), to avoid
++    possible race conditions. (Should work around LP: #12230)
++  * Update in sync with MirPorts 1.12.13-12 = MirOS BSD 0AAF.1
++  * Stop installing cvsbug(8), use reportbug instead
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Thu, 28 Jul 2011 16:02:02 +0000
++
++cvs (2:1.12.13+real-5) unstable; urgency=low
++
++  * Drop PAM entirely, it was specific to Debian anyway
++  * Add cvs-switchroot, from src/scripts/mnt-cvsroot (Closes: #41685)
++  * Drop some old and irrelevant changelogs from the binary package
++  * Update from MirPorts 1.12.13-11 = MirOS BSD 0AAE.2
++  * Revert most of 65_login_cvspass_message and just be silent if the
++    pserver client password file doesn't exist and create it silently
++    if needed (Closes: #524146)
++  * Honour noexec flag in 'cvs -n init' (Closes: #151982)
++  * Sync modules option list with cederqvist (Closes: #226888)
++  * Apply patch for assert on negated version numbers on diff
++    (Closes: #297551)
++    From: Peter Moulder <Peter.Moulder@infotech.monash.edu.au>
++  * Change cvs add dir message (Closes: #294094)
++  * Accept port when using extssh connection method (Closes: #151882)
++  * Write a new command for direct ,v file download (Closes: #421119)
++  * Drop broken libbsd.fd.o headers and shut up gcc 4.6 warnings
++  * Fix piuparts breakage: ignore delgroup non-existence on purge
++  * Deliver a NEWS.Debian (Closes: #626106)
++  * d/README.source: Update, call to automake is now also needed
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sat, 11 Jun 2011 05:32:56 +0000
++
++cvs (2:1.12.13+real-4) unstable; urgency=low
++
++  * Renamed .orig.tar.gz due to archive pathname conflict
++  * d/README.source: Document patch location (VCS-CVS, VCS-Browser alike)
++  * New build from MirPorts 1.12.13-10 = MirOS BSD 0AAE.1
++    - Contains changes from cvs
++      (1:1.12.13-12debianderivatethatcannotbenamed1):
++      + Apply fix from Kees Cook to avoid %n in writable memory (LP: #296453)
++    - Other BTS relevant changes:
++      + Allow CVSROOT-less “version” (LP: #97683) and “cvs version”
++      + Update loginfo documentation, ‘%{t}’ is indeed gone (Closes: #329151)
++      + Lower syslog level from emergency (Closes: #563856)
++      + Fix awk substr start argument, thanks John Hughes (Closes: #518600)
++      + Rename nodes with colons in them (Closes: #113809)
++      + Fix typo (Closes: #464137)
++      + Document missing rcs2log(1) options (Closes: #306354) and fix dashes
++  * Upload new package to Debian unstable (Closes: #306432)
++    (Closes: #458864) (Closes: #464134) (Closes: #479752)
++    (Closes: #576035) (Closes: #614700) (Closes: #617578)
++    - Drop PAM (Closes: #340984) (Closes: #393436)
++    - No longer installs repositories (Closes: #168300)
++      (Closes: #408117) (Closes: #482301) (Closes: #499790)
++      (Closes: #511643) (Closes: #607297)
++    - Deprecate pserver (Closes: #343169) (Closes: #495938)
++    - Drop Origin and Bugs headers again (upload to Debian proper)
++      and old (pre-Debian upload) private repo changelog entries
++    - Thank you, Steve, for handing over package maintainership!
++  * Clarify package description (LP: #377411)
++  * Build with Kerberos V support (Closes: #60800) (LP: #157760)
++  * Recommends: openssh-client; Suggests: rcs
++
++ -- Thorsten Glaser <tg@mirbsd.de>  Sat, 07 May 2011 01:00:39 +0000
+--- cvs-1.12.13+real.orig/debian/control
++++ cvs-1.12.13+real/debian/control
+@@ -0,0 +1,40 @@
++Source: cvs
++Section: vcs
++Priority: optional
++Maintainer: Thorsten Glaser <tg@mirbsd.de>
++Homepage: http://www.nongnu.org/cvs/
++Build-Depends: debhelper-compat (= 13),
++  ghostscript, groff, libbsd-dev, libkrb5-dev | heimdal-dev,
++# # optional, for running the sanity suite
++# procps,
++  texinfo, texlive-base, zlib1g-dev
++Standards-Version: 4.5.1
++Rules-Requires-Root: no
++VCS-git: https://evolvis.org/anonscm/git/alioth/cvs.git -b master
++VCS-Browser: https://evolvis.org/plugins/scmgit/cgi-bin/gitweb.cgi?p=alioth/cvs.git;a=shortlog;h=refs/heads/master
++
++Package: cvs
++Architecture: any
++Multi-Arch: foreign
++Depends: ${misc:Depends}, ${shlibs:Depends}, adduser
++Recommends: openssh-client
++Suggests: mksh, rcs
++Enhances: rcs, cvs2svn (>= 2.4.0-4~)
++Description: Concurrent Versions System
++ CVS is a version control system, which allows you to keep access
++ to old versions  of files (usually source code), keep a log of
++ who, when, and why changes occurred, etc., like RCS or SCCS.
++ It handles multiple developers, multiple directories, triggers to
++ enable/log/control various operations, and can work over a wide
++ area network. The texinfo manual provides further information on
++ more tasks that it can perform.
++ .
++ There are some tasks that are not covered by CVS. They can be done in
++ conjunction with CVS but will tend to require some script-writing and
++ software other than CVS. These tasks are bug-tracking, build management
++ (that is, make and make-like tools), and automated testing. However,
++ CVS makes these tasks easier.
++ .
++ This package contains a CVS binary which can act as both client and
++ server, although there is no CVS dæmon; to access remote repositories,
++ please use :extssh: not :pserver: any more.
+--- cvs-1.12.13+real.orig/debian/copyright
++++ cvs-1.12.13+real/debian/copyright
+@@ -0,0 +1,117 @@
++This package was debianised by Thorsten Glaser <tg@mirbsd.de> on
++Wed Sep 15 21:52:29 UTC 2010.
++
++It was downloaded from:
++http://ftp.gnu.org/non-gnu/cvs/source/feature/1.12.13/cvs-1.12.13.tar.gz
++
++
++GNU CVS itself is Copyright © 1986-2005
++	The Free Software Foundation, Inc.
++with portions contributed by others.
++
++It is licenced under the GNU General Public License, version 2 or later,
++with a good part available under either GPLv1 or LGPLv2.x. On Debian sy‐
++stems the licence can be found at: /usr/share/common-licenses/GPL-2
++
++Parts of the code are covered by the following GPL-compatible copyright:
++
++ * Copyright (c) 1993 Bob Withers
++ * All Rights Reserved
++ *
++ * Permission to use, copy, modify, and distribute this software and
++ * its documentation for any purpose and without fee is hereby granted
++ * provided that the above copyright notice appears in all copies and
++ * that both the copyright notice and this permission notice appear in
++ * supporting documentation.
++
++One header file, which almost certainly does not fall under copyright
++law, is covered by the four-clause UCB licence, however in 1999 the
++advertising clause was rescinded, so it’s GPL compatible now:
++
++ * Copyright (c) 1989 The Regents of the University of California.
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ *    notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ *    notice, this list of conditions and the following disclaimer in the
++ *    documentation and/or other materials provided with the distribution.
++ * 3. All advertising materials mentioning features or use of this software
++ *    must display the following acknowledgement:
++ *	This product includes software developed by the University of
++ *	California, Berkeley and its contributors.
++ * 4. Neither the name of the University nor the names of its contributors
++ *    may be used to endorse or promote products derived from this software
++ *    without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
++ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
++ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
++ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
++ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
++ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
++ * SUCH DAMAGE.
++
++Parts and the packaging are covered by the following GPL-compatible licence:
++
++# Copyright © 2005, 2008, 2011, 2017, 2021
++#	mirabilos <m@mirbsd.org>
++#
++# Provided that these terms and disclaimer and all copyright notices
++# are retained or reproduced in an accompanying document, permission
++# is granted to deal in this work without restriction, including un‐
++# limited rights to use, publicly perform, distribute, sell, modify,
++# merge, give away, or sublicence.
++#
++# This work is provided “AS IS” and WITHOUT WARRANTY of any kind, to
++# the utmost extent permitted by applicable law, neither express nor
++# implied; without malicious intent or gross negligence. In no event
++# may a licensor, author or contributor be held liable for indirect,
++# direct, other damage, loss, or other issues arising in any way out
++# of dealing in the work, even if advised of the possibility of such
++# damage or existence of a defect, except proven that it results out
++# of said person’s immediate fault when using the work as intended.
++
++CVS also includes a convenience copy of zlib which is not used;
++it’s covered by these (GPL-compatible) terms:
++
++  Copyright (C) 1995-2005 Jean-loup Gailly and Mark Adler
++
++  This software is provided 'as-is', without any express or implied
++  warranty.  In no event will the authors be held liable for any damages
++  arising from the use of this software.
++
++  Permission is granted to anyone to use this software for any purpose,
++  including commercial applications, and to alter it and redistribute it
++  freely, subject to the following restrictions:
++
++  1. The origin of this software must not be misrepresented; you must not
++     claim that you wrote the original software. If you use this software
++     in a product, an acknowledgment in the product documentation would be
++     appreciated but is not required.
++  2. Altered source versions must be plainly marked as such, and must not be
++     misrepresented as being the original software.
++  3. This notice may not be removed or altered from any source distribution.
++
++zlib, again, contains contributed material under terms as those:
++
++ * Copyright (c) 1997
++ * Christian Michelsen Research AS
++ * Advanced Computing
++ * Fantoftvegen 38, 5036 BERGEN, Norway
++ * http://www.cmr.no
++ *
++ * Permission to use, copy, modify, distribute and sell this software
++ * and its documentation for any purpose is hereby granted without fee,
++ * provided that the above copyright notice appear in all copies and
++ * that both that copyright notice and this permission notice appear
++ * in supporting documentation.  Christian Michelsen Research AS makes no
++ * representations about the suitability of this software for any
++ * purpose.  It is provided "as is" without express or implied warranty.
+--- cvs-1.12.13+real.orig/debian/cvs-switchroot
++++ cvs-1.12.13+real/debian/cvs-switchroot
+@@ -0,0 +1,99 @@
++#!/bin/mksh
++# $MirOS: src/scripts/mnt-cvsroot,v 1.19 2016/10/21 21:09:59 tg Exp $
++#-
++# Copyright © 2005, 2008, 2011
++#	mirabilos <m@mirbsd.org>
++#
++# Provided that these terms and disclaimer and all copyright notices
++# are retained or reproduced in an accompanying document, permission
++# is granted to deal in this work without restriction, including un‐
++# limited rights to use, publicly perform, distribute, sell, modify,
++# merge, give away, or sublicence.
++#
++# This work is provided “AS IS” and WITHOUT WARRANTY of any kind, to
++# the utmost extent permitted by applicable law, neither express nor
++# implied; without malicious intent or gross negligence. In no event
++# may a licensor, author or contributor be held liable for indirect,
++# direct, other damage, loss, or other issues arising in any way out
++# of dealing in the work, even if advised of the possibility of such
++# damage or existence of a defect, except proven that it results out
++# of said person’s immediate fault when using the work as intended.
++#-
++# Change CVSROOT of a checked out tree (and save space with it)
++# With option -T: change Tag instead of Root
++
++me=${0##*/}
++function die {
++	print -ru2 -- "$me: $*"
++	exit 1
++}
++
++if [[ $1 = -T ]]; then
++	tagmode=-T
++	fn=Tag
++	shift
++else
++	tagmode=
++	fn=Root
++fi
++newroot=$1
++useroot=0
++if [[ $newroot = - ]]; then
++	shift
++	newroot=$(realpath "$1")
++	[[ -d $newroot ]] && if [[ -d $newroot/CVS ]]; then
++		newroot=$newroot/CVS/$fn
++	else
++		newroot=$newroot/$fn
++	fi
++	useroot=1
++fi
++if [[ -z $newroot || $newroot = -? ]]; then
++	print -u2 "Syntax: $me newroot [dir [...]]"
++	print -u2 "\t$me - .../CVS/Root [dir [...]]"
++	print -u2 "\t$me -T - .../CVS/Tag [dir [...]]"
++	exit 1
++fi
++shift
++
++[[ -n $1 ]] || set -- .
++
++# realpath(2)ise arguments
++set -A arg
++i=0
++for name in "$@"; do
++	arg[i++]=$(realpath "$name")
++done
++
++T="$(mktemp ${arg[0]}/$me.XXXXXXXXXX)" || die fatal: cannot mktemp
++
++if (( useroot )); then
++	rm -f "$T"
++	ln "$newroot" "$T" || cp "$newroot" "$T" || \
++	    die "fatal: cannot copy '$newroot' to temporary '$T'"
++fi
++
++trap 'rm -f "$T"; exit 0' 0
++trap 'rm -f "$T"; trap - EXIT; exit 1' 1 2 3 5 13 15
++
++if (( !useroot )); then
++	chmod 664 "$T"
++	print -r -- "$newroot" >"$T"
++fi
++
++let rv=0
++find "${arg[@]}" -path \*/CVS/$fn -print0 |&
++while IFS= read -d '' -pr name; do
++	rm "$name" || die "error: cannot rm <$name>"
++	ln -f "$T" "$name" || if ! U="$(mktemp ${arg[0]}/$me.XXXXXXXXXX)"; then
++		cp "$T" "$name"
++	elif cat "$T" >"$U" && ln -f "$U" "$name"; then
++		rm -f "$T"
++		T="$U"
++	else
++		rm -f "$U"
++		cp "$T" "$name"
++	fi
++done
++
++exit 0
+--- cvs-1.12.13+real.orig/debian/cvs-switchroot.1
++++ cvs-1.12.13+real/debian/cvs-switchroot.1
+@@ -0,0 +1,76 @@
++.Dd June 10, 2011
++.Dt CVS\-SWITCHROOT 1
++.Os
++.Sh NAME
++.Nm cvs\-switchroot
++.Nd change repository or tag in a cvs working copy
++.Sh SYNOPSIS
++.Nm
++.Op Fl T
++.Ar newroot
++.Op Ar
++.Pp
++.Nm
++.Op Fl T
++\-\&
++.Ar srcpath
++.Op Ar
++.Sh DESCRIPTION
++The
++.Nm
++utility manipulates a CVS working copy directly,
++modifying the information stored in the administrative
++subdirectory and saving space by hardlinking if possible.
++.Pp
++If the
++.Fl T
++option is given, the sticky tag is operated on,
++otherwise, the repository path
++.Pq Ev CVSROOT .
++.Pp
++The information (Tag or Root) is set to the same as in
++.Ar srcpath
++if the first non-option argument
++.Ar newroot
++is a sole dash
++.Pq Sq \-\& ,
++the literal value
++.Ar newroot
++otherwise.
++.Sh EXAMPLES
++Change all
++.Pa Root
++information in the current sandbox to
++.Pa /cvs :
++.Bd -literal -offset ident
++$ cvs\-switchroot /cvs .
++.Ed
++.Pp
++Set all roots in the current working directory and all
++its subdirectories to the
++.Pa Root
++of the parent directory:
++.Bd -literal -offset ident
++$ cvs\-switchroot \- .. .
++.Ed
++.Pp
++Hardlink the
++.Pa Tag
++information in the current working directory, for example
++.Pa /usr/src ,
++and
++.Pa /usr/ports
++with each other:
++.Bd -literal -offset ident
++$ cvs\-switchroot \-T \- . . /usr/ports
++.Ed
++.Sh SEE ALSO
++.Xr cvs 1
++.Sh HISTORY
++.Nm
++has existed in the MirBSD source tree since 2005.
++It was added to Debian's cvs package in 2011.
++.Sh CAVEATS
++.Nm
++depends on
++.Nm mksh .
+--- cvs-1.12.13+real.orig/debian/doc-base
++++ cvs-1.12.13+real/debian/doc-base
+@@ -0,0 +1,21 @@
++Document: cvs-doc
++Title: Cederqvist - The CVS manual
++Author: FSF, Derek R. Price, Ximbiot, Signum Support AB, and others
++Abstract: This manual describes how to use and administer CVS.
++ It is both a manual and a tutorial, as well as a reference guide,
++ also known as The Cederqvist, and *the* book to read before using CVS.
++Section: Programming
++
++Format: HTML
++Index: /usr/share/doc/cvs/cvs.html
++Files: /usr/share/doc/cvs/cvs.html*
++
++Format: Text
++Files: /usr/share/doc/cvs/cvs.txt*
++
++Format: PDF
++Files: /usr/share/doc/cvs/cvs.pdf*
++
++Format: Info
++Index: /usr/share/info/cvs.info.gz
++Files: /usr/share/info/cvs.info*
+--- cvs-1.12.13+real.orig/debian/doc-base.client
++++ cvs-1.12.13+real/debian/doc-base.client
+@@ -0,0 +1,18 @@
++Document: cvs-doc-client
++Title: CVS client/server protocol description
++Abstract: This document describes the client/server protocol used by CVS.
++Section: Programming
++
++Format: HTML
++Index: /usr/share/doc/cvs/cvsclient.html
++Files: /usr/share/doc/cvs/cvsclient.html*
++
++Format: Text
++Files: /usr/share/doc/cvs/cvsclient.txt*
++
++Format: PDF
++Files: /usr/share/doc/cvs/cvsclient.pdf*
++
++Format: Info
++Index: /usr/share/info/cvsclient.info.gz
++Files: /usr/share/info/cvsclient.info*
+--- cvs-1.12.13+real.orig/debian/doc-base.faq
++++ cvs-1.12.13+real/debian/doc-base.faq
+@@ -0,0 +1,10 @@
++Document: cvs-doc-faq
++Title: CVS - Frequently Asked Questions
++Author: David Grubbs, Dr. Pascal Molli, and others
++Abstract: Packaged FAQ-O-MATIC dump containing a number of answers
++ to frequently asked questions about CVS. The document may be out of
++ date; http://ximbiot.com/cvs/wiki/CVS%20FAQ contains an updated version.
++Section: Programming
++
++Format: Text
++Files: /usr/share/doc/cvs/FAQ*
+--- cvs-1.12.13+real.orig/debian/doc-base.intro
++++ cvs-1.12.13+real/debian/doc-base.intro
+@@ -0,0 +1,7 @@
++Document: cvs-doc-intro
++Title: Introduction to using CVS
++Author: Steven Pemberton <Steven.Pemberton@cwi.nl>
++Section: Programming
++
++Format: Text
++Files: /usr/share/doc/cvs/intro.txt*
+--- cvs-1.12.13+real.orig/debian/doc-base.paper
++++ cvs-1.12.13+real/debian/doc-base.paper
+@@ -0,0 +1,14 @@
++Document: cvs-doc-paper
++Title: CVS II: Parallelizing Software Development
++Author: Brian Berliner <berliner@prisma.com>
++Abstract: This paper is the cvs USENIX article, Winter 1990.
++ The program described in this paper fills a need in the UNIX community
++ for a freely available tool to manage software revision and release
++ control in a multi-developer, multi-directory, multi-group environment.
++ This tool also addresses the increasing need for tracking third-party
++ vendor source distributions while trying to maintain local modifications
++ to earlier releases.
++Section: Programming
++
++Format: PDF
++Files: /usr/share/doc/cvs/cvs-paper.pdf*
+--- cvs-1.12.13+real.orig/debian/doc-base.rcsfiles
++++ cvs-1.12.13+real/debian/doc-base.rcsfiles
+@@ -0,0 +1,11 @@
++Document: cvs-doc-rcsfiles
++Title: RCS file format description
++Author: Jim Kingdon
++Abstract: This file attempts to document the RCS file format (which is
++ implemented by a great many tools, both free and non-free, both by
++ calling GNU RCS and by reimplementing access to RCS files) in some
++ standard separate from any one tool.
++Section: Programming
++
++Format: Text
++Files: /usr/share/doc/cvs/RCSFILES*
+--- cvs-1.12.13+real.orig/debian/docs
++++ cvs-1.12.13+real/debian/docs
+@@ -0,0 +1,20 @@
++AUTHORS
++BUGS
++DEVEL-CVS
++FAQ
++HACKING
++MINOR-BUGS
++NEWS
++PROJECTS
++README
++TODO
++debian/builddir/doc/*.html
++debian/builddir/doc/*.txt
++debian/builddir/doc/cvs.pdf
++debian/builddir/doc/cvsclient.pdf
++debian/stagedir/clogs/ChangeLog.*
++doc/HACKING.DOCS
++doc/RCSFILES
++doc/cvs-paper.ms
++doc/cvs-paper.pdf
++doc/writeproxy.rtf
+--- cvs-1.12.13+real.orig/debian/info
++++ cvs-1.12.13+real/debian/info
+@@ -0,0 +1 @@
++debian/stagedir/usr/share/info/*.info
+--- cvs-1.12.13+real.orig/debian/install
++++ cvs-1.12.13+real/debian/install
+@@ -0,0 +1,11 @@
++#contrib/cvs_acls.html usr/share/cvs/contrib/
++contrib/descend.man usr/share/cvs/contrib/
++contrib/descend.sh usr/share/cvs/contrib/
++contrib/rcs2log.1 usr/share/cvs/contrib/
++contrib/rcs2sccs.sh usr/share/cvs/contrib/
++contrib/sandbox_status.man usr/share/cvs/contrib/
++debian/cvs-switchroot usr/bin/
++debian/lintian/cvs usr/share/lintian/overrides/
++debian/stagedir/usr/bin/cvs usr/bin/
++#debian/stagedir/usr/bin/cvsbug usr/bin/
++debian/stagedir/usr/share/cvs/contrib/* usr/share/cvs/contrib/
+--- cvs-1.12.13+real.orig/debian/lintian/cvs
++++ cvs-1.12.13+real/debian/lintian/cvs
+@@ -0,0 +1,2 @@
++# not really documentation, more a directory listing / description
++cvs: package-contains-documentation-outside-usr-share-doc usr/share/cvs/contrib/README
+--- cvs-1.12.13+real.orig/debian/manpages
++++ cvs-1.12.13+real/debian/manpages
+@@ -0,0 +1,4 @@
++debian/cvs-switchroot.1
++debian/stagedir/usr/share/man/man1/cvs.1
++debian/stagedir/usr/share/man/man5/cvs.5
++#debian/stagedir/usr/share/man/man8/cvsbug.8
+--- cvs-1.12.13+real.orig/debian/postinst
++++ cvs-1.12.13+real/debian/postinst
+@@ -0,0 +1,50 @@
++#!/bin/sh
++
++set -e
++
++# This maintainer script can be called the following ways:
++#
++# * new-postinst "configure" [$most_recently_configured_version]
++# The package is unpacked; all dependencies are unpacked and, when there
++# are no circular dependencies, configured.
++#
++# * old-postinst "abort-upgrade" $new_version
++# * old-postinst "abort-remove"
++# * conflictors-postinst "abort-remove" "in-favour" $new_package
++#	$new_version
++# * deconfigureds-postinst "abort-deconfigure" "in-favour"
++#	$failed_install_package $fip_version		# new-package
++#	["removing" $conflicting_package $cp_version]	# old-package
++# The package is unpacked; all dependencies are at least Half-Installed,
++# previously been configured, and not removed. In some error situations,
++# dependencies may not be even fully unpacked.
++#
++# * postinst "triggered" "${triggers[*]}"
++# For trigger-only calls, i.e. if "configure" is not called.
++#
++# * new-postinst "reconfigure" [$most_recently_configured_version](?)
++# Treat this as just like "configure" for a future extension by debconf.
++
++case $1 in
++(configure|reconfigure)
++	addgroup --force-badname --system _cvsadmin
++	;;
++
++(abort-upgrade|abort-remove|abort-deconfigure)
++	;;
++
++(triggered)
++	;;
++
++(*)
++	echo >&2 "E: postinst called with unknown subcommand '$1'"
++	exit 1
++	;;
++esac
++
++# dh_installdeb will replace this with shell code automatically
++# generated by other debhelper scripts.
++
++#DEBHELPER#
++
++exit 0
+--- cvs-1.12.13+real.orig/debian/postrm
++++ cvs-1.12.13+real/debian/postrm
+@@ -0,0 +1,50 @@
++#!/bin/sh
++
++set -e
++
++# This maintainer script can be called the following ways:
++#
++# * postrm "remove"
++# * postrm "purge"
++# * old-postrm "upgrade" $new_version
++# * disappearers-postrm "disappear" $overwriter_pkg $overwriter_version
++# The package's files have been removed or replaced; only Essential pak-
++# kages may be available; skip gracefully actions requiring Depends.
++#
++# * new-postrm "failed-upgrade" $old_version
++# * new-postrm "failed-upgrade" $old_version $new_version # 1.18.5, stretch
++# Called when 'old-postrm "upgrade"' fails; the new package is unpacked,
++# Essential packages and Pre-Depends are available; the latter have been
++# configured and never removed but may be Unpacked or Half-Configured.
++#
++# * new-postrm "abort-install" [$old_version]
++# * new-postrm "abort-install" [$old_version $new_version] # 1.18.5, stretch
++# * new-postrm "abort-upgrade" $old_version
++# * new-postrm "abort-upgrade" $old_version $new_version # 1.18.5, stretch
++# Called when preinst fails; package is not unpacked. Essential packages
++# and (unpacked or Half-Configured) Pre-Depends are available.
++
++case $1 in
++(remove)
++	;;
++
++(purge)
++	test -x /usr/sbin/update-inetd && update-inetd --remove "^cvspserver"
++	(delgroup --system --only-if-empty _cvsadmin || :)
++	;;
++
++(upgrade|disappear|failed-upgrade|abort-install|abort-upgrade)
++	;;
++
++(*)
++	echo >&2 "E: postrm called with unknown subcommand '$1'"
++	exit 1
++	;;
++esac
++
++# dh_installdeb will replace this with shell code automatically
++# generated by other debhelper scripts.
++
++#DEBHELPER#
++
++exit 0
+--- cvs-1.12.13+real.orig/debian/rules
++++ cvs-1.12.13+real/debian/rules
+@@ -0,0 +1,185 @@
++#!/usr/bin/make -f
++
++ifeq (,$(filter terse,${DEB_BUILD_OPTIONS}))
++export DH_VERBOSE=1
++export V=1
++export VERBOSE=1
++endif
++
++LC_ALL:=C
++export LC_ALL
++
++shellescape='$(subst ','\'',$(1))'
++shellexport=$(1)=$(call shellescape,${$(1)})
++
++DEB_BUILD_ARCH?=$(shell dpkg-architecture -qDEB_BUILD_ARCH)
++DEB_HOST_ARCH?=$(shell dpkg-architecture -qDEB_HOST_ARCH)
++DEB_BUILD_GNU_TYPE?=$(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE)
++DEB_HOST_GNU_TYPE?=$(shell dpkg-architecture -qDEB_HOST_GNU_TYPE)
++
++OUR_CPPFLAGS:=
++OUR_CFLAGS:=	-Wall -Wformat
++OUR_LDFLAGS:=
++
++OUR_CPPFLAGS+=	-D_GNU_SOURCE
++OUR_CPPFLAGS+=	-DUSE_LIBBSD
++OUR_CFLAGS+=	-fno-strict-aliasing
++# addresses part of #698908
++OUR_CFLAGS+=	-fwrapv
++# for now. uses are mostly checked.
++OUR_CFLAGS+=	-Wno-unused-result
++
++dpkgbuildflagsmkescape=$(subst \,\\\,$(1))
++export DEB_BUILD_MAINT_OPTIONS:=hardening=+all
++export DEB_CPPFLAGS_MAINT_APPEND:=$(call dpkgbuildflagsmkescape,${OUR_CPPFLAGS})
++export DEB_CFLAGS_MAINT_APPEND:=$(call dpkgbuildflagsmkescape,${OUR_CFLAGS})
++export DEB_CXXFLAGS_MAINT_APPEND:=$(call dpkgbuildflagsmkescape,${OUR_CXXFLAGS})
++export DEB_LDFLAGS_MAINT_APPEND:=$(call dpkgbuildflagsmkescape,${OUR_LDFLAGS})
++include /usr/share/dpkg/buildflags.mk
++include /usr/share/dpkg/buildtools.mk
++
++LIBS+=			-lbsd
++
++CONFIGURE_ENV:=		$(foreach i,CC CPPFLAGS CFLAGS LDFLAGS LIBS,$(call shellexport,$i))
++CONFIGURE_ENV+=		CSH=/bin/csh
++CONFIGURE_ENV+=		ac_cv_path_MKTEMP=/bin/mktemp
++
++CONFIGURE_ARGS:=	--build=${DEB_BUILD_GNU_TYPE} \
++			--host=${DEB_HOST_GNU_TYPE} \
++			--prefix=/usr \
++			--infodir=/usr/share/info \
++			--mandir=/usr/share/man \
++			--sysconfdir=/etc \
++			--disable-dependency-tracking \
++			--disable-maintainer-mode \
++			--disable-pam \
++			--disable-nls \
++			--enable-client \
++			--enable-password-authenticated-client \
++			--enable-server \
++			--enable-proxy \
++			--enable-case-sensitivity \
++			--enable-encryption \
++			--disable-lock-compatibility \
++			--enable-rootcommit \
++			--enable-config-override=no \
++			--without-krb4 \
++			--with-gssapi \
++			--with-external-zlib \
++			--with-rsh=ssh \
++			--with-editor=/usr/bin/editor \
++			--with-tmpdir=/var/tmp \
++			--with-umask=002 \
++			--with-cvs-admin-group=_cvsadmin
++
++MAKE_ARGS:=		MAKEINFO=makeinfo
++MAKE_ARGS+=		MAKEINFOFLAGS=--no-split
++# ‘u’ is default in Debian and gives warnings (upstream has ‘cru’)
++MAKE_ARGS+=		ARFLAGS=rc
++
++CLEANFILES:=		autom4te.cache build-aux/config.guess \
++			build-aux/config.sub cvs.spec debian/.*_stamp \
++			debian/CVSTEMP debian/builddir debian/stagedir \
++			doc/cvs-paper.pdf doc/cvs.1 doc/cvs.info* \
++			doc/cvs.pdf doc/cvsclient.info* doc/cvsclient.pdf \
++			doc/getdate-cvs.texi emx/Makefile os2/Makefile \
++			vms/config.h windows-NT/config.h
++
++debian/.configure_stamp:
++	dh_testdir
++	-rm -rf ${CLEANFILES}
++	cp /usr/share/misc/config.guess /usr/share/misc/config.sub build-aux/
++	dh_autoreconf
++	mkdir debian/builddir debian/stagedir
++	cd debian/builddir && \
++	    env ${CONFIGURE_ENV} sh ../../configure ${CONFIGURE_ARGS}
++	# generate PDF 1.4 by default
++	ln -s ../../../build-aux/texinfo.tex debian/builddir/doc/texinfo-r.tex
++	printf '%s\n' \
++	    '\pdfminorversion4\relax\pdfobjcompresslevel0\relax%' \
++	    '\input texinfo-r.tex' \
++	    >debian/builddir/doc/texinfo.tex
++	@:>$@
++
++build-indep:
++build build-arch: debian/.build_stamp
++
++debian/.build_stamp: debian/.configure_stamp
++	dh_testdir
++	cd debian/builddir && ${MAKE} ${MAKE_ARGS}
++ifeq (,$(filter nodoc,$(DEB_BUILD_OPTIONS)))
++	cd debian/builddir && ${MAKE} -C doc ${MAKE_ARGS} doc html info pdf txt
++endif
++ifneq (,$(filter sanity,$(DEB_BUILD_OPTIONS)))
++	# run the testsuite after build (DEB_BUILD_OPTIONS=sanity)
++	# Depends on procps and, if running locally (not in a buildd chroot),
++	# ssh + rsync (logging in to localhost), for testing remote/proxy op.
++	# warning: this takes a *lot* of time!
++	# idea: run this under Valgrind to take even more time ;)
++	cd debian/builddir && ${MAKE} ${MAKE_ARGS} check
++endif
++	@:>$@
++
++clean:
++	dh_testdir
++	dh_autoreconf_clean
++	-rm -rf ${CLEANFILES}
++	dh_clean
++
++binary-indep:
++
++binary-arch: debian/.build_stamp
++	dh_testdir
++	dh_testroot
++	if test -x "$$(which dh_prep)"; then dh_prep; else dh_clean -k; fi
++	-rm -rf debian/stagedir
++	mkdir -p debian/stagedir/clogs
++	cd debian/builddir && \
++	    ${MAKE} ${MAKE_ARGS} DESTDIR=${CURDIR}/debian/stagedir install
++	cat ChangeLog ChangeLog.zoo >debian/stagedir/clogs/ChangeLog
++	cat doc/ChangeLog doc/ChangeLog.fsf >debian/stagedir/clogs/ChangeLog.doc
++	#cat lib/ChangeLog lib/ChangeLog.fsf >debian/stagedir/clogs/ChangeLog.lib
++	#cat src/ChangeLog src/ChangeLog-97 src/ChangeLog-96 src/ChangeLog-9395 \
++	#    src/ChangeLog-9194 >debian/stagedir/clogs/ChangeLog.src
++	cp src/ChangeLog debian/stagedir/clogs/ChangeLog.src
++	cp contrib/ChangeLog debian/stagedir/clogs/ChangeLog.contrib
++	cp diff/ChangeLog debian/stagedir/clogs/ChangeLog.diff
++	#cp m4/ChangeLog debian/stagedir/clogs/ChangeLog.m4
++	#cp man/ChangeLog debian/stagedir/clogs/ChangeLog.man
++	#cp tools/ChangeLog debian/stagedir/clogs/ChangeLog.tools
++	# fat and nonsensical to ship this
++	rm -f debian/stagedir/usr/share/cvs/contrib/rcs-5.7-commitid.patch
++	# uses csh
++	rm -f debian/stagedir/usr/share/cvs/contrib/sccs2rcs
++	# unsafe
++	rm -f debian/stagedir/usr/share/cvs/contrib/commit_prep
++	rm -f debian/stagedir/usr/share/cvs/contrib/cvs_acls
++	rm -f debian/stagedir/usr/share/cvs/contrib/log
++	rm -f debian/stagedir/usr/share/cvs/contrib/log_accum
++	rm -f debian/stagedir/usr/share/cvs/contrib/mfpipe
++	rm -f debian/stagedir/usr/share/cvs/contrib/rcslock
++	# we ship cvs-switchroot(1) instead
++	rm -f debian/stagedir/usr/share/cvs/contrib/newcvsroot
++	dh_installchangelogs debian/stagedir/clogs/ChangeLog
++ifneq (,$(filter nodoc,$(DEB_BUILD_OPTIONS)))
++	# this will cause lintian warnings as it installs the doc-base files
++endif
++	dh_installdocs
++	dh_install
++	mv debian/cvs/usr/share/cvs/contrib/intro.doc \
++	    debian/cvs/usr/share/doc/cvs/intro.txt
++	dh_installinfo
++	dh_installman
++	dh_link
++	dh_strip
++	dh_compress -X.pdf
++	cd debian/cvs/usr/share/cvs/contrib && chmod +x descend.sh rcs2sccs.sh
++	dh_fixperms
++	dh_installdeb
++	dh_shlibdeps
++	dh_gencontrol
++	dh_md5sums
++	dh_builddeb -- -Zgzip -z9
++
++binary: binary-indep binary-arch
++.PHONY: binary binary-arch binary-indep build build-arch build-indep clean
+--- cvs-1.12.13+real.orig/debian/source/format
++++ cvs-1.12.13+real/debian/source/format
+@@ -0,0 +1 @@
++1.0
+--- cvs-1.12.13+real.orig/debian/source/lintian-overrides
++++ cvs-1.12.13+real/debian/source/lintian-overrides
+@@ -0,0 +1,35 @@
++# reused downstream with request to keep compressing with gzip
++cvs source: custom-compression-in-debian-rules
++
++# (well at least for now)
++# not my fault
++cvs source: deprecated-configure-filename
++
++# too near the freeze to change it now
++cvs source: no-dh-sequencer
++
++# desired method of keeping changes is as VCS working tree
++cvs source: older-source-format 1.0
++cvs source: direct-changes-in-diff-but-no-patch-system *
++
++# wtf lintian‽
++cvs source: cute-field
++
++# not part of the binary package, and not legally a problem
++cvs source: license-problem-gfdl-non-official-text doc/getdate-cvs.texi *
++
++# this originates here, but I may just include it in a release later
++cvs source: maintainer-manual-page debian/cvs-switchroot.1
++
++# no, thanks
++cvs source: no-dep5-copyright
++
++# not our examples
++cvs source: package-does-not-install-examples zlib/examples/
++
++# this is… complicated; this package’s upstream is MirBSD,
++# not Savannah (nonGNU), which is the de-facto upstream of
++# (the 1.12.x series) GNU CVS as it is the only place with
++# activity for ages but the Savannah people didn’t manage,
++# yet, to officially transfer this, so let’s not, for now…
++cvs source: upstream-metadata-file-is-missing
+--- cvs-1.12.13+real.orig/debian/upstream/signing-key.asc
++++ cvs-1.12.13+real/debian/upstream/signing-key.asc
+@@ -0,0 +1,25 @@
++-----BEGIN PGP PUBLIC KEY BLOCK-----
++Version: GnuPG v1
++
++mQGiBD4u3XQRBACN7F6Ducb4gaJw7LJPCaNbk4+eW/EWjiC+aoJhnNocWGfeKM2d
++NYRDPuyW6IqAmMPGBq0HAdSmi64BQg5mC8Q7NGujfzVDefACELuwQRUxFadbcAXn
++1eGUHGsst93FFwlhY+SH3Yuo1plvNBnlMhDt9ylT3/s38zKG874+A44L4wCg/7fh
++u0zqxFA0w22lXobhkKO4upED/0zA5BJ+d8brNLe6RpIQXTUzPxZ+UoU5RG9wlzv/
++zabSS6eAPpmeoIPeKdSwRO/G0/f3Qn/vxDKVTqRzNKpusKJz8TS+gDBZSFjQ1L3U
++TL6qh5kdnTy/yETg8wiUMXVaTqWtXP2eFEoHoto6dVP46BuULqQK980EmR6jg/ul
++EGC/BACD5iO81tygsm6OBEu59hJ+GykU60+9Mzz1/qPYdejJmJkmdoJZWplJULGD
++270nQlDarPJzMCpyrUzAZYdnmO6dwic/4hIxJENQ3GBrhbdr6YuuNgTxIXJJxTH7
++qTJqRrHLw9Cvk1oPFYlzE2vQuDNlrqxXg/V06l4/ZJfotj3mI7RNRGVyZWsgUi4g
++UHJpY2UgKEdldCBDVlMgU3VwcG9ydCBhdCA8aHR0cDovL3hpbWJpb3QuY29tPiEp
++IDxkZXJla0B4aW1iaW90LmNvbT6IYQQTEQIAGQUCPi7ddAQLBwMCAxUCAwMWAgEC
++HgECF4AAEgkQLD1OTBfyMaQHZUdQRwABAVEoAJ9o9E9Ya1dKUi1xRepkcpWqzjjt
++OgCgqSQSvoBA3NLu8/US2RAb+Xn1vAK5AQ0EPi7dehAEAJgUmO0vNtZJj4qUyyFd
++lw9wH9jQVRwblKxItr/0eO28ta+JOXWH668/wcyJFbVCulanS/o1crbq1bq3662Q
++EiHaZuB4hUJHCmkrfnxSvyw+w3tvk1ByiWw4uhsIiYCLpq6h/w9Yv0bSXOctGWFv
++/dnZw1f/N1PLU955Ze7hofVrAAMGA/9dw6G1LznEO2zjfTYHZtEKSlAtvRGqyOQc
++7htMOXagUpPAF/KGHnBETWVyuEfNNW1c/EQ3LQi+L23q9u0L+cAcWiR4SBCejEII
++3bFE3hPLGxfa0LamJrq0kkSDoYm6OWB4WNPSGBCSZywwdLnLjqXiCU1+rT6qZcvN
++JEKFAJUOA4hOBBgRAgAGBQI+Lt16ABIJECw9TkwX8jGkB2VHUEcAAQE9AACfTWlS
++/WpC3LgkF8rcbbap9M8U/RkAoL2DhkJHX3uYYJzagVUiWJffkLnR
++=hls5
++-----END PGP PUBLIC KEY BLOCK-----
+--- cvs-1.12.13+real.orig/debian/watch
++++ cvs-1.12.13+real/debian/watch
+@@ -0,0 +1,3 @@
++version=4
++opts="dversionmangle=s/^[0-9]+://;s/\+real$//,pgpsigurlmangle=s/$/.sig/" \
++https://ftp.gnu.org/non-gnu/cvs/source/feature/([0-9.]*)/ cvs-([0-9.]*)\.tar\.gz
+--- cvs-1.12.13+real.orig/diff/analyze.c
++++ cvs-1.12.13+real/diff/analyze.c
+@@ -358,7 +358,7 @@
+   else
+     {
+       int c;
+-      struct partition part;
++      struct partition part = { 0, 0, 0, 0 };
+ 
+       /* Find a point of correspondence in the middle of the files.  */
+ 
+--- cvs-1.12.13+real.orig/diff/diff3.c
++++ cvs-1.12.13+real/diff/diff3.c
+@@ -1439,14 +1439,13 @@
+      int const mapping[3], rev_mapping[3];
+ {
+   int i;
+-  int oddoneout;
++  int oddoneout = 0;
+   char *cp;
+   struct diff3_block *ptr;
+   int line;
+   size_t length;
+-  int dontprint;
++  int dontprint = 0;
+   static int skew_increment[3] = { 2, 3, 1 }; /* 0==>2==>1==>3 */
+-  char const *line_prefix = tab_align_flag ? "\t" : "  ";
+ 
+   for (ptr = diff; ptr; ptr = D_NEXT (ptr))
+     {
+@@ -1503,7 +1502,7 @@
+ 	      line = 0;
+ 	      do
+ 		{
+-		  printf_output (line_prefix);
++		  printf_output (tab_align_flag ? "\t" : "  ");
+ 		  cp = D_RELNUM (ptr, realfile, line);
+ 		  length = D_RELLEN (ptr, realfile, line);
+ 		  write_output (cp, length);
+@@ -1555,11 +1554,12 @@
+      int leading_dot, start, num;
+ {
+   write_output (".\n", 2);
+-  if (leading_dot)
++  if (leading_dot) {
+     if (num == 1)
+       printf_output ("%ds/^\\.//\n", start);
+     else
+       printf_output ("%d,%ds/^\\.//\n", start, start + num - 1);
++  }
+ }
+ 
+ /*
+@@ -1750,11 +1750,12 @@
+ 	do
+ 	  {
+ 	    c = getc (infile);
+-	    if (c == EOF)
++	    if (c == EOF) {
+ 	      if (ferror (infile))
+ 		diff3_perror_with_exit ("input file");
+ 	      else if (feof (infile))
+ 		diff3_fatal ("input file shrank");
++	    }
+ 	    cc = c;
+ 	    write_output (&cc, 1);
+ 	  }
+@@ -1804,7 +1805,7 @@
+       linesread += i;
+       while (0 <= --i)
+ 	while ((c = getc (infile)) != '\n')
+-	  if (c == EOF)
++	  if (c == EOF) {
+ 	    if (ferror (infile))
+ 	      diff3_perror_with_exit ("input file");
+ 	    else if (feof (infile))
+@@ -1813,6 +1814,7 @@
+ 		  diff3_fatal ("input file shrank");
+ 		return conflicts_found;
+ 	      }
++	  }
+     }
+   /* Copy rest of common file.  */
+   while ((c = getc (infile)) != EOF || !(ferror (infile) | feof (infile)))
+--- cvs-1.12.13+real.orig/diff/ifdef.c
++++ cvs-1.12.13+real/diff/ifdef.c
+@@ -189,7 +189,7 @@
+ 
+ 	    default:
+ 	      {
+-		int value;
++		int value = 0;
+ 		char *speclim;
+ 
+ 		f = scan_printf_spec (spec);
+@@ -322,7 +322,7 @@
+ 
+ 		default:
+ 		  {
+-		    int value;
++		    int value = 0;
+ 		    char *speclim;
+ 
+ 		    f = scan_printf_spec (spec);
+--- cvs-1.12.13+real.orig/diff/side.c
++++ cvs-1.12.13+real/diff/side.c
+@@ -122,7 +122,7 @@
+ 	  break;
+ 
+ 	case '\b':
+-	  if (in_position != 0 && --in_position < out_bound)
++	  if (in_position != 0 && --in_position < out_bound) {
+ 	    if (out_position <= in_position)
+ 	      /* Add spaces to make up for suppressed tab past out_bound.  */
+ 	      for (;  out_position < in_position;  out_position++)
+@@ -133,6 +133,7 @@
+ 		cc = c;
+ 		write_output (&cc, 1);
+ 	      }
++	     }
+ 	  break;
+ 
+ 	case '\f':
+--- cvs-1.12.13+real.orig/diff/util.c
++++ cvs-1.12.13+real/diff/util.c
+@@ -235,7 +235,7 @@
+ 	      close (pipes[0]);
+ 	    }
+ 
+-	  execl (PR_PROGRAM, PR_PROGRAM, "-f", "-h", name, 0);
++	  execl (PR_PROGRAM, PR_PROGRAM, "-f", "-h", name, NULL);
+ 	  pfatal_with_name (PR_PROGRAM);
+ 	}
+       else
+--- cvs-1.12.13+real.orig/doc/HACKING.DOCS
++++ cvs-1.12.13+real/doc/HACKING.DOCS
+@@ -16,7 +16,9 @@
+ @strong{ ... }			Similar to @emph{}, but the effect is to
+ 				bracket with asterisks in info files (* ... *)
+ 				and in bold in PDF & probably in postscript &
+-				HTML.
++				HTML. It will cause spurious links in info if
++				used in some circumstances; if in doubt, use
++				@empy{ ... } instead then.
+ @noindent			Suppresses indentation of the following
+ 				paragraph.  This can ocassionally be useful
+ 				after examples and the like.
+@@ -44,3 +46,6 @@
+ 
+ For more on using texinfo docs, see the `info texinfo' documentation or
+ http://www.gnu.org/manual/texinfo/texinfo.html .
++
++
++$MirOS: src/gnu/usr.bin/cvs/doc/HACKING.DOCS,v 1.3 2010/09/19 19:42:52 tg Exp $
+--- cvs-1.12.13+real.orig/doc/Makefile.am
++++ cvs-1.12.13+real/doc/Makefile.am
+@@ -1,4 +1,5 @@
+ ## Process this file with automake to produce Makefile.in
++# $MirOS: src/gnu/usr.bin/cvs/doc/Makefile.am,v 1.5 2017/01/09 22:54:22 tg Exp $
+ # Makefile for GNU CVS documentation (excluding man pages - see ../man).
+ #
+ # Copyright (C) 1986-2005 The Free Software Foundation, Inc.
+@@ -84,7 +85,7 @@
+ # It is possible that an implicit .ms.ps target could be safely defined.  I
+ # don't recall looking into it.
+ cvs-paper.ps: cvs-paper.ms
+-	$(ROFF) -t -p -ms -Tps $(srcdir)/cvs-paper.ms >cvs-paper.ps-t
++	$(ROFF) -t -p -ms -Tps -P-p28c,21c $(srcdir)/cvs-paper.ms >cvs-paper.ps-t
+ 	cp cvs-paper.ps-t $@
+ 	-@rm -f cvs-paper.ps-t
+ 
+@@ -92,8 +93,8 @@
+ # Nothing in $(srcdir) be rebuilt, and this will always be rebuilt when it
+ # is dependant on cvs-paper.ps and cvs-paper.ps isn't distributed.
+ $(srcdir)/cvs-paper.pdf: cvs-paper.ms
+-	$(ROFF) -t -p -ms -Tps $(srcdir)/cvs-paper.ms >cvs-paper.ps-t
+-	ps2pdf cvs-paper.ps-t cvs-paper.pdf-t
++	$(ROFF) -t -p -ms -Tps -P-p28c,21c $(srcdir)/cvs-paper.ms >cvs-paper.ps-t
++	ps2pdf14 -sPAPERSIZE=pa4 cvs-paper.ps-t cvs-paper.pdf-t
+ 	cp cvs-paper.pdf-t $@
+ 	-@rm -f cvs-paper.pdf-t cvs-paper.ps-t
+ 
+--- cvs-1.12.13+real.orig/doc/cvs-paper.ms
++++ cvs-1.12.13+real/doc/cvs-paper.ms
+@@ -1,4 +1,5 @@
+ .\" soelim cvs.ms | pic | tbl | troff -ms
++.\" $MirOS: src/gnu/usr.bin/cvs/doc/cvs-paper.ms,v 1.3 2017/08/12 17:37:55 tg Exp $
+ .\" @(#)cvs.ms 1.2 92/01/30
+ .\"
+ .\"	troff source to the cvs USENIX article, Winter 1990, Washington, D.C.
+@@ -108,7 +109,7 @@
+ .SM
+ SCCS
+ .LG
+-[Bell] serialize file modifications by
++[Bell] serialise file modifications by
+ allowing only one developer to have a writable copy of a particular file at
+ any one point in time.
+ That developer is said to
+@@ -312,7 +313,7 @@
+ the copy, and then merges the modified copy with the original.
+ This paradigm allows developers to work in isolation from one another since
+ changes are made to copies of objects.
+-Because locks are not used, development is not serialized and can proceed
++Because locks are not used, development is not serialised and can proceed
+ in parallel.
+ Developers, however, must merge objects after the changes have been made.
+ In particular, a developer must resolve conflicts when the same object has
+@@ -853,7 +854,7 @@
+ it has been checked out, takes only 1.5 wall clock minutes.
+ Updating the \fIcomplete\fP 128 MByte source tree under \fBcvs\fP control
+ (17243 files/1005 directories) takes roughly 28 wall clock minutes and
+-utilizes one-third of the machine.
++utilises one-third of the machine.
+ For now this is entirely acceptable; improvements on these numbers will
+ possibly be made in the future.
+ .NH 2
+@@ -923,7 +924,7 @@
+ .IP \(bu 3
+ Security of the source repository is currently not dealt with directly.
+ The usual UNIX approach of user-group-other security permissions through
+-the file system is utilized, but nothing else.
++the filesystem is utilised, but nothing else.
+ \fBcvs\fP could likely be a set-group-id executable that checks a
+ protected database to verify user access permissions for particular objects
+ before allowing any operations to affect those objects.
+--- cvs-1.12.13+real.orig/doc/cvs.man.footer
++++ cvs-1.12.13+real/doc/cvs.man.footer
+@@ -1,3 +1,4 @@
++.\" $MirOS: src/gnu/usr.bin/cvs/doc/cvs.man.footer,v 1.6 2017/01/08 19:42:05 tg Exp $
+ .SH "AUTHORS"
+ .TP
+ Dick Grune
+@@ -26,15 +27,13 @@
+ Have helped maintain
+ .B cvs
+ for many years.
+-.TP
++.PP
+ And many others too numerous to mention here.
+ .SH "SEE ALSO"
+ The most comprehensive manual for CVS is
+-Version Management with CVS by Per Cederqvist et al.  Depending on
+-your system, you may be able to get it with the
+-.B info CVS
+-command or it may be available as cvs.pdf (Portable Document Format),
+-cvs.ps (PostScript), cvs.texinfo (Texinfo source), or cvs.html.
++Version Management with CVS by Per Cederqvist et al. (see
++.I NOTE
++at top).
+ .SP
+ For CVS updates, more information on documentation, software related
+ to CVS, development of CVS, and more, see:
+@@ -43,7 +42,6 @@
+ .PD 0
+ .IP "" 4
+ .B http://www.nongnu.org/cvs/
+-.in -1i
+ .SP
+ .BR ci ( 1 ),
+ .BR co ( 1 ),
+@@ -54,5 +52,7 @@
+ .BR patch ( 1 ),
+ .BR rcs ( 1 ),
+ .BR rcsdiff ( 1 ),
++.BR rcsintro ( 1 ),
+ .BR rcsmerge ( 1 ),
+-.BR rlog ( 1 ).
++.BR rlog ( 1 ),
++.BR re_format ( 7 ).
+--- cvs-1.12.13+real.orig/doc/cvs.man.header
++++ cvs-1.12.13+real/doc/cvs.man.header
+@@ -1,3 +1,5 @@
++.\" $MirOS: src/gnu/usr.bin/cvs/doc/cvs.man.header,v 1.6 2016/11/08 21:12:15 tg Exp $
++.\"
+ .\" This is the man page for CVS.  It is auto-generated from the
+ .\" cvs.man.header, cvs.texinfo, & cvs.man.footer files.  Please make changes
+ .\" there.  A full copyright & license notice may also be found in cvs.texinfo.
+@@ -5,6 +7,7 @@
+ .\" Man page autogeneration, including this header file, is
+ .\" Copyright 2004-2005 The Free Software Foundation, Inc.,
+ .\"                     Derek R. Price, & Ximbiot <http://ximbiot.com>.
++.\" Copyright (c) 2004, 2010, 2012, 2016 mirabilos <m@mirbsd.org>.
+ .\"
+ .\" This documentation is free software; you can redistribute it and/or modify
+ .\" it under the terms of the GNU General Public License as published by
+@@ -23,7 +26,9 @@
+ .ds Rv \\$3
+ .ds Dt \\$4
+ ..
+-.TH CVS 1 "\*(Dt"
++.de IX
++..
++.TH CVS 1
+ .\" Full space in nroff; half space in troff
+ .de SP
+ .if n .sp
+@@ -51,11 +56,82 @@
+ .IX  "release control system"  "cvs command"  ""  "\fLcvs\fP \- concurrent versions system"
+ .IX  "source control system"  "cvs command"  ""  "\fLcvs\fP \- concurrent versions system"
+ .IX  revisions  "cvs command"  ""  "\fLcvs\fP \- source control"
+-This manpage is a summary of some of the features of
+-\fBcvs\fP.  It is auto-generated from an appendix of the CVS manual.
+-For more in-depth documentation, please consult the
+-Cederqvist manual (via the
+-.B info CVS
+-command or otherwise,
+-as described in the SEE ALSO section of this manpage).  Cross-references
+-in this man page refer to nodes in the same.
++.\"
++This manual page is a summary of parts of the \fBcvs\fP documentation
++and automatically generated from an appendix of the CVS manual
++(the \fICederqvist\fP), which is also the target of all cross-references
++found in this manual page; please refer to the full CVS manual
++for more in-depth documentation of the Concurrent Versions System.
++.PP
++If you're reading this manual page as part of the MirBSD online (HTML)
++manual pages archive, follow the cvs(GNU) link to the Cederqvist
++(and the cvsclient(GNU) link to the client/server protocol description,
++if necessary).
++.PP
++If you installed
++.B cvs
++via the Debian or MirPorts Framework package management systems,
++.br
++.RS
++.B /usr/mpkg/share/doc/cvs/cvs.pdf
++(MirPorts Framework) or
++.br
++.B /usr/share/doc/cvs/cvs.pdf
++(Debian), respectively,
++.RE
++are versions of the Cederqvist rendered as books, for printing
++and reading on screen.
++.PP
++If you have a Texinfo reader such as
++.B info
++installed (part of the base system on MirBSD; part of the
++.I info
++package on Debian), you can read the Cederqvist by entering:
++.br
++.RS
++.B info
++.I cvs
++.RE
++.PP
++Quick introduction to
++.B info
++so you aren't immediately lost:
++.RS 4n
++.TP 3n
++.I arrow\ keys
++to move on the page
++.TP 3n
++.I Tab
++to move to the next hyperlink
++.TP 3n
++.I Return
++to activate the hyperlink under the cursor
++.TP 3n
++.BI l \ (lowercase\ ell)
++to go to the previously visited page
++.TP 3n
++.IB Page\ Up/ b,\  Page\ Down/Space
++to move by screen pages, including advancing to the previous
++(or next, respectively) section at the first (last) screen page
++.TP 3n
++.B p,\ n
++to go to the previous (next) page on the current navigation hierarchy level
++.TP 3n
++.B t
++to go to the "Top" page, i.e. the start of the document
++.TP 3n
++.BI / <search-term>Return
++to start a search from the current cursor position and jump to the first result
++.TP 3n
++.BI / Return
++to jump to the next result in an ongoing search
++.TP 3n
++.B q
++to exit the
++.B info
++viewer
++.RE
++.PP
++Other ways to read further documentation are described in the
++.I SEE\ ALSO
++section of this manual page.
+--- cvs-1.12.13+real.orig/doc/cvs.texinfo
++++ cvs-1.12.13+real/doc/cvs.texinfo
+@@ -1,6 +1,18 @@
+ \input texinfo  @c -*-texinfo-*-
+ @comment Documentation for CVS.
+ @setfilename cvs.info
++@set MBSDPATCHLEVEL -MirOS-0AB9.1
++@tex
++ % set PA4 paper size (can print on both DIN ISO A4 and US Letter)
++ \globaldefs = 1%
++ \afourpaper%
++ \internalpagesizes{46\baselineskip}{160mm}%
++  {\voffset}{\hoffset}%
++  {\bindingoffset}{36pt}%
++  {28truecm}{21truecm}%
++ \globaldefs = 0%
++@end tex
++@comment $MirOS: src/gnu/usr.bin/cvs/doc/cvs.texinfo,v 1.38 2021/01/30 02:05:55 tg Exp $
+ @macro copyleftnotice
+ @noindent
+ Copyright @copyright{} 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+@@ -9,7 +21,11 @@
+ 
+ @multitable @columnfractions .12 .88
+ @item Portions
+-@item @tab Copyright @copyright{} 1999, 2000, 2001, 2002, 2003, 2004, 2005
++@item @tab Copyright @copyright{} 2003, 2004, 2005, 2007, 2009, 2010, 2011,
++                                  2013, 2014, 2015, 2016, 2017, 2021
++                                  mirabilos, The MirOS Project
++@item @tab Copyright @copyright{} 1999, 2000, 2001, 2002, 2003, 2004, 2005,
++                                  2007
+                                   Derek R. Price,
+ @item @tab Copyright @copyright{} 2002, 2003, 2004, 2005
+                                   Ximbiot @url{http://ximbiot.com},
+@@ -51,6 +67,15 @@
+ @comment MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ @comment GNU General Public License for more details.
+ 
++@comment It should be noted that the Texinfo manual is distributed
++@comment under the above notice in all forms, except for the manpage
++@comment generated from it, and that the manual and the source code
++@comment of CVS often need to stay synchronised; therefore, exchanging
++@comment between these three entities under these two licences seems
++@comment to be granted, and the statement above can be interpreted as
++@comment explicit dual-licence grant. As a major contributor to this
++@comment documentation for MirBSD, I do not oppose.  --mirabilos
++
+ @c See ../README for A4 vs. US letter size.
+ @c When we provided A4 postscript, and people tried to
+ @c print it on US letter, the usual complaint was that the
+@@ -103,7 +128,7 @@
+ @end direntry
+ @dircategory Individual utilities
+ @direntry
+-* cvs: (cvs)CVS commands.       Concurrent Versions System
++* cvs: (cvs)CVS command list.   Concurrent Versions System
+ @end direntry
+ 
+ @comment The titlepage section does not appear in the Info file.
+@@ -111,12 +136,12 @@
+ @sp 4
+ @comment The title is printed in a large font.
+ @center @titlefont{Version Management}
+-@sp
++@sp 1
+ @center @titlefont{with}
+-@sp
++@sp 1
+ @center @titlefont{CVS}
+ @sp 2
+-@center for @sc{cvs} @value{VERSION}
++@center for @sc{cvs} @value{VERSION}@value{MBSDPATCHLEVEL}
+ @comment -release-
+ @sp 3
+ @center Per Cederqvist et al
+@@ -141,13 +166,20 @@
+ @node    Top
+ @top
+ 
++@ifnotinfo
++@anchor{Cederqvist}
++@end ifnotinfo
+ This info manual describes how to use and administer
+-@sc{cvs} version @value{VERSION}.
++@sc{cvs} version @value{VERSION}@value{MBSDPATCHLEVEL} and up.
+ @end ifnottex
+ 
+ @ifinfo
+ @copyleftnotice
++@anchor{Cederqvist}
+ @end ifinfo
++@iftex
++@anchor{Cederqvist}
++@end iftex
+ 
+ @c This menu is pretty long.  Not sure how easily that
+ @c can be fixed (no brilliant ideas right away)...
+@@ -181,6 +213,7 @@
+ * Troubleshooting::             Some tips when nothing works
+ * Credits::                     Some of the contributors to this manual
+ * BUGS::                        Dealing with bugs in CVS or this manual
++* CVS command list::            Alphabetical list of all CVS commands
+ * Index::                       Index
+ @end menu
+ 
+@@ -327,7 +360,7 @@
+ you wind up requiring the entire repository to be
+ checked out.
+ 
+-If you modularize your work, and construct a build
++If you modularise your work, and construct a build
+ system that will share files (via links, mounts,
+ @code{VPATH} in @file{Makefile}s, etc.), you can
+ arrange your disk usage however you like.
+@@ -483,11 +516,11 @@
+ As a way of introducing @sc{cvs}, we'll go through a
+ typical work-session using @sc{cvs}.  The first thing
+ to understand is that @sc{cvs} stores all files in a
+-centralized @dfn{repository} (@pxref{Repository}); this
++centralised @dfn{repository} (@pxref{Repository}); this
+ section assumes that a repository is set up.
+ @c I'm not sure that the sentence concerning the
+ @c repository quite tells the user what they need to
+-@c know at this point.  Might need to expand on "centralized"
++@c know at this point.  Might need to expand on "centralised"
+ @c slightly (maybe not here, maybe further down in the example?)
+ 
+ Suppose you are working on a simple compiler.  The source
+@@ -742,7 +775,7 @@
+ @c /home/joe/sources.  But this node is too long
+ @c as it is; need a little reorganization...
+ 
+-@cindex :local:, setting up
++@cindex local method, setting up
+ @sc{cvs} can access a repository by a variety of
+ means.  It might be on the local computer, or it might
+ be on a computer across the room or across the world.
+@@ -1037,10 +1070,6 @@
+ if you want to allow read-only access to some directories
+ (@pxref{config}).
+ 
+-@c CVS seems to use CVSUMASK in picking permissions for
+-@c val-tags, but maybe we should say more about this.
+-@c Like val-tags gets created by someone who doesn't
+-@c have CVSUMASK set right?
+ @cindex CVSROOT/val-tags file, and read-only access to projects
+ @cindex val-tags file, and read-only access to projects
+ Also note that users must have write access to the
+@@ -1072,7 +1101,7 @@
+ @c FIXME: Need more discussion of which
+ @c group should own the file in the repository.
+ @c Include a somewhat detailed example of the usual
+-@c case where CVSUMASK is 007, the developers are all
++@c case where CVSUMASK is 002, the developers are all
+ @c in a group, and that group owns stuff in the
+ @c repository.  Need to talk about group ownership of
+ @c newly-created directories/files (on some unices,
+@@ -1152,7 +1181,7 @@
+ sure).
+ 
+ If you are using local @sc{cvs} and the repository is on a
+-networked file system which is served by the Samba SMB
++networked filesystem which is served by the Samba SMB
+ server, some people have reported problems with
+ permissions.  Enabling WRITE=YES in the samba
+ configuration is said to fix/workaround it.
+@@ -1551,7 +1580,7 @@
+ This file lists the files and directories in the
+ working directory.
+ The first character of each line indicates what sort of
+-line it is.  If the character is unrecognized, programs
++line it is.  If the character is unrecognised, programs
+ reading the file should silently skip that line, to
+ allow for future expansion.
+ 
+@@ -1780,7 +1809,7 @@
+ @cindex CVSROOT, module name
+ @cindex Defining modules (intro)
+ 
+-@c FIXME: this node should be reorganized into "general
++@c FIXME: this node should be reorganised into "general
+ @c information about admin files" and put the "editing
+ @c admin files" stuff up front rather than jumping into
+ @c the details of modules right away.  Then the
+@@ -1931,14 +1960,23 @@
+ on what each developer uses).
+ 
+ The repository should be accessible
+-(directly or via a networked file system) from all
++(directly or via a networked filesystem) from all
+ machines which want to use @sc{cvs} in server or local
+ mode; the client machines need not have any access to
+ it other than via the @sc{cvs} protocol.  It is not
+-possible to use @sc{cvs} to read from a repository
++normally possible to use @sc{cvs} to read from a repository
+ which one only has read access to; @sc{cvs} needs to be
+ able to create lock files (@pxref{Concurrency}).
+ 
++If the environment variable @code{$CVSREADONLYFS} is defined,
++however, CVS will allow read-only access without creating any
++history entries or reader lock files.  This allows doing most
++usual repository operations except checkin in a fast way,
++although if any other user is accessing the same data at the
++same time, it may lead to corrupt data.  This mode is best used
++for publicly accessible anonymous CVS mirrors, not the main
++working repository.
++
+ @cindex init (subcommand)
+ To create a repository, run the @code{cvs init}
+ command.  It will set up an empty repository in the
+@@ -1954,9 +1992,18 @@
+ you run @code{cvs init} on an already set-up
+ repository.
+ 
+-@code{cvs init} will enable history logging; if you
+-don't want that, remove the history file after running
+-@code{cvs init}.  @xref{history file}.
++The repository is created honouring the @code{$CVSUMASK}
++setting (@pxref{CVSUMASK}), even the @file{history} and
++@file{val-tags} files are not created world-writable any
++more as in previous CVS versions.  History logging is,
++accordingly, configured to log write operations only; if
++you don’t want that, edit or remove the @samp{LogHistory}
++entry in the @file{config} file (@pxref{config}) and make
++sure that all users who need to write that file can do so,
++for example by using a @code{$CVSUMASK} of 002 (which is
++also the default) and putting everyone into the same Unix
++group (consider the security implications if you really
++want to enable world-writable logging).
+ 
+ @node Backing up
+ @section Backing up a repository
+@@ -2103,6 +2150,9 @@
+ * Write proxies::               Distributing load across several CVS servers
+ @end menu
+ 
++For the protocol specification,
++@pxref{Top, the CVS client/server protocol,, cvsclient, The CVS client/server protocol}.
++
+ @node Server requirements
+ @subsection Server requirements
+ 
+@@ -2236,19 +2286,19 @@
+ through and @var{port} is the port number on the HTTP proxy server to connect
+ via.  @var{port} defaults to 8080.
+ 
+-@strong{NOTE: An HTTP proxy server is not the same as a @sc{cvs} write proxy
++@emph{NOTE: An HTTP proxy server is not the same as a @sc{cvs} write proxy
+ server - please see @ref{Write proxies} for more on @sc{cvs} write proxies.}
+ 
+ For example, to connect pserver via a web proxy listening on port 8000 of
+ www.myproxy.net, you would use a method of:
+ 
+ @example
+-:pserver;proxy=www.myproxy.net;proxyport=8000:@var{pserver_connection_string}
++:pserver;proxy=www.myproxy.net;proxyport=8000:@var{connstr}
+ @end example
+ 
+-@strong{NOTE: In the above example, @var{pserver_connection_string} is still
+-required to connect and authenticate to the CVS server, as noted in the
+-upcoming sections on password authentication, @code{gserver}, and
++@emph{NOTE: In the above example, the pserver connection string @var{connstr}
++is still required to connect and authenticate to the CVS server, as noted in
++the upcoming sections on password authentication, @code{gserver}, and
+ @code{kserver}.  The example above only demonstrates a modification to the
+ @var{method} portion of the repository name.}
+ 
+@@ -2369,7 +2419,7 @@
+ machine to the filename of the server you want to use,
+ for example @file{/usr/local/bin/cvs-1.6}.
+ For the @code{ext} and @code{fork} methods, you may
+-also specify @var{CVS_SERVER} as an otpion in the
++also specify @var{CVS_SERVER} as an option in the
+ @var{CVSROOT} so that you may use different servers for
+ differnt roots. See @ref{Remote repositories} for more
+ details.
+@@ -2377,21 +2427,23 @@
+ There is no need to edit @file{inetd.conf} or start a
+ @sc{cvs} server daemon.
+ 
+-@cindex :server:, setting up
+-@cindex :ext:, setting up
++@cindex server method, setting up
++@cindex ext method, setting up
+ @cindex Kerberos, using kerberized rsh
+ @cindex SSH (rsh replacement)
+ @cindex rsh replacements (Kerberized, SSH, &c)
+ There are two access methods that you use in @code{CVSROOT}
+ for rsh.  @code{:server:} specifies an internal rsh
+ client, which is supported only by some @sc{cvs} ports.
++This is not supported on most Unix-style systems.
+ @code{:ext:} specifies an external rsh program.  By
+ default this is @code{rsh} (unless otherwise specified
+ by the @file{--with-rsh} flag to configure) but you may set the
+ @code{CVS_RSH} environment variable to invoke another
+ program which can access the remote server (for
+ example, @code{remsh} on HP-UX 9 because @code{rsh} is
+-something different).  It must be a program which can
++something different, or @code{ssh} to allow the use of secure
++and/or compressed connections).  It must be a program which can
+ transmit data to and from the server without modifying
+ it; for example the Windows NT @code{rsh} is not
+ suitable since it by default translates between CRLF
+@@ -2405,6 +2457,12 @@
+ to be inapplicable; consult the documentation for your rsh
+ replacement.
+ 
++In the Debian and MirBSD versions of @sc{cvs}, you can
++also specify @code{:extssh:} to force use of the Secure
++Shell, or @code{:ext=prog:} or @code{:ext=/path/to/prog:}
++to specify the remote shell to use without needing to
++touch the @code{CVS_RSH} environment variable.
++
+ You may choose to specify the @var{CVS_RSH} option as a method option
+ in the @var{CVSROOT} string to allow you to use different connection tools
+ for different roots (@pxref{The connection method}).  For example, allowing
+@@ -2501,15 +2559,19 @@
+ The @samp{--allow-root} option specifies the allowable
+ @sc{cvsroot} directory.  Clients which attempt to use a
+ different @sc{cvsroot} directory will not be allowed to
+-connect.  If there is more than one @sc{cvsroot}
+-directory which you want to allow, repeat the option.
++connect.  To allow a whole class of @sc{cvsroot}, specify
++a POSIX extended regular expression to match allowed
++directories with the @samp{--allow-root-regexp} option.
++These options may be used in conjunction, and both options
++may be repeated to allow access to multiple @sc{cvsroot}
++directories and classes of directories.
+ (Unfortunately, many versions of @code{inetd} have very small
+ limits on the number of arguments and/or the total length
+ of the command.  The usual solution to this problem is
+ to have @code{inetd} run a shell script which then invokes
+ @sc{cvs} with the necessary arguments.)
+ 
+-        If your @code{inetd} wants a symbolic service
++If your @code{inetd} wants a symbolic service
+ name instead of a raw port number, then put this in
+ @file{/etc/services}:
+ 
+@@ -2675,7 +2737,7 @@
+ (@code{info-cvs@@nongnu.org} or @code{bug-cvs@@nongnu.org}) if you use the 
+ @sc{cvs} PAM support.
+ 
+-@strong{WARNING: Using PAM gives the system administrator much more 
++@emph{WARNING: Using PAM gives the system administrator much more 
+ flexibility about how @sc{cvs} users are authenticated but 
+ no more security than other methods.  See below for more.} 
+ 
+@@ -2776,7 +2838,7 @@
+ @cindex Login (subcommand)
+ @cindex Password client, using
+ @cindex Authenticated client, using
+-@cindex :pserver:, setting up
++@cindex pserver method, setting up
+ To run a @sc{cvs} command on a remote repository via
+ the password-authenticating server, one specifies the
+ @code{pserver} protocol, optional username, repository host, an
+@@ -2887,7 +2949,7 @@
+ @c FIXME: The bit about "access to the repository
+ @c implies general access to the system is *not* specific
+ @c to pserver; it applies to kerberos and SSH and
+-@c everything else too.  Should reorganize the
++@c everything else too.  Should reorganise the
+ @c documentation to make this clear.
+ The separate @sc{cvs} password file (@pxref{Password
+ authentication server}) allows people
+@@ -2940,8 +3002,8 @@
+ 
+ @cindex GSSAPI
+ @cindex Security, GSSAPI
+-@cindex :gserver:, setting up
+-@cindex Kerberos, using :gserver:
++@cindex gserver method, setting up
++@cindex Kerberos, using gserver method
+ GSSAPI is a generic interface to network security
+ systems such as Kerberos 5.
+ If you have a working GSSAPI library, you can have
+@@ -2992,9 +3054,9 @@
+ @node Kerberos authenticated
+ @subsection Direct connection with Kerberos
+ 
+-@cindex Kerberos, using :kserver:
++@cindex Kerberos, using kserver method
+ @cindex Security, Kerberos
+-@cindex :kserver:, setting up
++@cindex kserver method, setting up
+ The easiest way to use Kerberos is to use the Kerberos
+ @code{rsh}, as described in @ref{Connecting via rsh}.
+ The main disadvantage of using rsh is that all the data
+@@ -3039,7 +3101,7 @@
+ @subsection Connecting with fork
+ 
+ @cindex fork, access method
+-@cindex :fork:, setting up
++@cindex fork method, setting up
+ This access method allows you to connect to a
+ repository on your local disk via the remote protocol.
+ In other words it does pretty much the same thing as
+@@ -3065,7 +3127,7 @@
+ cvs -d :fork:/usr/local/cvsroot checkout foo
+ @end example
+ 
+-@cindex CVS_SERVER, and :fork:
++@cindex CVS_SERVER, and fork method
+ As with @code{:ext:}, the server is called @samp{cvs}
+ by default, or the value of the @code{CVS_SERVER}
+ environment variable.
+@@ -3994,7 +4056,7 @@
+ tag.
+ 
+ @noindent
+-@strong{WARNING: the commands in this section are
++@emph{WARNING: the commands in this section are
+ dangerous; they permanently discard historical
+ information and it can be difficult or impossible to
+ recover from errors.  If you are a @sc{cvs}
+@@ -4024,7 +4086,7 @@
+ trigger warnings and will not be deleted.
+ 
+ @noindent
+-@strong{WARNING: Moving branch tags is very dangerous!  If you think
++@emph{WARNING: Moving branch tags is very dangerous!  If you think
+ you need the @code{-B} option, think again and ask your @sc{cvs}
+ administrator about it (if that isn't you).  There is almost certainly
+ another way to accomplish what you want to accomplish.}
+@@ -4055,7 +4117,7 @@
+ name are ignored with a warning message.
+ 
+ @noindent
+-@strong{WARNING: Moving branch tags is very dangerous!  If you think you
++@emph{WARNING: Moving branch tags is very dangerous!  If you think you
+ need the @code{-B} option, think again and ask your @sc{cvs}
+ administrator about it (if that isn't you).  There is almost certainly
+ another way to accomplish what you want to accomplish.}
+@@ -4257,7 +4319,7 @@
+ @c until it is ready for the main trunk.  The whole
+ @c thing is generally speaking more akin to the
+ @c "Revision management" node although it isn't clear to
+-@c me whether policy matters should be centralized or
++@c me whether policy matters should be centralised or
+ @c distributed throughout the relevant sections.
+ Suppose that release 1.0 of tc has been made.  You are continuing to
+ develop tc, planning to create release 1.1 in a couple of months.  After a
+@@ -4904,7 +4966,7 @@
+ directory need not change anything.  Therefore, there
+ is no conflict.
+ 
+-@strong{WARNING: In versions of @sc{cvs} prior to 1.12.2, there was a
++@emph{WARNING: In versions of @sc{cvs} prior to 1.12.2, there was a
+ major problem with using @samp{-kk} on merges.  Namely, @samp{-kk}
+ overrode any default keyword expansion mode set in the archive file in
+ the repository.  This could, unfortunately for some users, cause data
+@@ -5104,7 +5166,7 @@
+ @file{backend.c} to the repository:
+ 
+ @c This example used to specify
+-@c     -m "Optimizer and code generation passes."
++@c     -m "Optimiser and code generation passes."
+ @c to the cvs add command, but that doesn't work
+ @c client/server (see log2 in sanity.sh).  Should fix CVS,
+ @c but also seems strange to document things which
+@@ -5266,7 +5328,7 @@
+ cvs add: oj.c, version 1.1.1.1, resurrected
+ @end example
+ 
+-If you realize your mistake before you run the
++If you realise your mistake before you run the
+ @code{remove} command you can use @code{update} to
+ resurrect the file:
+ 
+@@ -5712,12 +5774,12 @@
+ @node user-defined logging
+ @section User-defined logging
+ 
+-@c FIXME: probably should centralize this information
++@c FIXME: probably should centralise this information
+ @c here, at least to some extent.  Maybe by moving the
+ @c loginfo, etc., nodes here and replacing
+ @c the "user-defined logging" node with one node for
+ @c each method.
+-You can customize @sc{cvs} to log various kinds of
++You can customise @sc{cvs} to log various kinds of
+ actions, in whatever manner you choose.  These
+ mechanisms operate by executing a script at various
+ times.  The script might append a message to a file
+@@ -5736,7 +5798,7 @@
+ @samp{-o}, @samp{-e}, and @samp{-t} options in the
+ modules file.  For a more flexible way of giving
+ notifications to various users, which requires less in
+-the way of keeping centralized scripts up to date, use
++the way of keeping centralised scripts up to date, use
+ the @code{cvs watch add} command (@pxref{Getting
+ Notified}); this command is useful even if you are not
+ using @code{cvs watch on}.
+@@ -5968,7 +6030,7 @@
+ locks, have all developers put "edit -c", "commit -c" in their
+ .cvsrc file, and turn on watches in the repository.  This
+ prevents them from doing a @code{cvs edit} if anyone is
+-already editting the file.  It also may
++already editing the file.  It also may
+ be possible to use plain watches together with suitable
+ procedures (not enforced by software), to avoid having
+ two people edit at the same time.
+@@ -6451,7 +6513,7 @@
+ You can now go ahead and commit this as revision 1.7.
+ 
+ @example
+-$ cvs commit -m "Initialize scanner. Use symbolic exit values." driver.c
++$ cvs commit -m "Initialise scanner. Use symbolic exit values." driver.c
+ Checking in driver.c;
+ /usr/local/cvsroot/yoyodyne/tc/driver.c,v  <--  driver.c
+ new revision: 1.7; previous revision: 1.6
+@@ -6630,7 +6692,7 @@
+ put "edit -c" and "commit -c" into all .cvsrc files,
+ and make files default to read only by turning on watches
+ or putting "cvs -r" into all .cvsrc files.
+-This prevents multiple people from editting a file at
++This prevents multiple people from editing a file at
+ the same time (unless explicitly overriden with @samp{-f}).
+ 
+ @c I'm a little dissatisfied with this presentation,
+@@ -6875,7 +6937,7 @@
+ There are two additional options that @code{cvs edit} understands as of
+ @sc{cvs} client and server versions 1.12.10 but @code{cvs watch} does not.
+ The first is @code{-c}, which causes @code{cvs edit} to fail if anyone else
+-is editting the file.  This is probably only useful when @samp{edit -c} and
++is editing the file.  This is probably only useful when @samp{edit -c} and
+ @samp{commit -c} are specified in all developers' @file{.cvsrc} files.  This
+ behavior may be overriden this via the @code{-f} option, which overrides
+ @code{-c} and allows multiple edits to succeed.
+@@ -6992,7 +7054,7 @@
+ cons.  Let it be said that a lot of this is a matter of
+ opinion or what works given different groups' working
+ styles, but here is a brief description of some of the
+-issues.  There are many ways to organize a team of
++issues.  There are many ways to organise a team of
+ developers.  @sc{cvs} does not try to enforce a certain
+ organization.  It is a tool that can be used in several
+ ways.
+@@ -7014,7 +7076,7 @@
+ many groups is that they occur rarely and usually are
+ relatively straightforward to resolve.
+ 
+-The rarity of serious conflicts may be surprising, until one realizes
++The rarity of serious conflicts may be surprising, until one realises
+ that they occur only when two developers disagree on the proper design
+ for a given section of code; such a disagreement suggests that the
+ team has not been communicating properly in the first place.  In order
+@@ -7182,6 +7244,15 @@
+ @item $@splitrcskeyword{Date}$
+ The date and time (UTC) the revision was checked in.
+ 
++@cindex Mdocdate keyword
++@item $@splitrcskeyword{Mdocdate}$
++The date (UTC) the revision was checked in, in a format suitable
++for the Berkeley mdoc macro processing.
++
++@example
++$Mdocdate: January 30 2021 $
++@end example
++
+ @cindex Header keyword
+ @item $@splitrcskeyword{Header}$
+ A standard header containing the full pathname of the
+@@ -7243,7 +7314,8 @@
+ but for several reasons it can be problematic.
+ 
+ If the prefix of the @code{$@splitrcskeyword{Log}$} keyword turns out to be
+-longer than @code{MaxCommentLeaderLength}, CVS will skip expansion of this
++longer than the @file{CVSROOT/config} setting @code{MaxCommentLeaderLength},
++CVS will skip expansion of this
+ keyword unless @code{UseArchiveCommentLeader} is also set in
+ @file{CVSROOT/config} and a @samp{comment leader} is set in the RCS archive
+ file, in which case the comment leader will be used instead.  For more on
+@@ -7336,7 +7408,7 @@
+ the source files so that it gets passed through to
+ generated files.  For example, if you are managing
+ computer program source code, you might include a
+-variable which is initialized to contain that string.
++variable which is initialised to contain that string.
+ Or some C compilers may provide a @code{#pragma ident}
+ directive.  Or a document management system might
+ provide a way to pass a string through to generated
+@@ -7550,13 +7622,14 @@
+ A list may be used. The this example:
+ 
+ @example
+-        # Add a "MyBSD" keyword and restrict keyword
+-        # expansion to the MyBSD, Name and Date keywords.
++        # Add a "MyBSD" keyword and restrict keyword expansion
++        # to the MyBSD, Name, Date and Mdocdate keywords.
+         LocalKeyword=MyBSD=CVSHeader
+-        KeywordExpand=iMyBSD,Name,Date
++        KeywordExpand=iMyBSD,Name,Date,Mdocdate
+ @end example
+ 
+-would allow $@splitrcskeyword{MyBSD}$, $@splitrcskeyword{Name}$, and
++would allow $@splitrcskeyword{MyBSD}$, $@splitrcskeyword{Name}$,
++$@splitrcskeyword{Mdocdate} and
+ $@splitrcskeyword{Date}$ to be expanded.
+ 
+ It is also possible to configure an exclusion list
+@@ -7595,7 +7668,7 @@
+ has been around a long time. However, that patch
+ implemented these features using @code{tag=} and
+ @code{tagexpand=} keywords and those keywords are NOT
+-recognized.
++recognised.
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+ @node Log keyword
+@@ -7742,7 +7815,7 @@
+ $ cvs import -m "Import of FSF v. 0.05" fsf/wdiff FSF_DIST WDIFF_0_05
+ @end example
+ 
+-@strong{WARNING: If you use a release tag that already exists in one of the
++@emph{WARNING: If you use a release tag that already exists in one of the
+ repository archives, files removed by an import may not be detected.}
+ 
+ For files that have not been modified locally, the newly created
+@@ -7786,7 +7859,12 @@
+ 
+ You can also revert local changes completely and return
+ to the latest vendor release by changing the `head'
+-revision back to the vendor branch on all files.  For
++revision back to the vendor branch on all files.  This
++does, however, produce weird results if you should ever
++edit this file again, for anyone looking at the output
++from the @code{log} command or CVSweb.  To fix this,
++first commit a revision of the file which equals the
++vendor branch, then use @code{admin} @samp{-b}. For
+ example, if you have a checked-out copy of the sources
+ in @file{~/work.d/wdiff}, and you want to revert to the
+ vendor's version for all the files in that directory,
+@@ -7853,6 +7931,10 @@
+ @code{cvs import}.  It takes as an argument the vendor
+ branch to import to.  The default is @samp{-b 1.1.1}.
+ 
++Vendor branches can only be in the format 1.1.x where
++@samp{x} is an @emph{uneven} number, because branch
++tags use even numbers.
++
+ For example, suppose that there are two teams, the red
+ team and the blue team, that are sending you sources.
+ You want to import the red team's efforts to branch
+@@ -8030,7 +8112,7 @@
+ 
+ When @code{PreservePermissions} is in use, some @sc{cvs}
+ operations (such as @samp{cvs status}) will not
+-recognize a file's hard link structure, and so will
++recognise a file's hard link structure, and so will
+ emit spurious warnings about mismatching hard links.
+ The reason is that @sc{cvs}'s internal structure does not
+ make it easy for these operations to collect all the
+@@ -8094,16 +8176,18 @@
+ This appendix describes the overall structure of
+ @sc{cvs} commands, and describes some commands in
+ detail (others are described elsewhere; for a quick
+-reference to @sc{cvs} commands, @pxref{Invoking CVS}).
++reference to @sc{cvs} commands, @pxref{Invoking CVS},
++and for an alphabetical list of all @sc{cvs} commands,
++@pxref{CVS command list}).
+ @c The idea is that we want to move the commands which
+ @c are described here into the main body of the manual,
+ @c in the process reorganizing the manual to be
+-@c organized around what the user wants to do, not
+-@c organized around CVS commands.
++@c organised around what the user wants to do, not
++@c organised around CVS commands.
+ @c
+ @c Note that many users do expect a manual which is
+-@c organized by command.  At least some users do.
+-@c One good addition to the "organized by command"
++@c organised by command.  At least some users do.
++@c One good addition to the "organised by command"
+ @c section (if any) would be "see also" links.
+ @c The awk manual might be a good example; it has a
+ @c reference manual which is more verbose than Invoking
+@@ -8117,19 +8201,20 @@
+ * Global options::              Options you give to the left of cvs_command
+ * Common options::              Options you give to the right of cvs_command
+ * Date input formats::		Acceptable formats for date specifications
+-* admin::                       Administration
++* admin::                       Administration front-end for RCS
+ * annotate::                    What revision modified each line of a file?
+ * checkout::                    Checkout sources for editing
+ * commit::                      Check files into the repository
+ * diff::                        Show differences between revisions
+ * export::                      Export sources from CVS, similar to checkout
+-* history::                     Show status of files and users
++* history::                     Show repository access history
+ * import::                      Import sources into CVS, using vendor branches
+-* log::                         Show log messages for files
++* log::                         Print out history information for files
+ * ls & rls::                    List files in the repository
+-* rdiff::                       'patch' format diffs between releases
++* rdiff::                       Create 'patch' format diffs between revisions
+ * release::                     Indicate that a directory is no longer in use
+ * server & pserver::            Act as a server for a client on stdin/stdout
++* suck::                        Download RCS ,v file raw
+ * update::                      Bring work tree in sync with repository
+ @end menu
+ 
+@@ -8375,6 +8460,31 @@
+ @samp{-N} in the @file{~/.cvsrc} entry for @samp{log},
+ you may need to use @samp{-f} to show the tag names.
+ 
++@item -g
++Forges group-writable permissions on files in the working copy.
++This option is typically used when you have multiple users sharing
++a single checked out source tree, allowing them to operate their
++shells with a less dangerous umask at the expense of @sc{cvs} security.
++To use this feature, create a directory to hold the checked-out
++source tree, set it to a private group, and set up the directory
++such that files created under it inherit the gid of the directory.
++On BSD systems, this occurs automatically. On SYSV systems and
++GNU/Linux, the sgid bit must be set on the directory for this.
++The users who are to share the checked out tree must be placed in
++that group which owns the directory.
++
++Note that the sharing of a single checked-out source tree is very
++different from giving several users access to a common @sc{cvs} repository.
++Access to a common @sc{cvs} repository already maintains shared group-write
++permissions and does not require this option.
++
++Due to the security implications, setting this option globally in
++your @file{.cvsrc} file is strongly discouraged; if you must, ensure
++all source checkouts are "firewalled" within a private group or a
++private mode 0700 directory.
++
++This option is a MidnightBSD extension merged into Debian and MirBSD @sc{cvs}.
++
+ @item -H
+ @itemx --help
+ Display usage information about the specified @samp{cvs_command}
+@@ -8498,7 +8608,7 @@
+ which are listed with the individual commands, may have
+ different behavior from one @sc{cvs} command to the other).
+ 
+-@strong{Note: the @samp{history} command is an exception; it supports
++@emph{Note: the @samp{history} command is an exception; it supports
+ many options that conflict even with these standard options.}
+ 
+ @table @code
+@@ -8523,7 +8633,7 @@
+ slightly different way; @pxref{history options}).
+ 
+ For a complete description of the date formats accepted by @sc{cvs},
+-@ref{Date input formats}.
++@pxref{Date input formats}.
+ @c What other formats should we accept?  I don't want
+ @c to start accepting a whole mess of non-standard
+ @c new formats (there are a lot which are in wide use in
+@@ -8610,7 +8720,7 @@
+ @code{annotate}, @code{checkout}, @code{export},
+ @code{rdiff}, @code{rtag}, and @code{update}.
+ 
+-@strong{WARNING:  The @code{commit} and @code{remove}
++@emph{WARNING:  The @code{commit} and @code{remove}
+ commands also have a
+ @samp{-f} option, but it has a different behavior for
+ those commands.  See @ref{commit options}, and
+@@ -8631,7 +8741,7 @@
+ @code{checkout}, @code{diff}, @code{export}, @code{import},
+ @code{rdiff}, and @code{update} commands.
+ 
+-@strong{WARNING: Prior to CVS version 1.12.2, the @samp{-k} flag
++@emph{WARNING: Prior to CVS version 1.12.2, the @samp{-k} flag
+ overrode the @samp{-kb} indication for a binary file.  This could
+ sometimes corrupt binary files.  @xref{Merging and keywords}, for
+ more.}
+@@ -8660,7 +8770,7 @@
+ specified to run in the modules
+ database (@pxref{modules}); this option bypasses it).
+ 
+-@strong{Note: this is not the same as the @samp{cvs -n}
++@emph{Note: this is not the same as the @samp{cvs -n}
+ program option, which you can specify to the left of a cvs command!}
+ 
+ Available with the @code{checkout}, @code{commit}, @code{export},
+@@ -8688,14 +8798,21 @@
+ @item -r @var{tag}[:@var{date}]
+ @cindex HEAD, special tag
+ @cindex BASE, special tag
++@cindex BASE, special date
+ Use the revision specified by the @var{tag} argument (and the @var{date}
+ argument for the commands which accept it) instead of the
+ default @dfn{head} revision.  As well as arbitrary tags defined
+ with the @code{tag} or @code{rtag} command, two special tags are
+ always available: @samp{HEAD} refers to the most recent version
+-available in the repository, and @samp{BASE} refers to the
++available in the repository (also known as the tip of the @samp{MAIN}
++branch, also known as trunk; the name of a branch refers to its tip;
++this version of @sc{cvs} introduces @samp{.bhead}, but only for the
++@sc{diff} command, for the same), and @samp{BASE} refers to the
+ revision you last checked out into the current working directory.
+ 
++@c fixed: HEAD is changed now; .bhead is the name of the branch,
++@c but added for cases where it is unknown.
++@c --mirabilos
+ @c FIXME: What does HEAD really mean?  I believe that
+ @c the current answer is the head of the default branch
+ @c for all cvs commands except diff.  For diff, it
+@@ -8735,12 +8852,19 @@
+ the name of a branch is interpreted as the most recent
+ revision on that branch.
+ 
++As a Debian and MirBSD @sc{cvs} extension, specifying @samp{BASE} as the
++@var{date} portion of the argument yields the @emph{base revision} of the
++branch specified by the @var{tag} portion of the argument, i.e. the revision
++on the parent branch the @var{tag} branch split off, or, where both
++branches were the same.
++This option has not received very much testing, beware!
++
+ Specifying the @samp{-q} global option along with the
+ @samp{-r} command option is often useful, to suppress
+ the warning messages when the @sc{rcs} file
+ does not contain the specified tag.
+ 
+-@strong{Note: this is not the same as the overall @samp{cvs -r} option,
++@emph{Note: this is not the same as the overall @samp{cvs -r} option,
+ which you can specify to the left of a @sc{cvs} command!}
+ 
+ @samp{-r @var{tag}} is available with the @code{commit} and @code{history}
+@@ -8764,8 +8888,8 @@
+ @include getdate-cvs.texi
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node admin
+-@appendixsec admin---Administration
++@node admin, annotate, Date input formats, CVS commands
++@appendixsec admin---Administration front-end for RCS
+ @cindex Admin (subcommand)
+ 
+ @itemize @bullet
+@@ -8863,7 +8987,7 @@
+ a future release of @sc{cvs}.
+ 
+ @item -i
+-Useless with @sc{cvs}.  This creates and initializes a
++Useless with @sc{cvs}.  This creates and initialises a
+ new @sc{rcs} file, without depositing a revision.  With
+ @sc{cvs}, add files with the @code{cvs add} command
+ (@pxref{Adding files}).
+@@ -9129,13 +9253,16 @@
+ @end table
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node annotate
++@node annotate, checkout, admin, CVS commands
+ @appendixsec annotate---What revision modified each line of a file?
+ @cindex annotate (subcommand)
+ 
+ @itemize @bullet
+ @item
+-Synopsis: annotate [options] files@dots{}
++Synopsis:
++annotate [options] files@dots{}
++
++rannotate [options] files@dots{}
+ @item
+ Requires: repository.
+ @item
+@@ -9144,7 +9271,10 @@
+ 
+ For each file in @var{files}, print the head revision
+ of the trunk, together with information on the last
+-modification for each line.  
++modification for each line.  If backwards annotation
++is requested, show the first modification after the
++specified revision.  (Backwards annotation currently
++appears to be broken.)
+ 
+ @menu
+ * annotate options::            annotate options
+@@ -9160,6 +9290,10 @@
+ them):
+ 
+ @table @code
++@item -b
++Backwards, show when a line was removed.
++Currently appears to be broken.
++
+ @item -l
+ Local directory only, no recursion.
+ 
+@@ -9215,7 +9349,7 @@
+ @c changed this line *before* 1.4"...).
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node checkout
++@node checkout, commit, annotate, CVS commands
+ @appendixsec checkout---Check out sources for editing
+ @cindex checkout (subcommand)
+ @cindex co (subcommand)
+@@ -9449,14 +9583,13 @@
+ @end example
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node commit
++@node commit, diff, checkout, CVS commands
+ @appendixsec commit---Check files into the repository
+ @cindex commit (subcommand)
+ 
+ @itemize @bullet
+ @item
+-Synopsis: commit [-lnRf] [-m 'log_message' |
+--F file] [-r revision] [files@dots{}]
++Synopsis: commit [-lnRf] [-m 'log_message' | -F file] [-r revision] [files@dots{}]
+ @item
+ Requires: working directory, repository.
+ @item
+@@ -9501,8 +9634,11 @@
+ 
+ At @code{commit}, a unique commitid is placed in the @sc{rcs}
+ file inside the repository. All files committed at once
+-get the same commitid. The commitid can be retrieved with
+-the @code{log} and @code{status} command; see @ref{log},
++get the same commitid, a string consisting only of hexadecimal
++digits (usually 16 in GNU @sc{cvs}, 19 in Debian and MirBSD @sc{cvs}).
++FSF GNU @sc{cvs} 1.11 and OpenBSD OpenCVS do not support commitids yet.
++The commitid can be retrieved with
++the @code{log} and @code{status} command; see @ref{log} and
+ @ref{File status}.
+ 
+ @menu
+@@ -9621,7 +9757,7 @@
+ group would like to work on this software with you, but
+ without disturbing main-line development, you could
+ commit your change to a new branch.  Others can then
+-checkout your experimental stuff and utilize the full
++checkout your experimental stuff and utilise the full
+ benefit of @sc{cvs} conflict resolution.  The scenario might
+ look like:
+ 
+@@ -9662,7 +9798,7 @@
+ @end example
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node diff
++@node diff, export, commit, CVS commands
+ @appendixsec diff---Show differences between revisions
+ @cindex diff (subcommand)
+ 
+@@ -9685,7 +9821,7 @@
+ under them will be compared.
+ 
+ The exit status for diff is different than for other
+-@sc{cvs} commands; for details @ref{Exit status}.
++@sc{cvs} commands; for details @pxref{Exit status}.
+ 
+ @menu
+ * diff options::                diff options
+@@ -10295,7 +10431,7 @@
+ @end example
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node export
++@node export, history, diff, CVS commands
+ @appendixsec export---Export sources from CVS, similar to checkout
+ @cindex export (subcommand)
+ 
+@@ -10393,8 +10529,8 @@
+ @end ignore
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node history
+-@appendixsec history---Show status of files and users
++@node history, import, export, CVS commands
++@appendixsec history---Show repository access history
+ @cindex history (subcommand)
+ 
+ @itemize @bullet
+@@ -10425,7 +10561,7 @@
+ (@file{$CVSROOT/CVSROOT/history}) with read and write permissions for all
+ users (@pxref{Creating a repository}).
+ 
+-@strong{Note: @code{history} uses @samp{-f}, @samp{-l},
++@emph{Note: @code{history} uses @samp{-f}, @samp{-l},
+ @samp{-n}, and @samp{-p} in ways that conflict with the
+ normal use inside @sc{cvs} (@pxref{Common options}).}
+ 
+@@ -10587,7 +10723,7 @@
+ @end ignore
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node import
++@node import, log, history, CVS commands
+ @appendixsec import---Import sources into CVS, using vendor branches
+ @cindex import (subcommand)
+ 
+@@ -10721,9 +10857,9 @@
+ the new file is @code{dead}, resetting the new file's default branch,
+ and placing the file in the Attic (@pxref{Attic}) directory.
+ 
+-Use of this option can be forced on a repository-wide basis
+-by setting the @samp{ImportNewFilesToVendorBranchOnly} option in
+-CVSROOT/config (@pxref{config}).
++Setting the @samp{ImportNewFilesToVendorBranchOnly} option in
++CVSROOT/config (@pxref{config}) forces use of this option on
++a repository-wide basis.
+ @end table
+ 
+ @c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
+@@ -10773,13 +10909,15 @@
+ See @ref{Tracking sources}, and @ref{From files}.
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node log
+-@appendixsec log---Print out log information for files
++@node log, ls & rls, import, CVS commands
++@appendixsec log---Print out history information for files
+ @cindex log (subcommand)
+ 
+ @itemize @bullet
+ @item
+ Synopsis: log [options] [files@dots{}]
++
++rlog [options] [files@dots{}]
+ @item
+ Requires: repository, working directory.
+ @item
+@@ -10805,7 +10943,7 @@
+ the @code{$TZ} environment variable, which can be set to
+ govern how @code{log} displays dates.
+ 
+-@strong{Note: @code{log} uses @samp{-R} in a way that conflicts
++@emph{Note: @code{log} uses @samp{-R} in a way that conflicts
+ with the normal use inside @sc{cvs} (@pxref{Common options}).}
+ 
+ @menu
+@@ -10997,13 +11135,15 @@
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+ @node ls & rls
+-@appendixsec ls & rls
++@appendixsec ls & rls---List files in the repository
+ @cindex ls (subcommand)
+ @cindex rls (subcommand)
+ 
+ @itemize @bullet
+ @item
+ ls [-e | -l] [-RP] [-r tag[:date]] [-D date] [path@dots{}]
++
++rls [-e | -l] [-RP] [-r tag[:date]] [-D date] [path@dots{}]
+ @item
+ Requires: repository for @code{rls}, repository & working directory for
+ @code{ls}.
+@@ -11094,8 +11234,8 @@
+ @end example
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node rdiff
+-@appendixsec rdiff---'patch' format diffs between releases
++@node rdiff, release, ls & rls, CVS commands
++@appendixsec rdiff---Create 'patch' format diffs between revisions
+ @cindex rdiff (subcommand)
+ 
+ @itemize @bullet
+@@ -11173,6 +11313,9 @@
+ @item -c
+ Use the context diff format.  This is the default format.
+ 
++@item -p
++Show which C function each change is in.
++
+ @item -s
+ Create a summary change report instead of a patch.  The
+ summary includes information about files that were
+@@ -11230,8 +11373,8 @@
+ @end example
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node release
+-@appendixsec release---Indicate that a Module is no longer in use
++@node release, server & pserver, rdiff, CVS commands
++@appendixsec release---Indicate that a directory is no longer in use
+ @cindex release (subcommand)
+ 
+ @itemize @bullet
+@@ -11282,7 +11425,7 @@
+ succeeds.  If this flag is not given your files will
+ remain in your working directory.
+ 
+-@strong{WARNING:  The @code{release} command deletes
++@emph{WARNING:  The @code{release} command deletes
+ all directories and files recursively.  This
+ has the very serious side-effect that any directory
+ that you have created inside your checked-out sources,
+@@ -11379,14 +11522,33 @@
+ @cindex configuration file
+ @table @code
+ @item -c path
+-Load configuration from @var{path} rather than the default location 
+-@file{$CVSROOT/CVSROOT/config} (@pxref{config}).  @var{path} must be
+-@file{/etc/cvs.conf} or prefixed by @file{/etc/cvs/}.  This option is
+-supported beginning with @sc{cvs} release 1.12.13.
++Load configuration from the given @var{path} rather than from the
++default location @file{$CVSROOT/CVSROOT/config} (@pxref{config}).
++@var{path} must be @file{/etc/cvs.conf} or prefixed by @file{/etc/cvs/}.
++This option is supported beginning with @sc{cvs} release 1.12.13.
+ @end table
+ 
+ @c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+-@node update
++@node suck, update, server & pserver, CVS commands
++@appendixsec suck---Download RCS ,v file raw
++@cindex suck (subcommand)
++
++@itemize @bullet
++@item
++suck module/pa/th
++@item
++Requires: repository
++@end itemize
++
++Locates the file module/pa/th,v or module/pa/Attic/th,v and downloads
++it raw as RCS comma-v file.
++
++Output consists of the real pathname of the comma-v file, relative to
++the CVS repository, followed by a newline and the binary file content
++immediately thereafter.
++
++@c - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
++@node update, , suck, CVS commands
+ @appendixsec update---Bring work tree in sync with repository
+ @cindex update (subcommand)
+ 
+@@ -11635,6 +11797,8 @@
+ references to where each command or feature is
+ described in detail.  For other references run the
+ @code{cvs --help} command, or see @ref{Index}.
++For an alphabetical list of all @sc{cvs} commands,
++@pxref{CVS command list}).
+ 
+ A @sc{cvs} command looks like:
+ 
+@@ -11646,10 +11810,15 @@
+ 
+ @table @code
+ @item --allow-root=@var{rootdir}
+-Specify legal @sc{cvsroot} directory (server only) (not
+-in @sc{cvs} 1.9 and older).  See @ref{Password
++Specify acceptable @sc{cvsroot} directory (server only).
++Appeared in @sc{cvs} 1.10.  See @ref{Password
+ authentication server}.
+ 
++@item --allow-root-regexp=@var{rootdir}
++Specify a POSIX extended regular expression which matches acceptable
++@sc{cvsroot} directories (server only).  Appeared in @sc{cvs}
++1.12.14.  See @ref{Password authentication server}.
++
+ @item -a
+ Authenticate all communication (client only) (not in @sc{cvs}
+ 1.9 and older).  See @ref{Global options}.
+@@ -11669,6 +11838,10 @@
+ Do not read the @file{~/.cvsrc} file.  See @ref{Global
+ options}.
+ 
++@item -g
++Set the umask to allow group writable permissions in
++the working copy.  See @ref{Global options}.
++
+ @item -H
+ @itemx --help
+ Print a help message.  See @ref{Global options}.
+@@ -11730,6 +11903,7 @@
+ @example
+ $@splitrcskeyword{Author}: joe $
+ $@splitrcskeyword{Date}: 1993/12/09 03:21:13 $
++$@splitrcskeyword{Mdocdate}: December 9 1993 $
+ $@splitrcskeyword{CVSHeader}: files/file1,v 1.1 1993/12/09 03:21:13 joe Exp harry $
+ $@splitrcskeyword{Header}: /home/files/file1,v 1.1 1993/12/09 03:21:13 joe Exp harry $
+ $@splitrcskeyword{Id}: file1,v 1.1 1993/12/09 03:21:13 joe Exp harry $
+@@ -11756,6 +11930,7 @@
+ 
+ @table @code
+ @c ------------------------------------------------------------
++@anchor{add}
+ @item add [@var{options}] [@var{files}@dots{}]
+ Add a new file/directory.  See @ref{Adding files}.
+ 
+@@ -11877,7 +12052,8 @@
+ @item -j @var{tag}[:@var{date}]
+ Merge in the change specified by @var{tag}, or when @var{date} is specified
+ and @var{tag} is a branch tag, the version from the branch @var{tag} as it
+-existed on @var{date}.  See @ref{checkout options}.
++existed on @var{date}.  See @ref{checkout options}.  Also,
++see @ref{Common options}.
+ 
+ @item -k @var{kflag}
+ Use @var{kflag} keyword expansion.  See
+@@ -11907,7 +12083,7 @@
+ @item -r @var{tag}[:@var{date}]
+ Checkout the revision already tagged with @var{tag} or, when @var{date} is
+ specified and @var{tag} is a branch tag, the version from the branch @var{tag}
+-as it existed on @var{date}.  This .  See @ref{Common options}.
++as it existed on @var{date}.  See @ref{Common options}.
+ 
+ @item -s
+ Like -c, but include module status.  See @ref{checkout options}.
+@@ -11992,6 +12168,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{edit}
+ @item edit [@var{options}] [@var{files}@dots{}]
+ Get ready to edit a watched file.  See @ref{Editing files}.
+ 
+@@ -12003,7 +12180,7 @@
+ @ref{Editing files}.
+ 
+ @item -c
+-Check edits: Edit fails if someone else is already editting the file.
++Check edits: Edit fails if someone else is already editing the file.
+ Requires a @sc{cvs} client and server both of version 1.12.10 or greater.
+ 
+ @item -f
+@@ -12018,6 +12195,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{editors}
+ @item editors [@var{options}] [@var{files}@dots{}]
+ See who is editing a watched file.  See @ref{Watch information}.
+ 
+@@ -12163,14 +12341,17 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{init}
+ @item init
+ Create a @sc{cvs} repository if it doesn't exist.  See
+ @ref{Creating a repository}.
+ 
+ @c ------------------------------------------------------------
++@anchor{kserver}
+ @item kserver
+ Kerberos authenticated server.
+-See @ref{Kerberos authenticated}.
++@xref{server & pserver}.
++@xref{Kerberos authenticated}.
+ 
+ @c ------------------------------------------------------------
+ @item log [@var{options}] [@var{files}@dots{}]
+@@ -12211,21 +12392,55 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{login}
+ @item login
+ Prompt for password for authenticating server.  See
+ @ref{Password authentication client}.
+ 
+ @c ------------------------------------------------------------
++@anchor{logout}
+ @item logout
+ Remove stored password for authenticating server.  See
+ @ref{Password authentication client}.
+ 
+ @c ------------------------------------------------------------
++@anchor{ls}
++@item ls [@var{options}] [@var{path}@dots{}]
++List files available from CVS. See @ref{ls & rls}.
++
++@table @code
++@item -d
++Show dead revisions (with tag when specified).
++See @ref{ls & rls options}.
++
++@item -e
++Display in CVS/Entries format.
++
++@item -l
++Display all details.
++
++@item -P
++Prune empty directories.  See @ref{Moving directories}.
++
++@item -R
++List recursively. @xref{Recursive behavior}.
++
++@item -D @var{date}
++Show files from date.  See @ref{Common options}.
++
++@item -r @var{rev}
++Show files with revision or tag.
++@end table
++
++@c ------------------------------------------------------------
++@anchor{pserver}
+ @item pserver
+ Password authenticated server.
+-See @ref{Password authentication server}.
++@xref{server & pserver}.
++@xref{Password authentication server}.
+ 
+ @c ------------------------------------------------------------
++@anchor{rannotate}
+ @item rannotate [@var{options}] [@var{modules}@dots{}]
+ Show last revision where each line was modified.  See
+ @ref{annotate}.
+@@ -12298,7 +12513,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
+-@item release [@var{options}] @var{directory}
++@item release [@var{options}] @var{directories}@dots{}
+ Indicate that a directory is no longer in use.  See
+ @ref{release}.
+ 
+@@ -12308,6 +12523,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{remove}
+ @item remove [@var{options}] [@var{files}@dots{}]
+ Remove an entry from the repository.  See @ref{Removing files}.
+ 
+@@ -12324,6 +12540,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{rlog}
+ @item rlog [@var{options}] [@var{files}@dots{}]
+ Print out history information for modules.  See @ref{log}.
+ 
+@@ -12361,9 +12578,40 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{rls}
++@item rls [@var{options}] [@var{path}@dots{}]
++List files in a module. See @ref{ls & rls}.
++
++@table @code
++@item -d
++Show dead revisions (with tag when specified).
++See @ref{ls & rls options}.
++
++@item -e
++Display in CVS/Entries format.
++
++@item -l
++Display all details.
++
++@item -P
++Prune empty directories.  See @ref{Moving directories}.
++
++@item -R
++List recursively. @xref{Recursive behavior}.
++
++@item -D @var{date}
++Show files from date.  See @ref{Common options}.
++
++@item -r @var{rev}
++Show files with revision or tag.
++@end table
++
++@c ------------------------------------------------------------
++@anchor{rtag}
+ @item rtag [@var{options}] @var{tag} @var{modules}@dots{}
+ Add a symbolic tag to a module.
+-See @ref{Revisions} and @ref{Branching and merging}.
++@xref{Tagging by date/tag}.
++@xref{Creating a branch}.
+ 
+ @table @code
+ @item -a
+@@ -12407,10 +12655,18 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{server}
+ @item server
+-Rsh server.  See @ref{Connecting via rsh}.
++SSH/rsh server.
++@xref{server & pserver}.
++@xref{Connecting via rsh}.
+ 
+ @c ------------------------------------------------------------
++@item suck @var{module/filename}
++Download RCS ,v file raw.  See @ref{suck}.
++
++@c ------------------------------------------------------------
++@anchor{status}
+ @item status [@var{options}] @var{files}@dots{}
+ Display status information in a working directory.  See
+ @ref{File status}.
+@@ -12427,9 +12683,11 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{tag}
+ @item tag [@var{options}] @var{tag} [@var{files}@dots{}]
+ Add a symbolic tag to checked out version of files.
+-See @ref{Revisions} and @ref{Branching and merging}.
++@xref{Tagging the working directory}.
++@xref{Creating a branch}.
+ 
+ @table @code
+ @item -b
+@@ -12465,6 +12723,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{unedit}
+ @item unedit [@var{options}] [@var{files}@dots{}]
+ Undo an edit command.  See @ref{Editing files}.
+ 
+@@ -12541,6 +12800,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{version}
+ @item version
+ @cindex version (subcommand)
+ 
+@@ -12548,6 +12808,7 @@
+ is remote, display both the client and server versions.
+ 
+ @c ------------------------------------------------------------
++@anchor{watch}
+ @item watch [on|off|add|remove] [@var{options}] [@var{files}@dots{}]
+ 
+ on/off: turn on/off read-only checkouts of files.  See
+@@ -12572,6 +12833,7 @@
+ @end table
+ 
+ @c ------------------------------------------------------------
++@anchor{watchers}
+ @item watchers [@var{options}] [@var{files}@dots{}]
+ See who is watching a file.  See @ref{Watch information}.
+ 
+@@ -12711,7 +12973,7 @@
+ @item @var{mname} [ options ] @var{dir} [ @var{files}@dots{} ]
+ In the simplest case, this form of module definition
+ reduces to @samp{@var{mname} @var{dir}}.  This defines
+-all the files in directory @var{dir} as module mname.
++all the files in directory @var{dir} as module @var{mname}.
+ @var{dir} is a relative path (from @code{$CVSROOT}) to a
+ directory of source in the source repository.  In this
+ case, on checkout, a single directory called
+@@ -12934,7 +13196,7 @@
+ @sc{cvs} will execute this program on the server from a temporary
+ directory. The path is searched for this program.
+ 
+-If using ``local access'' (on a local or remote NFS file system, i.e.
++If using ``local access'' (on a local or remote NFS filesystem, i.e.
+ repository set just to a path),
+ the program will be executed from the newly checked-out tree, if
+ found there, or alternatively searched for in the path if not.
+@@ -12975,7 +13237,7 @@
+ mechanisms outside @sc{cvs}, to insert any necessary
+ changes.
+ 
+-@strong{WARNING: do not use @code{COPY} with
++@emph{WARNING: do not use @code{COPY} with
+ @sc{cvs} 1.9 or earlier - such versions of @sc{cvs} will
+ copy one version of your file over the other, wiping
+ out the previous contents.}
+@@ -13292,7 +13554,7 @@
+ @file{module}:
+ 
+ @example
+-^module\(/\|$\) (echo; echo %p; echo %@{sVv@}; cat) >>$CVSROOT/CVSROOT/commitlog
++^module\(/\|$\) (echo; echo %p: %@{sVv@}; cat) >>$CVSROOT/CVSROOT/commitlog
+ @end example
+ 
+ Using this same line and assuming a commit of new revisions
+@@ -13353,7 +13615,7 @@
+ 
+ There are three kinds of programs that can be run on
+ commit.  They are specified in files in the repository,
+-as described below.  The following table summarizes the
++as described below.  The following table summarises the
+ file names and the purpose of the corresponding
+ programs.
+ 
+@@ -13466,10 +13728,10 @@
+ your @file{loginfo} command line templates, you will most likely have to
+ rewrite any scripts called by the hook to handle the new argument format.
+ 
+-Also note that the way @samp{%} followed by unrecognized characters and by
++Also note that the way @samp{%} followed by unrecognised characters and by
+ @samp{@{@}} was treated in past versions of CVS is not strictly adhered to as
+ there were bugs in the old versions.  Specifically, @samp{%@{@}} would eat the
+-next character and unrecognized strings resolved only to the empty string,
++next character and unrecognised strings resolved only to the empty string,
+ which was counter to what was stated in the documentation.  This version will
+ do what the documentation said it should have (if you were using only some
+ combination of @samp{%@{sVv@}}, e.g. @samp{%@{sVv@}}, @samp{%@{sV@}}, or
+@@ -13749,7 +14011,7 @@
+ 
+ The @file{loginfo} file is used to control where log information is sent after
+ versioned changes are made to repository archive files and after directories
+-are added ot the repository.  @ref{posttag} for how to log tagging
++are added to the repository.  @ref{posttag} for how to log tagging
+ information and @ref{postadmin} for how to log changes due to the @code{admin}
+ command.
+ 
+@@ -13779,14 +14041,11 @@
+ @file{loginfo} supports:
+ 
+ @table @t
+-@item @{stVv@}
++@item @{sVv@}
+ File attributes, where:
+ @table @t
+ @item s
+ file name
+-@item T
+-tag name of destination, or the empty string when there is no associated
+-tag name (this usually means the trunk)
+ @item V
+ old version number (pre-checkin)
+ @item v
+@@ -13795,7 +14054,7 @@
+ @end table
+ 
+ For example, some valid format strings are @samp{%%},
+-@samp{%s}, @samp{%@{s@}}, and @samp{%@{stVv@}}.
++@samp{%s}, @samp{%@{s@}}, and @samp{%@{sVv@}}.
+ 
+ @cindex loginfo (admin file), updating legacy repositories
+ @cindex compatibility notes, loginfo admin file
+@@ -13843,9 +14102,9 @@
+ @c directory, it is kind of awkward if
+ @c only the first matching line is used.
+ @example
+-ALL                     /usr/local/bin/cvs-log $CVSROOT/CVSROOT/commitlog $USER
+-^CVSROOT\(/\|$\)        /usr/local/bin/cvs-log /usr/adm/cvsroot-log $USER
+-^prog1\(/\|$\)          Mail -s "%p %s" ceder
++ALL               /usr/local/bin/cvs-log $CVSROOT/CVSROOT/commitlog $USER
++^CVSROOT\(/\|$\)  /usr/local/bin/cvs-log /usr/adm/cvsroot-log $USER
++^prog1\(/\|$\)    Mail -s "%p %s" ceder
+ @end example
+ 
+ The shell-script @file{/usr/local/bin/cvs-log} looks
+@@ -14210,7 +14469,7 @@
+ 
+ @itemize @bullet
+ @item
+-The list is initialized to include certain file name
++The list is initialised to include certain file name
+ patterns: names associated with @sc{cvs}
+ administration, or with other common source control
+ systems; common names for patch files, object files,
+@@ -14378,7 +14637,7 @@
+ the server machine, and don't get any reasonable
+ expansion if pserver (@pxref{Password authenticated})
+ is in use; therefore user variables (see below) may be
+-a better choice to customize behavior based on the user
++a better choice to customise behavior based on the user
+ running @sc{cvs}.
+ @c Based on these limitations, should we deprecate ~?
+ @c What is it good for?  Are people using it?
+@@ -14442,6 +14701,7 @@
+ random string of printable characters of at least 16
+ characters length. Users should assume that it may
+ someday grow to at most 256 characters in length.
++Currently, Debian and MirBSD @sc{cvs} uses 19 characters.
+ @end table
+ 
+ If you want to pass a value to the administrative files
+@@ -14613,7 +14873,7 @@
+ @cindex KeywordExpand, in CVSROOT/config
+ @item KeywordExpand=@var{value}
+ Specify @samp{i} followed by a list of keywords to be expanded
+-(for example, @samp{KeywordExpand=iMYCVS,Name,Date}),
++(for example, @samp{KeywordExpand=iMYCVS,Name,Date,Mdocdate}),
+ or @samp{e} followed by a list of keywords not to be expanded
+ (for example, @samp{KeywordExpand=eCVSHeader}).
+ For more on keyword expansion, see @ref{Configuring keyword expansion}.
+@@ -14621,8 +14881,8 @@
+ @cindex LocalKeyword, in CVSROOT/config
+ @item LocalKeyword=@var{value}
+ Specify a local alias for a standard keyword.
+-For example, @samp{LocalKeyword=MYCVS=CVSHeader}.
+-For more on local keywords, see @ref{Keyword substitution}.
++See @ref{Keyword substitution} for more information in local keywords.
++Example: @samp{LocalKeyword=MYCVS=CVSHeader}
+ 
+ @cindex LockDir, in CVSROOT/config
+ @item LockDir=@var{directory}
+@@ -14632,7 +14892,7 @@
+ write access only to @var{directory}, not to the
+ repository.
+ It can also be used to put the locks on a very fast
+-in-memory file system to speed up locking and unlocking
++in-memory filesystem to speed up locking and unlocking
+ the repository.
+ You need to create @var{directory}, but
+ @sc{cvs} will create subdirectories of @var{directory} as it
+@@ -14657,7 +14917,9 @@
+ Default of @samp{TOEFWUPCGMAR} (or simply @samp{all}) will log
+ all transactions.  Any subset of the default is
+ legal.  (For example, to only log transactions that modify the
+-@file{*,v} files, use @samp{LogHistory=TMAR}.)  To disable history logging
++@file{*,v} files, use @samp{LogHistory=TMAR} which is nowadays
++set by @code{cvs init} by default.)
++To disable history logging
+ completely, use @samp{LogHistory=}.
+ 
+ @cindex MaxCommentLeaderLength, in CVSROOT/config
+@@ -14743,11 +15005,11 @@
+ the log message should always be reread; @samp{no}
+ or @samp{never}, indicating that it should never be
+ reread; or @var{value} may be @samp{stat}, indicating
+-that the file should be checked with the file system
++that the file should be checked with the filesystem
+ @samp{stat()} function to see if it has changed (see warning below)
+ before rereading.  The default value is @samp{always}.
+ 
+-@strong{Note: the `stat' mode can cause CVS to pause for up to
++@emph{Note: the `stat' mode can cause CVS to pause for up to
+ one extra second per directory committed.  This can be less IO and
+ CPU intensive but is not recommended for use with large repositories}
+ 
+@@ -14879,11 +15141,12 @@
+ check out from a read-only repository, such as within
+ an anoncvs server, or from a @sc{cd-rom} repository.
+ 
+-It has the same effect as if the @samp{-R} command-line
++Setting this has the same effect as if the @samp{-R} command-line
+ option is used. This can also allow the use of
+ read-only NFS repositories.
+ 
+ @item $CVSUMASK
++@anchor{CVSUMASK}
+ Controls permissions of files in the repository.  See
+ @ref{File permissions}.
+ 
+@@ -14977,11 +15240,24 @@
+ 
+ @cindex CVS_CLIENT_LOG, environment variable
+ @item $CVS_CLIENT_LOG
+-Used for debugging only in client-server
+-mode.  If set, everything sent to the server is logged
+-into @file{@code{$CVS_CLIENT_LOG}.in} and everything
+-sent from the server is logged into
+-@file{@code{$CVS_CLIENT_LOG}.out}.
++Used for debugging only in client-server mode.
++If set and not empty, everything sent to the server is logged
++into @file{@code{$CVS_CLIENT_LOG}.in}, and everything received
++from the server is logged into @file{@code{$CVS_CLIENT_LOG}.out}.
++
++@cindex CVS_SECONDARY_LOG, environment variable
++@item $CVS_SECONDARY_LOG
++Used for debugging only in secondary write proxy mode.
++If set and not empty, everything sent to the primary server is logged
++into @file{@code{$CVS_SECONDARY_LOG}.in}, and everything received
++from the primary server is logged into @file{@code{$CVS_SECONDARY_LOG}.out}.
++
++@cindex CVS_SERVER_LOG, environment variable
++@item $CVS_SERVER_LOG
++Used for debugging only in client-server mode.
++If set and not empty, everything sent to the client is logged
++into @file{@code{$CVS_SERVER_LOG}.in}, and everything received
++from the client is logged into @file{@code{$CVS_SERVER_LOG}.out}.
+ 
+ @cindex CVS_SERVER_SLEEP, environment variable
+ @item $CVS_SERVER_SLEEP
+@@ -15047,7 +15323,7 @@
+ @c If you "cvs rm" and commit using 1.3, then you'll
+ @c want to run "rcs -sdead <file,v>" on each of the
+ @c files in the Attic if you then want 1.5 and
+-@c later to recognize those files as dead (I think the
++@c later to recognise those files as dead (I think the
+ @c symptom if this is not done is that files reappear
+ @c in joins).  (Wait: the above will work but really to
+ @c be strictly correct we should suggest checking
+@@ -15172,6 +15448,7 @@
+ specific reason for denying authorization.  Check that
+ the username and password specified are correct and
+ that the @code{CVSROOT} specified is allowed by @samp{--allow-root}
++or @samp{--allow-root-regexp}
+ in @file{inetd.conf}.  See @ref{Password authenticated}.
+ 
+ @item cvs @var{command}: conflict: removed @var{file} was modified by second party
+@@ -15614,21 +15891,21 @@
+ access method you are using.
+ 
+ @table @code
+-@cindex :ext:, troubleshooting
++@cindex ext method, troubleshooting
+ @item :ext:
+ Try running the rsh program from the command line.  For
+ example: "rsh servername cvs -v" should print @sc{cvs}
+ version information.  If this doesn't work, you need to
+ fix it before you can worry about @sc{cvs} problems.
+ 
+-@cindex :server:, troubleshooting
++@cindex server method, troubleshooting
+ @item :server:
+ You don't need a command line rsh program to use this
+ access method, but if you have an rsh program around,
+ it may be useful as a debugging tool.  Follow the
+ directions given for :ext:.
+ 
+-@cindex :pserver:, troubleshooting
++@cindex pserver method, troubleshooting
+ @item :pserver:
+ Errors along the lines of "connection refused" typically indicate
+ that inetd isn't even listening for connections on port 2401
+@@ -15806,6 +16083,16 @@
+ the file @file{doc/ChangeLog} in the @sc{cvs} source
+ distribution.
+ 
++MirBSD is the de-facto (if not de-iure yet) new upstream of
++@sc{gnu} @sc{cvs} since 2012 or so; this version is provided
++in Debian as well. Responsible is:
++
++@display
++mirabilos <@t{m@@mirbsd.org}>
++@end display
++
++CVS Homepage: @url{http://www.nongnu.org/cvs/}
++
+ @c ---------------------------------------------------------------------
+ @node BUGS
+ @appendix Dealing with bugs in CVS or this manual
+@@ -15887,7 +16174,7 @@
+ relevant information.  The way to report bugs is to
+ send email to @email{bug-cvs@@nongnu.org}.  Note
+ that submissions to @email{bug-cvs@@nongnu.org} may be distributed
+-under the terms of the @sc{gnu} Public License, so if
++under the terms of the @sc{gnu} General Public License, so if
+ you don't like this, don't submit them.  There is
+ usually no justification for sending mail directly to
+ one of the @sc{cvs} maintainers rather than to
+@@ -15910,6 +16197,49 @@
+ comprehensive, detailed list of known bugs.
+ 
+ @c ---------------------------------------------------------------------
++@node CVS command list
++@appendix Alphabetical list of all CVS commands
++
++@xref{Cederqvist, the introduction into the manual, CVS manual Table of Contents}.
++
++@menu
++* add::          Add a new file/directory to the repository
++* admin::        Administration front-end for RCS
++* annotate::     Show last revision where each line was modified
++* checkout::     Checkout sources for editing
++* commit::       Check files into the repository
++* diff::         Show differences between revisions
++* edit::         Get ready to edit a watched file
++* editors::      See who is editing a watched file
++* export::       Export sources from CVS, similar to checkout
++* history::      Show repository access history
++* import::       Import sources into CVS, using vendor branches
++* init::         Create a CVS repository
++* kserver::      Act in Kerberos server mode
++* log::          Print out history information for files
++* login::        Prompt for password for authenticating server
++* logout::       Removes entry in .cvspass for remote repository
++* ls::           List files available from CVS
++* pserver::      Act in password server mode
++* rannotate::    Show last revision where each line of module was modified
++* rdiff::        Create 'patch' format diffs between revisions
++* release::      Indicate that a work subdirectory is no longer in use
++* remove::       Remove an entry from the repository
++* rlog::         Print out history information for a module
++* rls::          List files in a module
++* rtag::         Add a symbolic tag to a module
++* server::       Act in server mode
++* suck::         Download RCS ,v file raw
++* status::       Display status information on checked out files
++* tag::          Add a symbolic tag to checked out version of files
++* unedit::       Undo an edit command
++* update::       Bring work tree in sync with repository
++* version::      Show current CVS version(s)
++* watch::        Set watches
++* watchers::     See who is watching a file
++@end menu
++
++@c ---------------------------------------------------------------------
+ @node Index
+ @unnumbered Index
+ @cindex Index
+--- cvs-1.12.13+real.orig/doc/cvsclient.texi
++++ cvs-1.12.13+real/doc/cvsclient.texi
+@@ -1,6 +1,18 @@
+ \input texinfo @c -*- texinfo -*-
+ 
+ @setfilename cvsclient.info
++@set MBSDPATCHLEVEL -MirOS-0AB9.1
++@tex
++ % set PA4 paper size (can print on both DIN ISO A4 and US Letter)
++ \globaldefs = 1%
++ \afourpaper%
++ \internalpagesizes{46\baselineskip}{160mm}%
++  {\voffset}{\hoffset}%
++  {\bindingoffset}{36pt}%
++  {28truecm}{21truecm}%
++ \globaldefs = 0%
++@end tex
++@comment $MirOS: src/gnu/usr.bin/cvs/doc/cvsclient.texi,v 1.14 2021/01/30 05:14:20 tg Exp $
+ @include version-client.texi
+ 
+ @dircategory Programming
+@@ -8,14 +20,26 @@
+ * cvsclient: (cvsclient).      The CVS client/server protocol.
+ @end direntry
+ 
++@iftex
++@titlepage
++@sp 2
++@center @titlefont{CVS}
++@sp 1
++@center @titlefont{Client/Server}
++@sp 1
++@center @titlefont{protocol}
++@sp 3
++@end iftex
++@ifnottex
+ @node Top
+ @top CVS Client/Server
++@end ifnottex
+ 
+ This document describes the client/server protocol used by CVS.  It does
+-not describe how to use or administer client/server CVS; see the regular
+-CVS manual for that.  This is version @value{VERSION} of the protocol
+-specification---@xref{Introduction}, for more on what this version number
+-means.
++not describe how to use or administer client/server CVS; for that,
++@pxref{Top, the regular CVS manual,, cvs, the regular CVS manual}.
++This specification applies to
++@sc{cvs} version @value{VERSION}@value{MBSDPATCHLEVEL} and up.
+ 
+ @menu
+ * Introduction::      What is CVS and what is the client/server protocol for?
+@@ -25,6 +49,9 @@
+ * Protocol::          Complete description of the protocol
+ * Protocol Notes::    Possible enhancements, limitations, etc. of the protocol
+ @end menu
++@iftex
++@end titlepage
++@end iftex
+ 
+ @node Introduction
+ @chapter Introduction
+@@ -53,7 +80,7 @@
+ user documentation, @file{cvs.texinfo}, for that information.  The
+ protocol is non-proprietary (anyone who wants to is encouraged to
+ implement it) and an implementation, known as CVS, is available under
+-the GNU Public License.  The CVS distribution, containing this
++the GNU General Public License.  The CVS distribution, containing this
+ implementation, @file{cvs.texinfo}, and a copy (possibly more or less up
+ to date than what you are reading now) of this document,
+ @file{cvsclient.texi}, can be found at the usual GNU FTP sites, with a
+@@ -149,7 +176,7 @@
+ the client proceeds to start the cvs protocol.
+ 
+ @item kserver
+-The kerberized server listens on a port (in the current implementation,
++The kerberised server listens on a port (in the current implementation,
+ by having inetd call "cvs kserver") which defaults to 1999.  The client
+ connects, sends the usual kerberos authentication information, and then
+ starts the cvs protocol.  Note: port 1999 is officially registered for
+@@ -217,7 +244,7 @@
+ close the connection.  The @var{code} is a code describing why it
+ failed, intended for computer consumption.  The only code currently
+ defined is @samp{0} which is nonspecific, but clients must silently
+-treat any unrecognized codes as nonspecific.
++treat any unrecognised codes as nonspecific.
+ The @var{text} should be supplied to the
+ user.  Compatibility note: @sc{cvs} 1.9.10 and older clients will print
+ @code{unrecognized auth response} and @var{text}, and then exit, upon
+@@ -393,13 +420,13 @@
+ @var{mode-type} is an identifier composed of alphanumeric characters.
+ Currently specified: @samp{u} for user, @samp{g} for group, @samp{o}
+ for other (see below for discussion of whether these have their POSIX
+-meaning or are more loose).  Unrecognized values of @var{mode-type}
++meaning or are more loose).  Unrecognised values of @var{mode-type}
+ are silently ignored.
+ 
+ @var{data} consists of any data not containing @samp{,}, @samp{\0} or
+ @samp{\n}.  For @samp{u}, @samp{g}, and @samp{o} mode types, data
+ consists of alphanumeric characters, where @samp{r} means read, @samp{w}
+-means write, @samp{x} means execute, and unrecognized letters are
++means write, @samp{x} means execute, and unrecognised letters are
+ silently ignored.
+ 
+ The two most obvious ways in which the mode matters are: (1) is it
+@@ -471,12 +498,13 @@
+ In various contexts, for example the @code{Argument} request and the
+ @code{M} response, one transmits what is essentially an arbitrary
+ string.  Often this will have been supplied by the user (for example,
+-the @samp{-m} option to the @code{ci} request).  The protocol has no
+-mechanism to specify the character set of such strings; it would be
+-fairly safe to stick to the invariant ISO 646 character set but the
+-existing practice is probably to just transmit whatever the user
+-specifies, and hope that everyone involved agrees which character set is
+-in use, or sticks to a common subset.
++the @samp{-m} option to the @code{ci} request will show up in the
++@code{LOGM} response).  The protocol has no mechanism to specify the
++character set of such strings; it would have been, initially, fairly
++safe to stick to the invariant ISO 646 character set but the existing
++practice is probably to just transmit whatever the user specifies,
++and hope that everyone involved agrees which character set is in use,
++or sticks to a common subset. In modern times, UTF-8 should be used.
+ 
+ @node Dates
+ @section Dates
+@@ -513,7 +541,7 @@
+ 
+ By convention, requests which begin with a capital letter do not elicit
+ a response from the server, while all others do -- save one.  The
+-exception is @samp{gzip-file-contents}.  Unrecognized requests will
++exception is @samp{gzip-file-contents}.  Unrecognised requests will
+ always elicit a response from the server, even if that request begins
+ with a capital letter.
+ 
+@@ -568,7 +596,7 @@
+ Response expected: no.
+ Notify a primary server of a server which referred us.  Intended to allow
+ a primary (write) server to update the read-only mirror a client is using
+-for reads to minimize races on any subsequent updates from the client.
++for reads to minimise races on any subsequent updates from the client.
+ 
+ @item Directory @var{local-directory} \n
+ @itemx Relative-directory @var{local-directory} \n
+@@ -828,7 +856,7 @@
+ @end example
+ 
+ There is no requirement that the client and server clocks be
+-synchronized.  The client just sends its recommendation for a timestamp
++synchronised.  The client just sends its recommendation for a timestamp
+ (based on file timestamps or whatever), and the server should just believe
+ it (this means that the time might be in the future, for example).
+ 
+@@ -1227,6 +1255,13 @@
+ directory and @emph{not} a fully qualified @code{CVSROOT} variable.
+ The @code{Root} request need not have been previously sent.
+ 
++@item suck \n
++Response expected: yes.
++Actually do a @code{cvs suck} command.
++This uses a previous @code{Argument} request (only one, because the
++@code{cvs suck} CLI command takes only one).
++This is an extension specific to MirBSD, MirPorts and Debian.
++
+ @item update \n
+ Response expected: yes.  Actually do a @code{cvs update} command.  This
+ uses any previous @code{Argument}, @code{Directory}, @code{Entry},
+@@ -1268,7 +1303,7 @@
+ C: Directory .
+ C: 1dir
+ C: add
+-S: M Directory /u/cvsroot/1dir/nsdir added to the repository
++S: M Directory /u/cvsroot/1dir/nsdir put under version control
+ S: ok
+ @end example
+ 
+@@ -1414,7 +1449,7 @@
+ 
+ @item @var{other-request} @var{text} \n
+ Response expected: yes.
+-Any unrecognized request expects a response, and does not
++Any unrecognised request expects a response, and does not
+ contain any additional data.  The response will normally be something like
+ @samp{error  unrecognized request}, but it could be a different error if
+ a previous request which doesn't expect a response produced an error.
+@@ -1640,7 +1675,7 @@
+ @end example
+ 
+ There is no requirement that the client and server clocks be
+-synchronized.  The server just sends its recommendation for a timestamp
++synchronised.  The server just sends its recommendation for a timestamp
+ (based on its own clock, presumably), and the client should just believe
+ it (this means that the time might be in the future, for example).
+ 
+@@ -1757,15 +1792,22 @@
+ exact text which is output is subject to vary at the discretion of the
+ server and the example output given in this document is just that,
+ example output.  Servers are encouraged to use the @samp{MT} response,
+-and future versions of this document will hopefully standardize more of
++and future versions of this document will hopefully standardise more of
+ the @samp{MT} tags; see @ref{Text tags}.
+ 
++@item LOGM @var{text} \n
++Exactly the same as @code{M} but only sent if the client indicates
++supporting it via @code{Valid-responses}, used exclusively for log
++message payload (that is, in @code{cvs log} and @code{cvs rlog},
++the text body the user originally has entered with the @samp{-m}
++option to the @code{ci} request).
++
+ @item Mbinary \n
+ Additional data: file transmission (note: compressed file transmissions
+-are not supported).  This is like @samp{M}, except the contents of the
++are not supported).  This is like @code{M}, except the contents of the
+ file transmission are binary and should be copied to standard output
+ without translation to local text file conventions.  To transmit a text
+-file to standard output, servers should use a series of @samp{M} requests.
++file to standard output, servers should use a series of @code{M} requests.
+ 
+ @item E @var{text} \n
+ Same as @code{M} but send to stderr not stdout.
+@@ -1789,12 +1831,12 @@
+ 
+ The @var{tagname} can have several forms.  If it starts with @samp{a}
+ to @samp{z} or @samp{A} to @samp{Z}, then it represents tagged text.
+-If the implementation recognizes @var{tagname}, then it may interpret
++If the implementation recognises @var{tagname}, then it may interpret
+ @var{data} in some particular fashion.  If the implementation does not
+-recognize @var{tagname}, then it should simply treat @var{data} as
+-text to be sent to the user (similar to an @samp{M} response).  There
++recognise @var{tagname}, then it should simply treat @var{data} as
++text to be sent to the user (similar to an @code{M} response).  There
+ are two tags which are general purpose.  The @samp{text} tag is
+-similar to an unrecognized tag in that it provides text which will
++similar to an unrecognised tag in that it provides text which will
+ ordinarily be sent to the user.  The @samp{newline} tag is used
+ without @var{data} and indicates that a newline will ordinarily be
+ sent to the user (there is no provision for embedding newlines in the
+@@ -2133,13 +2175,13 @@
+ The protocol uses an extra network turnaround for protocol negotiation
+ (@code{valid-requests}).  It might be nice to avoid this by having the
+ client be able to send requests and tell the server to ignore them if
+-they are unrecognized (different requests could produce a fatal error if
+-unrecognized).  To do this there should be a standard syntax for
++they are unrecognised (different requests could produce a fatal error if
++unrecognised).  To do this there should be a standard syntax for
+ requests.  For example, perhaps all future requests should be a single
+ line, with mechanisms analogous to @code{Argumentx}, or several requests
+ working together, to provide greater amounts of information.  Or there
+ might be a standard mechanism for counted data (analogous to that used
+-by @code{Modified}) or continuation lines (like a generalized
++by @code{Modified}) or continuation lines (like a generalised
+ @code{Argumentx}).  It would be useful to compare what HTTP is planning
+ in this area; last I looked they were contemplating something called
+ Protocol Extension Protocol but I haven't looked at the relevant IETF
+--- cvs-1.12.13+real.orig/doc/getdate.texi
++++ cvs-1.12.13+real/doc/getdate.texi
+@@ -1,14 +1,22 @@
+ @c GNU date syntax documentation
++@c $MirOS: src/gnu/usr.bin/cvs/doc/getdate.texi,v 1.9 2021/01/30 02:06:00 tg Exp $
+ 
+ @c Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+ @c 2003, 2004, 2005 Free Software Foundation, Inc.
+ 
+-@c Permission is granted to copy, distribute and/or modify this document
+-@c under the terms of the GNU Free Documentation License, Version 1.1 or
+-@c any later version published by the Free Software Foundation; with no
+-@c Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+-@c Texts.  A copy of the license is included in the ``GNU Free
+-@c Documentation License'' file as part of this distribution.
++@c Copyright (c) 2007, 2010 mirabilos <m@mirbsd.org>
++
++@comment This file is part of the CVS distribution.
++
++@comment CVS is free software; you can redistribute it and/or modify
++@comment it under the terms of the GNU General Public License as published by
++@comment the Free Software Foundation; either version 2, or (at your option)
++@comment any later version.
++
++@comment CVS is distributed in the hope that it will be useful,
++@comment but WITHOUT ANY WARRANTY; without even the implied warranty of
++@comment MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++@comment GNU General Public License for more details.
+ 
+ @node Date input formats
+ @chapter Date input formats
+@@ -55,8 +63,7 @@
+ * Day of week items::              Monday and others.
+ * Relative items in date strings:: next tuesday, 2 years ago.
+ * Pure numbers in date strings::   19931219, 1440.
+-* Seconds since the Epoch::        @@1078100502.
+-* Specifying time zone rules::     TZ="America/New_York", TZ="UTC0".
++* Seconds since the Epoch::        @@1101064456
+ * Authors of get_date::            Bellovin, Eggert, Salz, Berets, et al.
+ @end menu
+ 
+@@ -113,8 +120,7 @@
+ 
+ @cindex language, in dates
+ @cindex time zone item
+-The output of the @command{date} command
+-is not always acceptable as a date string,
++The output of @command{date} is not always acceptable as a date string,
+ not only because of the language problem, but also because there is no
+ standard meaning for time zone items like @samp{IST}.  When using
+ @command{date} to generate a date string intended to be parsed later,
+@@ -124,15 +130,21 @@
+ 
+ @example
+ $ LC_ALL=C TZ=UTC0 date
+-Mon Mar  1 00:21:42 UTC 2004
+-$ TZ=UTC0 date +'%Y-%m-%d %H:%M:%SZ'
+-2004-03-01 00:21:42Z
++Fri Dec 15 19:48:05 UTC 2000
++$ TZ=UTC0 date +"%Y-%m-%d %H:%M:%SZ"
++2000-12-15 19:48:05Z
++$ date --iso-8601=seconds  # a GNU extension
++2000-12-15T11:48:05-0800
++$ date --iso-8601=ns  # a GNU extension
++2004-02-29T16:21:42,692722128-0800
+ $ date --iso-8601=ns | tr T ' '  # --iso-8601 is a GNU extension.
+ 2004-02-29 16:21:42,692722128-0800
+ $ date --rfc-2822  # a GNU extension
+-Sun, 29 Feb 2004 16:21:42 -0800
+-$ date +'%Y-%m-%d %H:%M:%S %z'  # %z is a GNU extension.
+-2004-02-29 16:21:42 -0800
++Fri, 15 Dec 2000 11:48:05 -0800
++$ date +"%Y-%m-%d %H:%M:%S %z"  # %z is a GNU extension.
++2000-12-15 11:48:05 -0800
++$ date +'@@%s'  # %s is a MirBSD extension.
++@@1101064210
+ $ date +'@@%s.%N'  # %s and %N are GNU extensions.
+ @@1078100502.692722128
+ @end example
+@@ -234,11 +246,10 @@
+ More generally, the time of day may be given as
+ @samp{@var{hour}:@var{minute}:@var{second}}, where @var{hour} is
+ a number between 0 and 23, @var{minute} is a number between 0 and
+-59, and @var{second} is a number between 0 and 59 possibly followed by
+-@samp{.} or @samp{,} and a fraction containing one or more digits.
+-Alternatively,
+-@samp{:@var{second}} can be omitted, in which case it is taken to
+-be zero.
++59, and @var{second} is a number between 0 and 59, with an optional
++fraction separated by @samp{.} or @samp{,} consisting of digits.
++Alternatively, @samp{:@var{second}} can be omitted, in which case
++it is taken to be zero.
+ 
+ @findex am @r{in date strings}
+ @findex pm @r{in date strings}
+@@ -299,8 +310,7 @@
+ described in the previous section.
+ 
+ If neither a time zone item nor a time zone correction is supplied,
+-time stamps are interpreted using the rules of the default time zone
+-(@pxref{Specifying time zone rules}).
++time stamps are interpreted using the rules of the default time zone.
+ 
+ 
+ @node Day of week items
+@@ -389,7 +399,7 @@
+ date strings like @samp{this thursday}.
+ 
+ When a relative item causes the resulting date to cross a boundary
+-where the clocks were adjusted, typically for daylight saving time,
++where the clocks were adjusted, typically for daylight-saving time,
+ the resulting date and time are adjusted accordingly.
+ 
+ The fuzz in units can cause problems with relative items.  For
+@@ -401,7 +411,7 @@
+ @example
+ $ date -R
+ Thu, 31 Jul 2003 13:02:39 -0700
+-$ date --date='-1 month' +'Last month was %B?'
++$ date --date="-1 month" +'Last month was %B?'
+ Last month was July?
+ $ date --date="$(date +%Y-%m-15) -1 month" +'Last month was %B!'
+ Last month was June!
+@@ -440,86 +450,49 @@
+ @node Seconds since the Epoch
+ @section Seconds since the Epoch
+ 
+-If you precede a number with @samp{@@}, it represents an internal time
+-stamp as a count of seconds.  The number can contain an internal
+-decimal point (either @samp{.} or @samp{,}); any excess precision not
+-supported by the internal representation is truncated toward minus
+-infinity.  Such a number cannot be combined with any other date
+-item, as it specifies a complete time stamp.
++If you give a string consisting of @samp{@@} followed by a decimal
++number, it is parsed as an internal time stamp, @sc{utc} for
++@acronym{POSIX} compliant systems, @sc{tai} for systems which keep
++time correctly, and directly mapped to a kernel time.  The implementation
++handles an optional fraction separated by @samp{.} or @samp{,} and
++truncates to a supported internal precision, rounding towards the
++negative infinity.  Since the kernel time stamp represents complete
++date and time information, it cannot be combined with any other
++format given.
+ 
+ @cindex beginning of time, for @acronym{POSIX}
+ @cindex epoch, for @acronym{POSIX}
+-Internally, computer times are represented as a count of seconds since
+-an epoch---a well-defined point of time.  On @acronym{GNU} and
+-@acronym{POSIX} systems, the epoch is 1970-01-01 00:00:00 @sc{utc}, so
+-@samp{@@0} represents this time, @samp{@@1} represents 1970-01-01
+-00:00:01 @sc{utc}, and so forth.  @acronym{GNU} and most other
+-@acronym{POSIX}-compliant systems support such times as an extension
+-to @acronym{POSIX}, using negative counts, so that @samp{@@-1}
+-represents 1969-12-31 23:59:59 @sc{utc}.
+-
+-Traditional Unix systems count seconds with 32-bit two's-complement
+-integers and can represent times from 1901-12-13 20:45:52 through
+-2038-01-19 03:14:07 @sc{utc}.  More modern systems use 64-bit counts
+-of seconds with nanosecond subcounts, and can represent all the times
+-in the known lifetime of the universe to a resolution of 1 nanosecond.
+-
+-On most systems, these counts ignore the presence of leap seconds.
+-For example, on most systems @samp{@@915148799} represents 1998-12-31
+-23:59:59 @sc{utc}, @samp{@@915148800} represents 1999-01-01 00:00:00
+-@sc{utc}, and there is no way to represent the intervening leap second
+-1998-12-31 23:59:60 @sc{utc}.
+-
+-@node Specifying time zone rules
+-@section Specifying time zone rules
+-
+-@vindex TZ
+-Normally, dates are interpreted using the rules of the current time
+-zone, which in turn are specified by the @env{TZ} environment
+-variable, or by a system default if @env{TZ} is not set.  To specify a
+-different set of default time zone rules that apply just to one date,
+-start the date with a string of the form @samp{TZ="@var{rule}"}.  The
+-two quote characters (@samp{"}) must be present in the date, and any
+-quotes or backslashes within @var{rule} must be escaped by a
+-backslash.
+-
+-For example, with the @acronym{GNU} @command{date} command you can
+-answer the question ``What time is it in New York when a Paris clock
+-shows 6:30am on October 31, 2004?'' by using a date beginning with
+-@samp{TZ="Europe/Paris"} as shown in the following shell transcript:
+-
+-@example
+-$ export TZ="America/New_York"
+-$ date --date='TZ="Europe/Paris" 2004-10-31 06:30'
+-Sun Oct 31 01:30:00 EDT 2004
+-@end example
++Although the date syntax here can represent any possible time since the
++year zero, computer integers often cannot represent such a wide range of
++time.  On @acronym{POSIX} systems, the clock starts at 1970-01-01 00:00:00
++@sc{utc}: @acronym{POSIX} does not require support for times before the
++@acronym{POSIX} Epoch and times far in the future.  @acronym{GNU} and
++traditional Unix systems have 32-bit signed @code{time_t} and can represent
++times from 1901-12-13 20:45:52 through 2038-01-19 03:14:07 @sc{utc}, such
++that @samp{@@0} represents the epoch, @samp{@@1} represents 1970-01-01
++00:00:01 @sc{utc}, and so forth, whereas @samp{@@-1}, not mandated by
++@acronym{POSIX}, represents 1969-12-31 23:59:59 @sc{utc}.  Systems with
++64-bit signed @code{time_t} can represent all the times in the known
++lifetime of the universe. Modern @acronym{UNIX} systems also can give
++precise timecounters in the nanosecond or even attosecond range with
++a resolution often only a small multiply, like 10000, of the CPU
++frequency (on fast machines).
++
++@acronym{POSIX} conformant systems do not count leap seconds, and their
++kernel time is a seconds-since-epoch representation of @sc{utc} (which
++is a calendar time); the MirOS family of operating systems keeps time
++as seconds since the epoch, @sc{tai}, correctly counting leap seconds
++and providing conversion functions.  Most MirBSD ports have already
++switched to a 64-bit signed @code{time_t}, some are using a
++@sc{djb}-compatible @code{tai_t} internally.  The rest of this
++document has not been throughoutly checked for @sc{utc} vs @sc{tai}
++correctness.  For @acronym{POSIX}ly broken systems, @samp{@@915148799}
++represents 1998-12-31 23:59:59 @sc{utc}, @samp{@@915148800} represents
++1999-01-01 00:00:00 @sc{utc}, and there is no way to represent the
++intervening leap second 1998-12-31 23:59:60 @sc{utc}.  Also, calculation
++of time deltas is wrong, such as the age of the MirBSD founder is already
++off by more than 10 seconds in 2000.
+ 
+-In this example, the @option{--date} operand begins with its own
+-@env{TZ} setting, so the rest of that operand is processed according
+-to @samp{Europe/Paris} rules, treating the string @samp{2004-10-31
+-06:30} as if it were in Paris.  However, since the output of the
+-@command{date} command is processed according to the overall time zone
+-rules, it uses New York time.  (Paris was normally six hours ahead of
+-New York in 2004, but this example refers to a brief Halloween period
+-when the gap was five hours.)
+-
+-A @env{TZ} value is a rule that typically names a location in the
+-@uref{http://www.twinsun.com/tz/tz-link.htm, @samp{tz} database}.
+-A recent catalog of location names appears in the
+-@uref{http://twiki.org/cgi-bin/xtra/tzdate, TWiki Date and Time
+-Gateway}.  A few non-@acronym{GNU} hosts require a colon before a
+-location name in a @env{TZ} setting, e.g.,
+-@samp{TZ=":America/New_York"}.
+-
+-The @samp{tz} database includes a wide variety of locations ranging
+-from @samp{Arctic/Longyearbyen} to @samp{Antarctica/South_Pole}, but
+-if you are at sea and have your own private time zone, or if you are
+-using a non-@acronym{GNU} host that does not support the @samp{tz}
+-database, you may need to use a @acronym{POSIX} rule instead.  Simple
+-@acronym{POSIX} rules like @samp{UTC0} specify a time zone without
+-daylight saving time; other rules can specify simple daylight saving
+-regimes.  @xref{TZ Variable,, Specifying the Time Zone with @code{TZ},
+-libc, The GNU C Library}.
+ 
+ @node Authors of get_date
+ @section Authors of @code{get_date}
+@@ -545,3 +518,10 @@
+ This chapter was originally produced by Fran@,{c}ois Pinard
+ (@email{pinard@@iro.umontreal.ca}) from the @file{getdate.y} source code,
+ and then edited by K.@: Berry (@email{kb@@cs.umb.edu}).
++
++The version of this chapter you are reading comes with MirBSD @sc{gnu}
++@sc{cvs} 1.12 (also in Debian); it is based upon an older version of
++the @sc{gnu} coreutils manual which is @emph{not} yet GFDL-licenced.
++Appropriate changes for the in-tree @code{get_date} version of CVS
++have been applied.
++The MirBSD version is maintained by mirabilos @email{m@@mirbsd.org}.
+--- cvs-1.12.13+real.orig/doc/mkman.pl
++++ cvs-1.12.13+real/doc/mkman.pl
+@@ -1,10 +1,12 @@
+ #! @PERL@
++# $MirOS: src/gnu/usr.bin/cvs/doc/mkman.pl,v 1.7 2021/01/30 02:06:01 tg Exp $
+ #
+ # Generate a man page from sections of a Texinfo manual.
+ #
+ # Copyright 2004 The Free Software Foundation,
+ #                Derek R. Price,
+ #                & Ximbiot <http://ximbiot.com>
++# Copyright (c) 2004, 2010, 2021 mirabilos <m@mirbsd.org>
+ #
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+@@ -62,7 +64,7 @@
+ 		if $keyword =~ /^(strong|sc|code|file|samp)$/;
+ 	return "\\fI"
+ 		if $keyword =~ /^(emph|var|dfn)$/;
+-	die "no handler for keyword \`$keyword', found at line $. of file \`$file'\n";
++	die "no handler for keyword '$keyword', found at line $. of file '$file'\n";
+ }
+ 
+ 
+@@ -72,8 +74,12 @@
+ {
+ 	my ($file, $parent, $keyword, $content) = @_;
+ 
+-	return "see node \`$content\\(aq in the CVS manual"
+-		if $keyword =~ /^(p?x)?ref$/;
++	return "node \\(aq$content\\(aq in the CVS manual"
++		if $keyword =~ /^ref$/;
++	return "See node \\(aq$content\\(aq in the CVS manual"
++		if $keyword =~ /^xref$/;
++	return "see node \\(aq$content\\(aq in the CVS manual"
++		if $keyword =~ /^pxref$/;
+ 	return "\\fP\\fP$content"
+ 		if $keyword =~ /^splitrcskeyword$/;
+ 
+@@ -91,11 +97,11 @@
+ for my $file (@ARGV)
+ {
+ 	my $fh = new IO::File "< $file"
+-		or die "Failed to open file \`$file': $!";
++		or die "Failed to open file '$file': $!";
+ 
+ 	if ($file !~ /\.(texinfo|texi|txi)$/)
+ 	{
+-		print stderr "Passing \`$file' through unprocessed.\n";
++		print stderr "Passing '$file' through unprocessed.\n";
+ 		# Just cat any file that doesn't look like a Texinfo source.
+ 		while (my $line = $fh->getline)
+ 		{
+@@ -104,7 +110,7 @@
+ 		next;
+ 	}
+ 
+-	print stderr "Processing \`$file'.\n";
++	print stderr "Processing '$file'.\n";
+ 	$texi_num++;
+ 	my $gotone = 0;
+ 	my $inblank = 0;
+@@ -140,8 +146,11 @@
+ 		s/'/\\(aq/g;
+ 		s/`/\\`/g;
+ 		s/(?<!-)---(?!-)/\\(em/g;
+-		s/\@bullet({}|\b)/\\(bu/g;
+-		s/\@dots({}|\b)/\\&.../g;
++		s/\@bullet(\{}|\b)/\\(bu/g;
++		s/\@dots(\{}|\b)/\\&.../g;
++
++		# Hack for GNU groff with nroff -Tutf8
++		s/-/\\-/g;
+ 
+ 		# Examples should be indented and otherwise untouched
+ 		if (/^\@example$/)
+@@ -356,7 +365,7 @@
+ 		s/\@([{}])/$1/g;
+ 
+ 		# Verify we haven't left commands unprocessed.
+-		die "Unprocessed command at line $. of file \`$file': "
++		die "Unprocessed command at line $. of file '$file': "
+ 		    . ($1 ? "$1\n" : "<EOL>\n")
+ 			if /^(?>(?:[^\@]|\@\@)*)\@(\w+|.|$)/;
+ 
+--- cvs-1.12.13+real.orig/lib/Makefile.am
++++ cvs-1.12.13+real/lib/Makefile.am
+@@ -131,16 +131,11 @@
+ ## CVS test scripts for getdate.
+ TESTS += test-getdate.sh
+ MOSTLYCLEANFILES += getdate-expected getdate-got getdate.diff
+-DISTCLEANFILES += getdate.log
++DISTCLEANFILES += getdate.log getdate.log~
+ # Program required by test-getdate.sh for testing getdate.y.
+ check_PROGRAMS += getdate
+ getdate_SOURCES = \
+-	error.c \
+-	getdate.y
+-## This source file was added only for the getdate test program when compiled
+-## with GNULIB's error.c.
+-getdate_SOURCES += \
+-	progname.c
++	getdate.c
+ getdate_CPPFLAGS = -DTEST
+ getdate_LDADD = \
+ 	$(noinst_LIBRARIES) \
+--- cvs-1.12.13+real.orig/lib/__fpending.h
++++ cvs-1.12.13+real/lib/__fpending.h
+@@ -1,7 +1,7 @@
+ #include <stddef.h>
+ #include <stdio.h>
+ 
+-#if HAVE_STDIO_EXT_H
++#if defined(HAVE_STDIO_EXT_H) && (HAVE_STDIO_EXT_H)
+ # include <stdio_ext.h>
+ #endif
+ 
+--- cvs-1.12.13+real.orig/lib/allocsa.h
++++ cvs-1.12.13+real/lib/allocsa.h
+@@ -19,7 +19,9 @@
+ #ifndef _ALLOCSA_H
+ #define _ALLOCSA_H
+ 
++#ifdef HAVE_ALLOCA_H
+ #include <alloca.h>
++#endif
+ #include <stddef.h>
+ #include <stdlib.h>
+ 
+--- cvs-1.12.13+real.orig/lib/chdir-long.c
++++ cvs-1.12.13+real/lib/chdir-long.c
+@@ -39,9 +39,7 @@
+ # define O_DIRECTORY 0
+ #endif
+ 
+-#ifndef PATH_MAX
+-# error "compile this file only if your system defines PATH_MAX"
+-#endif
++#ifdef PATH_MAX
+ 
+ struct cd_buf
+ {
+@@ -269,6 +267,8 @@
+ }
+ #endif
+ 
++#endif /* PATH_MAX */
++
+ /*
+ Local Variables:
+ compile-command: "gcc -DTEST_CHDIR=1 -DHAVE_CONFIG_H -I.. -g -O -W -Wall chdir-long.c libcoreutils.a"
+--- cvs-1.12.13+real.orig/lib/closeout.c
++++ cvs-1.12.13+real/lib/closeout.c
+@@ -59,7 +59,7 @@
+    when it tries to write out that buffered data.  Thus, you would be
+    left with an incomplete output file and the offending program would
+    exit successfully.  Even calling fflush is not always sufficient,
+-   since some file systems (NFS and CODA) buffer written/flushed data
++   since some filesystems (NFS and CODA) buffer written/flushed data
+    until an actual close call.
+ 
+    Besides, it's wasteful to check the return value from every call
+--- cvs-1.12.13+real.orig/lib/error.c
++++ cvs-1.12.13+real/lib/error.c
+@@ -1,6 +1,7 @@
+ /* Error handler for noninteractive utilities
+    Copyright (C) 1990-1998, 2000-2003, 2004 Free Software Foundation, Inc.
+-   This file is part of the GNU C Library.
++   Copyright (c) 2021 mirabilos <m@mirbsd.org>
++   This file is part of GNU CVS.
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -133,7 +134,7 @@
+ }
+ 
+ static void
+-error_tail (int status, int errnum, const char *message, va_list args)
++warning_tail (int errnum, const char *message, va_list args)
+ {
+ #if _LIBC
+   if (_IO_fwide (stderr, 0) > 0)
+@@ -176,17 +177,15 @@
+ #endif
+     putc ('\n', stderr);
+   fflush (stderr);
+-  if (status)
+-    exit (status);
+ }
+ 
+-
++#if 0 /* disabled in CVS */
+ /* Print the program name and error message MESSAGE, which is a printf-style
+    format string with optional args.
+    If ERRNUM is nonzero, print its corresponding system error message.
+-   Exit with status STATUS if it is nonzero.  */
++*/
+ void
+-error (int status, int errnum, const char *message, ...)
++warning (int errnum, const char *message, ...)
+ {
+   va_list args;
+ 
+@@ -215,7 +214,7 @@
+     }
+ 
+   va_start (args, message);
+-  error_tail (status, errnum, message, args);
++  warning_tail (errnum, message, args);
+ 
+ #ifdef _LIBC
+   _IO_funlockfile (stderr);
+@@ -224,13 +223,14 @@
+ # endif
+ #endif
+ }
++#endif
+ 
+ /* Sometimes we want to have at most one error per line.  This
+    variable controls whether this mode is selected or not.  */
+ int error_one_per_line;
+ 
+ void
+-error_at_line (int status, int errnum, const char *file_name,
++warning_at_line (int errnum, const char *file_name,
+ 	       unsigned int line_number, const char *message, ...)
+ {
+   va_list args;
+@@ -285,7 +285,7 @@
+     }
+ 
+   va_start (args, message);
+-  error_tail (status, errnum, message, args);
++  warning_tail (errnum, message, args);
+ 
+ #ifdef _LIBC
+   _IO_funlockfile (stderr);
+--- cvs-1.12.13+real.orig/lib/error.h
++++ cvs-1.12.13+real/lib/error.h
+@@ -1,6 +1,8 @@
++/* $MirOS: src/gnu/usr.bin/cvs/lib/error.h,v 1.2 2021/01/30 02:06:03 tg Exp $ */
+ /* Declaration for error-reporting function
+    Copyright (C) 1995, 1996, 1997, 2003 Free Software Foundation, Inc.
+-   This file is part of the GNU C Library.
++   Copyright (c) 2021 mirabilos <m@mirbsd.org>
++   This file is part of GNU CVS.
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -19,6 +21,9 @@
+ #ifndef _ERROR_H
+ #define _ERROR_H 1
+ 
++/* for exit(3) */
++#include <stdlib.h>
++
+ #ifndef __attribute__
+ /* This feature is available in gcc versions 2.5 and later.  */
+ # if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 5)
+@@ -40,12 +45,46 @@
+    if ERRNUM is nonzero, follow it with ": " and strerror (ERRNUM).
+    If STATUS is nonzero, terminate the program with `exit (STATUS)'.  */
+ 
+-extern void error (int __status, int __errnum, const char *__format, ...)
+-     __attribute__ ((__format__ (__printf__, 3, 4)));
++/* changed for CVS: if STATUS is nonzero, use EXIT_FAILURE */
++
++#if 0
++#define error(status,...) do {			\
++	int CVS_error_st = (status);		\
++						\
++	warning(__VA_ARGS__);			\
++	if (CVS_error_st)			\
++		exit(CVS_error_st);		\
++} while (/* CONSTCOND */ 0)
++
++extern void warning (int __errnum, const char *__format, ...)
++     __attribute__ ((__format__ (__printf__, 2, 3)));
++
++#else /* ↑ lib │ ↓ CVS */
++
++#define error(...) do {				\
++	if (warning(__VA_ARGS__))		\
++		exit(EXIT_FAILURE);		\
++} while (/* CONSTCOND */ 0)
++
++extern int warning(int status, int errnum, const char *message, ...)
++    __attribute__((__format__(__printf__, 3, 4)));
++#endif
++
++#define error_at_line(status,...) do {		\
++	int CVS_error_st = (status);		\
++						\
++	warning_at_line(__VA_ARGS__);		\
++	if (CVS_error_st)			\
++		exit(CVS_error_st);		\
++} while (/* CONSTCOND */ 0)
+ 
+-extern void error_at_line (int __status, int __errnum, const char *__fname,
++extern void warning_at_line (int __errnum, const char *__fname,
+ 			   unsigned int __lineno, const char *__format, ...)
+-     __attribute__ ((__format__ (__printf__, 5, 6)));
++     __attribute__ ((__format__ (__printf__, 4, 5)));
++
++/*XXX this calls for some trickery with __builtin_constant_p
++      to eliminate the if, if not the exit, but let’s just
++      rely on the optimiser for constant arguments; this API sucks */
+ 
+ /* If NULL, error will flush stdout, then print on stderr the program
+    name, a colon and a space.  Otherwise, error will call this
+--- cvs-1.12.13+real.orig/lib/filenamecat.c
++++ cvs-1.12.13+real/lib/filenamecat.c
+@@ -50,7 +50,7 @@
+    newly-allocated storage and return the result.
+    The resulting file name F is such that the commands "ls F" and "(cd
+    DIR; ls BASE)" refer to the same file, where BASE is ABASE with any
+-   file system prefixes and leading separators removed.
++   filesystem prefixes and leading separators removed.
+    Arrange for a directory separator if necessary between DIR and BASE
+    in the result, removing any redundant separators.
+    In any case, if BASE_IN_RESULT is non-NULL, set
+--- cvs-1.12.13+real.orig/lib/fncase.c
++++ cvs-1.12.13+real/lib/fncase.c
+@@ -1,4 +1,4 @@
+-/* fncase.c -- CVS support for case insensitive file systems.
++/* fncase.c -- CVS support for case insensitive filesystems.
+    Jim Blandy <jimb@cyclic.com>
+ 
+    This file is part of GNU CVS.
+--- cvs-1.12.13+real.orig/lib/getcwd.c
++++ cvs-1.12.13+real/lib/getcwd.c
+@@ -151,7 +151,7 @@
+   size_t allocated = size;
+   size_t used;
+ 
+-#if HAVE_PARTLY_WORKING_GETCWD && !defined AT_FDCWD
++#if HAVE_PARTLY_WORKING_GETCWD
+   /* The system getcwd works, except it sometimes fails when it
+      shouldn't, setting errno to ERANGE, ENAMETOOLONG, or ENOENT.  If
+      AT_FDCWD is not defined, the algorithm below is O(N**2) and this
+@@ -204,6 +204,9 @@
+       ino_t dotino;
+       bool mount_point;
+       int parent_status;
++      size_t dirroom;
++      size_t namlen;
++      bool use_d_ino = true;
+ 
+       /* Look at the parent directory.  */
+ #ifdef AT_FDCWD
+@@ -244,110 +247,131 @@
+ 	goto lose;
+       dotlist[dotlen++] = '/';
+ #endif
+-      /* Clear errno to distinguish EOF from error if readdir returns
+-	 NULL.  */
+-      __set_errno (0);
+-      while ((d = __readdir (dirstream)) != NULL)
++      for (;;)
+ 	{
++	  /* Clear errno to distinguish EOF from error if readdir returns
++	     NULL.  */
++	  __set_errno (0);
++	  d = __readdir (dirstream);
++
++	  /* When we've iterated through all directory entries without finding
++	     one with a matching d_ino, rewind the stream and consider each
++	     name again, but this time, using lstat.  This is necessary in a
++	     chroot on at least one system (glibc-2.3.6 + linux 2.6.12), where
++	     .., ../.., ../../.., etc. all had the same device number, yet the
++	     d_ino values for entries in / did not match those obtained
++	     via lstat.  */
++	  if (d == NULL && errno == 0 && use_d_ino)
++	    {
++	      use_d_ino = false;
++	      rewinddir (dirstream);
++	      d = __readdir (dirstream);
++	    }
++
++	  if (d == NULL)
++	    {
++	      if (errno == 0)
++		/* EOF on dirstream, which can mean e.g., that the current
++		   directory has been removed.  */
++		__set_errno (ENOENT);
++	      goto lose;
++	    }
+ 	  if (d->d_name[0] == '.' &&
+ 	      (d->d_name[1] == '\0' ||
+ 	       (d->d_name[1] == '.' && d->d_name[2] == '\0')))
+ 	    continue;
+-	  if (MATCHING_INO (d, thisino) || mount_point)
++
++	  if (use_d_ino)
+ 	    {
+-	      int entry_status;
++	      bool match = (MATCHING_INO (d, thisino) || mount_point);
++	      if (! match)
++		continue;
++	    }
++
++	  {
++	    int entry_status;
+ #ifdef AT_FDCWD
+-	      entry_status = fstatat (fd, d->d_name, &st, AT_SYMLINK_NOFOLLOW);
++	    entry_status = fstatat (fd, d->d_name, &st, AT_SYMLINK_NOFOLLOW);
+ #else
+-	      /* Compute size needed for this file name, or for the file
+-		 name ".." in the same directory, whichever is larger.
+-	         Room for ".." might be needed the next time through
+-		 the outer loop.  */
+-	      size_t name_alloc = _D_ALLOC_NAMLEN (d);
+-	      size_t filesize = dotlen + MAX (sizeof "..", name_alloc);
+-
+-	      if (filesize < dotlen)
+-		goto memory_exhausted;
++	    /* Compute size needed for this file name, or for the file
++	       name ".." in the same directory, whichever is larger.
++	       Room for ".." might be needed the next time through
++	       the outer loop.  */
++	    size_t name_alloc = _D_ALLOC_NAMLEN (d);
++	    size_t filesize = dotlen + MAX (sizeof "..", name_alloc);
++
++	    if (filesize < dotlen)
++	      goto memory_exhausted;
++
++	    if (dotsize < filesize)
++	      {
++		/* My, what a deep directory tree you have, Grandma.  */
++		size_t newsize = MAX (filesize, dotsize * 2);
++		size_t i;
++		if (newsize < dotsize)
++		  goto memory_exhausted;
++		if (dotlist != dots)
++		  free (dotlist);
++		dotlist = malloc (newsize);
++		if (dotlist == NULL)
++		  goto lose;
++		dotsize = newsize;
+ 
+-	      if (dotsize < filesize)
+-		{
+-		  /* My, what a deep directory tree you have, Grandma.  */
+-		  size_t newsize = MAX (filesize, dotsize * 2);
+-		  size_t i;
+-		  if (newsize < dotsize)
+-		    goto memory_exhausted;
+-		  if (dotlist != dots)
+-		    free (dotlist);
+-		  dotlist = malloc (newsize);
+-		  if (dotlist == NULL)
+-		    goto lose;
+-		  dotsize = newsize;
+-
+-		  i = 0;
+-		  do
+-		    {
+-		      dotlist[i++] = '.';
+-		      dotlist[i++] = '.';
+-		      dotlist[i++] = '/';
+-		    }
+-		  while (i < dotlen);
+-		}
++		i = 0;
++		do
++		  {
++		    dotlist[i++] = '.';
++		    dotlist[i++] = '.';
++		    dotlist[i++] = '/';
++		  }
++		while (i < dotlen);
++	      }
+ 
+-	      strcpy (dotlist + dotlen, d->d_name);
+-	      entry_status = __lstat (dotlist, &st);
++	    memcpy (dotlist + dotlen, d->d_name, _D_ALLOC_NAMLEN (d));
++	    entry_status = __lstat (dotlist, &st);
+ #endif
+-	      /* We don't fail here if we cannot stat() a directory entry.
+-		 This can happen when (network) file systems fail.  If this
+-		 entry is in fact the one we are looking for we will find
+-		 out soon as we reach the end of the directory without
+-		 having found anything.  */
+-	      if (entry_status == 0 && S_ISDIR (st.st_mode)
+-		  && st.st_dev == thisdev && st.st_ino == thisino)
+-		break;
+-	    }
++	    /* We don't fail here if we cannot stat() a directory entry.
++	       This can happen when (network) filesystems fail.  If this
++	       entry is in fact the one we are looking for we will find
++	       out soon as we reach the end of the directory without
++	       having found anything.  */
++	    if (entry_status == 0 && S_ISDIR (st.st_mode)
++		&& st.st_dev == thisdev && st.st_ino == thisino)
++	      break;
++	  }
+ 	}
+-      if (d == NULL)
+-	{
+-	  if (errno == 0)
+-	    /* EOF on dirstream, which means that the current directory
+-	       has been removed.  */
+-	    __set_errno (ENOENT);
+-	  goto lose;
+-	}
+-      else
+-	{
+-	  size_t dirroom = dirp - dir;
+-	  size_t namlen = _D_EXACT_NAMLEN (d);
+ 
+-	  if (dirroom <= namlen)
++      dirroom = dirp - dir;
++      namlen = _D_EXACT_NAMLEN (d);
++
++      if (dirroom <= namlen)
++	{
++	  if (size != 0)
+ 	    {
+-	      if (size != 0)
+-		{
+-		  __set_errno (ERANGE);
+-		  goto lose;
+-		}
+-	      else
+-		{
+-		  char *tmp;
+-		  size_t oldsize = allocated;
+-
+-		  allocated += MAX (allocated, namlen);
+-		  if (allocated < oldsize
+-		      || ! (tmp = realloc (dir, allocated)))
+-		    goto memory_exhausted;
+-
+-		  /* Move current contents up to the end of the buffer.
+-		     This is guaranteed to be non-overlapping.  */
+-		  dirp = memcpy (tmp + allocated - (oldsize - dirroom),
+-				 tmp + dirroom,
+-				 oldsize - dirroom);
+-		  dir = tmp;
+-		}
++	      __set_errno (ERANGE);
++	      goto lose;
++	    }
++	  else
++	    {
++	      char *tmp;
++	      size_t oldsize = allocated;
++
++	      allocated += MAX (allocated, namlen);
++	      if (allocated < oldsize
++		  || ! (tmp = realloc (dir, allocated)))
++		goto memory_exhausted;
++
++	      /* Move current contents up to the end of the buffer.
++		 This is guaranteed to be non-overlapping.  */
++	      dirp = memcpy (tmp + allocated - (oldsize - dirroom),
++			     tmp + dirroom,
++			     oldsize - dirroom);
++	      dir = tmp;
+ 	    }
+-	  dirp -= namlen;
+-	  memcpy (dirp, d->d_name, namlen);
+-	  *--dirp = '/';
+ 	}
++      dirp -= namlen;
++      memcpy (dirp, d->d_name, namlen);
++      *--dirp = '/';
+ 
+       thisdev = dotdev;
+       thisino = dotino;
+--- cvs-1.12.13+real.orig/lib/getdate.c
++++ cvs-1.12.13+real/lib/getdate.c
+@@ -1,7 +1,9 @@
+-/* A Bison parser, made by GNU Bison 1.875c.  */
++/* A Bison parser, made by GNU Bison 2.3.  */
+ 
+-/* Skeleton parser for Yacc-like parsing with Bison,
+-   Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
++/* Skeleton implementation for Bison's Yacc-like parsers in C
++
++   Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
++   Free Software Foundation, Inc.
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -15,16 +17,24 @@
+ 
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+-   Foundation, Inc., 59 Temple Place - Suite 330,
+-   Boston, MA 02111-1307, USA.  */
++   Foundation, Inc., 51 Franklin Street, Fifth Floor,
++   Boston, MA 02110-1301, USA.  */
++
++/* As a special exception, you may create a larger work that contains
++   part or all of the Bison parser skeleton and distribute that work
++   under terms of your choice, so long as that work isn't itself a
++   parser generator using the skeleton or a modified version thereof
++   as a parser skeleton.  Alternatively, if you modify or redistribute
++   the parser skeleton itself, you may (at your option) remove this
++   special exception, which will cause the skeleton and the resulting
++   Bison output files to be licensed under the GNU General Public
++   License without this special exception.
+ 
+-/* As a special exception, when this file is copied by Bison into a
+-   Bison output file, you may use that output file without restriction.
+-   This special exception was added by the Free Software Foundation
+-   in version 1.24 of Bison.  */
++   This special exception was added by the Free Software Foundation in
++   version 2.2 of Bison.  */
+ 
+-/* Written by Richard Stallman by simplifying the original so called
+-   ``semantic'' parser.  */
++/* C LALR(1) parser skeleton written by Richard Stallman, by
++   simplifying the original so-called "semantic" parser.  */
+ 
+ /* All symbols defined below should begin with yy or YY, to avoid
+    infringing on user name space.  This should be done even for local
+@@ -36,6 +46,9 @@
+ /* Identify Bison output.  */
+ #define YYBISON 1
+ 
++/* Bison version.  */
++#define YYBISON_VERSION "2.3"
++
+ /* Skeleton name.  */
+ #define YYSKELETON_NAME "yacc.c"
+ 
+@@ -74,6 +87,7 @@
+      tUDECIMAL_NUMBER = 276
+    };
+ #endif
++/* Tokens.  */
+ #define tAGO 258
+ #define tDST 259
+ #define tDAY 260
+@@ -102,8 +116,11 @@
+ 
+ /* Parse a string into an internal time stamp.
+ 
+-   Copyright (C) 1999, 2000, 2002, 2003, 2004, 2005 Free Software
+-   Foundation, Inc.
++   Copyright (C) 1995, 1997, 1998, 2003, 2004, 2005
++   Free Software Foundation, Inc.
++
++   Copyright (c) 2005, 2006, 2007, 2010, 2016, 2017, 2021
++   mirabilos <m@mirbsd.org>
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -139,6 +156,10 @@
+ 
+ #include "getdate.h"
+ 
++#ifdef USE_LIBBSD
++size_t strlcat(char *, const char *, size_t);
++#endif
++
+ /* There's no need to extend the stack, so there's no need to involve
+    alloca.  */
+ #define YYSTACK_USE_ALLOCA 0
+@@ -166,10 +187,44 @@
+ #include <stdlib.h>
+ #include <string.h>
+ 
++#ifndef _STDLIB_H
++#define _STDLIB_H 1 /* GNU bison needs this */
++#endif
++
++#ifndef IN_RCS
+ #include "setenv.h"
+ #include "xalloc.h"
++#else /* IN_RCS */
++#include <unistd.h>
++
++#define HAVE_STRUCT_TM_TM_ZONE 1
++#define HAVE_TM_GMTOFF	1
++
++#define gettime(ts)	clock_gettime(CLOCK_REALTIME,(ts))
+ 
+-#if STDC_HEADERS || (! defined isascii && ! HAVE_ISASCII)
++static void *
++xmalloc(size_t s)
++{
++	static const char xmalloc_enomem[] = "memory exhausted\n";
++	void *x;
++
++	if ((x = malloc(s)) == NULL) {
++		write(2, xmalloc_enomem, sizeof(xmalloc_enomem) - 1);
++		exit(1);
++	}
++
++	return (x);
++}
++
++static void *
++xmemdup(void const *p, size_t s)
++{
++	return (memcpy(xmalloc(s), p, s));
++}
++#endif /* IN_RCS */
++
++#if (defined(STDC_HEADERS) && STDC_HEADERS) || \
++    (!defined(isascii) && !HAVE_ISASCII)
+ # define IN_CTYPE_DOMAIN(c) 1
+ #else
+ # define IN_CTYPE_DOMAIN(c) isascii (c)
+@@ -188,7 +243,8 @@
+    of `digit' even when the host does not conform to POSIX.  */
+ #define ISDIGIT(c) ((unsigned int) (c) - '0' <= 9)
+ 
+-#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 8) || __STRICT_ANSI__
++#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 8) || \
++    (defined(__STRICT_ANSI__) && __STRICT_ANSI__)
+ # define __attribute__(x)
+ #endif
+ 
+@@ -196,6 +252,15 @@
+ # define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+ #endif
+ 
++#ifndef __IDSTRING
++#define __IDSTRING(varname, string) \
++	static const char varname[] __attribute__((__used__)) = \
++	    "@(""#)" #varname ": " string
++#endif
++
++__IDSTRING(rcsid_code, "$MirOS: src/gnu/usr.bin/cvs/lib/getdate.c,v 1.19 2021/01/30 02:30:17 tg Exp $");
++__IDSTRING(rcsid_bron, "$miros: src/gnu/usr.bin/cvs/lib/getdate.y,v 1.14 2021/01/30 02:28:27 tg Exp $");
++
+ /* Shift A right by B bits portably, by dividing A by 2**B and
+    truncating towards minus infinity.  A and B should be free of side
+    effects, and B should be in the range 0 <= B <= INT_BITS - 2, where
+@@ -292,7 +357,7 @@
+ 
+ union YYSTYPE;
+ static int yylex (union YYSTYPE *, parser_control *);
+-static int yyerror (parser_control *, char *);
++static int yyerror (parser_control *, const char *);
+ static long int time_zone_hhmm (textint, long int);
+ 
+ 
+@@ -310,15 +375,22 @@
+ # define YYERROR_VERBOSE 0
+ #endif
+ 
+-#if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED)
+-#line 209 "getdate.y"
+-typedef union YYSTYPE {
++/* Enabling the token table.  */
++#ifndef YYTOKEN_TABLE
++# define YYTOKEN_TABLE 0
++#endif
++
++#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
++typedef union YYSTYPE
++#line 260 "getdate.y"
++{
+   long int intval;
+   textint textintval;
+   struct timespec timespec;
+-} YYSTYPE;
+-/* Line 191 of yacc.c.  */
+-#line 322 "getdate.c"
++}
++/* Line 193 of yacc.c.  */
++#line 393 "getdate.c"
++	YYSTYPE;
+ # define yystype YYSTYPE /* obsolescent; will be withdrawn */
+ # define YYSTYPE_IS_DECLARED 1
+ # define YYSTYPE_IS_TRIVIAL 1
+@@ -329,56 +401,171 @@
+ /* Copy the second part of user declarations.  */
+ 
+ 
+-/* Line 214 of yacc.c.  */
+-#line 334 "getdate.c"
++/* Line 216 of yacc.c.  */
++#line 406 "getdate.c"
++
++#ifdef short
++# undef short
++#endif
++
++#ifdef YYTYPE_UINT8
++typedef YYTYPE_UINT8 yytype_uint8;
++#else
++typedef unsigned char yytype_uint8;
++#endif
++
++#ifdef YYTYPE_INT8
++typedef YYTYPE_INT8 yytype_int8;
++#elif (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++typedef signed char yytype_int8;
++#else
++typedef short int yytype_int8;
++#endif
++
++#ifdef YYTYPE_UINT16
++typedef YYTYPE_UINT16 yytype_uint16;
++#else
++typedef unsigned short int yytype_uint16;
++#endif
++
++#ifdef YYTYPE_INT16
++typedef YYTYPE_INT16 yytype_int16;
++#else
++typedef short int yytype_int16;
++#endif
++
++#ifndef YYSIZE_T
++# ifdef __SIZE_TYPE__
++#  define YYSIZE_T __SIZE_TYPE__
++# elif defined size_t
++#  define YYSIZE_T size_t
++# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++#  include <stddef.h> /* INFRINGES ON USER NAME SPACE */
++#  define YYSIZE_T size_t
++# else
++#  define YYSIZE_T unsigned int
++# endif
++#endif
+ 
+-#if ! defined (yyoverflow) || YYERROR_VERBOSE
++#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
+ 
+-# ifndef YYFREE
+-#  define YYFREE free
++#ifndef YY_
++# if defined(YYENABLE_NLS) && YYENABLE_NLS
++#  if ENABLE_NLS
++#   include <libintl.h> /* INFRINGES ON USER NAME SPACE */
++#   define YY_(msgid) dgettext ("bison-runtime", msgid)
++#  endif
+ # endif
+-# ifndef YYMALLOC
+-#  define YYMALLOC malloc
++# ifndef YY_
++#  define YY_(msgid) msgid
+ # endif
++#endif
++
++/* Suppress unused-variable warnings by "using" E.  */
++#if ! defined lint || defined __GNUC__
++# define YYUSE(e) ((void) (e))
++#else
++# define YYUSE(e) /* empty */
++#endif
++
++/* Identity function, used to suppress warnings about constant conditions.  */
++#ifndef lint
++# define YYID(n) (n)
++#else
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++static int
++YYID (int i)
++#else
++static int
++YYID (i)
++    int i;
++#endif
++{
++  return i;
++}
++#endif
++
++#if ! defined yyoverflow || YYERROR_VERBOSE
+ 
+ /* The parser invokes alloca or malloc; define the necessary symbols.  */
+ 
+ # ifdef YYSTACK_USE_ALLOCA
+ #  if YYSTACK_USE_ALLOCA
+-#   define YYSTACK_ALLOC alloca
+-#  endif
+-# else
+-#  if defined (alloca) || defined (_ALLOCA_H)
+-#   define YYSTACK_ALLOC alloca
+-#  else
+ #   ifdef __GNUC__
+ #    define YYSTACK_ALLOC __builtin_alloca
++#   elif defined __BUILTIN_VA_ARG_INCR
++#    include <alloca.h> /* INFRINGES ON USER NAME SPACE */
++#   elif defined _AIX
++#    define YYSTACK_ALLOC __alloca
++#   elif defined _MSC_VER
++#    include <malloc.h> /* INFRINGES ON USER NAME SPACE */
++#    define alloca _alloca
++#   else
++#    define YYSTACK_ALLOC alloca
++#    if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++#     include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
++#     ifndef _STDLIB_H
++#      define _STDLIB_H 1
++#     endif
++#    endif
+ #   endif
+ #  endif
+ # endif
+ 
+ # ifdef YYSTACK_ALLOC
+-   /* Pacify GCC's `empty if-body' warning. */
+-#  define YYSTACK_FREE(Ptr) do { /* empty */; } while (0)
+-# else
+-#  if defined (__STDC__) || defined (__cplusplus)
+-#   include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+-#   define YYSIZE_T size_t
++   /* Pacify GCC's `empty if-body' warning.  */
++#  define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
++#  ifndef YYSTACK_ALLOC_MAXIMUM
++    /* The OS might guarantee only one guard page at the bottom of the stack,
++       and a page size can be as small as 4096 bytes.  So we cannot safely
++       invoke alloca (N) if N exceeds 4096.  Use a slightly smaller number
++       to allow for a few compiler-allocated temporary stack slots.  */
++#   define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
+ #  endif
++# else
+ #  define YYSTACK_ALLOC YYMALLOC
+ #  define YYSTACK_FREE YYFREE
++#  ifndef YYSTACK_ALLOC_MAXIMUM
++#   define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
++#  endif
++#  if (defined __cplusplus && ! defined _STDLIB_H \
++       && ! ((defined YYMALLOC || defined malloc) \
++	     && (defined YYFREE || defined free)))
++#   include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
++#   ifndef _STDLIB_H
++#    define _STDLIB_H 1
++#   endif
++#  endif
++#  ifndef YYMALLOC
++#   define YYMALLOC malloc
++#   if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
++#   endif
++#  endif
++#  ifndef YYFREE
++#   define YYFREE free
++#   if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++void free (void *); /* INFRINGES ON USER NAME SPACE */
++#   endif
++#  endif
+ # endif
+-#endif /* ! defined (yyoverflow) || YYERROR_VERBOSE */
++#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
+ 
+ 
+-#if (! defined (yyoverflow) \
+-     && (! defined (__cplusplus) \
+-	 || (defined (YYSTYPE_IS_TRIVIAL) && YYSTYPE_IS_TRIVIAL)))
++#if (! defined yyoverflow \
++     && (! defined __cplusplus \
++	 || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
+ 
+ /* A type that is properly aligned for any stack member.  */
+ union yyalloc
+ {
+-  short yyss;
++  yytype_int16 yyss;
+   YYSTYPE yyvs;
+   };
+ 
+@@ -388,24 +575,24 @@
+ /* The size of an array large to enough to hold all stacks, each with
+    N elements.  */
+ # define YYSTACK_BYTES(N) \
+-     ((N) * (sizeof (short) + sizeof (YYSTYPE))				\
++     ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
+       + YYSTACK_GAP_MAXIMUM)
+ 
+ /* Copy COUNT objects from FROM to TO.  The source and destination do
+    not overlap.  */
+ # ifndef YYCOPY
+-#  if defined (__GNUC__) && 1 < __GNUC__
++#  if defined __GNUC__ && 1 < __GNUC__
+ #   define YYCOPY(To, From, Count) \
+       __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
+ #  else
+ #   define YYCOPY(To, From, Count)		\
+       do					\
+ 	{					\
+-	  register YYSIZE_T yyi;		\
++	  YYSIZE_T yyi;				\
+ 	  for (yyi = 0; yyi < (Count); yyi++)	\
+ 	    (To)[yyi] = (From)[yyi];		\
+ 	}					\
+-      while (0)
++      while (YYID (0))
+ #  endif
+ # endif
+ 
+@@ -423,39 +610,33 @@
+ 	yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
+ 	yyptr += yynewbytes / sizeof (*yyptr);				\
+       }									\
+-    while (0)
++    while (YYID (0))
+ 
+ #endif
+ 
+-#if defined (__STDC__) || defined (__cplusplus)
+-   typedef signed char yysigned_char;
+-#else
+-   typedef short yysigned_char;
+-#endif
+-
+-/* YYFINAL -- State number of the termination state. */
++/* YYFINAL -- State number of the termination state.  */
+ #define YYFINAL  12
+ /* YYLAST -- Last index in YYTABLE.  */
+ #define YYLAST   88
+ 
+-/* YYNTOKENS -- Number of terminals. */
++/* YYNTOKENS -- Number of terminals.  */
+ #define YYNTOKENS  26
+-/* YYNNTS -- Number of nonterminals. */
++/* YYNNTS -- Number of nonterminals.  */
+ #define YYNNTS  19
+-/* YYNRULES -- Number of rules. */
++/* YYNRULES -- Number of rules.  */
+ #define YYNRULES  78
+-/* YYNRULES -- Number of states. */
++/* YYNRULES -- Number of states.  */
+ #define YYNSTATES  96
+ 
+ /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX.  */
+ #define YYUNDEFTOK  2
+ #define YYMAXUTOK   276
+ 
+-#define YYTRANSLATE(YYX) 						\
++#define YYTRANSLATE(YYX)						\
+   ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
+ 
+ /* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX.  */
+-static const unsigned char yytranslate[] =
++static const yytype_uint8 yytranslate[] =
+ {
+        0,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+        2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+@@ -490,7 +671,7 @@
+ #if YYDEBUG
+ /* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
+    YYRHS.  */
+-static const unsigned char yyprhs[] =
++static const yytype_uint8 yyprhs[] =
+ {
+        0,     0,     3,     5,     7,    10,    11,    14,    16,    18,
+       20,    22,    24,    26,    28,    31,    36,    42,    49,    57,
+@@ -502,8 +683,8 @@
+      207,   209,   211,   213,   215,   217,   218,   221,   222
+ };
+ 
+-/* YYRHS -- A `-1'-separated list of the rules' RHS. */
+-static const yysigned_char yyrhs[] =
++/* YYRHS -- A `-1'-separated list of the rules' RHS.  */
++static const yytype_int8 yyrhs[] =
+ {
+       27,     0,    -1,    28,    -1,    29,    -1,    22,    39,    -1,
+       -1,    29,    30,    -1,    31,    -1,    32,    -1,    33,    -1,
+@@ -531,22 +712,22 @@
+ };
+ 
+ /* YYRLINE[YYN] -- source line where rule number YYN was defined.  */
+-static const unsigned short yyrline[] =
++static const yytype_uint16 yyrline[] =
+ {
+-       0,   230,   230,   231,   235,   242,   244,   248,   250,   252,
+-     254,   256,   258,   260,   264,   272,   280,   290,   297,   309,
+-     314,   322,   324,   326,   328,   330,   335,   340,   345,   350,
+-     358,   363,   383,   390,   398,   406,   411,   417,   422,   431,
+-     441,   445,   447,   449,   451,   453,   455,   457,   459,   461,
+-     463,   465,   467,   469,   471,   473,   475,   477,   479,   481,
+-     483,   485,   489,   491,   493,   495,   497,   499,   503,   503,
+-     506,   507,   512,   513,   518,   556,   557,   563,   564
++       0,   281,   281,   282,   286,   293,   295,   299,   301,   303,
++     305,   307,   309,   311,   315,   323,   331,   341,   348,   360,
++     365,   373,   375,   377,   379,   381,   386,   391,   396,   401,
++     409,   414,   434,   441,   449,   457,   462,   468,   473,   482,
++     492,   496,   498,   500,   502,   504,   506,   508,   510,   512,
++     514,   516,   518,   520,   522,   524,   526,   528,   530,   532,
++     534,   536,   540,   542,   544,   546,   548,   550,   554,   554,
++     557,   558,   563,   564,   569,   607,   608,   614,   615
+ };
+ #endif
+ 
+-#if YYDEBUG || YYERROR_VERBOSE
+-/* YYTNME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
+-   First, the terminals, then, starting at YYNTOKENS, nonterminals. */
++#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
++/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
++   First, the terminals, then, starting at YYNTOKENS, nonterminals.  */
+ static const char *const yytname[] =
+ {
+   "$end", "error", "$undefined", "tAGO", "tDST", "tDAY", "tDAY_UNIT",
+@@ -563,7 +744,7 @@
+ # ifdef YYPRINT
+ /* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
+    token YYLEX-NUM.  */
+-static const unsigned short yytoknum[] =
++static const yytype_uint16 yytoknum[] =
+ {
+        0,   256,   257,   258,   259,   260,   261,   262,   263,   264,
+      265,   266,   267,   268,   269,   270,   271,   272,   273,   274,
+@@ -572,7 +753,7 @@
+ # endif
+ 
+ /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives.  */
+-static const unsigned char yyr1[] =
++static const yytype_uint8 yyr1[] =
+ {
+        0,    26,    27,    27,    28,    29,    29,    30,    30,    30,
+       30,    30,    30,    30,    31,    31,    31,    31,    31,    32,
+@@ -585,7 +766,7 @@
+ };
+ 
+ /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN.  */
+-static const unsigned char yyr2[] =
++static const yytype_uint8 yyr2[] =
+ {
+        0,     2,     1,     1,     2,     0,     2,     1,     1,     1,
+        1,     1,     1,     1,     2,     4,     5,     6,     7,     1,
+@@ -600,7 +781,7 @@
+ /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
+    STATE-NUM when YYTABLE doesn't specify something else to do.  Zero
+    means the default is an error.  */
+-static const unsigned char yydefact[] =
++static const yytype_uint8 yydefact[] =
+ {
+        5,     0,     0,     2,     3,    71,    73,    70,    72,     4,
+       68,    69,     1,    26,    49,    24,    52,    19,    55,     0,
+@@ -614,8 +795,8 @@
+       16,    77,    31,    75,    17,    18
+ };
+ 
+-/* YYDEFGOTO[NTERM-NUM]. */
+-static const yysigned_char yydefgoto[] =
++/* YYDEFGOTO[NTERM-NUM].  */
++static const yytype_int8 yydefgoto[] =
+ {
+       -1,     2,     3,     4,    29,    30,    31,    32,    33,    34,
+       35,    36,    37,     9,    10,    11,    38,    77,    88
+@@ -624,7 +805,7 @@
+ /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
+    STATE-NUM.  */
+ #define YYPACT_NINF -43
+-static const yysigned_char yypact[] =
++static const yytype_int8 yypact[] =
+ {
+      -18,    48,     9,   -43,    19,   -43,   -43,   -43,   -43,   -43,
+      -43,   -43,   -43,    32,   -43,   -43,   -43,    54,   -43,    28,
+@@ -639,7 +820,7 @@
+ };
+ 
+ /* YYPGOTO[NTERM-NUM].  */
+-static const yysigned_char yypgoto[] =
++static const yytype_int8 yypgoto[] =
+ {
+      -43,   -43,   -43,   -43,   -43,   -43,   -43,   -43,   -43,   -43,
+      -43,   -43,    55,   -43,   -43,   -11,   -43,   -42,    -7
+@@ -650,7 +831,7 @@
+    number is the opposite.  If zero, do what YYDEFACT says.
+    If YYTABLE_NINF, syntax error.  */
+ #define YYTABLE_NINF -1
+-static const unsigned char yytable[] =
++static const yytype_uint8 yytable[] =
+ {
+       59,    60,    50,    61,     1,    62,    63,    64,    65,    12,
+       66,    67,    53,    68,    54,    85,    51,    55,    69,    56,
+@@ -663,7 +844,7 @@
+       81,    82,    83,    84,    94,    92,     0,     0,    76
+ };
+ 
+-static const yysigned_char yycheck[] =
++static const yytype_int8 yycheck[] =
+ {
+        5,     6,     4,     8,    22,    10,    11,    12,    13,     0,
+       15,    16,     6,    18,     8,    10,    18,    11,    23,    13,
+@@ -678,7 +859,7 @@
+ 
+ /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
+    symbol of state STATE-NUM.  */
+-static const unsigned char yystos[] =
++static const yytype_uint8 yystos[] =
+ {
+        0,    22,    27,    28,    29,    18,    19,    20,    21,    39,
+       40,    41,     0,     5,     6,     7,     8,     9,    11,    12,
+@@ -692,22 +873,6 @@
+       43,    41,    19,    18,    44,    43
+ };
+ 
+-#if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__)
+-# define YYSIZE_T __SIZE_TYPE__
+-#endif
+-#if ! defined (YYSIZE_T) && defined (size_t)
+-# define YYSIZE_T size_t
+-#endif
+-#if ! defined (YYSIZE_T)
+-# if defined (__STDC__) || defined (__cplusplus)
+-#  include <stddef.h> /* INFRINGES ON USER NAME SPACE */
+-#  define YYSIZE_T size_t
+-# endif
+-#endif
+-#if ! defined (YYSIZE_T)
+-# define YYSIZE_T unsigned int
+-#endif
+-
+ #define yyerrok		(yyerrstatus = 0)
+ #define yyclearin	(yychar = YYEMPTY)
+ #define YYEMPTY		(-2)
+@@ -733,30 +898,63 @@
+       yychar = (Token);						\
+       yylval = (Value);						\
+       yytoken = YYTRANSLATE (yychar);				\
+-      YYPOPSTACK;						\
++      YYPOPSTACK (1);						\
+       goto yybackup;						\
+     }								\
+   else								\
+-    { 								\
+-      yyerror (pc, "syntax error: cannot back up");\
++    {								\
++      yyerror (pc, YY_("syntax error: cannot back up")); \
+       YYERROR;							\
+     }								\
+-while (0)
++while (YYID (0))
++
+ 
+ #define YYTERROR	1
+ #define YYERRCODE	256
+ 
+-/* YYLLOC_DEFAULT -- Compute the default location (before the actions
+-   are run).  */
+ 
++/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
++   If N is 0, then set CURRENT to the empty location which ends
++   the previous symbol: RHS[0] (always defined).  */
++
++#define YYRHSLOC(Rhs, K) ((Rhs)[K])
+ #ifndef YYLLOC_DEFAULT
+-# define YYLLOC_DEFAULT(Current, Rhs, N)		\
+-   ((Current).first_line   = (Rhs)[1].first_line,	\
+-    (Current).first_column = (Rhs)[1].first_column,	\
+-    (Current).last_line    = (Rhs)[N].last_line,	\
+-    (Current).last_column  = (Rhs)[N].last_column)
++# define YYLLOC_DEFAULT(Current, Rhs, N)				\
++    do									\
++      if (YYID (N))                                                    \
++	{								\
++	  (Current).first_line   = YYRHSLOC (Rhs, 1).first_line;	\
++	  (Current).first_column = YYRHSLOC (Rhs, 1).first_column;	\
++	  (Current).last_line    = YYRHSLOC (Rhs, N).last_line;		\
++	  (Current).last_column  = YYRHSLOC (Rhs, N).last_column;	\
++	}								\
++      else								\
++	{								\
++	  (Current).first_line   = (Current).last_line   =		\
++	    YYRHSLOC (Rhs, 0).last_line;				\
++	  (Current).first_column = (Current).last_column =		\
++	    YYRHSLOC (Rhs, 0).last_column;				\
++	}								\
++    while (YYID (0))
++#endif
++
++
++/* YY_LOCATION_PRINT -- Print the location on the stream.
++   This macro was not mandated originally: define only if we know
++   we won't break user code: when these are the locations we know.  */
++
++#ifndef YY_LOCATION_PRINT
++# if defined(YYLTYPE_IS_TRIVIAL) && YYLTYPE_IS_TRIVIAL
++#  define YY_LOCATION_PRINT(File, Loc)			\
++     fprintf (File, "%d.%d-%d.%d",			\
++	      (Loc).first_line, (Loc).first_column,	\
++	      (Loc).last_line,  (Loc).last_column)
++# else
++#  define YY_LOCATION_PRINT(File, Loc) ((void) 0)
++# endif
+ #endif
+ 
++
+ /* YYLEX -- calling `yylex' with the right arguments.  */
+ 
+ #ifdef YYLEX_PARAM
+@@ -777,42 +975,99 @@
+ do {						\
+   if (yydebug)					\
+     YYFPRINTF Args;				\
+-} while (0)
++} while (YYID (0))
+ 
+-# define YYDSYMPRINT(Args)			\
+-do {						\
+-  if (yydebug)					\
+-    yysymprint Args;				\
+-} while (0)
++# define YY_SYMBOL_PRINT(Title, Type, Value, Location)			  \
++do {									  \
++  if (yydebug)								  \
++    {									  \
++      YYFPRINTF (stderr, "%s ", Title);					  \
++      yy_symbol_print (stderr,						  \
++		  Type, Value, pc); \
++      YYFPRINTF (stderr, "\n");						  \
++    }									  \
++} while (YYID (0))
++
++
++/*--------------------------------.
++| Print this symbol on YYOUTPUT.  |
++`--------------------------------*/
++
++/*ARGSUSED*/
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++static void
++yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, parser_control *pc)
++#else
++static void
++yy_symbol_value_print (yyoutput, yytype, yyvaluep, pc)
++    FILE *yyoutput;
++    int yytype;
++    YYSTYPE const * const yyvaluep;
++    parser_control *pc;
++#endif
++{
++  if (!yyvaluep)
++    return;
++  YYUSE (pc);
++# ifdef YYPRINT
++  if (yytype < YYNTOKENS)
++    YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
++# else
++  YYUSE (yyoutput);
++# endif
++  switch (yytype)
++    {
++      default:
++	break;
++    }
++}
+ 
+-# define YYDSYMPRINTF(Title, Token, Value, Location)		\
+-do {								\
+-  if (yydebug)							\
+-    {								\
+-      YYFPRINTF (stderr, "%s ", Title);				\
+-      yysymprint (stderr, 					\
+-                  Token, Value);	\
+-      YYFPRINTF (stderr, "\n");					\
+-    }								\
+-} while (0)
++
++/*--------------------------------.
++| Print this symbol on YYOUTPUT.  |
++`--------------------------------*/
++
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++static void
++yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, parser_control *pc)
++#else
++static void
++yy_symbol_print (yyoutput, yytype, yyvaluep, pc)
++    FILE *yyoutput;
++    int yytype;
++    YYSTYPE const * const yyvaluep;
++    parser_control *pc;
++#endif
++{
++  if (yytype < YYNTOKENS)
++    YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
++  else
++    YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
++
++  yy_symbol_value_print (yyoutput, yytype, yyvaluep, pc);
++  YYFPRINTF (yyoutput, ")");
++}
+ 
+ /*------------------------------------------------------------------.
+ | yy_stack_print -- Print the state stack from its BOTTOM up to its |
+ | TOP (included).                                                   |
+ `------------------------------------------------------------------*/
+ 
+-#if defined (__STDC__) || defined (__cplusplus)
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
+ static void
+-yy_stack_print (short *bottom, short *top)
++yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
+ #else
+ static void
+ yy_stack_print (bottom, top)
+-    short *bottom;
+-    short *top;
++    yytype_int16 *bottom;
++    yytype_int16 *top;
+ #endif
+ {
+   YYFPRINTF (stderr, "Stack now");
+-  for (/* Nothing. */; bottom <= top; ++bottom)
++  for (; bottom <= top; ++bottom)
+     YYFPRINTF (stderr, " %d", *bottom);
+   YYFPRINTF (stderr, "\n");
+ }
+@@ -821,45 +1076,53 @@
+ do {								\
+   if (yydebug)							\
+     yy_stack_print ((Bottom), (Top));				\
+-} while (0)
++} while (YYID (0))
+ 
+ 
+ /*------------------------------------------------.
+ | Report that the YYRULE is going to be reduced.  |
+ `------------------------------------------------*/
+ 
+-#if defined (__STDC__) || defined (__cplusplus)
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
+ static void
+-yy_reduce_print (int yyrule)
++yy_reduce_print (YYSTYPE *yyvsp, int yyrule, parser_control *pc)
+ #else
+ static void
+-yy_reduce_print (yyrule)
++yy_reduce_print (yyvsp, yyrule, pc)
++    YYSTYPE *yyvsp;
+     int yyrule;
++    parser_control *pc;
+ #endif
+ {
++  int yynrhs = yyr2[yyrule];
+   int yyi;
+-  unsigned int yylno = yyrline[yyrule];
+-  YYFPRINTF (stderr, "Reducing stack by rule %d (line %u), ",
+-             yyrule - 1, yylno);
+-  /* Print the symbols being reduced, and their result.  */
+-  for (yyi = yyprhs[yyrule]; 0 <= yyrhs[yyi]; yyi++)
+-    YYFPRINTF (stderr, "%s ", yytname [yyrhs[yyi]]);
+-  YYFPRINTF (stderr, "-> %s\n", yytname [yyr1[yyrule]]);
++  unsigned long int yylno = yyrline[yyrule];
++  YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
++	     yyrule - 1, yylno);
++  /* The symbols being reduced.  */
++  for (yyi = 0; yyi < yynrhs; yyi++)
++    {
++      fprintf (stderr, "   $%d = ", yyi + 1);
++      yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
++		       &(yyvsp[(yyi + 1) - (yynrhs)])
++		       		       , pc);
++      fprintf (stderr, "\n");
++    }
+ }
+ 
+ # define YY_REDUCE_PRINT(Rule)		\
+ do {					\
+   if (yydebug)				\
+-    yy_reduce_print (Rule);		\
+-} while (0)
++    yy_reduce_print (yyvsp, Rule, pc); \
++} while (YYID (0))
+ 
+ /* Nonzero means print parse trace.  It is left uninitialized so that
+    multiple parsers can coexist.  */
+ int yydebug;
+ #else /* !YYDEBUG */
+ # define YYDPRINTF(Args)
+-# define YYDSYMPRINT(Args)
+-# define YYDSYMPRINTF(Title, Token, Value, Location)
++# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
+ # define YY_STACK_PRINT(Bottom, Top)
+ # define YY_REDUCE_PRINT(Rule)
+ #endif /* !YYDEBUG */
+@@ -874,13 +1137,9 @@
+    if the built-in stack extension method is used).
+ 
+    Do not make this value too large; the results are undefined if
+-   SIZE_MAX < YYSTACK_BYTES (YYMAXDEPTH)
++   YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
+    evaluated with infinite-precision integer arithmetic.  */
+ 
+-#if defined (YYMAXDEPTH) && YYMAXDEPTH == 0
+-# undef YYMAXDEPTH
+-#endif
+-
+ #ifndef YYMAXDEPTH
+ # define YYMAXDEPTH 10000
+ #endif
+@@ -890,45 +1149,47 @@
+ #if YYERROR_VERBOSE
+ 
+ # ifndef yystrlen
+-#  if defined (__GLIBC__) && defined (_STRING_H)
++#  if defined __GLIBC__ && defined _STRING_H
+ #   define yystrlen strlen
+ #  else
+ /* Return the length of YYSTR.  */
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
+ static YYSIZE_T
+-#   if defined (__STDC__) || defined (__cplusplus)
+ yystrlen (const char *yystr)
+-#   else
++#else
++static YYSIZE_T
+ yystrlen (yystr)
+-     const char *yystr;
+-#   endif
++    const char *yystr;
++#endif
+ {
+-  register const char *yys = yystr;
+-
+-  while (*yys++ != '\0')
++  YYSIZE_T yylen;
++  for (yylen = 0; yystr[yylen]; yylen++)
+     continue;
+-
+-  return yys - yystr - 1;
++  return yylen;
+ }
+ #  endif
+ # endif
+ 
+ # ifndef yystpcpy
+-#  if defined (__GLIBC__) && defined (_STRING_H) && defined (_GNU_SOURCE)
++#  if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
+ #   define yystpcpy stpcpy
+ #  else
+ /* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
+    YYDEST.  */
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
+ static char *
+-#   if defined (__STDC__) || defined (__cplusplus)
+ yystpcpy (char *yydest, const char *yysrc)
+-#   else
++#else
++static char *
+ yystpcpy (yydest, yysrc)
+-     char *yydest;
+-     const char *yysrc;
+-#   endif
++    char *yydest;
++    const char *yysrc;
++#endif
+ {
+-  register char *yyd = yydest;
+-  register const char *yys = yysrc;
++  char *yyd = yydest;
++  const char *yys = yysrc;
+ 
+   while ((*yyd++ = *yys++) != '\0')
+     continue;
+@@ -938,70 +1199,194 @@
+ #  endif
+ # endif
+ 
+-#endif /* !YYERROR_VERBOSE */
++# ifndef yytnamerr
++/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
++   quotes and backslashes, so that it's suitable for yyerror.  The
++   heuristic is that double-quoting is unnecessary unless the string
++   contains an apostrophe, a comma, or backslash (other than
++   backslash-backslash).  YYSTR is taken from yytname.  If YYRES is
++   null, do not copy; instead, return the length of what the result
++   would have been.  */
++static YYSIZE_T
++yytnamerr (char *yyres, const char *yystr)
++{
++  if (*yystr == '"')
++    {
++      YYSIZE_T yyn = 0;
++      char const *yyp = yystr;
++
++      for (;;)
++	switch (*++yyp)
++	  {
++	  case '\'':
++	  case ',':
++	    goto do_not_strip_quotes;
++
++	  case '\\':
++	    if (*++yyp != '\\')
++	      goto do_not_strip_quotes;
++	    /* Fall through.  */
++	  default:
++	    if (yyres)
++	      yyres[yyn] = *yyp;
++	    yyn++;
++	    break;
+ 
+-
++	  case '"':
++	    if (yyres)
++	      yyres[yyn] = '\0';
++	    return yyn;
++	  }
++    do_not_strip_quotes: ;
++    }
+ 
+-#if YYDEBUG
+-/*--------------------------------.
+-| Print this symbol on YYOUTPUT.  |
+-`--------------------------------*/
++  if (! yyres)
++    return yystrlen (yystr);
+ 
+-#if defined (__STDC__) || defined (__cplusplus)
+-static void
+-yysymprint (FILE *yyoutput, int yytype, YYSTYPE *yyvaluep)
+-#else
+-static void
+-yysymprint (yyoutput, yytype, yyvaluep)
+-    FILE *yyoutput;
+-    int yytype;
+-    YYSTYPE *yyvaluep;
+-#endif
++  return yystpcpy (yyres, yystr) - yyres;
++}
++# endif
++
++/* Copy into YYRESULT an error message about the unexpected token
++   YYCHAR while in state YYSTATE.  Return the number of bytes copied,
++   including the terminating null byte.  If YYRESULT is null, do not
++   copy anything; just return the number of bytes that would be
++   copied.  As a special case, return 0 if an ordinary "syntax error"
++   message will do.  Return YYSIZE_MAXIMUM if overflow occurs during
++   size calculation.  */
++static YYSIZE_T
++yysyntax_error (char *yyresult, int yystate, int yychar)
+ {
+-  /* Pacify ``unused variable'' warnings.  */
+-  (void) yyvaluep;
++  int yyn = yypact[yystate];
+ 
+-  if (yytype < YYNTOKENS)
++  if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
++    return 0;
++  else
+     {
+-      YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
+-# ifdef YYPRINT
+-      YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
++      int yytype = YYTRANSLATE (yychar);
++      YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
++      YYSIZE_T yysize = yysize0;
++      YYSIZE_T yysize1;
++      int yysize_overflow = 0;
++      enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
++      char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
++      int yyx;
++
++# if 0
++      /* This is so xgettext sees the translatable formats that are
++	 constructed on the fly.  */
++      YY_("syntax error, unexpected %s");
++      YY_("syntax error, unexpected %s, expecting %s");
++      YY_("syntax error, unexpected %s, expecting %s or %s");
++      YY_("syntax error, unexpected %s, expecting %s or %s or %s");
++      YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
+ # endif
+-    }
+-  else
+-    YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
++      char *yyfmt;
++      char const *yyf;
++      static char const yyunexpected[] = "syntax error, unexpected %s";
++      static char const yyexpecting[] = ", expecting %s";
++      static char const yyor[] = " or %s";
++      char yyformat[sizeof yyunexpected
++		    + sizeof yyexpecting - 1
++		    + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
++		       * (sizeof yyor - 1))];
++      char const *yyprefix = yyexpecting;
++
++      /* Start YYX at -YYN if negative to avoid negative indexes in
++	 YYCHECK.  */
++      int yyxbegin = yyn < 0 ? -yyn : 0;
++
++      /* Stay within bounds of both yycheck and yytname.  */
++      int yychecklim = YYLAST - yyn + 1;
++      int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
++      int yycount = 1;
+ 
+-  switch (yytype)
+-    {
+-      default:
+-        break;
++      yyarg[0] = yytname[yytype];
++      yyfmt = yystpcpy (yyformat, yyunexpected);
++
++      for (yyx = yyxbegin; yyx < yyxend; ++yyx)
++	if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
++	  {
++	    if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
++	      {
++		yycount = 1;
++		yysize = yysize0;
++		yyformat[sizeof yyunexpected - 1] = '\0';
++		break;
++	      }
++	    yyarg[yycount++] = yytname[yyx];
++	    yysize1 = yysize + yytnamerr (0, yytname[yyx]);
++	    yysize_overflow |= (yysize1 < yysize);
++	    yysize = yysize1;
++	    yyfmt = yystpcpy (yyfmt, yyprefix);
++	    yyprefix = yyor;
++	  }
++
++      yyf = YY_(yyformat);
++      yysize1 = yysize + yystrlen (yyf);
++      yysize_overflow |= (yysize1 < yysize);
++      yysize = yysize1;
++
++      if (yysize_overflow)
++	return YYSIZE_MAXIMUM;
++
++      if (yyresult)
++	{
++	  /* Avoid sprintf, as that infringes on the user's name space.
++	     Don't have undefined behavior even if the translation
++	     produced a string with the wrong number of "%s"s.  */
++	  char *yyp = yyresult;
++	  int yyi = 0;
++	  while ((*yyp = *yyf) != '\0')
++	    {
++	      if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
++		{
++		  yyp += yytnamerr (yyp, yyarg[yyi++]);
++		  yyf += 2;
++		}
++	      else
++		{
++		  yyp++;
++		  yyf++;
++		}
++	    }
++	}
++      return yysize;
+     }
+-  YYFPRINTF (yyoutput, ")");
+ }
++#endif /* YYERROR_VERBOSE */
++
+ 
+-#endif /* ! YYDEBUG */
+ /*-----------------------------------------------.
+ | Release the memory associated to this symbol.  |
+ `-----------------------------------------------*/
+ 
+-#if defined (__STDC__) || defined (__cplusplus)
++/*ARGSUSED*/
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
+ static void
+-yydestruct (int yytype, YYSTYPE *yyvaluep)
++yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, parser_control *pc)
+ #else
+ static void
+-yydestruct (yytype, yyvaluep)
++yydestruct (yymsg, yytype, yyvaluep, pc)
++    const char *yymsg;
+     int yytype;
+     YYSTYPE *yyvaluep;
++    parser_control *pc;
+ #endif
+ {
+-  /* Pacify ``unused variable'' warnings.  */
+-  (void) yyvaluep;
++  YYUSE (yyvaluep);
++  YYUSE (pc);
++
++  if (!yymsg)
++    yymsg = "Deleting";
++  YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
+ 
+   switch (yytype)
+     {
+ 
+       default:
+-        break;
++	break;
+     }
+ }
+ 
+@@ -1009,14 +1394,14 @@
+ /* Prevent warnings from -Wmissing-prototypes.  */
+ 
+ #ifdef YYPARSE_PARAM
+-# if defined (__STDC__) || defined (__cplusplus)
++#if defined __STDC__ || defined __cplusplus
+ int yyparse (void *YYPARSE_PARAM);
+-# else
++#else
+ int yyparse ();
+-# endif
++#endif
+ #else /* ! YYPARSE_PARAM */
+-#if defined (__STDC__) || defined (__cplusplus)
+-int yyparse ( parser_control *pc );
++#if defined __STDC__ || defined __cplusplus
++int yyparse (parser_control *pc);
+ #else
+ int yyparse ();
+ #endif
+@@ -1032,39 +1417,49 @@
+ `----------*/
+ 
+ #ifdef YYPARSE_PARAM
+-# if defined (__STDC__) || defined (__cplusplus)
+-int yyparse (void *YYPARSE_PARAM)
+-# else
+-int yyparse (YYPARSE_PARAM)
+-  void *YYPARSE_PARAM;
+-# endif
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
++int
++yyparse (void *YYPARSE_PARAM)
++#else
++int
++yyparse (YYPARSE_PARAM)
++    void *YYPARSE_PARAM;
++#endif
+ #else /* ! YYPARSE_PARAM */
+-#if defined (__STDC__) || defined (__cplusplus)
++#if (defined __STDC__ || defined __C99__FUNC__ \
++     || defined __cplusplus || defined _MSC_VER)
+ int
+-yyparse ( parser_control *pc )
++yyparse (parser_control *pc)
+ #else
+ int
+ yyparse (pc)
+-     parser_control *pc ;
++    parser_control *pc;
+ #endif
+ #endif
+ {
+-  /* The lookahead symbol.  */
++  /* The look-ahead symbol.  */
+ int yychar;
+ 
+-/* The semantic value of the lookahead symbol.  */
++/* The semantic value of the look-ahead symbol.  */
+ YYSTYPE yylval;
+ 
+ /* Number of syntax errors so far.  */
+ int yynerrs;
+ 
+-  register int yystate;
+-  register int yyn;
++  int yystate;
++  int yyn;
+   int yyresult;
+   /* Number of tokens to shift before error messages enabled.  */
+   int yyerrstatus;
+-  /* Lookahead token as an internal (translated) token number.  */
++  /* Look-ahead token as an internal (translated) token number.  */
+   int yytoken = 0;
++#if YYERROR_VERBOSE
++  /* Buffer for error messages, and its allocated size.  */
++  char yymsgbuf[128];
++  char *yymsg = yymsgbuf;
++  YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
++#endif
+ 
+   /* Three stacks and their tools:
+      `yyss': related to states,
+@@ -1075,18 +1470,18 @@
+      to reallocate them elsewhere.  */
+ 
+   /* The state stack.  */
+-  short	yyssa[YYINITDEPTH];
+-  short *yyss = yyssa;
+-  register short *yyssp;
++  yytype_int16 yyssa[YYINITDEPTH];
++  yytype_int16 *yyss = yyssa;
++  yytype_int16 *yyssp;
+ 
+   /* The semantic value stack.  */
+   YYSTYPE yyvsa[YYINITDEPTH];
+   YYSTYPE *yyvs = yyvsa;
+-  register YYSTYPE *yyvsp;
++  YYSTYPE *yyvsp;
+ 
+ 
+ 
+-#define YYPOPSTACK   (yyvsp--, yyssp--)
++#define YYPOPSTACK(N)   (yyvsp -= (N), yyssp -= (N))
+ 
+   YYSIZE_T yystacksize = YYINITDEPTH;
+ 
+@@ -1095,9 +1490,9 @@
+   YYSTYPE yyval;
+ 
+ 
+-  /* When reducing, the number of symbols on the RHS of the reduced
+-     rule.  */
+-  int yylen;
++  /* The number of symbols on the RHS of the reduced rule.
++     Keep to zero when no symbol should be popped.  */
++  int yylen = 0;
+ 
+   YYDPRINTF ((stderr, "Starting parse\n"));
+ 
+@@ -1121,8 +1516,7 @@
+ `------------------------------------------------------------*/
+  yynewstate:
+   /* In all cases, when you get here, the value and location stacks
+-     have just been pushed. so pushing a state here evens the stacks.
+-     */
++     have just been pushed.  So pushing a state here evens the stacks.  */
+   yyssp++;
+ 
+  yysetstate:
+@@ -1135,18 +1529,18 @@
+ 
+ #ifdef yyoverflow
+       {
+-	/* Give user a chance to reallocate the stack. Use copies of
++	/* Give user a chance to reallocate the stack.  Use copies of
+ 	   these so that the &'s don't force the real ones into
+ 	   memory.  */
+ 	YYSTYPE *yyvs1 = yyvs;
+-	short *yyss1 = yyss;
++	yytype_int16 *yyss1 = yyss;
+ 
+ 
+ 	/* Each stack pointer address is followed by the size of the
+ 	   data in use in that stack, in bytes.  This used to be a
+ 	   conditional around just the two extra args, but that might
+ 	   be undefined if yyoverflow is a macro.  */
+-	yyoverflow ("parser stack overflow",
++	yyoverflow (YY_("memory exhausted"),
+ 		    &yyss1, yysize * sizeof (*yyssp),
+ 		    &yyvs1, yysize * sizeof (*yyvsp),
+ 
+@@ -1157,21 +1551,21 @@
+       }
+ #else /* no yyoverflow */
+ # ifndef YYSTACK_RELOCATE
+-      goto yyoverflowlab;
++      goto yyexhaustedlab;
+ # else
+       /* Extend the stack our own way.  */
+       if (YYMAXDEPTH <= yystacksize)
+-	goto yyoverflowlab;
++	goto yyexhaustedlab;
+       yystacksize *= 2;
+       if (YYMAXDEPTH < yystacksize)
+ 	yystacksize = YYMAXDEPTH;
+ 
+       {
+-	short *yyss1 = yyss;
++	yytype_int16 *yyss1 = yyss;
+ 	union yyalloc *yyptr =
+ 	  (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+ 	if (! yyptr)
+-	  goto yyoverflowlab;
++	  goto yyexhaustedlab;
+ 	YYSTACK_RELOCATE (yyss);
+ 	YYSTACK_RELOCATE (yyvs);
+ 
+@@ -1202,19 +1596,17 @@
+ `-----------*/
+ yybackup:
+ 
+-/* Do appropriate processing given the current state.  */
+-/* Read a lookahead token if we need one and don't already have one.  */
+-/* yyresume: */
+-
+-  /* First try to decide what to do without reference to lookahead token.  */
++  /* Do appropriate processing given the current state.  Read a
++     look-ahead token if we need one and don't already have one.  */
+ 
++  /* First try to decide what to do without reference to look-ahead token.  */
+   yyn = yypact[yystate];
+   if (yyn == YYPACT_NINF)
+     goto yydefault;
+ 
+-  /* Not known => get a lookahead token if don't already have one.  */
++  /* Not known => get a look-ahead token if don't already have one.  */
+ 
+-  /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol.  */
++  /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol.  */
+   if (yychar == YYEMPTY)
+     {
+       YYDPRINTF ((stderr, "Reading a token: "));
+@@ -1229,7 +1621,7 @@
+   else
+     {
+       yytoken = YYTRANSLATE (yychar);
+-      YYDSYMPRINTF ("Next token is", yytoken, &yylval, &yylloc);
++      YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
+     }
+ 
+   /* If the proper action on seeing token YYTOKEN is to reduce or to
+@@ -1249,22 +1641,21 @@
+   if (yyn == YYFINAL)
+     YYACCEPT;
+ 
+-  /* Shift the lookahead token.  */
+-  YYDPRINTF ((stderr, "Shifting token %s, ", yytname[yytoken]));
+-
+-  /* Discard the token being shifted unless it is eof.  */
+-  if (yychar != YYEOF)
+-    yychar = YYEMPTY;
+-
+-  *++yyvsp = yylval;
+-
+-
+   /* Count tokens shifted since error; after three, turn off error
+      status.  */
+   if (yyerrstatus)
+     yyerrstatus--;
+ 
++  /* Shift the look-ahead token.  */
++  YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
++
++  /* Discard the shifted token unless it is eof.  */
++  if (yychar != YYEOF)
++    yychar = YYEMPTY;
++
+   yystate = yyn;
++  *++yyvsp = yylval;
++
+   goto yynewstate;
+ 
+ 
+@@ -1300,272 +1691,272 @@
+   switch (yyn)
+     {
+         case 4:
+-#line 236 "getdate.y"
++#line 287 "getdate.y"
+     {
+-	pc->seconds = yyvsp[0].timespec;
++	pc->seconds = (yyvsp[(2) - (2)].timespec);
+ 	pc->timespec_seen = true;
+-      }
++      ;}
+     break;
+ 
+   case 7:
+-#line 249 "getdate.y"
+-    { pc->times_seen++; }
++#line 300 "getdate.y"
++    { pc->times_seen++; ;}
+     break;
+ 
+   case 8:
+-#line 251 "getdate.y"
+-    { pc->local_zones_seen++; }
++#line 302 "getdate.y"
++    { pc->local_zones_seen++; ;}
+     break;
+ 
+   case 9:
+-#line 253 "getdate.y"
+-    { pc->zones_seen++; }
++#line 304 "getdate.y"
++    { pc->zones_seen++; ;}
+     break;
+ 
+   case 10:
+-#line 255 "getdate.y"
+-    { pc->dates_seen++; }
++#line 306 "getdate.y"
++    { pc->dates_seen++; ;}
+     break;
+ 
+   case 11:
+-#line 257 "getdate.y"
+-    { pc->days_seen++; }
++#line 308 "getdate.y"
++    { pc->days_seen++; ;}
+     break;
+ 
+   case 12:
+-#line 259 "getdate.y"
+-    { pc->rels_seen = true; }
++#line 310 "getdate.y"
++    { pc->rels_seen = true; ;}
+     break;
+ 
+   case 14:
+-#line 265 "getdate.y"
++#line 316 "getdate.y"
+     {
+-	pc->hour = yyvsp[-1].textintval.value;
++	pc->hour = (yyvsp[(1) - (2)].textintval).value;
+ 	pc->minutes = 0;
+ 	pc->seconds.tv_sec = 0;
+ 	pc->seconds.tv_nsec = 0;
+-	pc->meridian = yyvsp[0].intval;
+-      }
++	pc->meridian = (yyvsp[(2) - (2)].intval);
++      ;}
+     break;
+ 
+   case 15:
+-#line 273 "getdate.y"
++#line 324 "getdate.y"
+     {
+-	pc->hour = yyvsp[-3].textintval.value;
+-	pc->minutes = yyvsp[-1].textintval.value;
++	pc->hour = (yyvsp[(1) - (4)].textintval).value;
++	pc->minutes = (yyvsp[(3) - (4)].textintval).value;
+ 	pc->seconds.tv_sec = 0;
+ 	pc->seconds.tv_nsec = 0;
+-	pc->meridian = yyvsp[0].intval;
+-      }
++	pc->meridian = (yyvsp[(4) - (4)].intval);
++      ;}
+     break;
+ 
+   case 16:
+-#line 281 "getdate.y"
++#line 332 "getdate.y"
+     {
+-	pc->hour = yyvsp[-4].textintval.value;
+-	pc->minutes = yyvsp[-2].textintval.value;
++	pc->hour = (yyvsp[(1) - (5)].textintval).value;
++	pc->minutes = (yyvsp[(3) - (5)].textintval).value;
+ 	pc->seconds.tv_sec = 0;
+ 	pc->seconds.tv_nsec = 0;
+ 	pc->meridian = MER24;
+ 	pc->zones_seen++;
+-	pc->time_zone = time_zone_hhmm (yyvsp[-1].textintval, yyvsp[0].intval);
+-      }
++	pc->time_zone = time_zone_hhmm ((yyvsp[(4) - (5)].textintval), (yyvsp[(5) - (5)].intval));
++      ;}
+     break;
+ 
+   case 17:
+-#line 291 "getdate.y"
++#line 342 "getdate.y"
+     {
+-	pc->hour = yyvsp[-5].textintval.value;
+-	pc->minutes = yyvsp[-3].textintval.value;
+-	pc->seconds = yyvsp[-1].timespec;
+-	pc->meridian = yyvsp[0].intval;
+-      }
++	pc->hour = (yyvsp[(1) - (6)].textintval).value;
++	pc->minutes = (yyvsp[(3) - (6)].textintval).value;
++	pc->seconds = (yyvsp[(5) - (6)].timespec);
++	pc->meridian = (yyvsp[(6) - (6)].intval);
++      ;}
+     break;
+ 
+   case 18:
+-#line 298 "getdate.y"
++#line 349 "getdate.y"
+     {
+-	pc->hour = yyvsp[-6].textintval.value;
+-	pc->minutes = yyvsp[-4].textintval.value;
+-	pc->seconds = yyvsp[-2].timespec;
++	pc->hour = (yyvsp[(1) - (7)].textintval).value;
++	pc->minutes = (yyvsp[(3) - (7)].textintval).value;
++	pc->seconds = (yyvsp[(5) - (7)].timespec);
+ 	pc->meridian = MER24;
+ 	pc->zones_seen++;
+-	pc->time_zone = time_zone_hhmm (yyvsp[-1].textintval, yyvsp[0].intval);
+-      }
++	pc->time_zone = time_zone_hhmm ((yyvsp[(6) - (7)].textintval), (yyvsp[(7) - (7)].intval));
++      ;}
+     break;
+ 
+   case 19:
+-#line 310 "getdate.y"
++#line 361 "getdate.y"
+     {
+-	pc->local_isdst = yyvsp[0].intval;
+-	pc->dsts_seen += (0 < yyvsp[0].intval);
+-      }
++	pc->local_isdst = (yyvsp[(1) - (1)].intval);
++	pc->dsts_seen += (0 < (yyvsp[(1) - (1)].intval));
++      ;}
+     break;
+ 
+   case 20:
+-#line 315 "getdate.y"
++#line 366 "getdate.y"
+     {
+ 	pc->local_isdst = 1;
+-	pc->dsts_seen += (0 < yyvsp[-1].intval) + 1;
+-      }
++	pc->dsts_seen += (0 < (yyvsp[(1) - (2)].intval)) + 1;
++      ;}
+     break;
+ 
+   case 21:
+-#line 323 "getdate.y"
+-    { pc->time_zone = yyvsp[0].intval; }
++#line 374 "getdate.y"
++    { pc->time_zone = (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 22:
+-#line 325 "getdate.y"
+-    { pc->time_zone = yyvsp[-1].intval; pc->rels_seen = true; }
++#line 376 "getdate.y"
++    { pc->time_zone = (yyvsp[(1) - (2)].intval); pc->rels_seen = true; ;}
+     break;
+ 
+   case 23:
+-#line 327 "getdate.y"
+-    { pc->time_zone = yyvsp[-2].intval + time_zone_hhmm (yyvsp[-1].textintval, yyvsp[0].intval); }
++#line 378 "getdate.y"
++    { pc->time_zone = (yyvsp[(1) - (3)].intval) + time_zone_hhmm ((yyvsp[(2) - (3)].textintval), (yyvsp[(3) - (3)].intval)); ;}
+     break;
+ 
+   case 24:
+-#line 329 "getdate.y"
+-    { pc->time_zone = yyvsp[0].intval + 60; }
++#line 380 "getdate.y"
++    { pc->time_zone = (yyvsp[(1) - (1)].intval) + 60; ;}
+     break;
+ 
+   case 25:
+-#line 331 "getdate.y"
+-    { pc->time_zone = yyvsp[-1].intval + 60; }
++#line 382 "getdate.y"
++    { pc->time_zone = (yyvsp[(1) - (2)].intval) + 60; ;}
+     break;
+ 
+   case 26:
+-#line 336 "getdate.y"
++#line 387 "getdate.y"
+     {
+ 	pc->day_ordinal = 1;
+-	pc->day_number = yyvsp[0].intval;
+-      }
++	pc->day_number = (yyvsp[(1) - (1)].intval);
++      ;}
+     break;
+ 
+   case 27:
+-#line 341 "getdate.y"
++#line 392 "getdate.y"
+     {
+ 	pc->day_ordinal = 1;
+-	pc->day_number = yyvsp[-1].intval;
+-      }
++	pc->day_number = (yyvsp[(1) - (2)].intval);
++      ;}
+     break;
+ 
+   case 28:
+-#line 346 "getdate.y"
++#line 397 "getdate.y"
+     {
+-	pc->day_ordinal = yyvsp[-1].intval;
+-	pc->day_number = yyvsp[0].intval;
+-      }
++	pc->day_ordinal = (yyvsp[(1) - (2)].intval);
++	pc->day_number = (yyvsp[(2) - (2)].intval);
++      ;}
+     break;
+ 
+   case 29:
+-#line 351 "getdate.y"
++#line 402 "getdate.y"
+     {
+-	pc->day_ordinal = yyvsp[-1].textintval.value;
+-	pc->day_number = yyvsp[0].intval;
+-      }
++	pc->day_ordinal = (yyvsp[(1) - (2)].textintval).value;
++	pc->day_number = (yyvsp[(2) - (2)].intval);
++      ;}
+     break;
+ 
+   case 30:
+-#line 359 "getdate.y"
++#line 410 "getdate.y"
+     {
+-	pc->month = yyvsp[-2].textintval.value;
+-	pc->day = yyvsp[0].textintval.value;
+-      }
++	pc->month = (yyvsp[(1) - (3)].textintval).value;
++	pc->day = (yyvsp[(3) - (3)].textintval).value;
++      ;}
+     break;
+ 
+   case 31:
+-#line 364 "getdate.y"
++#line 415 "getdate.y"
+     {
+ 	/* Interpret as YYYY/MM/DD if the first value has 4 or more digits,
+ 	   otherwise as MM/DD/YY.
+ 	   The goal in recognizing YYYY/MM/DD is solely to support legacy
+ 	   machine-generated dates like those in an RCS log listing.  If
+ 	   you want portability, use the ISO 8601 format.  */
+-	if (4 <= yyvsp[-4].textintval.digits)
++	if (4 <= (yyvsp[(1) - (5)].textintval).digits)
+ 	  {
+-	    pc->year = yyvsp[-4].textintval;
+-	    pc->month = yyvsp[-2].textintval.value;
+-	    pc->day = yyvsp[0].textintval.value;
++	    pc->year = (yyvsp[(1) - (5)].textintval);
++	    pc->month = (yyvsp[(3) - (5)].textintval).value;
++	    pc->day = (yyvsp[(5) - (5)].textintval).value;
+ 	  }
+ 	else
+ 	  {
+-	    pc->month = yyvsp[-4].textintval.value;
+-	    pc->day = yyvsp[-2].textintval.value;
+-	    pc->year = yyvsp[0].textintval;
++	    pc->month = (yyvsp[(1) - (5)].textintval).value;
++	    pc->day = (yyvsp[(3) - (5)].textintval).value;
++	    pc->year = (yyvsp[(5) - (5)].textintval);
+ 	  }
+-      }
++      ;}
+     break;
+ 
+   case 32:
+-#line 384 "getdate.y"
++#line 435 "getdate.y"
+     {
+ 	/* ISO 8601 format.  YYYY-MM-DD.  */
+-	pc->year = yyvsp[-2].textintval;
+-	pc->month = -yyvsp[-1].textintval.value;
+-	pc->day = -yyvsp[0].textintval.value;
+-      }
++	pc->year = (yyvsp[(1) - (3)].textintval);
++	pc->month = -(yyvsp[(2) - (3)].textintval).value;
++	pc->day = -(yyvsp[(3) - (3)].textintval).value;
++      ;}
+     break;
+ 
+   case 33:
+-#line 391 "getdate.y"
++#line 442 "getdate.y"
+     {
+ 	/* e.g. 17-JUN-1992.  */
+-	pc->day = yyvsp[-2].textintval.value;
+-	pc->month = yyvsp[-1].intval;
+-	pc->year.value = -yyvsp[0].textintval.value;
+-	pc->year.digits = yyvsp[0].textintval.digits;
+-      }
++	pc->day = (yyvsp[(1) - (3)].textintval).value;
++	pc->month = (yyvsp[(2) - (3)].intval);
++	pc->year.value = -(yyvsp[(3) - (3)].textintval).value;
++	pc->year.digits = (yyvsp[(3) - (3)].textintval).digits;
++      ;}
+     break;
+ 
+   case 34:
+-#line 399 "getdate.y"
++#line 450 "getdate.y"
+     {
+ 	/* e.g. JUN-17-1992.  */
+-	pc->month = yyvsp[-2].intval;
+-	pc->day = -yyvsp[-1].textintval.value;
+-	pc->year.value = -yyvsp[0].textintval.value;
+-	pc->year.digits = yyvsp[0].textintval.digits;
+-      }
++	pc->month = (yyvsp[(1) - (3)].intval);
++	pc->day = -(yyvsp[(2) - (3)].textintval).value;
++	pc->year.value = -(yyvsp[(3) - (3)].textintval).value;
++	pc->year.digits = (yyvsp[(3) - (3)].textintval).digits;
++      ;}
+     break;
+ 
+   case 35:
+-#line 407 "getdate.y"
++#line 458 "getdate.y"
+     {
+-	pc->month = yyvsp[-1].intval;
+-	pc->day = yyvsp[0].textintval.value;
+-      }
++	pc->month = (yyvsp[(1) - (2)].intval);
++	pc->day = (yyvsp[(2) - (2)].textintval).value;
++      ;}
+     break;
+ 
+   case 36:
+-#line 412 "getdate.y"
++#line 463 "getdate.y"
+     {
+-	pc->month = yyvsp[-3].intval;
+-	pc->day = yyvsp[-2].textintval.value;
+-	pc->year = yyvsp[0].textintval;
+-      }
++	pc->month = (yyvsp[(1) - (4)].intval);
++	pc->day = (yyvsp[(2) - (4)].textintval).value;
++	pc->year = (yyvsp[(4) - (4)].textintval);
++      ;}
+     break;
+ 
+   case 37:
+-#line 418 "getdate.y"
++#line 469 "getdate.y"
+     {
+-	pc->day = yyvsp[-1].textintval.value;
+-	pc->month = yyvsp[0].intval;
+-      }
++	pc->day = (yyvsp[(1) - (2)].textintval).value;
++	pc->month = (yyvsp[(2) - (2)].intval);
++      ;}
+     break;
+ 
+   case 38:
+-#line 423 "getdate.y"
++#line 474 "getdate.y"
+     {
+-	pc->day = yyvsp[-2].textintval.value;
+-	pc->month = yyvsp[-1].intval;
+-	pc->year = yyvsp[0].textintval;
+-      }
++	pc->day = (yyvsp[(1) - (3)].textintval).value;
++	pc->month = (yyvsp[(2) - (3)].intval);
++	pc->year = (yyvsp[(3) - (3)].textintval);
++      ;}
+     break;
+ 
+   case 39:
+-#line 432 "getdate.y"
++#line 483 "getdate.y"
+     {
+ 	pc->rel_ns = -pc->rel_ns;
+ 	pc->rel_seconds = -pc->rel_seconds;
+@@ -1574,216 +1965,215 @@
+ 	pc->rel_day = -pc->rel_day;
+ 	pc->rel_month = -pc->rel_month;
+ 	pc->rel_year = -pc->rel_year;
+-      }
++      ;}
+     break;
+ 
+   case 41:
+-#line 446 "getdate.y"
+-    { pc->rel_year += yyvsp[-1].intval * yyvsp[0].intval; }
++#line 497 "getdate.y"
++    { pc->rel_year += (yyvsp[(1) - (2)].intval) * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 42:
+-#line 448 "getdate.y"
+-    { pc->rel_year += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 499 "getdate.y"
++    { pc->rel_year += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 43:
+-#line 450 "getdate.y"
+-    { pc->rel_year += yyvsp[0].intval; }
++#line 501 "getdate.y"
++    { pc->rel_year += (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 44:
+-#line 452 "getdate.y"
+-    { pc->rel_month += yyvsp[-1].intval * yyvsp[0].intval; }
++#line 503 "getdate.y"
++    { pc->rel_month += (yyvsp[(1) - (2)].intval) * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 45:
+-#line 454 "getdate.y"
+-    { pc->rel_month += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 505 "getdate.y"
++    { pc->rel_month += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 46:
+-#line 456 "getdate.y"
+-    { pc->rel_month += yyvsp[0].intval; }
++#line 507 "getdate.y"
++    { pc->rel_month += (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 47:
+-#line 458 "getdate.y"
+-    { pc->rel_day += yyvsp[-1].intval * yyvsp[0].intval; }
++#line 509 "getdate.y"
++    { pc->rel_day += (yyvsp[(1) - (2)].intval) * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 48:
+-#line 460 "getdate.y"
+-    { pc->rel_day += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 511 "getdate.y"
++    { pc->rel_day += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 49:
+-#line 462 "getdate.y"
+-    { pc->rel_day += yyvsp[0].intval; }
++#line 513 "getdate.y"
++    { pc->rel_day += (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 50:
+-#line 464 "getdate.y"
+-    { pc->rel_hour += yyvsp[-1].intval * yyvsp[0].intval; }
++#line 515 "getdate.y"
++    { pc->rel_hour += (yyvsp[(1) - (2)].intval) * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 51:
+-#line 466 "getdate.y"
+-    { pc->rel_hour += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 517 "getdate.y"
++    { pc->rel_hour += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 52:
+-#line 468 "getdate.y"
+-    { pc->rel_hour += yyvsp[0].intval; }
++#line 519 "getdate.y"
++    { pc->rel_hour += (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 53:
+-#line 470 "getdate.y"
+-    { pc->rel_minutes += yyvsp[-1].intval * yyvsp[0].intval; }
++#line 521 "getdate.y"
++    { pc->rel_minutes += (yyvsp[(1) - (2)].intval) * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 54:
+-#line 472 "getdate.y"
+-    { pc->rel_minutes += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 523 "getdate.y"
++    { pc->rel_minutes += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 55:
+-#line 474 "getdate.y"
+-    { pc->rel_minutes += yyvsp[0].intval; }
++#line 525 "getdate.y"
++    { pc->rel_minutes += (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 56:
+-#line 476 "getdate.y"
+-    { pc->rel_seconds += yyvsp[-1].intval * yyvsp[0].intval; }
++#line 527 "getdate.y"
++    { pc->rel_seconds += (yyvsp[(1) - (2)].intval) * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 57:
+-#line 478 "getdate.y"
+-    { pc->rel_seconds += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 529 "getdate.y"
++    { pc->rel_seconds += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 58:
+-#line 480 "getdate.y"
+-    { pc->rel_seconds += yyvsp[-1].timespec.tv_sec * yyvsp[0].intval; pc->rel_ns += yyvsp[-1].timespec.tv_nsec * yyvsp[0].intval; }
++#line 531 "getdate.y"
++    { pc->rel_seconds += (yyvsp[(1) - (2)].timespec).tv_sec * (yyvsp[(2) - (2)].intval); pc->rel_ns += (yyvsp[(1) - (2)].timespec).tv_nsec * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 59:
+-#line 482 "getdate.y"
+-    { pc->rel_seconds += yyvsp[-1].timespec.tv_sec * yyvsp[0].intval; pc->rel_ns += yyvsp[-1].timespec.tv_nsec * yyvsp[0].intval; }
++#line 533 "getdate.y"
++    { pc->rel_seconds += (yyvsp[(1) - (2)].timespec).tv_sec * (yyvsp[(2) - (2)].intval); pc->rel_ns += (yyvsp[(1) - (2)].timespec).tv_nsec * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 60:
+-#line 484 "getdate.y"
+-    { pc->rel_seconds += yyvsp[0].intval; }
++#line 535 "getdate.y"
++    { pc->rel_seconds += (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+   case 62:
+-#line 490 "getdate.y"
+-    { pc->rel_year += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 541 "getdate.y"
++    { pc->rel_year += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 63:
+-#line 492 "getdate.y"
+-    { pc->rel_month += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 543 "getdate.y"
++    { pc->rel_month += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 64:
+-#line 494 "getdate.y"
+-    { pc->rel_day += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 545 "getdate.y"
++    { pc->rel_day += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 65:
+-#line 496 "getdate.y"
+-    { pc->rel_hour += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 547 "getdate.y"
++    { pc->rel_hour += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 66:
+-#line 498 "getdate.y"
+-    { pc->rel_minutes += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 549 "getdate.y"
++    { pc->rel_minutes += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 67:
+-#line 500 "getdate.y"
+-    { pc->rel_seconds += yyvsp[-1].textintval.value * yyvsp[0].intval; }
++#line 551 "getdate.y"
++    { pc->rel_seconds += (yyvsp[(1) - (2)].textintval).value * (yyvsp[(2) - (2)].intval); ;}
+     break;
+ 
+   case 71:
+-#line 508 "getdate.y"
+-    { yyval.timespec.tv_sec = yyvsp[0].textintval.value; yyval.timespec.tv_nsec = 0; }
++#line 559 "getdate.y"
++    { (yyval.timespec).tv_sec = (yyvsp[(1) - (1)].textintval).value; (yyval.timespec).tv_nsec = 0; ;}
+     break;
+ 
+   case 73:
+-#line 514 "getdate.y"
+-    { yyval.timespec.tv_sec = yyvsp[0].textintval.value; yyval.timespec.tv_nsec = 0; }
++#line 565 "getdate.y"
++    { (yyval.timespec).tv_sec = (yyvsp[(1) - (1)].textintval).value; (yyval.timespec).tv_nsec = 0; ;}
+     break;
+ 
+   case 74:
+-#line 519 "getdate.y"
++#line 570 "getdate.y"
+     {
+ 	if (pc->dates_seen && ! pc->year.digits
+-	    && ! pc->rels_seen && (pc->times_seen || 2 < yyvsp[0].textintval.digits))
+-	  pc->year = yyvsp[0].textintval;
++	    && ! pc->rels_seen && (pc->times_seen || 2 < (yyvsp[(1) - (1)].textintval).digits))
++	  pc->year = (yyvsp[(1) - (1)].textintval);
+ 	else
+ 	  {
+-	    if (4 < yyvsp[0].textintval.digits)
++	    if (4 < (yyvsp[(1) - (1)].textintval).digits)
+ 	      {
+ 		pc->dates_seen++;
+-		pc->day = yyvsp[0].textintval.value % 100;
+-		pc->month = (yyvsp[0].textintval.value / 100) % 100;
+-		pc->year.value = yyvsp[0].textintval.value / 10000;
+-		pc->year.digits = yyvsp[0].textintval.digits - 4;
++		pc->day = (yyvsp[(1) - (1)].textintval).value % 100;
++		pc->month = ((yyvsp[(1) - (1)].textintval).value / 100) % 100;
++		pc->year.value = (yyvsp[(1) - (1)].textintval).value / 10000;
++		pc->year.digits = (yyvsp[(1) - (1)].textintval).digits - 4;
+ 	      }
+ 	    else
+ 	      {
+ 		pc->times_seen++;
+-		if (yyvsp[0].textintval.digits <= 2)
++		if ((yyvsp[(1) - (1)].textintval).digits <= 2)
+ 		  {
+-		    pc->hour = yyvsp[0].textintval.value;
++		    pc->hour = (yyvsp[(1) - (1)].textintval).value;
+ 		    pc->minutes = 0;
+ 		  }
+ 		else
+ 		  {
+-		    pc->hour = yyvsp[0].textintval.value / 100;
+-		    pc->minutes = yyvsp[0].textintval.value % 100;
++		    pc->hour = (yyvsp[(1) - (1)].textintval).value / 100;
++		    pc->minutes = (yyvsp[(1) - (1)].textintval).value % 100;
+ 		  }
+ 		pc->seconds.tv_sec = 0;
+ 		pc->seconds.tv_nsec = 0;
+ 		pc->meridian = MER24;
+ 	      }
+ 	  }
+-      }
++      ;}
+     break;
+ 
+   case 75:
+-#line 556 "getdate.y"
+-    { yyval.intval = -1; }
++#line 607 "getdate.y"
++    { (yyval.intval) = -1; ;}
+     break;
+ 
+   case 76:
+-#line 558 "getdate.y"
+-    { yyval.intval = yyvsp[0].textintval.value; }
++#line 609 "getdate.y"
++    { (yyval.intval) = (yyvsp[(2) - (2)].textintval).value; ;}
+     break;
+ 
+   case 77:
+-#line 563 "getdate.y"
+-    { yyval.intval = MER24; }
++#line 614 "getdate.y"
++    { (yyval.intval) = MER24; ;}
+     break;
+ 
+   case 78:
+-#line 565 "getdate.y"
+-    { yyval.intval = yyvsp[0].intval; }
++#line 616 "getdate.y"
++    { (yyval.intval) = (yyvsp[(1) - (1)].intval); ;}
+     break;
+ 
+ 
++/* Line 1267 of yacc.c.  */
++#line 2171 "getdate.c"
++      default: break;
+     }
++  YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
+ 
+-/* Line 1000 of yacc.c.  */
+-#line 1782 "getdate.c"
+-
+-  yyvsp -= yylen;
+-  yyssp -= yylen;
+-
+-
++  YYPOPSTACK (yylen);
++  yylen = 0;
+   YY_STACK_PRINT (yyss, yyssp);
+ 
+   *++yyvsp = yyval;
+@@ -1812,99 +2202,65 @@
+   if (!yyerrstatus)
+     {
+       ++yynerrs;
+-#if YYERROR_VERBOSE
+-      yyn = yypact[yystate];
+-
+-      if (YYPACT_NINF < yyn && yyn < YYLAST)
+-	{
+-	  YYSIZE_T yysize = 0;
+-	  int yytype = YYTRANSLATE (yychar);
+-	  const char* yyprefix;
+-	  char *yymsg;
+-	  int yyx;
+-
+-	  /* Start YYX at -YYN if negative to avoid negative indexes in
+-	     YYCHECK.  */
+-	  int yyxbegin = yyn < 0 ? -yyn : 0;
+-
+-	  /* Stay within bounds of both yycheck and yytname.  */
+-	  int yychecklim = YYLAST - yyn;
+-	  int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
+-	  int yycount = 0;
+-
+-	  yyprefix = ", expecting ";
+-	  for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+-	    if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
++#if ! YYERROR_VERBOSE
++      yyerror (pc, YY_("syntax error"));
++#else
++      {
++	YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
++	if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
++	  {
++	    YYSIZE_T yyalloc = 2 * yysize;
++	    if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
++	      yyalloc = YYSTACK_ALLOC_MAXIMUM;
++	    if (yymsg != yymsgbuf)
++	      YYSTACK_FREE (yymsg);
++	    yymsg = (char *) YYSTACK_ALLOC (yyalloc);
++	    if (yymsg)
++	      yymsg_alloc = yyalloc;
++	    else
+ 	      {
+-		yysize += yystrlen (yyprefix) + yystrlen (yytname [yyx]);
+-		yycount += 1;
+-		if (yycount == 5)
+-		  {
+-		    yysize = 0;
+-		    break;
+-		  }
++		yymsg = yymsgbuf;
++		yymsg_alloc = sizeof yymsgbuf;
+ 	      }
+-	  yysize += (sizeof ("syntax error, unexpected ")
+-		     + yystrlen (yytname[yytype]));
+-	  yymsg = (char *) YYSTACK_ALLOC (yysize);
+-	  if (yymsg != 0)
+-	    {
+-	      char *yyp = yystpcpy (yymsg, "syntax error, unexpected ");
+-	      yyp = yystpcpy (yyp, yytname[yytype]);
++	  }
+ 
+-	      if (yycount < 5)
+-		{
+-		  yyprefix = ", expecting ";
+-		  for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+-		    if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
+-		      {
+-			yyp = yystpcpy (yyp, yyprefix);
+-			yyp = yystpcpy (yyp, yytname[yyx]);
+-			yyprefix = " or ";
+-		      }
+-		}
+-	      yyerror (pc, yymsg);
+-	      YYSTACK_FREE (yymsg);
+-	    }
+-	  else
+-	    yyerror (pc, "syntax error; also virtual memory exhausted");
+-	}
+-      else
+-#endif /* YYERROR_VERBOSE */
+-	yyerror (pc, "syntax error");
++	if (0 < yysize && yysize <= yymsg_alloc)
++	  {
++	    (void) yysyntax_error (yymsg, yystate, yychar);
++	    yyerror (pc, yymsg);
++	  }
++	else
++	  {
++	    yyerror (pc, YY_("syntax error"));
++	    if (yysize != 0)
++	      goto yyexhaustedlab;
++	  }
++      }
++#endif
+     }
+ 
+ 
+ 
+   if (yyerrstatus == 3)
+     {
+-      /* If just tried and failed to reuse lookahead token after an
++      /* If just tried and failed to reuse look-ahead token after an
+ 	 error, discard it.  */
+ 
+       if (yychar <= YYEOF)
+-        {
+-          /* If at end of input, pop the error token,
+-	     then the rest of the stack, then return failure.  */
++	{
++	  /* Return failure if at end of input.  */
+ 	  if (yychar == YYEOF)
+-	     for (;;)
+-	       {
+-		 YYPOPSTACK;
+-		 if (yyssp == yyss)
+-		   YYABORT;
+-		 YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp);
+-		 yydestruct (yystos[*yyssp], yyvsp);
+-	       }
+-        }
++	    YYABORT;
++	}
+       else
+ 	{
+-	  YYDSYMPRINTF ("Error: discarding", yytoken, &yylval, &yylloc);
+-	  yydestruct (yytoken, &yylval);
++	  yydestruct ("Error: discarding",
++		      yytoken, &yylval, pc);
+ 	  yychar = YYEMPTY;
+-
+ 	}
+     }
+ 
+-  /* Else will try to reuse lookahead token after shifting the error
++  /* Else will try to reuse look-ahead token after shifting the error
+      token.  */
+   goto yyerrlab1;
+ 
+@@ -1914,15 +2270,17 @@
+ `---------------------------------------------------*/
+ yyerrorlab:
+ 
+-#ifdef __GNUC__
+-  /* Pacify GCC when the user code never invokes YYERROR and the label
+-     yyerrorlab therefore never appears in user code.  */
+-  if (0)
++  /* Pacify compilers like GCC when the user code never invokes
++     YYERROR and the label yyerrorlab therefore never appears in user
++     code.  */
++  if (/*CONSTCOND*/ 0)
+      goto yyerrorlab;
+-#endif
+ 
+-  yyvsp -= yylen;
+-  yyssp -= yylen;
++  /* Do not reclaim the symbols of the rule which action triggered
++     this YYERROR.  */
++  YYPOPSTACK (yylen);
++  yylen = 0;
++  YY_STACK_PRINT (yyss, yyssp);
+   yystate = *yyssp;
+   goto yyerrlab1;
+ 
+@@ -1951,9 +2309,10 @@
+       if (yyssp == yyss)
+ 	YYABORT;
+ 
+-      YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp);
+-      yydestruct (yystos[yystate], yyvsp);
+-      YYPOPSTACK;
++
++      yydestruct ("Error: popping",
++		  yystos[yystate], yyvsp, pc);
++      YYPOPSTACK (1);
+       yystate = *yyssp;
+       YY_STACK_PRINT (yyss, yyssp);
+     }
+@@ -1961,11 +2320,12 @@
+   if (yyn == YYFINAL)
+     YYACCEPT;
+ 
+-  YYDPRINTF ((stderr, "Shifting error token, "));
+-
+   *++yyvsp = yylval;
+ 
+ 
++  /* Shift the error token.  */
++  YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
++
+   yystate = yyn;
+   goto yynewstate;
+ 
+@@ -1985,25 +2345,43 @@
+   goto yyreturn;
+ 
+ #ifndef yyoverflow
+-/*----------------------------------------------.
+-| yyoverflowlab -- parser overflow comes here.  |
+-`----------------------------------------------*/
+-yyoverflowlab:
+-  yyerror (pc, "parser stack overflow");
++/*-------------------------------------------------.
++| yyexhaustedlab -- memory exhaustion comes here.  |
++`-------------------------------------------------*/
++yyexhaustedlab:
++  yyerror (pc, YY_("memory exhausted"));
+   yyresult = 2;
+   /* Fall through.  */
+ #endif
+ 
+ yyreturn:
++  if (yychar != YYEOF && yychar != YYEMPTY)
++     yydestruct ("Cleanup: discarding lookahead",
++		 yytoken, &yylval, pc);
++  /* Do not reclaim the symbols of the rule which action triggered
++     this YYABORT or YYACCEPT.  */
++  YYPOPSTACK (yylen);
++  YY_STACK_PRINT (yyss, yyssp);
++  while (yyssp != yyss)
++    {
++      yydestruct ("Cleanup: popping",
++		  yystos[*yyssp], yyvsp, pc);
++      YYPOPSTACK (1);
++    }
+ #ifndef yyoverflow
+   if (yyss != yyssa)
+     YYSTACK_FREE (yyss);
+ #endif
+-  return yyresult;
++#if YYERROR_VERBOSE
++  if (yymsg != yymsgbuf)
++    YYSTACK_FREE (yymsg);
++#endif
++  /* Make sure YYID is used.  */
++  return YYID (yyresult);
+ }
+ 
+ 
+-#line 568 "getdate.y"
++#line 619 "getdate.y"
+ 
+ 
+ static table const meridian_table[] =
+@@ -2520,7 +2898,7 @@
+ 
+ /* Do nothing if the parser reports an error.  */
+ static int
+-yyerror (parser_control *pc ATTRIBUTE_UNUSED, char *s ATTRIBUTE_UNUSED)
++yyerror (parser_control *pc ATTRIBUTE_UNUSED, const char *s ATTRIBUTE_UNUSED)
+ {
+   return 0;
+ }
+@@ -2563,9 +2941,9 @@
+   if (tz)
+     {
+       size_t tzsize = strlen (tz) + 1;
+-      tz = (tzsize <= TZBUFSIZE
++      tz = (tzsize == 1 ? NULL : (tzsize <= TZBUFSIZE
+ 	    ? memcpy (tzbuf, tz, tzsize)
+-	    : xmemdup (tz, tzsize));
++	    : xmemdup (tz, tzsize)));
+     }
+   return tz;
+ }
+@@ -2793,7 +3171,8 @@
+ 			  + sizeof pc.time_zone * CHAR_BIT / 3];
+ 	      if (!tz_was_altered)
+ 		tz0 = get_tz (tz0buf);
+-	      sprintf (tz1buf, "XXX%s%ld:%02d", "-" + (time_zone < 0),
++	      snprintf(tz1buf, sizeof(tz1buf),
++		       "XXX%s%ld:%02d", "-" + (time_zone < 0),
+ 		       abs_time_zone_hour, abs_time_zone_min);
+ 	      if (setenv ("TZ", tz1buf, 1) != 0)
+ 		goto fail;
+@@ -2891,46 +3270,67 @@
+   ok = false;
+  done:
+   if (tz_was_altered)
+-    ok &= (tz0 ? setenv ("TZ", tz0, 1) : unsetenv ("TZ")) == 0;
++    ok &= (tz0 ? setenv("TZ", tz0, 1) : (unsetenv("TZ"), 0)) == 0;
+   if (tz0 != tz0buf)
+     free (tz0);
+   return ok;
+ }
+ 
+ #if TEST
++ATTRIBUTE_NORETURN void
++xalloc_die(void)
++{
++	fprintf(stderr, "memory exhausted\n");
++	exit(EXIT_FAILURE);
++}
+ 
+ int
+-main (int ac, char **av)
++main(int argc, char **argv)
+ {
+   char buff[BUFSIZ];
++  int cmd = 0;
+ 
+-  printf ("Enter date, or blank line to exit.\n\t> ");
++  if (argc > 1) {
++    int i = 1;
++    buff[0] = '\0';
++    while (i < argc) {
++      if (i > 1)
++	strlcat(buff, " ", BUFSIZ);
++      strlcat(buff, argv[i++], BUFSIZ);
++    }
++    cmd++;
++    goto once;
++  }
++
++  printf("Enter date, or blank line to exit.\n> ");
+   fflush (stdout);
+ 
+   buff[BUFSIZ - 1] = '\0';
+-  while (fgets (buff, BUFSIZ - 1, stdin) && buff[0])
++  while (fgets(buff, BUFSIZ - 1, stdin) && buff[0] &&
++         buff[0] != '\r' && buff[0] != '\n')
+     {
+       struct timespec d;
+       struct tm const *tm;
++ once:
+       if (! get_date (&d, buff, NULL))
+ 	printf ("Bad format - couldn't convert.\n");
+       else if (! (tm = localtime (&d.tv_sec)))
+ 	{
+-	  long int sec = d.tv_sec;
+-	  printf ("localtime (%ld) failed\n", sec);
++	  printf ("localtime (%lld) failed\n", (long long)d.tv_sec);
+ 	}
+       else
+ 	{
+ 	  int ns = d.tv_nsec;
+-	  printf ("%04ld-%02d-%02d %02d:%02d:%02d.%09d\n",
+-		  tm->tm_year + 1900L, tm->tm_mon + 1, tm->tm_mday,
++	  printf ("%13lld =\t%04ld-%02d-%02d %02d:%02d:%02d.%09d\n",
++		  (long long)d.tv_sec, (long)tm->tm_year + 1900,
++		  tm->tm_mon + 1, tm->tm_mday,
+ 		  tm->tm_hour, tm->tm_min, tm->tm_sec, ns);
+ 	}
+-      printf ("\t> ");
++      if (cmd)
++	return 0;
++      printf ("> ");
+       fflush (stdout);
+     }
+   return 0;
+ }
+ #endif /* TEST */
+-
+-
+--- cvs-1.12.13+real.orig/lib/getdate.h
++++ cvs-1.12.13+real/lib/getdate.h
+@@ -1,6 +1,9 @@
++/* $MirOS: src/gnu/usr.bin/cvs/lib/getdate.h,v 1.7 2016/10/22 20:15:03 tg Exp $ */
++
+ /* Parse a string into an internal time stamp.
+ 
+-   Copyright (C) 1995, 1997, 1998, 2003, 2004 Free Software Foundation, Inc.
++   Copyright (C) 1995, 1997, 1998, 2003, 2004, 2005
++   Free Software Foundation, Inc.
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -16,7 +19,17 @@
+    along with this program; if not, write to the Free Software Foundation,
+    Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.  */
+ 
++#ifndef GETDATE_H
++#define GETDATE_H
++
+ #include <stdbool.h>
++#ifndef IN_RCS
+ #include "timespec.h"
++#else
++#include <sys/time.h>
++#include <time.h>
++#endif
+ 
+ bool get_date (struct timespec *, char const *, struct timespec const *);
++
++#endif /* GETDATE_H */
+--- cvs-1.12.13+real.orig/lib/getdate.y
++++ cvs-1.12.13+real/lib/getdate.y
+@@ -1,8 +1,11 @@
+ %{
+ /* Parse a string into an internal time stamp.
+ 
+-   Copyright (C) 1999, 2000, 2002, 2003, 2004, 2005 Free Software
+-   Foundation, Inc.
++   Copyright (C) 1995, 1997, 1998, 2003, 2004, 2005
++   Free Software Foundation, Inc.
++
++   Copyright (c) 2005, 2006, 2007, 2010, 2016, 2017, 2021
++   mirabilos <m@mirbsd.org>
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -38,6 +41,10 @@
+ 
+ #include "getdate.h"
+ 
++#ifdef USE_LIBBSD
++size_t strlcat(char *, const char *, size_t);
++#endif
++
+ /* There's no need to extend the stack, so there's no need to involve
+    alloca.  */
+ #define YYSTACK_USE_ALLOCA 0
+@@ -65,10 +72,44 @@
+ #include <stdlib.h>
+ #include <string.h>
+ 
++#ifndef _STDLIB_H
++#define _STDLIB_H 1 /* GNU bison needs this */
++#endif
++
++#ifndef IN_RCS
+ #include "setenv.h"
+ #include "xalloc.h"
++#else /* IN_RCS */
++#include <unistd.h>
++
++#define HAVE_STRUCT_TM_TM_ZONE 1
++#define HAVE_TM_GMTOFF	1
++
++#define gettime(ts)	clock_gettime(CLOCK_REALTIME,(ts))
++
++static void *
++xmalloc(size_t s)
++{
++	static const char xmalloc_enomem[] = "memory exhausted\n";
++	void *x;
++
++	if ((x = malloc(s)) == NULL) {
++		write(2, xmalloc_enomem, sizeof(xmalloc_enomem) - 1);
++		exit(1);
++	}
++
++	return (x);
++}
++
++static void *
++xmemdup(void const *p, size_t s)
++{
++	return (memcpy(xmalloc(s), p, s));
++}
++#endif /* IN_RCS */
+ 
+-#if STDC_HEADERS || (! defined isascii && ! HAVE_ISASCII)
++#if (defined(STDC_HEADERS) && STDC_HEADERS) || \
++    (!defined(isascii) && !HAVE_ISASCII)
+ # define IN_CTYPE_DOMAIN(c) 1
+ #else
+ # define IN_CTYPE_DOMAIN(c) isascii (c)
+@@ -87,7 +128,8 @@
+    of `digit' even when the host does not conform to POSIX.  */
+ #define ISDIGIT(c) ((unsigned int) (c) - '0' <= 9)
+ 
+-#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 8) || __STRICT_ANSI__
++#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 8) || \
++    (defined(__STRICT_ANSI__) && __STRICT_ANSI__)
+ # define __attribute__(x)
+ #endif
+ 
+@@ -95,6 +137,15 @@
+ # define ATTRIBUTE_UNUSED __attribute__ ((__unused__))
+ #endif
+ 
++#ifndef __IDSTRING
++#define __IDSTRING(varname, string) \
++	static const char varname[] __attribute__((__used__)) = \
++	    "@(""#)" #varname ": " string
++#endif
++
++__IDSTRING(rcsid_code, "$MirOS: src/gnu/usr.bin/cvs/lib/getdate.y,v 1.14 2021/01/30 02:28:27 tg Exp $");
++/* placeholder line for __IDSTRING(rcsid_bron, "$miros: ..."); so that cpp #line directives work */
++
+ /* Shift A right by B bits portably, by dividing A by 2**B and
+    truncating towards minus infinity.  A and B should be free of side
+    effects, and B should be in the range 0 <= B <= INT_BITS - 2, where
+@@ -191,7 +242,7 @@
+ 
+ union YYSTYPE;
+ static int yylex (union YYSTYPE *, parser_control *);
+-static int yyerror (parser_control *, char *);
++static int yyerror (parser_control *, const char *);
+ static long int time_zone_hhmm (textint, long int);
+ 
+ %}
+@@ -1081,7 +1132,7 @@
+ 
+ /* Do nothing if the parser reports an error.  */
+ static int
+-yyerror (parser_control *pc ATTRIBUTE_UNUSED, char *s ATTRIBUTE_UNUSED)
++yyerror (parser_control *pc ATTRIBUTE_UNUSED, const char *s ATTRIBUTE_UNUSED)
+ {
+   return 0;
+ }
+@@ -1124,9 +1175,9 @@
+   if (tz)
+     {
+       size_t tzsize = strlen (tz) + 1;
+-      tz = (tzsize <= TZBUFSIZE
++      tz = (tzsize == 1 ? NULL : (tzsize <= TZBUFSIZE
+ 	    ? memcpy (tzbuf, tz, tzsize)
+-	    : xmemdup (tz, tzsize));
++	    : xmemdup (tz, tzsize)));
+     }
+   return tz;
+ }
+@@ -1354,7 +1405,8 @@
+ 			  + sizeof pc.time_zone * CHAR_BIT / 3];
+ 	      if (!tz_was_altered)
+ 		tz0 = get_tz (tz0buf);
+-	      sprintf (tz1buf, "XXX%s%ld:%02d", "-" + (time_zone < 0),
++	      snprintf(tz1buf, sizeof(tz1buf),
++		       "XXX%s%ld:%02d", "-" + (time_zone < 0),
+ 		       abs_time_zone_hour, abs_time_zone_min);
+ 	      if (setenv ("TZ", tz1buf, 1) != 0)
+ 		goto fail;
+@@ -1452,42 +1504,65 @@
+   ok = false;
+  done:
+   if (tz_was_altered)
+-    ok &= (tz0 ? setenv ("TZ", tz0, 1) : unsetenv ("TZ")) == 0;
++    ok &= (tz0 ? setenv("TZ", tz0, 1) : (unsetenv("TZ"), 0)) == 0;
+   if (tz0 != tz0buf)
+     free (tz0);
+   return ok;
+ }
+ 
+ #if TEST
++ATTRIBUTE_NORETURN void
++xalloc_die(void)
++{
++	fprintf(stderr, "memory exhausted\n");
++	exit(EXIT_FAILURE);
++}
+ 
+ int
+-main (int ac, char **av)
++main(int argc, char **argv)
+ {
+   char buff[BUFSIZ];
++  int cmd = 0;
++
++  if (argc > 1) {
++    int i = 1;
++    buff[0] = '\0';
++    while (i < argc) {
++      if (i > 1)
++	strlcat(buff, " ", BUFSIZ);
++      strlcat(buff, argv[i++], BUFSIZ);
++    }
++    cmd++;
++    goto once;
++  }
+ 
+-  printf ("Enter date, or blank line to exit.\n\t> ");
++  printf("Enter date, or blank line to exit.\n> ");
+   fflush (stdout);
+ 
+   buff[BUFSIZ - 1] = '\0';
+-  while (fgets (buff, BUFSIZ - 1, stdin) && buff[0])
++  while (fgets(buff, BUFSIZ - 1, stdin) && buff[0] &&
++         buff[0] != '\r' && buff[0] != '\n')
+     {
+       struct timespec d;
+       struct tm const *tm;
++ once:
+       if (! get_date (&d, buff, NULL))
+ 	printf ("Bad format - couldn't convert.\n");
+       else if (! (tm = localtime (&d.tv_sec)))
+ 	{
+-	  long int sec = d.tv_sec;
+-	  printf ("localtime (%ld) failed\n", sec);
++	  printf ("localtime (%lld) failed\n", (long long)d.tv_sec);
+ 	}
+       else
+ 	{
+ 	  int ns = d.tv_nsec;
+-	  printf ("%04ld-%02d-%02d %02d:%02d:%02d.%09d\n",
+-		  tm->tm_year + 1900L, tm->tm_mon + 1, tm->tm_mday,
++	  printf ("%13lld =\t%04ld-%02d-%02d %02d:%02d:%02d.%09d\n",
++		  (long long)d.tv_sec, (long)tm->tm_year + 1900,
++		  tm->tm_mon + 1, tm->tm_mday,
+ 		  tm->tm_hour, tm->tm_min, tm->tm_sec, ns);
+ 	}
+-      printf ("\t> ");
++      if (cmd)
++	return 0;
++      printf ("> ");
+       fflush (stdout);
+     }
+   return 0;
+--- cvs-1.12.13+real.orig/lib/getdelim.c
++++ cvs-1.12.13+real/lib/getdelim.c
+@@ -48,7 +48,6 @@
+ {
+   int result = 0;
+   ssize_t cur_len = 0;
+-  ssize_t len;
+ 
+   if (lineptr == NULL || n == NULL || fp == NULL)
+     {
+@@ -71,7 +70,6 @@
+ 
+   for (;;)
+     {
+-      char *t;
+       int i;
+ 
+       i = getc (fp);
+@@ -82,12 +80,12 @@
+       }
+ 
+       /* Make enough space for len+1 (for final NUL) bytes.  */
+-      if (cur_len + 1 >= *n)
++      if ((size_t)cur_len + 1U >= *n)
+ 	{
+ 	  size_t needed = 2 * (cur_len + 1) + 1;   /* Be generous. */
+ 	  char *new_lineptr;
+ 
+-	  if (needed < cur_len)
++	  if (needed < (size_t)cur_len)
+ 	    {
+ 	      result = -1;
+ 	      goto unlock_return;
+--- cvs-1.12.13+real.orig/lib/gettext.h
++++ cvs-1.12.13+real/lib/gettext.h
+@@ -19,7 +19,7 @@
+ #define _LIBGETTEXT_H 1
+ 
+ /* NLS can be disabled through the configure --disable-nls option.  */
+-#if ENABLE_NLS
++#if defined(ENABLE_NLS) && (ENABLE_NLS)
+ 
+ /* Get declarations of GNU message catalog functions.  */
+ # include <libintl.h>
+--- cvs-1.12.13+real.orig/lib/glob.c
++++ cvs-1.12.13+real/lib/glob.c
+@@ -189,7 +189,7 @@
+ # define GET_LOGIN_NAME_MAX()	(-1)
+ #endif
+ 
+-static const char *next_brace_sub (const char *begin, int flags) __THROW;
++static const char *next_brace_sub (const char *begin, int flags) __THROWNL;
+ 
+ #endif /* !defined _LIBC || !defined GLOB_ONLY_P */
+ 
+@@ -198,8 +198,8 @@
+ 			glob_t *pglob);
+ 
+ #if !defined _LIBC || !defined GLOB_ONLY_P
+-static int prefix_array (const char *prefix, char **array, size_t n) __THROW;
+-static int collated_compare (const void *, const void *) __THROW;
++static int prefix_array (const char *prefix, char **array, size_t n) __THROWNL;
++static int collated_compare (const void *, const void *) __THROWNL;
+ 
+ 
+ /* Find the end of the sub-pattern in a brace expression.  */
+--- cvs-1.12.13+real.orig/lib/glob_.h
++++ cvs-1.12.13+real/lib/glob_.h
+@@ -34,6 +34,9 @@
+ #ifndef __THROW
+ # define __THROW
+ #endif
++#ifndef __THROWNL
++# define __THROWNL
++#endif
+ 
+ #ifndef __size_t
+ # define __size_t	size_t
+--- cvs-1.12.13+real.orig/lib/minmax.h
++++ cvs-1.12.13+real/lib/minmax.h
+@@ -28,7 +28,7 @@
+    included after this file.  Likewise for <sys/param.h>.
+    If more than one of these system headers define MIN and MAX, pick just
+    one of the headers (because the definitions most likely are the same).  */
+-#if HAVE_MINMAX_IN_LIMITS_H
++#if defined(HAVE_MINMAX_IN_LIMITS_H) && (HAVE_MINMAX_IN_LIMITS_H)
+ # include <limits.h>
+ #elif HAVE_MINMAX_IN_SYS_PARAM_H
+ # include <sys/param.h>
+--- cvs-1.12.13+real.orig/lib/pagealign_alloc.c
++++ cvs-1.12.13+real/lib/pagealign_alloc.c
+@@ -44,6 +44,10 @@
+ #include "xalloc.h"
+ #include "gettext.h"
+ 
++#if HAVE_MMAP && !defined(HAVE_MAP_ANONYMOUS)
++#include <stdio.h>
++#endif
++
+ #define _(str) gettext (str)
+ 
+ #if HAVE_MMAP
+@@ -132,6 +136,7 @@
+   const int fd = -1;
+   const int flags = MAP_ANONYMOUS | MAP_PRIVATE;
+ # else /* !HAVE_MAP_ANONYMOUS */
++  static int beenhere = 0;
+   static int fd = -1;  /* Only open /dev/zero once in order to avoid limiting
+ 			  the amount of memory we may allocate based on the
+ 			  number of open file descriptors.  */
+@@ -140,7 +145,20 @@
+     {
+       fd = open ("/dev/zero", O_RDONLY, 0666);
+       if (fd < 0)
+-	error (EXIT_FAILURE, errno, _("Failed to open /dev/zero for read"));
++	{
++	  if (!beenhere)
++	    {
++	      beenhere = 1;
++	      error (EXIT_FAILURE, errno, _("Failed to open /dev/zero for read"));
++	    }
++	  else
++	    {
++	      fprintf (stderr, "Fatal in pagealign: %s\n",
++			_("Failed to open /dev/zero for read"));
++	      fflush (stderr);
++	      _exit (EXIT_FAILURE);
++	    }
++	}
+     }
+ # endif /* HAVE_MAP_ANONYMOUS */
+   ret = mmap (NULL, size, PROT_READ | PROT_WRITE, flags, fd, 0);
+--- cvs-1.12.13+real.orig/lib/regcomp.c
++++ cvs-1.12.13+real/lib/regcomp.c
+@@ -1652,8 +1652,6 @@
+       && dfa->edests[node].nelem
+       && !dfa->nodes[dfa->edests[node].elems[0]].duplicated)
+     {
+-      Idx org_node, cur_node;
+-      org_node = cur_node = node;
+       err = duplicate_node_closure (dfa, node, node, node, constraint);
+       if (BE (err != REG_NOERROR, 0))
+ 	return err;
+--- cvs-1.12.13+real.orig/lib/regex_internal.c
++++ cvs-1.12.13+real/lib/regex_internal.c
+@@ -629,7 +629,7 @@
+ 
+ 	      if (pstr->is_utf8)
+ 		{
+-		  const unsigned char *raw, *p, *q, *end;
++		  const unsigned char *raw, *p, *end;
+ 
+ 		  /* Special case UTF-8.  Multi-byte chars start with any
+ 		     byte other than 0x80 - 0xbf.  */
+@@ -641,17 +641,8 @@
+ 			mbstate_t cur_state;
+ 			wchar_t wc2;
+ 			Idx mlen = raw + pstr->len - p;
+-			unsigned char buf[6];
+ 			size_t mbclen;
+ 
+-			q = p;
+-			if (BE (pstr->trans != NULL, 0))
+-			  {
+-			    int i = mlen < 6 ? mlen : 6;
+-			    while (--i >= 0)
+-			      buf[i] = pstr->trans[p[i]];
+-			    q = buf;
+-			  }
+ 			/* XXX Don't use mbrtowc, we know which conversion
+ 			   to use (UTF-8 -> UCS4).  */
+ 			memset (&cur_state, 0, sizeof (cur_state));
+--- cvs-1.12.13+real.orig/lib/regex_internal.h
++++ cvs-1.12.13+real/lib/regex_internal.h
+@@ -451,7 +451,9 @@
+ #define re_string_skip_bytes(pstr,idx) ((pstr)->cur_idx += (idx))
+ #define re_string_set_index(pstr,idx) ((pstr)->cur_idx = (idx))
+ 
++#ifdef HAVE_ALLOCA_H
+ #include <alloca.h>
++#endif
+ 
+ #ifndef _LIBC
+ # if HAVE_ALLOCA
+--- cvs-1.12.13+real.orig/lib/strftime.c
++++ cvs-1.12.13+real/lib/strftime.c
+@@ -1,5 +1,6 @@
+ /* Copyright (C) 1991-1999, 2000, 2001, 2003, 2004, 2005 Free Software
+    Foundation, Inc.
++   Copyright (c) 2021 mirabilos <m@mirbsd.org>
+ 
+    NOTE: The canonical source of this file is maintained with the GNU C Library.
+    Bugs can be reported to bug-glibc@prep.ai.mit.edu.
+@@ -1222,8 +1223,7 @@
+ 	    }
+ 	  if (modifier == L_('O'))
+ 	    goto bad_format;
+-	  else
+-	    DO_SIGNED_NUMBER (4, tp->tm_year < -TM_YEAR_BASE,
++	  DO_SIGNED_NUMBER (4, tp->tm_year < -TM_YEAR_BASE,
+ 			      tp->tm_year + (unsigned int) TM_YEAR_BASE);
+ 
+ 	case L_('y'):
+--- cvs-1.12.13+real.orig/lib/sunos57-select.c
++++ cvs-1.12.13+real/lib/sunos57-select.c
+@@ -40,6 +40,11 @@
+ #include <sys/stat.h>
+ #include <errno.h>
+ 
++#if defined(STDC_HEADERS) || defined(HAVE_STRING_H)
++# include <string.h>
++#else
++# include <strings.h>
++#endif
+ #ifdef HAVE_UNISTD_H
+ # include <unistd.h>
+ #endif /* HAVE_UNISTD_H */
+--- cvs-1.12.13+real.orig/lib/system.h
++++ cvs-1.12.13+real/lib/system.h
+@@ -304,7 +304,7 @@
+ 
+ 
+ 
+-/* Some file systems are case-insensitive.  If FOLD_FN_CHAR is
++/* Some filesystems are case-insensitive.  If FOLD_FN_CHAR is
+    #defined, it maps the character C onto its "canonical" form.  In a
+    case-insensitive system, it would map all alphanumeric characters
+    to lower case.  Under Windows NT, / and \ are both path component
+@@ -315,7 +315,7 @@
+ # define fncmp strcmp
+ #endif
+ 
+-/* Different file systems can have different naming patterns which designate
++/* Different filesystems can have different naming patterns which designate
+  * a path as absolute.
+  */
+ #ifndef ISABSOLUTE
+--- cvs-1.12.13+real.orig/lib/tempname.c
++++ cvs-1.12.13+real/lib/tempname.c
+@@ -148,7 +148,7 @@
+   if (try_tmpdir)
+     {
+       d = __secure_getenv ("TMPDIR");
+-      if (d != NULL && direxists (d))
++      if (d != NULL && *d && direxists (d))
+ 	dir = d;
+       else if (dir != NULL && direxists (dir))
+ 	/* nothing */ ;
+--- cvs-1.12.13+real.orig/lib/test-getdate.sh
++++ cvs-1.12.13+real/lib/test-getdate.sh
+@@ -1,4 +1,5 @@
+ #! /bin/sh
++# $MirOS: src/gnu/usr.bin/cvs/lib/test-getdate.sh,v 1.2 2016/10/22 15:34:32 tg Exp $
+ 
+ # Test that a getdate executable meets its specification.
+ #
+@@ -19,6 +20,11 @@
+ # Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+ 
+ 
++# as this uses POSIX behaviour and does not count leap seconds...
++if test -n "$GETDATE_LD_PRELOAD"; then
++	LD_PRELOAD=$GETDATE_LD_PRELOAD
++	export LD_PRELOAD
++fi
+ 
+ ###
+ ### Globals
+@@ -113,10 +119,9 @@
+ 	NTZ=`TZ=$1 date +%Z`
+ 	if test "$NTZ" = "$UTZ" || test "$NTZ" = "$1"; then
+ 		skipreason="$1 is not a recognized timezone on this system"
+-		return `false`
+-	else
+-		return `:`
++		return 1
+ 	fi
++	:
+ }
+ 
+ 
+@@ -184,22 +189,22 @@
+ 
+ cat >getdate-expected <<EOF
+ Enter date, or blank line to exit.
+-	> Bad format - couldn't convert.
+-	> Bad format - couldn't convert.
+-	> 1972-12-05 00:00:00.000000000
+-	> 1974-03-29 00:00:00.000000000
+-	> 1996-05-12 13:57:45.000000000
+-	> 2012-05-12 00:00:00.000000000
+-	> 1996-05-12 00:00:00.000000000
+-	> Bad format - couldn't convert.
+-	> Bad format - couldn't convert.
+-	> 1970-01-01 02:00:00.000000000
+-	> Bad format - couldn't convert.
+-	> 1969-12-31 22:00:00.000000000
+-	> Bad format - couldn't convert.
+-	> 1970-01-01 06:00:00.000000000
+-	> 1997-01-12 00:00:00.000000000
+-	> 
++> Bad format - couldn't convert.
++> Bad format - couldn't convert.
++>      92361600 =	1972-12-05 00:00:00.000000000
++>     133747200 =	1974-03-29 00:00:00.000000000
++>     831909465 =	1996-05-12 13:57:45.000000000
++>    1336780800 =	2012-05-12 00:00:00.000000000
++>     831859200 =	1996-05-12 00:00:00.000000000
++> Bad format - couldn't convert.
++> Bad format - couldn't convert.
++>          7200 =	1970-01-01 02:00:00.000000000
++> Bad format - couldn't convert.
++>         -7200 =	1969-12-31 22:00:00.000000000
++> Bad format - couldn't convert.
++>         21600 =	1970-01-01 06:00:00.000000000
++>     853027200 =	1997-01-12 00:00:00.000000000
++> 
+ EOF
+ 
+ ./getdate >getdate-got <<EOF
+@@ -235,22 +240,22 @@
+ if valid_timezone $TZ; then
+ 	cat >getdate-expected <<EOF
+ Enter date, or blank line to exit.
+-	> 2005-03-01 00:00:00.000000000
+-	> 2005-03-27 00:00:00.000000000
+-	> 2005-03-28 01:00:00.000000000
+-	> 2005-03-28 01:00:00.000000000
+-	> 2005-03-29 01:00:00.000000000
+-	> 2005-03-29 01:00:00.000000000
+-	> 2005-03-30 01:00:00.000000000
+-	> 2005-03-30 01:00:00.000000000
+-	> 2005-03-31 01:00:00.000000000
+-	> 2005-03-31 01:00:00.000000000
+-	> 2005-04-01 01:00:00.000000000
+-	> 2005-04-01 01:00:00.000000000
+-	> 2005-04-10 01:00:00.000000000
+-	> 2005-04-10 01:00:00.000000000
+-	> 2005-04-01 00:00:00.000000000
+-	> 
++>    1109635200 =	2005-03-01 00:00:00.000000000
++>    1111881600 =	2005-03-27 00:00:00.000000000
++>    1111968000 =	2005-03-28 01:00:00.000000000
++>    1111968000 =	2005-03-28 01:00:00.000000000
++>    1112054400 =	2005-03-29 01:00:00.000000000
++>    1112054400 =	2005-03-29 01:00:00.000000000
++>    1112140800 =	2005-03-30 01:00:00.000000000
++>    1112140800 =	2005-03-30 01:00:00.000000000
++>    1112227200 =	2005-03-31 01:00:00.000000000
++>    1112227200 =	2005-03-31 01:00:00.000000000
++>    1112313600 =	2005-04-01 01:00:00.000000000
++>    1112313600 =	2005-04-01 01:00:00.000000000
++>    1113091200 =	2005-04-10 01:00:00.000000000
++>    1113091200 =	2005-04-10 01:00:00.000000000
++>    1112310000 =	2005-04-01 00:00:00.000000000
++> 
+ EOF
+ 
+ 	./getdate >getdate-got <<EOF
+@@ -297,20 +302,20 @@
+ if valid_timezone $TZ; then
+ 	cat >getdate-expected <<EOF
+ Enter date, or blank line to exit.
+-	> 2005-03-01 00:00:00.000000000
+-	> 2005-02-28 18:00:00.000000000
+-	> 2005-04-01 00:00:00.000000000
+-	> Bad format - couldn't convert.
+-	> 2005-04-30 19:00:00.000000000
+-	> 2005-04-30 20:00:00.000000000
+-	> 2005-05-01 00:00:00.000000000
+-	> 2005-04-30 20:00:00.000000000
+-	> Bad format - couldn't convert.
+-	> 2005-05-31 19:00:00.000000000
+-	> 2005-05-31 20:00:00.000000000
+-	> 2005-06-01 00:00:00.000000000
+-	> 2005-05-31 20:00:00.000000000
+-	> 
++>    1109653200 =	2005-03-01 00:00:00.000000000
++>    1109631600 =	2005-02-28 18:00:00.000000000
++>    1112331600 =	2005-04-01 00:00:00.000000000
++> Bad format - couldn't convert.
++>    1114902000 =	2005-04-30 19:00:00.000000000
++>    1114905600 =	2005-04-30 20:00:00.000000000
++>    1114920000 =	2005-05-01 00:00:00.000000000
++>    1114905600 =	2005-04-30 20:00:00.000000000
++> Bad format - couldn't convert.
++>    1117580400 =	2005-05-31 19:00:00.000000000
++>    1117584000 =	2005-05-31 20:00:00.000000000
++>    1117598400 =	2005-06-01 00:00:00.000000000
++>    1117584000 =	2005-05-31 20:00:00.000000000
++> 
+ EOF
+ 
+ 	./getdate >getdate-got <<EOF
+--- cvs-1.12.13+real.orig/lib/vasnprintf.c
++++ cvs-1.12.13+real/lib/vasnprintf.c
+@@ -26,7 +26,9 @@
+ # include <config.h>
+ #endif
+ #ifndef IN_LIBINTL
++# ifdef HAVE_ALLOCA_H
+ # include <alloca.h>
++# endif
+ #endif
+ 
+ /* Specification.  */
+@@ -100,7 +102,12 @@
+ # define DIRECTIVE char_directive
+ # define DIRECTIVES char_directives
+ # define PRINTF_PARSE printf_parse
++#if 0
++/* disabled for security reasons, to avoid having %n in writable memory */
+ # define USE_SNPRINTF (HAVE_DECL__SNPRINTF || HAVE_SNPRINTF)
++#else
++# define USE_SNPRINTF 0
++#endif
+ # if HAVE_DECL__SNPRINTF
+    /* Windows.  */
+ #  define SNPRINTF _snprintf
+@@ -591,11 +598,12 @@
+ 		  {
+ 		    size_t maxlen;
+ 		    int count;
+-		    int retcount;
++#if USE_SNPRINTF
++		    int retcount = 0;
++#endif
+ 
+ 		    maxlen = allocated - length;
+ 		    count = -1;
+-		    retcount = 0;
+ 
+ #if USE_SNPRINTF
+ # define SNPRINTF_BUF(arg) \
+--- cvs-1.12.13+real.orig/lib/xalloc.h
++++ cvs-1.12.13+real/lib/xalloc.h
+@@ -29,7 +29,7 @@
+ 
+ 
+ # ifndef __attribute__
+-#  if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 8) || __STRICT_ANSI__
++#  if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 8) || (defined(__STRICT_ANSI__) && (__STRICT_ANSI__))
+ #   define __attribute__(x)
+ #  endif
+ # endif
+--- cvs-1.12.13+real.orig/m4/getcwd-path-max.m4
++++ cvs-1.12.13+real/m4/getcwd-path-max.m4
+@@ -65,8 +65,8 @@
+ {
+ #ifndef PATH_MAX
+   /* The Hurd doesn't define this, so getcwd can't exhibit the bug --
+-     at least not on a local file system.  And if we were to start worrying
+-     about remote file systems, we'd have to enable the wrapper function
++     at least not on a local filesystem.  And if we were to start worrying
++     about remote filesystems, we'd have to enable the wrapper function
+      all of the time, just to be safe.  That's not worth the cost.  */
+   exit (0);
+ #elif ((INT_MAX / (DIR_NAME_SIZE / DOTDOTSLASH_LEN + 1) \
+--- cvs-1.12.13+real.orig/m4/getdate.m4
++++ cvs-1.12.13+real/m4/getdate.m4
+@@ -6,7 +6,7 @@
+ 
+ AC_DEFUN([gl_GETDATE],
+ [
+-  AC_LIBSOURCES([getdate.h, getdate.y])
++  AC_LIBSOURCES([getdate.h, getdate.c])
+   AC_LIBOBJ([getdate])
+ 
+   dnl Prerequisites of lib/getdate.h.
+--- cvs-1.12.13+real.orig/m4/longdouble.m4
++++ cvs-1.12.13+real/m4/longdouble.m4
+@@ -8,21 +8,12 @@
+ dnl Test whether the compiler supports the 'long double' type.
+ dnl Prerequisite: AC_PROG_CC
+ 
++dnl $MirOS: src/gnu/usr.bin/cvs/m4/longdouble.m4,v 1.4 2016/10/22 03:36:43 tg Exp $
++
+ AC_DEFUN([gt_TYPE_LONGDOUBLE],
+ [
+-  AC_CACHE_CHECK([for long double], gt_cv_c_long_double,
+-    [if test "$GCC" = yes; then
+-       gt_cv_c_long_double=yes
+-     else
+-       AC_TRY_COMPILE([
+-         /* The Stardent Vistra knows sizeof(long double), but does not support it.  */
+-         long double foo = 0.0;
+-         /* On Ultrix 4.3 cc, long double is 4 and double is 8.  */
+-         int array [2*(sizeof(long double) >= sizeof(double)) - 1];
+-         ], ,
+-         gt_cv_c_long_double=yes, gt_cv_c_long_double=no)
+-     fi])
+-  if test $gt_cv_c_long_double = yes; then
++  AC_CHECK_TYPE([long double], [gt_cv_c_long_double=yes], [gt_cv_c_long_double=no])
++  if test x"$gt_cv_c_long_double" = x"yes"; then
+     AC_DEFINE(HAVE_LONG_DOUBLE, 1, [Define if you have the 'long double' type.])
+   fi
+ ])
+--- cvs-1.12.13+real.orig/m4/mktime.m4
++++ cvs-1.12.13+real/m4/mktime.m4
+@@ -6,6 +6,9 @@
+ 
+ dnl From Jim Meyering.
+ 
++dnl Test program updated to git faefb77009239f82ac2f77ac0c10d71d4f38af07
++dnl for Debian.
++
+ # Redefine AC_FUNC_MKTIME, to fix a bug in Autoconf 2.57 and earlier.
+ # This redefinition can be removed once a new version of Autoconf comes out.
+ # The redefinition is taken from
+@@ -19,27 +22,16 @@
+ AC_CACHE_CHECK([for working mktime], ac_cv_func_working_mktime,
+ [AC_RUN_IFELSE([AC_LANG_SOURCE(
+ [[/* Test program from Paul Eggert and Tony Leneis.  */
+-#if TIME_WITH_SYS_TIME
+-# include <sys/time.h>
+-# include <time.h>
+-#else
+-# if HAVE_SYS_TIME_H
+-#  include <sys/time.h>
+-# else
+-#  include <time.h>
+-# endif
+-#endif
++#include <limits.h>
++#include <stdlib.h>
++#include <time.h>
+ 
+-#if HAVE_STDLIB_H
+-# include <stdlib.h>
+-#endif
+-
+-#if HAVE_UNISTD_H
++#ifdef HAVE_UNISTD_H
+ # include <unistd.h>
+ #endif
+ 
+-#if !HAVE_ALARM
+-# define alarm(X) /* empty */
++#if HAVE_DECL_ALARM
++# include <signal.h>
+ #endif
+ 
+ /* Work around redefinition to rpl_putenv by other config tests.  */
+@@ -55,9 +47,9 @@
+ };
+ #define N_STRINGS (sizeof (tz_strings) / sizeof (tz_strings[0]))
+ 
+-/* Fail if mktime fails to convert a date in the spring-forward gap.
++/* Return 0 if mktime fails to convert a date in the spring-forward gap.
+    Based on a problem report from Andreas Jaeger.  */
+-static void
++static int
+ spring_forward_gap ()
+ {
+   /* glibc (up to about 1998-10-07) failed this test. */
+@@ -76,29 +68,25 @@
+   tm.tm_min = 0;
+   tm.tm_sec = 0;
+   tm.tm_isdst = -1;
+-  if (mktime (&tm) == (time_t)-1)
+-    exit (1);
++  return mktime (&tm) != (time_t) -1;
+ }
+ 
+-static void
+-mktime_test1 (now)
+-     time_t now;
++static int
++mktime_test1 (time_t now)
+ {
+   struct tm *lt;
+-  if ((lt = localtime (&now)) && mktime (lt) != now)
+-    exit (1);
++  return ! (lt = localtime (&now)) || mktime (lt) == now;
+ }
+ 
+-static void
+-mktime_test (now)
+-     time_t now;
++static int
++mktime_test (time_t now)
+ {
+-  mktime_test1 (now);
+-  mktime_test1 ((time_t) (time_t_max - now));
+-  mktime_test1 ((time_t) (time_t_min + now));
++  return (mktime_test1 (now)
++          && mktime_test1 ((time_t) (time_t_max - now))
++          && mktime_test1 ((time_t) (time_t_min + now)));
+ }
+ 
+-static void
++static int
+ irix_6_4_bug ()
+ {
+   /* Based on code from Ariel Faigon.  */
+@@ -111,13 +99,11 @@
+   tm.tm_sec = 0;
+   tm.tm_isdst = -1;
+   mktime (&tm);
+-  if (tm.tm_mon != 2 || tm.tm_mday != 31)
+-    exit (1);
++  return tm.tm_mon == 2 && tm.tm_mday == 31;
+ }
+ 
+-static void
+-bigtime_test (j)
+-     int j;
++static int
++bigtime_test (int j)
+ {
+   struct tm tm;
+   time_t now;
+@@ -127,56 +113,110 @@
+     {
+       struct tm *lt = localtime (&now);
+       if (! (lt
+-	     && lt->tm_year == tm.tm_year
+-	     && lt->tm_mon == tm.tm_mon
+-	     && lt->tm_mday == tm.tm_mday
+-	     && lt->tm_hour == tm.tm_hour
+-	     && lt->tm_min == tm.tm_min
+-	     && lt->tm_sec == tm.tm_sec
+-	     && lt->tm_yday == tm.tm_yday
+-	     && lt->tm_wday == tm.tm_wday
+-	     && ((lt->tm_isdst < 0 ? -1 : 0 < lt->tm_isdst)
+-		  == (tm.tm_isdst < 0 ? -1 : 0 < tm.tm_isdst))))
+-	exit (1);
++             && lt->tm_year == tm.tm_year
++             && lt->tm_mon == tm.tm_mon
++             && lt->tm_mday == tm.tm_mday
++             && lt->tm_hour == tm.tm_hour
++             && lt->tm_min == tm.tm_min
++             && lt->tm_sec == tm.tm_sec
++             && lt->tm_yday == tm.tm_yday
++             && lt->tm_wday == tm.tm_wday
++             && ((lt->tm_isdst < 0 ? -1 : 0 < lt->tm_isdst)
++                  == (tm.tm_isdst < 0 ? -1 : 0 < tm.tm_isdst))))
++        return 0;
+     }
++  return 1;
++}
++
++static int
++year_2050_test ()
++{
++  /* The correct answer for 2050-02-01 00:00:00 in Pacific time,
++     ignoring leap seconds.  */
++  unsigned long int answer = 2527315200UL;
++
++  struct tm tm;
++  time_t t;
++  tm.tm_year = 2050 - 1900;
++  tm.tm_mon = 2 - 1;
++  tm.tm_mday = 1;
++  tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
++  tm.tm_isdst = -1;
++
++  /* Use the portable POSIX.1 specification "TZ=PST8PDT,M4.1.0,M10.5.0"
++     instead of "TZ=America/Vancouver" in order to detect the bug even
++     on systems that don't support the Olson extension, or don't have the
++     full zoneinfo tables installed.  */
++  putenv ("TZ=PST8PDT,M4.1.0,M10.5.0");
++
++  t = mktime (&tm);
++
++  /* Check that the result is either a failure, or close enough
++     to the correct answer that we can assume the discrepancy is
++     due to leap seconds.  */
++  return (t == (time_t) -1
++          || (0 < t && answer - 120 <= t && t <= answer + 120));
+ }
+ 
+ int
+ main ()
+ {
++  int result = 0;
+   time_t t, delta;
+   int i, j;
++  int time_t_signed_magnitude = (time_t) ~ (time_t) 0 < (time_t) -1;
++  int time_t_signed = ! ((time_t) 0 < (time_t) -1);
+ 
++#if HAVE_DECL_ALARM
+   /* This test makes some buggy mktime implementations loop.
+      Give up after 60 seconds; a mktime slower than that
+      isn't worth using anyway.  */
++  signal (SIGALRM, SIG_DFL);
+   alarm (60);
++#endif
++
++  time_t_max = (! time_t_signed
++                ? (time_t) -1
++                : ((((time_t) 1 << (sizeof (time_t) * CHAR_BIT - 2)) - 1)
++                   * 2 + 1));
++  time_t_min = (! time_t_signed
++                ? (time_t) 0
++                : time_t_signed_magnitude
++                ? ~ (time_t) 0
++                : ~ time_t_max);
+ 
+-  for (time_t_max = 1; 0 < time_t_max; time_t_max *= 2)
+-    continue;
+-  time_t_max--;
+-  if ((time_t) -1 < 0)
+-    for (time_t_min = -1; (time_t) (time_t_min * 2) < 0; time_t_min *= 2)
+-      continue;
+   delta = time_t_max / 997; /* a suitable prime number */
+   for (i = 0; i < N_STRINGS; i++)
+     {
+       if (tz_strings[i])
+-	putenv (tz_strings[i]);
++        putenv (tz_strings[i]);
+ 
+-      for (t = 0; t <= time_t_max - delta; t += delta)
+-	mktime_test (t);
+-      mktime_test ((time_t) 1);
+-      mktime_test ((time_t) (60 * 60));
+-      mktime_test ((time_t) (60 * 60 * 24));
+-
+-      for (j = 1; 0 < j; j *= 2)
+-	bigtime_test (j);
+-      bigtime_test (j - 1);
++      for (t = 0; t <= time_t_max - delta && (result & 1) == 0; t += delta)
++        if (! mktime_test (t))
++          result |= 1;
++      if ((result & 2) == 0
++          && ! (mktime_test ((time_t) 1)
++                && mktime_test ((time_t) (60 * 60))
++                && mktime_test ((time_t) (60 * 60 * 24))))
++        result |= 2;
++
++      for (j = 1; (result & 4) == 0; j <<= 1)
++        {
++          if (! bigtime_test (j))
++            result |= 4;
++          if (INT_MAX / 2 < j)
++            break;
++        }
++      if ((result & 8) == 0 && ! bigtime_test (INT_MAX))
++        result |= 8;
+     }
+-  irix_6_4_bug ();
+-  spring_forward_gap ();
+-  exit (0);
++  if (! irix_6_4_bug ())
++    result |= 16;
++  if (! spring_forward_gap ())
++    result |= 32;
++  if (! year_2050_test ())
++    result |= 64;
++  return result;
+ }]])],
+ 	       [ac_cv_func_working_mktime=yes],
+ 	       [ac_cv_func_working_mktime=no],
+--- cvs-1.12.13+real.orig/man/cvs.5
++++ cvs-1.12.13+real/man/cvs.5
+@@ -1,3 +1,4 @@
++.\" $MirOS: src/gnu/usr.bin/cvs/man/cvs.5,v 1.3 2010/09/19 19:43:00 tg Exp $
+ .TH cvs 5 "12 February 1992"
+ .\" Full space in nroff; half space in troff
+ .de SP
+@@ -238,9 +239,9 @@
+ .B add
+ for `tag',
+ .B mov
+-for `tag -F', and
++for `tag \-F', and
+ .B del
+-for `tag -d`),
++for `tag \-d`),
+ .I repository ,
+ and any remaining are pairs of
+ .B "filename revision" .
+--- cvs-1.12.13+real.orig/src/ChangeLog
++++ cvs-1.12.13+real/src/ChangeLog
+@@ -11313,7 +11313,7 @@
+ 1999-05-11  Larry Jones  <larry.jones@sdrc.com>
+ 
+ 	* server.c (serve_notify): Allocate enough memory to hold the
+-	"misformed Notify request" message in pending_error_text.
++	"malformed Notify request" message in pending_error_text.
+ 
+ 1999-05-11  Jim Kingdon  <http://www.cyclic.com>
+ 
+--- cvs-1.12.13+real.orig/src/add.c
++++ cvs-1.12.13+real/src/add.c
+@@ -532,7 +532,8 @@
+ 				free (bbuf);
+ 			}
+ 			Register (entries, finfo.file, "0",
+-				  timestamp ? timestamp : vers->ts_user,
++				  timestamp ? timestamp :
++				   vers->ts_user_ists ? "locally added" : vers->ts_user,
+ 				  vers->options, vers->tag, vers->date, NULL);
+ 			if (timestamp) free (timestamp);
+ #ifdef SERVER_SUPPORT
+@@ -784,7 +785,7 @@
+     }
+ 
+     /* setup the log message */
+-    message = Xasprintf ("Directory %s added to the repository\n%s%s%s%s%s%s",
++    message = Xasprintf ("Directory %s put under version control\n%s%s%s%s%s%s",
+ 			 rcsdir,
+ 			 tag ? "--> Using per-directory sticky tag `" : "",
+ 			 tag ? tag : "", tag ? "'\n" : "",
+--- cvs-1.12.13+real.orig/src/admin.c
++++ cvs-1.12.13+real/src/admin.c
+@@ -147,6 +147,7 @@
+     TRACE (TRACE_FUNCTION, "postadmin_proc (%s, %s)", repository, filter);
+ 
+     /* %c = cvs_cmd_name
++     * %I = commit ID
+      * %R = referrer
+      * %p = shortrepos
+      * %r = repository
+@@ -162,6 +163,7 @@
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+ 	                      filter,
+ 	                      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 	                      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+--- cvs-1.12.13+real.orig/src/annotate.c
++++ cvs-1.12.13+real/src/annotate.c
+@@ -21,6 +21,7 @@
+ 
+ /* Options from the command line.  */
+ 
++static int backwards = 0;
+ static int force_tag_match = 1;
+ static int force_binary = 0;
+ static char *tag = NULL;
+@@ -36,7 +37,8 @@
+ 
+ static const char *const annotate_usage[] =
+ {
+-    "Usage: %s %s [-lRfF] [-r rev] [-D date] [files...]\n",
++    "Usage: %s %s [-blRfF] [-r rev] [-D date] [files...]\n",
++    "\t-b\tBackwards, show when a line was removed.\n",
+     "\t-l\tLocal directory only, no recursion.\n",
+     "\t-R\tProcess directories recursively.\n",
+     "\t-f\tUse head revision if tag/date not found.\n",
+@@ -63,10 +65,13 @@
+ 	usage (annotate_usage);
+ 
+     optind = 0;
+-    while ((c = getopt (argc, argv, "+lr:D:fFR")) != -1)
++    while ((c = getopt (argc, argv, "+blr:D:fFR")) != -1)
+     {
+ 	switch (c)
+ 	{
++	    case 'b':
++		backwards = 1;
++		break;
+ 	    case 'l':
+ 		local = 1;
+ 		break;
+@@ -105,6 +110,8 @@
+ 
+ 	ign_setup ();
+ 
++	if (backwards)
++	    send_arg ("-b");
+ 	if (local)
+ 	    send_arg ("-l");
+ 	if (!force_tag_match)
+@@ -280,7 +287,8 @@
+     else
+     {
+ 	RCS_deltas (finfo->rcs, NULL, NULL,
+-		    version, RCS_ANNOTATE, NULL, NULL, NULL, NULL);
++		    version, backwards ? RCS_ANNOTATE_BACKWARDS : RCS_ANNOTATE,
++		    NULL, NULL, NULL, NULL);
+     }
+     free (version);
+     return 0;
+--- cvs-1.12.13+real.orig/src/buffer.c
++++ cvs-1.12.13+real/src/buffer.c
+@@ -1,6 +1,9 @@
+ /*
++ * Copyright © 2017 mirabilos <m@mirbsd.org>
+  * Copyright (C) 1996-2005 The Free Software Foundation, Inc.
+  *
++ * Portions Copyright (c) 2017 Patrick Keshishian
++ *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation; either version 2, or (at your option)
+@@ -536,9 +539,10 @@
+ void
+ buf_free_data (struct buffer *buffer)
+ {
+-    if (buf_empty_p (buffer)) return;
++  if (buffer->data) {
+     buf_free_datas (buffer->data, buffer->last);
+     buffer->data = buffer->last = NULL;
++  }
+ }
+ 
+ 
+@@ -1049,7 +1053,14 @@
+ 	}
+ 
+ 	/* Put in the command.  */
+-	buf_append_char (outbuf, command);
++	switch (command) {
++	case CVS_OUTPUT_EX_LOGM:
++		buf_output0 (outbuf, "LOGM");
++		break;
++	default:
++		buf_append_char (outbuf, command);
++		break;
++	}
+ 	buf_append_char (outbuf, ' ');
+ 
+ 	if (inbuf->data != nldata)
+--- cvs-1.12.13+real.orig/src/checkout.c
++++ cvs-1.12.13+real/src/checkout.c
+@@ -422,7 +422,7 @@
+  *
+  * ERRORS
+  *  Exits with a fatal error message when various events occur, such as not
+- *  being able to resolve a path or failing ot chdir to a path.
++ *  being able to resolve a path or failing to chdir to a path.
+  */
+ int
+ safe_location (char *where)
+--- cvs-1.12.13+real.orig/src/client.c
++++ cvs-1.12.13+real/src/client.c
+@@ -3077,6 +3077,7 @@
+        rs_optional),
+     RSP_LINE("M", handle_m, response_type_normal, rs_essential),
+     RSP_LINE("Mbinary", handle_mbinary, response_type_normal, rs_optional),
++    RSP_LINE("LOGM", handle_m, response_type_normal, rs_optional),
+     RSP_LINE("E", handle_e, response_type_normal, rs_essential),
+     RSP_LINE("F", handle_f, response_type_normal, rs_optional),
+     RSP_LINE("MT", handle_mt, response_type_normal, rs_optional),
+@@ -3355,7 +3356,7 @@
+     struct servent *s;
+     char *port_s;
+ 
+-    if (envname && (port_s = getenv (envname)))
++    if (envname && (port_s = getenv (envname)) && *port_s)
+     {
+ 	int port = atoi (port_s);
+ 	if (port <= 0)
+@@ -3510,6 +3511,17 @@
+     sock = socket (AF_INET, SOCK_STREAM, 0);
+     if (sock == -1)
+ 	error (1, 0, "cannot create socket: %s", SOCK_STRERROR (SOCK_ERRNO));
++
++#ifdef TCP_NODELAY
++    /* Avoid latency due to Nagle algorithm.  */
++    {
++	int on = 1;
++
++	if (setsockopt (sock, IPPROTO_TCP, TCP_NODELAY, &on, sizeof on) < 0)
++	    error (0, errno, "warning: cannot set TCP_NODELAY on socket");
++    }
++#endif
++
+     port_number = get_cvs_port_number (root);
+ 
+     /* if we have a proxy connect to that instead */
+@@ -3558,9 +3570,9 @@
+          * code.
+          */
+ 	read_line_via (from_server, to_server, &read_buf);
+-	sscanf (read_buf, "%s %d", write_buf, &codenum);
++	count = sscanf (read_buf, "%*s %d", &codenum);
+ 
+-	if ((codenum / 100) != 2)
++	if (count != 1 || (codenum / 100) != 2)
+ 	    error (1, 0, "proxy server %s:%d does not support http tunnelling",
+ 		   root->proxy_hostname, proxy_port_number);
+ 	free (read_buf);
+@@ -3793,11 +3805,12 @@
+     /* This is pretty simple.  All we need to do is choose the correct
+        cvs binary and call piped_child. */
+ 
+-     char *command[3];
++    char *command[4];
++    int ncommand = 0;
+ 
+-    command[0] = (root->cvs_server
++    command[ncommand++] = (root->cvs_server
+ 		  ? root->cvs_server : getenv ("CVS_SERVER"));
+-    if (!command[0])
++    if (!command[0] || !command[0][0])
+ # ifdef SERVER_SUPPORT
+         /* FIXME:
+          * I'm casting out the const below because I know that piped_child, the
+@@ -3807,7 +3820,7 @@
+          * such that this casting isn't needed, but I don't know how.  If I
+          * declare it as (const char *command[]), the compiler complains about
+          * an incompatible arg 1 being passed to piped_child and if I declare
+-         * it as (char *const command[3]), then the compiler complains when I
++         * it as (char *const command[4]), then the compiler complains when I
+          * assign values to command[i].
+          */
+ 	command[0] = (char *)program_path;
+@@ -3819,11 +3832,15 @@
+     }
+ # endif /* SERVER_SUPPORT */
+     
+-    command[1] = "server";
+-    command[2] = NULL;
+-
+-    TRACE (TRACE_FUNCTION, "Forking server: %s %s",
+-	   command[0] ? command[0] : "(null)", command[1]);
++    if (readonlyfs)
++        command[ncommand++] = "-R";
++    command[ncommand++] = "server";
++    command[ncommand++] = NULL;
++
++    TRACE (TRACE_FUNCTION, "Forking server: %s %s %s",
++	   command[0] ? command[0] : "(null)",
++	   command[1] ? command[1] : "(null)",
++	   command[2] ? command[2] : "");
+ 
+     child_pid = piped_child (command, &tofd, &fromfd, false);
+     if (child_pid < 0)
+@@ -3901,8 +3918,12 @@
+ 	case ext_method:
+ #ifdef NO_EXT_METHOD
+ 	    error (0, 0, ":ext: method not supported by this port of CVS");
++	    if (0)
++	case extssh_method:
++		error (0, 0, ":extssh: method not supported by this port of CVS");
+ 	    error (1, 0, "try :server: instead");
+ #else /* ! NO_EXT_METHOD */
++	case extssh_method:
+ 	    start_rsh_server (root, to_server_p,
+                               from_server_p);
+ #endif /* NO_EXT_METHOD */
+@@ -4362,7 +4383,7 @@
+ 	  sprintf (tmp, "%lu\n", (unsigned long) newsize);
+ 	  send_to_server (tmp, 0);
+ 
+-          send_to_server (buf, newsize);
++          send_to_server ((const void *)buf, newsize);
+         }
+     }
+     else
+@@ -4415,7 +4436,7 @@
+ 	 * one.
+ 	 */
+ 	if (newsize > 0)
+-	    send_to_server (buf, newsize);
++	    send_to_server ((const void *)buf, newsize);
+     }
+     free (buf);
+     free (mode_string);
+@@ -4914,7 +4935,7 @@
+     {
+         if (supported_request ("Max-dotdot"))
+         {
+-            char buf[10];
++            char buf[12];
+             sprintf (buf, "%d", max_level);
+ 
+             send_to_server ("Max-dotdot ", 0);
+--- cvs-1.12.13+real.orig/src/client.h
++++ cvs-1.12.13+real/src/client.h
+@@ -213,6 +213,7 @@
+ #if defined AUTH_CLIENT_SUPPORT || defined HAVE_KERBEROS || defined HAVE_GSSAPI
+ # include <sys/socket.h>
+ # include <netinet/in.h>
++# include <netinet/tcp.h>
+ # include <arpa/inet.h>
+ # include <netdb.h>
+ struct hostent *init_sockaddr (struct sockaddr_in *, char *, unsigned int);
+--- cvs-1.12.13+real.orig/src/commit.c
++++ cvs-1.12.13+real/src/commit.c
+@@ -1,5 +1,7 @@
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2007 Benny Siegert <bsiegert@mirbsd.org>
++ * Copyright (c) 2005, 2007, 2021 mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -492,7 +494,7 @@
+ 
+ 	/* Now we keep track of which files we actually are going to
+ 	   operate on, and only work with those files in the future.
+-	   This saves time--we don't want to search the file system
++	   This saves time--we don't want to search the filesystem
+ 	   of the working directory twice.  */
+ 	if (size_overflow_p (xtimes (find_args.argc, sizeof (char **))))
+ 	{
+@@ -613,31 +615,7 @@
+ 
+ 	send_to_server ("ci\012", 0);
+ 	err = get_responses_and_close ();
+-	if (err != 0 && use_editor && saved_message != NULL)
+-	{
+-	    /* If there was an error, don't nuke the user's carefully
+-	       constructed prose.  This is something of a kludge; a better
+-	       solution is probably more along the lines of #150 in TODO
+-	       (doing a second up-to-date check before accepting the
+-	       log message has also been suggested, but that seems kind of
+-	       iffy because the real up-to-date check could still fail,
+-	       another error could occur, &c.  Also, a second check would
+-	       slow things down).  */
+-
+-	    char *fname;
+-	    FILE *fp;
+-
+-	    fp = cvs_temp_file (&fname);
+-	    if (fp == NULL)
+-		error (1, 0, "cannot create temporary file %s", fname);
+-	    if (fwrite (saved_message, 1, strlen (saved_message), fp)
+-		!= strlen (saved_message))
+-		error (1, errno, "cannot write temporary file %s", fname);
+-	    if (fclose (fp) < 0)
+-		error (0, errno, "cannot close temporary file %s", fname);
+-	    error (0, 0, "saving log message in %s", fname);
+-	    free (fname);
+-	}
++	logmsg_cleanup(err);
+ 	return err;
+     }
+ #endif
+@@ -702,6 +680,7 @@
+ 	sleep_past (last_register_time);
+     }
+ 
++    logmsg_cleanup(err);
+     return err;
+ }
+ 
+@@ -853,7 +832,7 @@
+ 	case T_ADDED:
+ 	case T_REMOVED:
+         {
+-            char *editor;
++            char *editor = NULL;
+ 
+ 	    /*
+ 	     * some quick sanity checks; if no numeric -r option specified:
+@@ -1196,7 +1175,7 @@
+ 	doff = d - *c->buf;
+ 	expand_string (c->buf, c->length, doff + strlen (arg));
+ 	d = *c->buf + doff;
+-	strncpy (d, arg, strlen (arg));
++	memcpy (d, arg, strlen (arg));
+ 	d += strlen (arg);
+ 	free (arg);
+ 
+@@ -1250,6 +1229,7 @@
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+ 			      filter,
+ 			      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 			      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+@@ -2255,9 +2235,10 @@
+ 		   this was added into the log message. */
+ 		t = time (NULL);
+ 		ct = gmtime (&t);
+-		tmp = Xasprintf ("file %s was added on branch %s on %d-%02d-%02d %02d:%02d:%02d +0000",
++		tmp = Xasprintf ("file %s was added on branch %s on %ld-%02d-%02d %02d:%02d:%02d +0000",
+ 				 file, tag,
+-				 ct->tm_year + (ct->tm_year < 100 ? 0 : 1900),
++				 (long)ct->tm_year
++				  + (ct->tm_year < 100 ? 0 : 1900),
+ 				 ct->tm_mon + 1, ct->tm_mday,
+ 				 ct->tm_hour, ct->tm_min, ct->tm_sec);
+ 			 
+--- cvs-1.12.13+real.orig/src/cvs.h
++++ cvs-1.12.13+real/src/cvs.h
+@@ -1,5 +1,9 @@
++/* $MirOS: src/gnu/usr.bin/cvs/src/cvs.h,v 1.10 2021/01/30 02:06:05 tg Exp $ */
++
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2007 Benny Siegert <bsiegert@mirbsd.org>
++ * Copyright (c) 2017, 2021 mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -24,7 +28,7 @@
+ /* Add GNU attribute suppport.  */
+ #ifndef __attribute__
+ /* This feature is available in gcc versions 2.5 and later.  */
+-# if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 5) || __STRICT_ANSI__
++# if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 5) || (defined(__STRICT_ANSI__) && (__STRICT_ANSI__))
+ #  define __attribute__(Spec) /* empty */
+ # else
+ #   if __GNUC__ == 2 && __GNUC_MINOR__ < 96
+@@ -365,6 +369,7 @@
+ 
+ extern const char *program_name, *program_path, *cvs_cmd_name;
+ extern char *Editor;
++extern char *LogMsgFile;
+ extern int cvsadmin_root;
+ extern char *CurDir;
+ extern int really_quiet, quiet;
+@@ -504,6 +509,8 @@
+ int unlink_file (const char *f);
+ int unlink_file_dir (const char *f);
+ 
++int suck (int argc, char *argv[]);
++
+ /* This is the structure that the recursion processor passes to the
+    fileproc to tell it about a particular file.  */
+ struct file_info
+@@ -585,7 +592,8 @@
+ void check_entries (char *dir);
+ void close_module (DBM * db);
+ void copy_file (const char *from, const char *to);
+-void fperrmsg (FILE * fp, int status, int errnum, char *message,...);
++void fpwarnmsg (FILE * fp, int errnum, char *message, ...)
++	__attribute__ ((__format__(__printf__, 3, 4)));
+ 
+ int ign_name (char *name);
+ void ign_add (char *ign, int hold);
+@@ -618,7 +626,8 @@
+ void cleanup_register (void (*handler) (void));
+ 
+ void update_delproc (Node * p);
+-void usage (const char *const *cpp);
++void usage (const char *const *cpp)
++	__attribute__((__noreturn__));
+ void xchmod (const char *fname, int writable);
+ List *Find_Names (char *repository, int which, int aflag,
+ 		  List ** optentries);
+@@ -629,6 +638,7 @@
+                      FILE *xlogfp, List *xchanges);
+ void do_editor (const char *dir, char **messagep,
+                 const char *repository, List *changes);
++void logmsg_cleanup (int err);
+ 
+ void do_verify (char **messagep, const char *repository, List *changes);
+ 
+@@ -726,7 +736,7 @@
+     /* This is the timestamp from stating the file in the working directory.
+        It is NULL if there is no file in the working directory.  It is
+        "Is-modified" if we know the file is modified but don't have its
+-       contents.  */
++       contents.  See also: ts_user_ists.  */
+     char *ts_user;
+     /* Timestamp from CVS/Entries.  For the server, ts_user and ts_rcs
+        are computed in a slightly different way, but the fact remains that
+@@ -759,6 +769,9 @@
+ 
+     /* Pointer to parsed src file info */
+     RCSNode *srcfile;
++
++    /* 1 if ts_user is known to be the actual timestamp of a local file */
++    unsigned char ts_user_ists;
+ };
+ typedef struct vers_ts Vers_TS;
+ 
+@@ -911,11 +924,15 @@
+ 
+ /* From server.c and documented there.  */
+ void cvs_output (const char *, size_t);
++void cvs_output_ex (const char *, size_t, int);
+ void cvs_output_binary (char *, size_t);
+ void cvs_outerr (const char *, size_t);
+ void cvs_flusherr (void);
+ void cvs_flushout (void);
+ void cvs_output_tagged (const char *, const char *);
++int supported_response (const char *);
++
++#define CVS_OUTPUT_EX_LOGM	0x80000001
+ 
+ extern const char *global_session_id;
+ 
+--- cvs-1.12.13+real.orig/src/cvsrc.c
++++ cvs-1.12.13+real/src/cvsrc.c
+@@ -41,6 +41,7 @@
+     size_t line_chars_allocated;
+ 
+     char *optstart;
++    int white_len = 0;
+ 
+     int command_len;
+     int found = 0;
+@@ -96,9 +97,12 @@
+ 	if (line[0] == '#')
+ 	    continue;
+ 
++	while (isspace(line[white_len]))
++		++white_len;
++
+ 	/* stop if we match the current command */
+-	if (!strncmp (line, cmdname, command_len)
+-	    && isspace ((unsigned char) *(line + command_len)))
++	if (!strncmp (line + white_len, cmdname, command_len)
++	    && isspace ((unsigned char) *(line + white_len + command_len)))
+ 	{
+ 	    found = 1;
+ 	    break;
+@@ -120,7 +124,7 @@
+     if (found)
+     {
+ 	/* skip over command in the options line */
+-	for (optstart = strtok (line + command_len, "\t \n");
++	for (optstart = strtok (line + white_len + command_len, "\t \n");
+ 	     optstart;
+ 	     optstart = strtok (NULL, "\t \n"))
+ 	{
+--- cvs-1.12.13+real.orig/src/diff.c
++++ cvs-1.12.13+real/src/diff.c
+@@ -21,6 +21,8 @@
+ 
+ #include "cvs.h"
+ 
++#define TAG_BHEAD ".bhead"
++
+ enum diff_file
+ {
+     DIFF_ERROR,
+@@ -444,9 +446,9 @@
+     }
+ #endif
+ 
+-    if (diff_rev1 != NULL)
++    if (diff_rev1 != NULL && strcmp(diff_rev1, TAG_BHEAD))
+ 	tag_check_valid (diff_rev1, argc, argv, local, 0, "", false);
+-    if (diff_rev2 != NULL)
++    if (diff_rev2 != NULL && strcmp(diff_rev2, TAG_BHEAD))
+ 	tag_check_valid (diff_rev2, argc, argv, local, 0, "", false);
+ 
+     which = W_LOCAL;
+@@ -903,8 +905,14 @@
+ 
+     if (diff_rev1 || diff_date1)
+     {
+-	/* special handling for TAG_HEAD */
+-	if (diff_rev1 && strcmp (diff_rev1, TAG_HEAD) == 0)
++	/*
++	 * the special handling is broken, -rbranchname is the
++	 * head (tip) of the branch already, -rHEAD is supposed
++	 * to be the head (tip) of the MAIN branch (trunk); we
++	 * introduce ".bhead" here, for now, but only here
++	 */
++	/* special handling for TAG_BHEAD */
++	if (diff_rev1 && strcmp (diff_rev1, TAG_BHEAD) == 0)
+ 	{
+ 	    if (vers->vn_rcs != NULL && vers->srcfile != NULL)
+ 		use_rev1 = RCS_branch_head (vers->srcfile, vers->vn_rcs);
+@@ -919,8 +927,8 @@
+     }
+     if (diff_rev2 || diff_date2)
+     {
+-	/* special handling for TAG_HEAD */
+-	if (diff_rev2 && strcmp (diff_rev2, TAG_HEAD) == 0)
++	/* special handling for TAG_BHEAD */
++	if (diff_rev2 && strcmp (diff_rev2, TAG_BHEAD) == 0)
+ 	{
+ 	    if (vers->vn_rcs && vers->srcfile)
+ 		use_rev2 = RCS_branch_head (vers->srcfile, vers->vn_rcs);
+--- cvs-1.12.13+real.orig/src/edit.c
++++ cvs-1.12.13+real/src/edit.c
+@@ -266,7 +266,7 @@
+             cvs_output (p++, 1);
+         if (*p == '\0')
+         {
+-            /* Only happens if attribute is misformed.  */
++            /* Only happens if attribute is malformed.  */
+             cvs_output ("\n", 1);
+             break;
+         }
+@@ -828,6 +828,7 @@
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+ 			      filter,
+ 			      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 			      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+--- cvs-1.12.13+real.orig/src/error.c
++++ cvs-1.12.13+real/src/error.c
+@@ -1,5 +1,6 @@
+ /* error.c -- error handler for noninteractive utilities
+    Copyright (C) 1990-1992 Free Software Foundation, Inc.
++   Copyright (c) 2011, 2021 mirabilos <m@mirbsd.org>
+ 
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+@@ -57,7 +58,7 @@
+  * represents the system dependent message returned by strerror (ERRNUM), when
+  * ERRNUM is non-zero.
+  *
+- * Exit with status EXIT_FAILURE if STATUS is nonzero.
++ * error() exits with status EXIT_FAILURE if STATUS is nonzero.
+  *
+  * If this function fails to get any memory it might request, it attempts to
+  * log a "memory exhausted" message to the syslog, when syslog is available,
+@@ -65,7 +66,7 @@
+  * below for more information on this functions memory allocation.
+  *
+  * INPUTS
+- *   status	When non-zero, exit with EXIT_FAILURE rather than returning.
++ *   status	warning() returns this value for the error() macro.
+  *   errnum	When non-zero, interpret as global ERRNO for the purpose of
+  *		generating additional error text.
+  *   message	A printf style format string.
+@@ -104,8 +105,8 @@
+  * RETURNS
+  *   Sometimes.  ;)
+  */
+-void
+-error (int status, int errnum, const char *message, ...)
++int
++warning(int status, int errnum, const char *message, ...)
+ {
+     va_list args;
+     int save_errno = errno;
+@@ -180,7 +181,7 @@
+ 
+     /* Done, if we're exiting.  */
+     if (status)
+-	exit (EXIT_FAILURE);
++	return (status);
+ 
+     /* Free anything we may have allocated.  */
+     if (buf != statbuf) free (buf);
+@@ -191,7 +192,7 @@
+     errno = save_errno;
+ 
+     /* Done.  */
+-    return;
++    return (status);
+ 
+ memerror:
+     /* Make one last attempt to log the problem in the syslog since that
+@@ -208,7 +209,7 @@
+      *   with the message here.
+      */
+ #if HAVE_SYSLOG_H
+-    syslog (LOG_DAEMON | LOG_EMERG, "Memory exhausted.  Aborting.");
++    syslog (LOG_DAEMON | LOG_CRIT, "Memory exhausted.  Aborting.");
+ #endif /* HAVE_SYSLOG_H */
+ 
+     goto sidestep_done;
+@@ -219,18 +220,18 @@
+      * error while attempting to send the last error message to the client.
+      */
+ 
+-    syslog (LOG_DAEMON | LOG_EMERG,
++    syslog (LOG_DAEMON | LOG_ALERT,
+ 	    "error (%d, %d) called recursively.  Original message was:",
+ 	    last_status, last_errnum);
+-    syslog (LOG_DAEMON | LOG_EMERG, "%s", last_message);
++    syslog (LOG_DAEMON | LOG_ALERT, "%s", last_message);
+ 
+ 
+-    syslog (LOG_DAEMON | LOG_EMERG,
++    syslog (LOG_DAEMON | LOG_ALERT,
+             "error (%d, %d) called recursively.  Second message was:",
+ 	    status, errnum);
+-    syslog (LOG_DAEMON | LOG_EMERG, "%s", buf2);
++    syslog (LOG_DAEMON | LOG_ALERT, "%s", buf2);
+ 
+-    syslog (LOG_DAEMON | LOG_EMERG, "Aborting.");
++    syslog (LOG_DAEMON | LOG_ALERT, "Aborting.");
+ #endif /* HAVE_SYSLOG_H */
+ 
+ sidestep_done:
+@@ -247,10 +248,10 @@
+ /* Print the program name and error message MESSAGE, which is a printf-style
+    format string with optional args to the file specified by FP.
+    If ERRNUM is nonzero, print its corresponding system error message.
+-   Exit with status EXIT_FAILURE if STATUS is nonzero.  */
++*/
+ /* VARARGS */
+ void
+-fperrmsg (FILE *fp, int status, int errnum, char *message, ...)
++fpwarnmsg (FILE *fp, int errnum, char *message, ...)
+ {
+     va_list args;
+ 
+@@ -262,6 +263,4 @@
+ 	fprintf (fp, ": %s", strerror (errnum));
+     putc ('\n', fp);
+     fflush (fp);
+-    if (status)
+-	exit (EXIT_FAILURE);
+ }
+--- cvs-1.12.13+real.orig/src/fileattr.c
++++ cvs-1.12.13+real/src/fileattr.c
+@@ -514,6 +514,7 @@
+     TRACE (TRACE_FUNCTION, "postwatch_proc (%s, %s)", repository, filter);
+ 
+     /* %c = command name
++     * %I = commit ID
+      * %p = shortrepos
+      * %r = repository
+      */
+@@ -528,6 +529,7 @@
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+ 	                      filter,
+ 	                      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 	                      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+--- cvs-1.12.13+real.orig/src/filesubr.c
++++ cvs-1.12.13+real/src/filesubr.c
+@@ -1,5 +1,6 @@
+ /* filesubr.c --- subroutines for dealing with files
+    Jim Blandy <jimb@cyclic.com>
++   © 2010, 2017, 2021 mirabilos <m@mirbsd.org>
+ 
+    This file is part of GNU CVS.
+ 
+@@ -15,7 +16,7 @@
+ 
+ /* These functions were moved out of subr.c because they need different
+    definitions under operating systems (like, say, Windows NT) with different
+-   file system semantics.  */
++   filesystem semantics.  */
+ 
+ #include "cvs.h"
+ #include "lstat.h"
+@@ -645,6 +646,10 @@
+ 		error (1, errno, "cannot read file %s for comparing", file2);
+ 
+ 	    /* assert (read1 == read2); */
++#if defined(__GNUC__) && /* stupid */ (__GNUC__ > 4)
++	    if (read1 > buf_size)
++		__builtin_unreachable();
++#endif
+ 
+ 	    ret = memcmp(buf1, buf2, read1);
+ 	} while (ret == 0 && read1 == buf_size);
+@@ -808,7 +813,7 @@
+     if (home != NULL)
+ 	return home;
+ 
+-    if (!server_active && (env = getenv ("HOME")) != NULL)
++    if (!server_active && (env = getenv ("HOME")) != NULL && *env)
+ 	home = env;
+     else if ((pw = (struct passwd *) getpwuid (getuid ()))
+ 	     && pw->pw_dir)
+@@ -863,7 +868,11 @@
+ const char *
+ get_system_temp_dir (void)
+ {
+-    if (!tmpdir_env) tmpdir_env = getenv (TMPDIR_ENV);
++    if (!tmpdir_env) {
++      tmpdir_env = getenv (TMPDIR_ENV);
++      if (tmpdir_env && !*tmpdir_env)
++        tmpdir_env = NULL;
++    }
+     return tmpdir_env;
+ }
+ 
+--- cvs-1.12.13+real.orig/src/history.c
++++ cvs-1.12.13+real/src/history.c
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright (C) 1994-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2005, 2010, 2021 mirabilos <m@mirbsd.org>
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+@@ -362,10 +363,11 @@
+ 
+     /*
+      * By default, sort by date, time
+-     * XXX: This fails after 2030 when date slides into sign bit
+      */
+-    if ((i = ((long) (left->date) - (long) (right->date))) != 0)
+-	return i;
++    if (left->date > right->date)
++	return (1);
++    if (left->date < right->date)
++	return (-1);
+ 
+     /* For matching dates, keep the sort stable by using record index */
+     return left->idx - right->idx;
+@@ -376,10 +378,10 @@
+ /* Get the name of the history log, either from CVSROOT/config, or via the
+  * hard-coded default.
+  */
+-static const char *
++static char *
+ get_history_log_name (time_t now)
+ {
+-    char *log_name;
++    char *log_name = NULL;
+ 
+     if (config->HistoryLogPath)
+     {
+@@ -762,7 +764,7 @@
+ history_write (int type, const char *update_dir, const char *revs,
+                const char *name, const char *repository)
+ {
+-    const char *fname;
++    char *fname = NULL;
+     char *workdir;
+     char *username = getcaller ();
+     int fd;
+@@ -897,16 +899,16 @@
+ 
+     if (!revs)
+ 	revs = "";
++    if (!history_lock (current_parsed_root->directory))
++	/* history_lock() will already have printed an error on failure.  */
++	goto out;
++
+     now = time (NULL);
+-    line = Xasprintf ("%c%08lx|%s|%s|%s|%s|%s\n", type, (long) now,
++    line = Xasprintf ("%c%08lx|%s|%s|%s|%s|%s\n", type, (unsigned long)now,
+ 		      username, workdir, repos, revs, name);
+ 
+     fname = get_history_log_name (now);
+ 
+-    if (!history_lock (current_parsed_root->directory))
+-	/* history_lock() will already have printed an error on failure.  */
+-	goto out;
+-
+     fd = CVS_OPEN (fname, O_WRONLY | O_APPEND | O_CREAT | OPEN_BINARY, 0666);
+     if (fd < 0)
+     {
+@@ -936,6 +938,7 @@
+ 	error (1, errno, "cannot close history file: %s", fname);
+     free (workdir);
+  out:
++    free (fname);
+     clear_history_lock ();
+ }
+ 
+@@ -1561,7 +1564,7 @@
+ 	    tm = localtime (&(lr->date));
+ 
+ 	(void) printf ("%c %04d-%02d-%02d %02d:%02d %s %-*s", ty,
+-		  tm->tm_year+1900, tm->tm_mon + 1, tm->tm_mday, tm->tm_hour,
++		  (int)(tm->tm_year+1900), tm->tm_mon + 1, tm->tm_mday, tm->tm_hour,
+ 		  tm->tm_min, tz_name, user_len, lr->user);
+ 
+ 	workdir = xmalloc (strlen (lr->dir) + strlen (lr->end) + 10);
+--- cvs-1.12.13+real.orig/src/import.c
++++ cvs-1.12.13+real/src/import.c
+@@ -1,5 +1,8 @@
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2007 Benny Siegert <bsiegert@mirbsd.org>
++ * Copyright (c) 2005, 2007, 2010, 2016, 2017, 2021
++ *	mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -25,7 +28,7 @@
+ #include "lstat.h"
+ #include "save-cwd.h"
+ 
+-static char *get_comment (const char *user);
++static const char *get_comment (const char *user);
+ static int add_rev (char *message, RCSNode *rcs, char *vfile,
+ 			  char *vers);
+ static int add_tags (RCSNode *rcs, char *vfile, char *vtag, int targc,
+@@ -238,6 +241,23 @@
+ 	regfree (&pat);
+     }
+ 
++    /*
++     * If you use even vendor branches, something evil[TM] can happen.
++     */
++    {
++	regex_t pat;
++	assert (!regcomp (&pat, "^[1-9][0-9]*\\.[1-9][0-9]*\\.[0-9]*[13579]$",
++			  REG_EXTENDED));
++	if (regexec (&pat, vbranch, 0, NULL, 0))
++	{
++	    error (0, 0,
++		   "warning: you are using an even vendor branch, which can\n"
++		   "lead to problems: '%s'.  Use an odd branch such as '1.1.3' instead.",
++		   vbranch);
++	}
++	regfree (&pat);
++    }
++
+     /* Set vhead to the branch's parent.  */
+     vhead = xstrdup (vbranch);
+     cp = strrchr (vhead, '.');
+@@ -311,6 +331,7 @@
+ 	free (vhead);
+ 	send_to_server ("import\012", 0);
+ 	err += get_responses_and_close ();
++	logmsg_cleanup(err);
+ 	return err;
+     }
+ #endif
+@@ -436,6 +457,7 @@
+     free (vbranch);
+     free (vhead);
+ 
++    logmsg_cleanup(err);
+     return err;
+ }
+ 
+@@ -595,7 +617,7 @@
+ 		/* Attempt to make the Attic directory, in case it
+ 		   does not exist.  */
+ 		(void) sprintf (rcs, "%s/%s", repository, CVSATTIC);
+-		if (CVS_MKDIR (rcs, 0777 ) != 0 && errno != EEXIST)
++		if (noexec == 0 && CVS_MKDIR (rcs, 0777 ) != 0 && errno != EEXIST)
+ 		    error (1, errno, "cannot make directory `%s'", rcs);
+ 
+ 		/* Note that the above clobbered the path name, so we
+@@ -790,7 +812,7 @@
+     {
+ 	if (!noexec)
+ 	{
+-	    fperrmsg (logfp, 0, status == -1 ? ierrno : 0,
++	    fpwarnmsg (logfp, status == -1 ? ierrno : 0,
+ 		      "ERROR: Check-in of %s failed", rcs->path);
+ 	    error (0, status == -1 ? ierrno : 0,
+ 		   "ERROR: Check-in of %s failed", rcs->path);
+@@ -825,7 +847,7 @@
+     if ((retcode = RCS_settag (rcs, vtag, vbranch)) != 0)
+     {
+ 	ierrno = errno;
+-	fperrmsg (logfp, 0, retcode == -1 ? ierrno : 0,
++	fpwarnmsg (logfp, retcode == -1 ? ierrno : 0,
+ 		  "ERROR: Failed to set tag %s in %s", vtag, rcs->path);
+ 	error (0, retcode == -1 ? ierrno : 0,
+ 	       "ERROR: Failed to set tag %s in %s", vtag, rcs->path);
+@@ -849,7 +871,7 @@
+ 	else
+ 	{
+ 	    ierrno = errno;
+-	    fperrmsg (logfp, 0, retcode == -1 ? ierrno : 0,
++	    fpwarnmsg (logfp, retcode == -1 ? ierrno : 0,
+ 		      "WARNING: Couldn't add tag %s to %s", targv[i],
+ 		      rcs->path);
+ 	    error (0, retcode == -1 ? ierrno : 0,
+@@ -866,7 +888,8 @@
+  */
+ struct compair
+ {
+-    char *suffix, *comlead;
++    const char *suffix;
++    const char *comlead;
+ };
+ 
+ static const struct compair comtable[] =
+@@ -973,13 +996,13 @@
+ 
+ 
+ 
+-static char *
++static const char *
+ get_comment (const char *user)
+ {
+     char *cp, *suffix;
+     char *suffix_path;
+     int i;
+-    char *retval;
++    const char *retval;
+ 
+     suffix_path = xmalloc (strlen (user) + 5);
+     cp = strrchr (user, '.');
+@@ -1144,7 +1167,7 @@
+     {
+ 	/* not fatal, continue import */
+ 	if (add_logfp != NULL)
+-	    fperrmsg (add_logfp, 0, errno,
++	    fpwarnmsg (add_logfp, errno,
+ 			  "ERROR: cannot lstat file %s", userfile);
+ 	error (0, errno, "cannot lstat file %s", userfile);
+ 	goto read_error;
+@@ -1167,7 +1190,7 @@
+ 	{
+ 	    /* not fatal, continue import */
+ 	    if (add_logfp != NULL)
+-		fperrmsg (add_logfp, 0, errno,
++		fpwarnmsg (add_logfp, errno,
+ 			  "ERROR: cannot read file %s", userfile);
+ 	    error (0, errno, "ERROR: cannot read file %s", userfile);
+ 	    goto read_error;
+@@ -1253,7 +1276,7 @@
+ 	(void) time (&now);
+     ftm = gmtime (&now);
+     (void) sprintf (altdate1, DATEFORM,
+-		    ftm->tm_year + (ftm->tm_year < 100 ? 0 : 1900),
++		    (long)ftm->tm_year + (ftm->tm_year < 100 ? 0L : 1900L),
+ 		    ftm->tm_mon + 1, ftm->tm_mday, ftm->tm_hour,
+ 		    ftm->tm_min, ftm->tm_sec);
+     author = getcaller ();
+@@ -1459,7 +1482,7 @@
+     {
+ 	ierrno = errno;
+ 	if (add_logfp != NULL)
+-	    fperrmsg (add_logfp, 0, ierrno,
++	    fpwarnmsg (add_logfp, ierrno,
+ 		      "WARNING: cannot change mode of file %s", rcs);
+ 	error (0, ierrno, "WARNING: cannot change mode of file %s", rcs);
+ 	err++;
+@@ -1479,14 +1502,14 @@
+     if (fclose (fpuser) < 0)
+ 	error (0, errno, "cannot close %s", user);
+     if (add_logfp != NULL)
+-	fperrmsg (add_logfp, 0, ierrno, "ERROR: cannot write file %s", rcs);
++	fpwarnmsg (add_logfp, ierrno, "ERROR: cannot write file %s", rcs);
+     error (0, ierrno, "ERROR: cannot write file %s", rcs);
+     if (ierrno == ENOSPC)
+     {
+ 	if (CVS_UNLINK (rcs) < 0)
+ 	    error (0, errno, "cannot remove %s", rcs);
+ 	if (add_logfp != NULL)
+-	    fperrmsg (add_logfp, 0, 0, "ERROR: out of space - aborting");
++	    fpwarnmsg (add_logfp, 0, "ERROR: out of space - aborting");
+ 	error (1, 0, "ERROR: out of space - aborting");
+     }
+ read_error:
+@@ -1709,7 +1732,7 @@
+ 	return 0;
+     if (save_cwd (&cwd))
+     {
+-	fperrmsg (logfp, 0, errno, "Failed to save current directory.");
++	fpwarnmsg (logfp, errno, "Failed to save current directory.");
+ 	return 1;
+     }
+ 
+@@ -1733,7 +1756,7 @@
+     if (CVS_CHDIR (dir) < 0)
+     {
+ 	ierrno = errno;
+-	fperrmsg (logfp, 0, ierrno, "ERROR: cannot chdir to %s", repository);
++	fpwarnmsg (logfp, ierrno, "ERROR: cannot chdir to %s", repository);
+ 	error (0, ierrno, "ERROR: cannot chdir to %s", repository);
+ 	err = 1;
+ 	goto out;
+@@ -1743,7 +1766,7 @@
+ 	rcs = Xasprintf ("%s%s", repository, RCSEXT);
+ 	if (isfile (repository) || isfile (rcs))
+ 	{
+-	    fperrmsg (logfp, 0, 0,
++	    fpwarnmsg (logfp, 0,
+ 		      "ERROR: %s is a file, should be a directory!",
+ 		      repository);
+ 	    error (0, 0, "ERROR: %s is a file, should be a directory!",
+@@ -1754,7 +1777,7 @@
+ 	if (noexec == 0 && CVS_MKDIR (repository, 0777) < 0)
+ 	{
+ 	    ierrno = errno;
+-	    fperrmsg (logfp, 0, ierrno,
++	    fpwarnmsg (logfp, ierrno,
+ 		      "ERROR: cannot mkdir %s -- not added", repository);
+ 	    error (0, ierrno,
+ 		   "ERROR: cannot mkdir %s -- not added", repository);
+--- cvs-1.12.13+real.orig/src/kerberos4-client.c
++++ cvs-1.12.13+real/src/kerberos4-client.c
+@@ -17,6 +17,8 @@
+ #include "buffer.h"
+ #include "socket-client.h"
+ 
++#include <netinet/tcp.h>
++
+ #   include <krb.h>
+ 
+ extern char *krb_realmofhost ();
+@@ -48,6 +50,16 @@
+     if (s < 0)
+ 	error (1, 0, "cannot create socket: %s", SOCK_STRERROR (SOCK_ERRNO));
+ 
++#ifdef TCP_NODELAY
++    /* Avoid latency due to Nagle algorithm.  */
++    {
++	int on = 1;
++
++	if (setsockopt (sock, IPPROTO_TCP, TCP_NODELAY, &on, sizeof on) < 0)
++	    error (0, errno, "warning: cannot set TCP_NODELAY on socket");
++    }
++#endif
++
+     port = get_cvs_port_number (root);
+ 
+     hp = init_sockaddr (&sin, root->hostname, port);
+--- cvs-1.12.13+real.orig/src/lock.c
++++ cvs-1.12.13+real/src/lock.c
+@@ -58,7 +58,7 @@
+    which periodically get made about how locks might be different:
+ 
+    1.  Check for EROFS.  Maybe useful, although in the presence of NFS
+-   EROFS does *not* mean that the file system is unchanging.
++   EROFS does *not* mean that the filesystem is unchanging.
+ 
+    2.  Provide an option to disable locks for operations which only
+    read (see above for some of the consequences).
+@@ -1319,6 +1319,10 @@
+     lock->repository = Xasprintf ("%s/%s", xrepository, CVSROOTADM);
+     lock->free_repository = true;
+ 
++    /* do nothing if we know it fails anyway */
++    if (readonlyfs)
++      return 0;
++
+     /* get the lock dir for our own */
+     if (set_lock (lock, 1) != L_OK)
+     {
+--- cvs-1.12.13+real.orig/src/log-buffer.c
++++ cvs-1.12.13+real/src/log-buffer.c
+@@ -481,7 +481,7 @@
+    * We do this _after_ authentication on purpose.  Wouldn't really like to
+    * worry about logging passwords...
+    */
+-  if (log)
++  if (log && *log)
+     {
+       int len = strlen (log);
+       char *buf = xmalloc (len + 5);
+--- cvs-1.12.13+real.orig/src/log.c
++++ cvs-1.12.13+real/src/log.c
+@@ -1,4 +1,5 @@
+ /*
++ * Copyright © 2017 mirabilos <m@mirbsd.org>
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+@@ -145,6 +146,7 @@
+ 				RCSNode *, RCSVers *, int);
+ static int log_branch (Node *, void *);
+ static int version_compare (const char *, const char *, int);
++static void logm_output (const char *);
+ 
+ static struct log_data log_data;
+ static int is_rlog;
+@@ -1681,11 +1683,10 @@
+ 	cvs_output ("*** empty log message ***\n", 0);
+     else
+     {
++	/* assert: last thing cvs_output’ed was a newline */
+ 	/* FIXME: Technically, the log message could contain a null
+            byte.  */
+-	cvs_output (p->data, 0);
+-	if (((char *)p->data)[strlen (p->data) - 1] != '\n')
+-	    cvs_output ("\n", 1);
++	logm_output(p->data);
+     }
+ }
+ 
+@@ -1780,3 +1781,23 @@
+ 	    ++v2;
+     }
+ }
++
++static void
++logm_output(const char *str)
++{
++	/* assert: str is not empty */
++	size_t len = strlen(str);
++	int buftag = 'M';
++	static char has_logm = 0;
++
++	if (server_active) {
++		if (!has_logm)
++			has_logm = supported_response("LOGM") ? 1 : 2;
++		if (has_logm == 1)
++			buftag = CVS_OUTPUT_EX_LOGM;
++	}
++
++	cvs_output_ex(str, len, buftag);
++	if (/*len > 0 &&*/ str[len - 1] != '\n')
++		cvs_output_ex("\n", 1, buftag);
++}
+--- cvs-1.12.13+real.orig/src/login.c
++++ cvs-1.12.13+real/src/login.c
+@@ -44,7 +44,7 @@
+     char *passfile;
+ 
+     /* Environment should override file. */
+-    if ((passfile = getenv ("CVS_PASSFILE")) != NULL)
++    if ((passfile = getenv ("CVS_PASSFILE")) != NULL && *passfile)
+ 	return xstrdup (passfile);
+ 
+     /* Construct absolute pathname to user's password file. */
+@@ -200,11 +200,21 @@
+ 	    return NULL;
+ 	}
+ 	*p = ' ';
+-	tmp_root_canonical = normalize_cvsroot (tmp_root);
+-	if (strcmp (cvsroot_canonical, tmp_root_canonical) == 0)
+-	    password = p + 1;
+-
+-	free (tmp_root_canonical);
++	switch (tmp_root->method)
++	{
++	    case gserver_method:
++	    case pserver_method:
++#ifdef HAVE_KERBEROS
++	    case kserver_method:
++#endif /* HAVE_KERBEROS */
++		tmp_root_canonical = normalize_cvsroot (tmp_root);
++		if (strcmp (cvsroot_canonical, tmp_root_canonical) == 0)
++		    password = p + 1;
++		free (tmp_root_canonical);
++		break;
++	    default:
++		break;
++	}
+     }
+ 
+     return password;
+@@ -309,7 +319,9 @@
+     fp = CVS_FOPEN (passfile, "r");
+     if (fp == NULL)
+     {
++      if (errno != ENOENT) {
+ 	error (0, errno, "warning: failed to open %s for reading", passfile);
++      }
+ 	goto process;
+     }
+ 
+@@ -432,7 +444,7 @@
+ 	 *
+ 	 * I don't think so, unless we change the way rename_file works to
+ 	 * attempt a cp/rm sequence when rename fails since rename doesn't
+-	 * work across file systems and it isn't uncommon to have /tmp
++	 * work across filesystems and it isn't uncommon to have /tmp
+ 	 * on its own partition.
+ 	 *
+ 	 * For that matter, it's probably not uncommon to have a home
+--- cvs-1.12.13+real.orig/src/logmsg.c
++++ cvs-1.12.13+real/src/logmsg.c
+@@ -1,5 +1,7 @@
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2007 Benny Siegert <bsiegert@mirbsd.org>
++ * Copyright (c) 2005, 2006, 2008, 2010, 2021 mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -31,6 +33,8 @@
+ static FILE *fp;
+ static Ctype type;
+ 
++char *LogMsgFile = NULL;
++
+ struct verifymsg_proc_data
+ {
+     /* The name of the temp file storing the log message to be verified.  This
+@@ -201,6 +205,7 @@
+     char *fname;
+     struct stat pre_stbuf, post_stbuf;
+     int retcode = 0;
++    int finish = 0;
+ 
+     assert (!current_parsed_root->isremote != !repository);
+ 
+@@ -224,6 +229,10 @@
+ 	    (*messagep)[strlen (*messagep) - 1] != '\n')
+ 	    (void) fprintf (fp, "\n");
+     }
++    else
++	(void) fputc ('\n', fp);
++    if (finish)
++	goto finish_off;
+ 
+     if (repository != NULL)
+ 	/* tack templates on if necessary */
+@@ -267,6 +276,9 @@
+     (void) fprintf (fp,
+   "%s----------------------------------------------------------------------\n",
+ 		    CVSEDITPREFIX);
++    if (readonlyfs)
++      (void) fprintf (fp, "%sATTENTION: read-only mode selected!\n",
++		      CVSEDITPREFIX);
+     (void) fprintf (fp,
+   "%sEnter Log.  Lines beginning with `%.*s' are removed automatically\n%s\n",
+ 		    CVSEDITPREFIX, CVSEDITPREFIXLEN, CVSEDITPREFIX,
+@@ -280,28 +292,38 @@
+   "%s----------------------------------------------------------------------\n",
+ 		    CVSEDITPREFIX);
+ 
++ finish_off:
+     /* finish off the temp file */
+     if (fclose (fp) == EOF)
+         error (1, errno, "%s", fname);
+-    if (stat (fname, &pre_stbuf) == -1)
++    if (LogMsgFile)
++    {
++	if (unlink_file (LogMsgFile) < 0)
++	    error (0, errno, "warning: cannot remove temp file %s", LogMsgFile);
++	free (LogMsgFile);
++    }
++    LogMsgFile = fname;
++    if (finish)
++	return;
++    if (stat (LogMsgFile, &pre_stbuf) == -1)
+ 	pre_stbuf.st_mtime = 0;
+ 
+     /* run the editor */
+     run_setup (Editor);
+-    run_add_arg (fname);
++    run_add_arg (LogMsgFile);
+     if ((retcode = run_exec (RUN_TTY, RUN_TTY, RUN_TTY,
+ 			     RUN_NORMAL | RUN_SIGIGNORE)) != 0)
+ 	error (0, retcode == -1 ? errno : 0, "warning: editor session failed");
+ 
+     /* put the entire message back into the *messagep variable */
+ 
+-    fp = xfopen (fname, "r");
++    fp = xfopen (LogMsgFile, "r");
+ 
+     if (*messagep)
+ 	free (*messagep);
+ 
+-    if (stat (fname, &post_stbuf) != 0)
+-	    error (1, errno, "cannot find size of temp file %s", fname);
++    if (stat (LogMsgFile, &post_stbuf) != 0)
++	    error (1, errno, "cannot find size of temp file %s", LogMsgFile);
+ 
+     if (post_stbuf.st_size == 0)
+ 	*messagep = NULL;
+@@ -326,7 +348,7 @@
+ 	    if (line_length == -1)
+ 	    {
+ 		if (ferror (fp))
+-		    error (0, errno, "warning: cannot read %s", fname);
++		    error (0, errno, "warning: cannot read %s", LogMsgFile);
+ 		break;
+ 	    }
+ 	    if (strncmp (line, CVSEDITPREFIX, CVSEDITPREFIXLEN) == 0)
+@@ -339,7 +361,7 @@
+ 	}
+     }
+     if (fclose (fp) < 0)
+-	error (0, errno, "warning: cannot close %s", fname);
++	error (0, errno, "warning: cannot close %s", LogMsgFile);
+ 
+     /* canonicalize emply messages */
+     if (*messagep != NULL &&
+@@ -349,7 +371,11 @@
+ 	*messagep = NULL;
+     }
+ 
+-    if (pre_stbuf.st_mtime == post_stbuf.st_mtime || *messagep == NULL)
++    if (pre_stbuf.st_mtime == post_stbuf.st_mtime || 
++        *messagep == NULL ||
++        (*messagep)[0] == '\0' ||
++        strcmp (*messagep, "\n") == 0 ||
++        strcmp (*messagep, "\n\n") == 0)
+     {
+ 	for (;;)
+ 	{
+@@ -361,9 +387,11 @@
+ 	    if (line_length < 0)
+ 	    {
+ 		error (0, errno, "cannot read from stdin");
+-		if (unlink_file (fname) < 0)
++		if (unlink_file (LogMsgFile) < 0)
+ 		    error (0, errno,
+-			   "warning: cannot remove temp file %s", fname);
++			   "warning: cannot remove temp file %s", LogMsgFile);
++		free (LogMsgFile);
++		LogMsgFile = NULL;
+ 		error (1, 0, "aborting");
+ 	    }
+ 	    else if (line_length == 0
+@@ -371,8 +399,10 @@
+ 		break;
+ 	    if (*line == 'a' || *line == 'A')
+ 		{
+-		    if (unlink_file (fname) < 0)
+-			error (0, errno, "warning: cannot remove temp file %s", fname);
++		    if (unlink_file (LogMsgFile) < 0)
++			error (0, errno, "warning: cannot remove temp file %s", LogMsgFile);
++		    free (LogMsgFile);
++		    LogMsgFile = NULL;
+ 		    error (1, 0, "aborted by user");
+ 		}
+ 	    if (*line == 'e' || *line == 'E')
+@@ -387,15 +417,14 @@
+     }
+     if (line)
+ 	free (line);
+-    if (unlink_file (fname) < 0)
+-	error (0, errno, "warning: cannot remove temp file %s", fname);
+-    free (fname);
++    finish = 1;
++    goto again;
+ }
+ 
+ /* Runs the user-defined verification script as part of the commit or import 
+    process.  This verification is meant to be run whether or not the user 
+    included the -m attribute.  unlike the do_editor function, this is 
+-   independant of the running of an editor for getting a message.
++   independent of the running of an editor for getting a message.
+  */
+ void
+ do_verify (char **messagep, const char *repository, List *changes)
+@@ -670,7 +699,7 @@
+ 		expand_string (c->buf, c->length,
+ 		               doff + strlen (c->srepos) + 1);
+ 		d = *c->buf + doff;
+-		strncpy (d, c->srepos, strlen (c->srepos));
++		memcpy (d, c->srepos, strlen (c->srepos));
+ 		d += strlen (c->srepos);
+ 	    	*d++ = ' ';
+ 	    }
+@@ -690,7 +719,7 @@
+ 	doff = d - *c->buf;
+ 	expand_string (c->buf, c->length, doff + strlen (arg));
+ 	d = *c->buf + doff;
+-	strncpy (d, arg, strlen (arg));
++	memcpy (d, arg, strlen (arg));
+ 	d += strlen (arg);
+ #ifdef SUPPORT_OLD_INFO_FMT_STRINGS
+ 	if (!c->onearg)
+@@ -785,6 +814,7 @@
+        `%s' is left as an exercise for the reader. */
+ 
+     /* %c = cvs_cmd_name
++     * %I = commit ID
+      * %p = shortrepos
+      * %r = repository
+      * %{sVv} = file name, old revision (precommit), new revision (postcommit)
+@@ -800,6 +830,7 @@
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+ 	                      filter,
+ 	                      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 	                      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+@@ -922,6 +953,7 @@
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+                                        script,
+ 				       "c", "s", cvs_cmd_name,
++				       "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 				       "R", "s", referrer
+ 				       ? referrer->original : "NONE",
+@@ -975,3 +1007,20 @@
+     return abs (run_exec (RUN_TTY, RUN_TTY, RUN_TTY,
+ 			  RUN_NORMAL | RUN_SIGIGNORE));
+ }
++
++void
++logmsg_cleanup (int err)
++{
++    if (!use_editor || LogMsgFile == NULL)
++	return;
++
++    if (err == 0)
++    {
++	if (unlink_file (LogMsgFile) < 0)
++	    error (0, errno, "warning: cannot remove temp file %s", LogMsgFile);
++    }
++    else
++	error (0, 0, "your log message was saved in %s", LogMsgFile);
++    free (LogMsgFile);
++    LogMsgFile = NULL;
++}
+--- cvs-1.12.13+real.orig/src/ls.c
++++ cvs-1.12.13+real/src/ls.c
+@@ -3,6 +3,7 @@
+  * Copyright (c) 1989-1992, Brian Berliner
+  * Copyright (c) 2001, Tony Hoyle
+  * Copyright (c) 2004, Derek R. Price & Ximbiot <http://ximbiot.com>
++ * Copyright (c) 2005, 2021 mirabilos <m@mirbsd.org>
+  *
+  * You may distribute under the terms of the GNU General Public License as
+  * specified in the README file that comes with the CVS source distribution.
+@@ -456,7 +457,7 @@
+         /* Search for our parent directory.  */
+ 	char *parent;
+         parent = xmalloc (strlen (update_dir) - strlen (dir) + 1);
+-        strncpy (parent, update_dir, strlen (update_dir) - strlen (dir));
++        memcpy (parent, update_dir, strlen (update_dir) - strlen (dir));
+         parent[strlen (update_dir) - strlen (dir)] = '\0';
+         strip_trailing_slashes (parent);
+         p = findnode (callerdat, parent);
+--- cvs-1.12.13+real.orig/src/main.c
++++ cvs-1.12.13+real/src/main.c
+@@ -24,6 +24,10 @@
+ #include "strftime.h"
+ #include "xgethostname.h"
+ 
++#ifdef USE_LIBBSD
++uint32_t arc4random(void);
++#endif
++
+ const char *program_name;
+ const char *program_path;
+ const char *cvs_cmd_name;
+@@ -170,6 +174,7 @@
+ #ifdef SERVER_SUPPORT
+     { "server",   NULL,       NULL,        server,    CVS_CMD_MODIFIES_REPOSITORY | CVS_CMD_USES_WORK_DIR },
+ #endif
++    { "suck",     NULL,       NULL,        suck,      0 },
+     { "status",   "st",       "stat",      cvsstatus, CVS_CMD_USES_WORK_DIR },
+     { "tag",      "ta",       "freeze",    cvstag,    CVS_CMD_MODIFIES_REPOSITORY | CVS_CMD_USES_WORK_DIR },
+     { "unedit",   NULL,       NULL,        unedit,    CVS_CMD_MODIFIES_REPOSITORY | CVS_CMD_USES_WORK_DIR },
+@@ -230,7 +235,7 @@
+ {
+     "CVS commands are:\n",
+     "        add          Add a new file/directory to the repository\n",
+-    "        admin        Administration front end for rcs\n",
++    "        admin        Administration front-end for RCS\n",
+     "        annotate     Show last revision where each line was modified\n",
+     "        checkout     Checkout sources for editing\n",
+     "        commit       Check files into the repository\n",
+@@ -242,7 +247,7 @@
+     "        import       Import sources into CVS, using vendor branches\n",
+     "        init         Create a CVS repository if it doesn't exist\n",
+ #if defined (HAVE_KERBEROS) && defined (SERVER_SUPPORT)
+-    "        kserver      Kerberos server mode\n",
++    "        kserver      Act in Kerberos server mode\n",
+ #endif
+     "        log          Print out history information for files\n",
+ #ifdef AUTH_CLIENT_SUPPORT
+@@ -251,18 +256,19 @@
+ #endif /* AUTH_CLIENT_SUPPORT */
+     "        ls           List files available from CVS\n",
+ #if (defined(AUTH_SERVER_SUPPORT) || defined (HAVE_GSSAPI)) && defined(SERVER_SUPPORT)
+-    "        pserver      Password server mode\n",
++    "        pserver      Act in password server mode\n",
+ #endif
+     "        rannotate    Show last revision where each line of module was modified\n",
+-    "        rdiff        Create 'patch' format diffs between releases\n",
+-    "        release      Indicate that a Module is no longer in use\n",
++    "        rdiff        Create 'patch' format diffs between revisions\n",
++    "        release      Indicate that a work subdirectory is no longer in use\n",
+     "        remove       Remove an entry from the repository\n",
+     "        rlog         Print out history information for a module\n",
+     "        rls          List files in a module\n",
+     "        rtag         Add a symbolic tag to a module\n",
+ #ifdef SERVER_SUPPORT
+-    "        server       Server mode\n",
++    "        server       Act in server mode\n",
+ #endif
++    "        suck         Download RCS ,v file raw\n",
+     "        status       Display status information on checked out files\n",
+     "        tag          Add a symbolic tag to checked out version of files\n",
+     "        unedit       Undo an edit command\n",
+@@ -283,6 +289,7 @@
+     "    -q           Cause CVS to be somewhat quiet.\n",
+     "    -r           Make checked-out files read-only.\n",
+     "    -w           Make checked-out files read-write (default).\n",
++    "    -g           Force group-write permissions on checked-out files.\n",
+     "    -n           Do not execute anything that will change the disk.\n",
+     "    -t           Show trace of program execution (repeat for more\n",
+     "                 verbosity) -- try with -n.\n",
+@@ -458,46 +465,6 @@
+ 
+ 
+ 
+-
+-enum {RANDOM_BYTES = 8};
+-enum {COMMITID_RAW_SIZE = (sizeof(time_t) + RANDOM_BYTES)};
+-
+-static char const alphabet[62] =
+-  "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
+-
+-/* Divide BUF by D, returning the remainder.  Replace BUF by the
+-   quotient.  BUF[0] is the most significant part of BUF.
+-   D must not exceed UINT_MAX >> CHAR_BIT.  */
+-static unsigned int
+-divide_by (unsigned char buf[COMMITID_RAW_SIZE], unsigned int d)
+-{
+-    unsigned int carry = 0;
+-    int i;
+-    for (i = 0; i < COMMITID_RAW_SIZE; i++)
+-    {
+-	unsigned int byte = buf[i];
+-	unsigned int dividend = (carry << CHAR_BIT) + byte;
+-	buf[i] = dividend / d;
+-	carry = dividend % d;
+-    }
+-    return carry;
+-}
+-
+-static void
+-convert (char const input[COMMITID_RAW_SIZE], char *output)
+-{
+-    static char const zero[COMMITID_RAW_SIZE] = { 0, };
+-    unsigned char buf[COMMITID_RAW_SIZE];
+-    size_t o = 0;
+-    memcpy (buf, input, COMMITID_RAW_SIZE);
+-    while (memcmp (buf, zero, COMMITID_RAW_SIZE) != 0)
+-	output[o++] = alphabet[divide_by (buf, sizeof alphabet)];
+-    if (! o)
+-	output[o++] = '0';
+-    output[o] = '\0';
+-}
+-
+-
+ int
+ main (int argc, char **argv)
+ {
+@@ -511,7 +478,7 @@
+     int help = 0;		/* Has the user asked for help?  This
+ 				   lets us support the `cvs -H cmd'
+ 				   convention to give help for cmd. */
+-    static const char short_options[] = "+QqrwtnRvb:T:e:d:Hfz:s:xa";
++    static const char short_options[] = "+QqrwgtnRvb:T:e:d:Hfz:s:xal";
+     static struct option long_options[] =
+     {
+         {"help", 0, NULL, 'H'},
+@@ -521,6 +488,7 @@
+ 	{"help-options", 0, NULL, 4},
+ #ifdef SERVER_SUPPORT
+ 	{"allow-root", required_argument, NULL, 3},
++	{"allow-root-regexp", required_argument, NULL, 14},
+ #endif /* SERVER_SUPPORT */
+         {0, 0, 0, 0}
+     };
+@@ -562,11 +530,11 @@
+      * Query the environment variables up-front, so that
+      * they can be overridden by command line arguments
+      */
+-    if ((cp = getenv (EDITOR1_ENV)) != NULL)
++    if ((cp = getenv (EDITOR1_ENV)) != NULL && *cp)
+  	Editor = cp;
+-    else if ((cp = getenv (EDITOR2_ENV)) != NULL)
++    else if ((cp = getenv (EDITOR2_ENV)) != NULL && *cp)
+ 	Editor = cp;
+-    else if ((cp = getenv (EDITOR3_ENV)) != NULL)
++    else if ((cp = getenv (EDITOR3_ENV)) != NULL && *cp)
+ 	Editor = cp;
+     if (getenv (CVSREAD_ENV) != NULL)
+ 	cvswrite = 0;
+@@ -645,6 +613,10 @@
+ 		/* --allow-root */
+ 		root_allow_add (optarg, gConfigPath);
+ 		break;
++	    case 14:
++		/* --allow-root-regexp */
++		root_allow_regexp_add (optarg, gConfigPath);
++		break;
+ #endif /* SERVER_SUPPORT */
+ 	    case 'Q':
+ 		really_quiet = 1;
+@@ -658,6 +630,13 @@
+ 	    case 'w':
+ 		cvswrite = 1;
+ 		break;
++	    case 'g':
++		/*
++		 * Force full write permissions for the group.
++		 * See the user's manual for details and dangers.
++		 */
++		umask(umask(S_IRWXG|S_IRWXO) & S_IRWXO);
++		break;
+ 	    case 't':
+ 		trace++;
+ 		break;
+@@ -669,14 +648,18 @@
+ 		noexec = 1;
+ 		logoff = 1;
+ 		break;
++	    case 'l':
++		/* no-op to simply ignore the old -l option */
++		break;
+ 	    case 'v':
+ 		(void) fputs ("\n", stdout);
+ 		version (0, NULL);    
+ 		(void) fputs ("\n", stdout);
+ 		(void) fputs ("\
+ Copyright (C) 2005 Free Software Foundation, Inc.\n\
++Copyright (c) 2021 mirabilos <m@mirbsd.org>\n\
+ \n\
+-Senior active maintainers include Larry Jones, Derek R. Price,\n\
++Senior no longer active maintainers include Larry Jones, Derek R. Price,\n\
+ and Mark D. Baushke.  Please see the AUTHORS and README files from the CVS\n\
+ distribution kit for a complete list of contributors and copyrights.\n",
+ 		              stdout);
+@@ -764,56 +747,12 @@
+     if (argc < 1)
+ 	usage (usg);
+ 
+-    if (readonlyfs && !really_quiet) {
+-	error (0, 0,
+-	       "WARNING: Read-only repository access mode selected via `cvs -R'.\n\
+-Using this option to access a repository which some users write to may\n\
+-cause intermittent sandbox corruption.");
+-    }
+-
+     /* Calculate the cvs global session ID */
+ 
+-    {
+-	char buf[COMMITID_RAW_SIZE] = { 0, };
+-	char out[COMMITID_RAW_SIZE * 2];
+-	ssize_t len = 0;
+-	time_t rightnow = time (NULL);
+-	char *startrand = buf + sizeof (time_t);
+-	unsigned char *p = (unsigned char *) startrand;
+-	size_t randbytes = RANDOM_BYTES;
+-	int flags = O_RDONLY;
+-	int fd;
+-#ifdef O_NOCTTY
+-	flags |= O_NOCTTY;
+-#endif
+-	if (rightnow != (time_t)-1)
+-		while (rightnow > 0) {
+-		    *--p = rightnow % (UCHAR_MAX + 1);
+-		    rightnow /= UCHAR_MAX + 1;
+-		}
+-	else {
+-	    /* try to use more random data */
+-	    randbytes = COMMITID_RAW_SIZE;
+-	    startrand = buf;
+-	}
+-	fd = open ("/dev/urandom", flags);
+-	if (fd >= 0) {
+-	    len = read (fd, startrand, randbytes);
+-	    close (fd);
+-	}
+-	if (len <= 0) {
+-	    /* no random data was available so use pid */
+-	    long int pid = (long int)getpid ();
+-	    p = (unsigned char *) (startrand + sizeof (pid));
+-	    while (pid > 0) {
+-		*--p = pid % (UCHAR_MAX + 1);
+-		pid /= UCHAR_MAX + 1;
+-	    }
+-	}
+-	convert(buf, out);
+-	global_session_id = strdup (out);
+-    }
+-
++    global_session_id = Xasprintf("1%010llX%04X%04X",
++      (unsigned long long)time(NULL),
++      (unsigned int)(getpid() & 0xFFFF),
++      (unsigned int)(arc4random() & 0xFFFF));
+ 
+     TRACE (TRACE_FUNCTION, "main: Session ID is %s", global_session_id);
+ 
+@@ -856,7 +795,7 @@
+ 	   a command-line flag to set the umask, since we'll have to
+ 	   parse it before we get here. */
+ 
+-	if ((cp = getenv (CVSUMASK_ENV)) != NULL)
++	if ((cp = getenv (CVSUMASK_ENV)) != NULL && *cp)
+ 	{
+ 	    /* FIXME: Should be accepting symbolic as well as numeric mask.  */
+ 	    cvsumask = strtol (cp, &end, 8) & 0777;
+@@ -992,7 +931,7 @@
+ 	    if (!CVSroot_parsed)
+ 	    {
+ 		char *tmp = getenv (CVSROOT_ENV);
+-		if (tmp)
++		if (tmp && *tmp)
+ 		{
+ 		    if (!(CVSroot_parsed = parse_cvsroot (tmp)))
+ 			error (1, 0, "Bad CVSROOT: `%s'.", tmp);
+@@ -1011,7 +950,7 @@
+ 	    /* Now we've reconciled CVSROOT from the command line, the
+ 	       CVS/Root file, and the environment variable.  Do the
+ 	       last sanity checks on the variable. */
+-	    if (!CVSroot_parsed)
++	    if (!CVSroot_parsed && cm->func != version)
+ 	    {
+ 		error (0, 0,
+ 		       "No CVSROOT specified!  Please use the `-d' option");
+@@ -1043,6 +982,11 @@
+ 
+ 	assert (current_parsed_root == NULL);
+ 
++	/* Handle running 'cvs version' with no CVSROOT.  */
++
++	if (cm->func == version && !CVSroot_parsed)
++	    server_active = !0;
++
+ 	/* If we're running the server, we want to execute this main
+ 	   loop once and only once (we won't be serving multiple roots
+ 	   from this connection, so there's no need to do it more than
+@@ -1173,6 +1117,7 @@
+ 	dellist (&root_directories);
+     } /* end of stuff that gets done if the user DOESN'T ask for help */
+ 
++    config = NULL;
+     root_allow_free ();
+ 
+     /* This is exit rather than return because apparently that keeps
+@@ -1244,7 +1189,7 @@
+ 	if (*++p)
+ 	{
+ 	    if (*date) free (*date);
+-	    *date = Make_Date (p);
++	    *date = strcmp (p, "BASE") ? Make_Date (p) : xstrdup (p);
+ 	}
+     }
+     else if (strlen (input))
+@@ -1285,7 +1230,7 @@
+ 	ftm = localtime (&unixtime);
+ 
+     (void) sprintf (date, DATEFORM,
+-		    ftm->tm_year + (ftm->tm_year < 100 ? 0 : 1900),
++		    (long)ftm->tm_year + (ftm->tm_year < 100 ? 0L : 1900L),
+ 		    ftm->tm_mon + 1, ftm->tm_mday, ftm->tm_hour,
+ 		    ftm->tm_min, ftm->tm_sec);
+     ret = xstrdup (date);
+@@ -1315,8 +1260,10 @@
+ void
+ date_to_tm (struct tm *dest, const char *source)
+ {
++    int y;
++
+     if (sscanf (source, SDATEFORM,
+-		&dest->tm_year, &dest->tm_mon, &dest->tm_mday,
++		&y, &dest->tm_mon, &dest->tm_mday,
+ 		&dest->tm_hour, &dest->tm_min, &dest->tm_sec)
+ 	    != 6)
+ 	/* Is there a better way to handle errors here?  I made this
+@@ -1324,9 +1271,7 @@
+ 	   deal with fatal errors.  */
+ 	error (0, 0, "internal error: bad date %s", source);
+ 
+-    if (dest->tm_year > 100)
+-	dest->tm_year -= 1900;
+-
++    dest->tm_year = y - ((y > 100) ? 1900 : 0);
+     dest->tm_mon -= 1;
+ }
+ 
+@@ -1348,10 +1293,10 @@
+       {"Jan", "Feb", "Mar", "Apr", "May", "Jun",
+ 	 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec"};
+     
+-    sprintf (dest, "%d %s %d %02d:%02d:%02d -0000", source->tm_mday,
++    sprintf (dest, "%d %s %ld %02d:%02d:%02d -0000", source->tm_mday,
+ 	     source->tm_mon < 0 || source->tm_mon > 11
+                ? "???" : month_names[source->tm_mon],
+-	     source->tm_year + 1900, source->tm_hour, source->tm_min,
++	     (long)source->tm_year + 1900, source->tm_hour, source->tm_min,
+              source->tm_sec);
+ }
+ 
+@@ -1458,7 +1403,7 @@
+ {
+     (void) fprintf (stderr, *cpp++, program_name, cvs_cmd_name);
+     for (; *cpp; cpp++)
+-	(void) fprintf (stderr, *cpp);
++	(void) fprintf (stderr, "%s", *cpp);
+     exit (EXIT_FAILURE);
+ }
+ 
+--- cvs-1.12.13+real.orig/src/mkmodules.c
++++ cvs-1.12.13+real/src/mkmodules.c
+@@ -19,9 +19,9 @@
+ #define	DBLKSIZ	4096			/* since GNU ndbm doesn't define it */
+ #endif
+ 
+-static int checkout_file (char *file, char *temp);
++static int checkout_file (const char *file, char *temp);
+ static char *make_tempfile (void);
+-static void rename_rcsfile (char *temp, char *real);
++static void rename_rcsfile (const char *temp, const char *real);
+ 
+ #ifndef MY_NDBM
+ static void rename_dbmfile (char *temp);
+@@ -31,13 +31,13 @@
+ /* Structure which describes an administrative file.  */
+ struct admin_file {
+    /* Name of the file, within the CVSROOT directory.  */
+-   char *filename;
++   const char *filename;
+ 
+    /* This is a one line description of what the file is for.  It is not
+       currently used, although one wonders whether it should be, somehow.
+       If NULL, then don't process this file in mkmodules (FIXME?: a bit of
+       a kludge; probably should replace this with a flags field).  */
+-   char *errormsg;
++   const char *errormsg;
+ 
+    /* Contents which the file should have in a new repository.  To avoid
+       problems with brain-dead compilers which choke on long string constants,
+@@ -68,6 +68,7 @@
+     "# If any format strings are present in the filter, they will be replaced\n",
+     "# as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -82,7 +83,7 @@
+     "# Thus %{sv} is a legal format string, but will only be replaced with\n",
+     "# file name and new revision.\n",
+     "# It also generates multiple arguments for each file being operated upon.\n",
+-    "# That is, if two files, file1 & file2, are being commited from 1.1 to\n",
++    "# That is, if two files, file1 & file2, are being committed from 1.1 to\n",
+     "# version 1.1.2.1 and from 1.1.2.2 to 1.1.2.3, respectively, %{sVv} will\n",
+     "# generate the following six arguments in this order:\n",
+     "# file1, 1.1, 1.1.2.1, file2, 1.1.2.2, 1.1.2.3.\n",
+@@ -124,13 +125,14 @@
+     "#\n",
+     "#   Making sure that the entered bug-id number is correct.\n",
+     "#   Validating that the code that was reviewed is indeed the code being\n",
+-    "#       checked in (using the bug-id number or a seperate review\n",
++    "#       checked in (using the bug-id number or a separate review\n",
+     "#       number to identify this particular code set.).\n",
+     "#\n",
+     "# If any of the above test failed, then the commit would be aborted.\n",
+     "#\n",
+     "# Format strings present in the filter will be replaced as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -152,8 +154,8 @@
+ 
+ static const char *const commitinfo_contents[] = {
+     "# The \"commitinfo\" file is used to control pre-commit checks.\n",
+-    "# The filter on the right is invoked with the repository and a list \n",
+-    "# of files to check.  A non-zero exit of the filter program will \n",
++    "# The filter on the right is invoked with the repository and a list\n",
++    "# of files to check.  A non-zero exit of the filter program will\n",
+     "# cause the commit to be aborted.\n",
+     "#\n",
+     "# The first entry on a line is a regular expression which is tested\n",
+@@ -163,6 +165,7 @@
+     "#\n",
+     "# Format strings present in the filter will be replaced as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -199,6 +202,7 @@
+     "#                     | \"N\" (not branch)\n",
+     "#    %o = operation = \"add\" | \"mov\" | \"del\"\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -245,6 +249,7 @@
+     "# If any format strings are present in the filter, they will be replaced\n",
+     "# as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -271,6 +276,7 @@
+     "# If any format strings are present in the filter, they will be replaced\n",
+     "# as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -299,6 +305,7 @@
+     "# If any format strings are present in the filter, they will be replaced\n",
+     "# as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -328,6 +335,7 @@
+     "#                     | \"N\" (not branch)\n",
+     "#    %o = operation = \"add\" | \"mov\" | \"del\"\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -363,11 +371,12 @@
+ 
+ static const char *const postwatch_contents[] = {
+     "# The \"postwatch\" file is called after any command finishes writing new\n",
+-    "# file attibute (watch/edit) information in a directory.\n",
++    "# file attribute (watch/edit) information in a directory.\n",
+     "#\n",
+     "# If any format strings are present in the filter, they will be replaced\n",
+     "# as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -446,6 +455,7 @@
+     "#\n",
+     "# format strings are replaceed as follows:\n",
+     "#    %c = canonical name of the command being executed\n",
++    "#    %I = unique (randomly generated) commit ID\n",
+ #ifdef PROXY_SUPPORT
+     "#    %R = the name of the referrer, if any, otherwise the value NONE\n",
+ #endif
+@@ -465,11 +475,10 @@
+     "#	key [options] directory files...\n",
+     "#\n",
+     "# Where \"options\" are composed of:\n",
+-    "#	-i prog		Run \"prog\" on \"cvs commit\" from top-level of module.\n",
+     "#	-o prog		Run \"prog\" on \"cvs checkout\" of module.\n",
+     "#	-e prog		Run \"prog\" on \"cvs export\" of module.\n",
++    "#	-s status	Assign a status to the module.\n",
+     "#	-t prog		Run \"prog\" on \"cvs rtag\" of module.\n",
+-    "#	-u prog		Run \"prog\" on \"cvs update\" of module.\n",
+     "#	-d dir		Place module in directory \"dir\" instead of module name.\n",
+     "#	-l		Top-level directory only -- do not recurse.\n",
+     "#\n",
+@@ -489,67 +498,68 @@
+ };
+ 
+ static const char *const config_contents[] = {
+-    "# Set `SystemAuth' to `no' if pserver shouldn't check system users/passwords.\n",
++    "# Set 'SystemAuth' to 'no' if pserver shouldn't check system users/passwords.\n",
+     "#SystemAuth=no\n",
+     "\n",
+-    "# Set `LocalKeyword' to specify a local alias for a standard keyword.\n",
++    "# Set 'LocalKeyword' to specify a local alias for a standard keyword.\n",
+     "#LocalKeyword=MYCVS=CVSHeader\n",
+     "\n",
+-    "# Set `KeywordExpand' to `i' followed by a list of keywords to expand or\n",
+-    "# `e' followed by a list of keywords to not expand.\n"
+-    "#KeywordExpand=iMYCVS,Name,Date\n",
++    "# Set 'KeywordExpand' to 'i' followed by a list of keywords to expand or\n",
++    "# 'e' followed by a list of keywords to not expand.\n"
++    "#KeywordExpand=iMYCVS,Name,Date,Mdocdate\n",
+     "#KeywordExpand=eCVSHeader\n",
+     "\n",
+ #ifdef PRESERVE_PERMISSIONS_SUPPORT
+-    "# Set `PreservePermissions' to `yes' to save file status information\n",
++    "# Set 'PreservePermissions' to 'yes' to save file status information\n",
+     "# in the repository.\n",
+     "#PreservePermissions=no\n",
+     "\n",
+ #endif
+-    "# Set `TopLevelAdmin' to `yes' to create a CVS directory at the top\n",
+-    "# level of the new working directory when using the `cvs checkout'\n",
++    "# Set 'TopLevelAdmin' to 'yes' to create a CVS directory at the top\n",
++    "# level of the new working directory when using the 'cvs checkout'\n",
+     "# command.\n",
+     "#TopLevelAdmin=no\n",
+     "\n",
+     "# Put CVS lock files in this directory rather than directly in the repository.\n",
+     "#LockDir=/var/lock/cvs\n",
+     "\n",
+-    "# Set `LogHistory' to `all' or `" ALL_HISTORY_REC_TYPES "' to log all transactions to the\n",
+-    "# history file, or a subset as needed (ie `TMAR' logs all write operations)\n",
++    "# Set 'LogHistory' to 'all' or '" ALL_HISTORY_REC_TYPES "' to log all transactions to the\n",
++    "# history file, or a subset as needed (ie 'TMAR' logs all write operations)\n",
+     "#LogHistory=" ALL_HISTORY_REC_TYPES "\n",
++    "LogHistory=TMAR\n",
+     "\n",
+-    "# Set `RereadLogAfterVerify' to `always' (the default) to allow the verifymsg\n",
+-    "# script to change the log message.  Set it to `stat' to force CVS to verify\n",
++    "# Set 'RereadLogAfterVerify' to 'always' (the default) to allow the verifymsg\n",
++    "# script to change the log message.  Set it to 'stat' to force CVS to verify\n",
+     "# that the file has changed before reading it (this can take up to an extra\n",
+     "# second per directory being committed, so it is not recommended for large\n",
+-    "# repositories.  Set it to `never' (the previous CVS behavior) to prevent\n",
++    "# repositories.  Set it to 'never' (the previous CVS behavior) to prevent\n",
+     "# verifymsg scripts from changing the log message.\n",
+     "#RereadLogAfterVerify=always\n",
+     "\n",
+-    "# Set `UserAdminOptions' to the list of `cvs admin' commands (options)\n",
+-    "# that users not in the `cvsadmin' group are allowed to run.  This\n",
+-    "# defaults to `k', or only allowing the changing of the default\n",
+-    "# keyword expansion mode for files for users not in the `cvsadmin' group.\n",
+-    "# This value is ignored if the `cvsadmin' group does not exist.\n",
++    "# Set 'UserAdminOptions' to the list of 'cvs admin' commands (options)\n",
++    "# that users not in the '_cvsadmin' group are allowed to run.  This\n",
++    "# defaults to 'k', or only allowing the changing of the default\n",
++    "# keyword expansion mode for files for users not in the '_cvsadmin' group.\n",
++    "# This value is ignored if the '_cvsadmin' group does not exist.\n",
+     "#\n",
+-    "# The following string would enable all `cvs admin' commands for all\n",
++    "# The following string would enable all 'cvs admin' commands for all\n",
+     "# users:\n",
+     "#UserAdminOptions=aAbceIklLmnNostuU\n",
+ #ifdef SUPPORT_OLD_INFO_FMT_STRINGS
+     "\n",
+-    "# Set `UseNewInfoFmtStrings' to `no' if you must support a legacy system by\n",
++    "# Set 'UseNewInfoFmtStrings' to 'no' if you must support a legacy system by\n",
+     "# enabling the deprecated old style info file command line format strings.\n",
+     "# Be warned that these strings could be disabled in any new version of CVS.\n",
+     "UseNewInfoFmtStrings=yes\n",
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+     "\n",
+-    "# Set `ImportNewFilesToVendorBranchOnly' to `yes' if you wish to force\n",
+-    "# every `cvs import' command to behave as if the `-X' flag was\n",
++    "# Set 'ImportNewFilesToVendorBranchOnly' to 'yes' if you wish to force\n",
++    "# every 'cvs import' command to behave as if the '-X' flag was\n",
+     "# specified.\n",
+     "#ImportNewFilesToVendorBranchOnly=no\n",
+ #ifdef PROXY_SUPPORT
+     "\n",
+-    "# Set `PrimaryServer' to the CVSROOT to the primary, or write, server when\n",
++    "# Set 'PrimaryServer' to the CVSROOT to the primary, or write, server when\n",
+     "# establishing one or more read-only mirrors which serve as proxies for\n",
+     "# the write server in write mode or redirect the client to the primary for\n",
+     "# write requests.\n",
+@@ -558,13 +568,13 @@
+     "#\n",
+     "#   PrimaryServer=:fork:localhost/cvsroot\n",
+     "\n",
+-    "# Set `MaxProxyBufferSize' to the the maximum allowable secondary\n",
++    "# Set 'MaxProxyBufferSize' to the the maximum allowable secondary\n",
+     "# buffer memory cache size before the buffer begins being stored to disk, in\n",
+-    "# bytes.  Must be a positive integer but may end in `k', `M', `G', or `T' (for\n",
+-    "# kiilo, mega, giga, & tera, respectively).  If an otherwise valid number you\n",
++    "# bytes.  Must be a positive integer but may end in 'K', 'M', 'G', or 'T' (for\n",
++    "# Kibi, Mebi, Gibi, & Tebi, respectively).  If an otherwise valid number you\n",
+     "# specify is greater than the SIZE_MAX defined by your system's C compiler,\n",
+     "# then it will be resolved to SIZE_MAX without a warning.  Defaults to 8M (8\n",
+-    "# megabytes).\n",
++    "# Mebibytes). The 'i' from 'Ki', 'Mi', etc. is omitted.\n",
+     "#\n",
+     "# High values for MaxProxyBufferSize may speed up a secondary server\n",
+     "# with old hardware and a lot of available memory but can actually slow a\n",
+@@ -575,23 +585,23 @@
+     "#   MaxProxyBufferSize=1G\n",
+ #endif /* PROXY_SUPPORT */
+     "\n",
+-    "# Set `MaxCommentLeaderLength' to the maximum length permitted for the\n",
++    "# Set 'MaxCommentLeaderLength' to the maximum length permitted for the\n",
+     "# automagically determined comment leader used when expanding the Log\n",
+     "# keyword, in bytes.  CVS's behavior when the automagically determined\n",
+-    "# comment leader exceeds this length is dependant on the value of\n",
+-    "# `UseArchiveCommentLeader' set in this file.  `unlimited' is a valid\n",
++    "# comment leader exceeds this length is dependent on the value of\n",
++    "# 'UseArchiveCommentLeader' set in this file.  'unlimited' is a valid\n",
+     "# setting for this value.  Defaults to 20 bytes.\n",
+     "#\n",
+     "# For example:\n",
+     "#\n",
+     "#   MaxCommentLeaderLength=20\n",
+     "\n",
+-    "# Set `UseArchiveCommentLeader' to `yes' to cause CVS to fall back on\n",
++    "# Set 'UseArchiveCommentLeader' to 'yes' to cause CVS to fall back on\n",
+     "# the comment leader set in the RCS archive file, if any, when the\n",
+-    "# automagically determined comment leader exceeds `MaxCommentLeaderLength'\n",
+-    "# bytes.  If `UseArchiveCommentLeader' is not set and a comment leader\n",
+-    "# greater than `MaxCommentLeaderLength' is calculated, the Log keyword\n",
+-    "# being examined will not be expanded.  Defaults to `no'.\n",
++    "# automagically determined comment leader exceeds 'MaxCommentLeaderLength'\n",
++    "# bytes.  If 'UseArchiveCommentLeader' is not set and a comment leader\n",
++    "# greater than 'MaxCommentLeaderLength' is calculated, the Log keyword\n",
++    "# being examined will not be expanded.  Defaults to 'no'.\n",
+     "#\n",
+     "# For example:\n",
+     "#\n",
+@@ -816,7 +826,7 @@
+     }
+ 
+     if (restore_cwd (&cwd))
+-	error (1, errno, "Failed to restore current directory, `%s'.",
++	error (1, errno, "Failed to restore current directory, '%s'.",
+ 	       cwd.name);
+     free_cwd (&cwd);
+ 
+@@ -857,7 +867,7 @@
+    there is an error, print a message and return 1 (FIXME: probably
+    not a very clean convention).  On success, return 0.  */
+ static int
+-checkout_file (char *file, char *temp)
++checkout_file (const char *file, char *temp)
+ {
+     char *rcs;
+     RCSNode *rcsnode;
+@@ -878,7 +888,7 @@
+     {
+ 	/* Probably not necessary (?); RCS_parsercsfile already printed a
+ 	   message.  */
+-	error (0, 0, "Failed to parse `%s'.", rcs);
++	error (0, 0, "Failed to parse '%s'.", rcs);
+ 	free (rcs);
+ 	return 1;
+     }
+@@ -962,20 +972,22 @@
+ 	    key.dptr = vp;
+ 	    while (*vp && !isspace ((unsigned char) *vp))
+ 		vp++;
+-	    key.dsize = vp - key.dptr;
++	    key.dsize = vp - (char *)key.dptr;
+ 	    *vp++ = '\0';		/* NULL terminate the key */
+ 	    while (*vp && isspace ((unsigned char) *vp))
+ 		vp++;			/* skip whitespace to value */
+ 	    if (*vp == '\0')
+ 	    {
+-		error (0, 0, "warning: NULL value for key `%s'", key.dptr);
++		error (0, 0, "warning: NULL value for key '%s'",
++		    (char *)key.dptr);
+ 		continue;
+ 	    }
+ 	    val.dptr = vp;
+ 	    val.dsize = strlen (vp);
+ 	    if (dbm_store (db, key, val, DBM_INSERT) == 1)
+ 	    {
+-		error (0, 0, "duplicate key found for `%s'", key.dptr);
++		error (0, 0, "duplicate key found for '%s'",
++		    (char *)key.dptr);
+ 		err++;
+ 	    }
+ 	}
+@@ -1097,7 +1109,7 @@
+ #endif				/* !MY_NDBM */
+ 
+ static void
+-rename_rcsfile (char *temp, char *real)
++rename_rcsfile (const char *temp, const char *real)
+ {
+     char *bak;
+     struct stat statbuf;
+@@ -1175,6 +1187,9 @@
+        which needs to be created.  */
+     mkdir_if_needed (current_parsed_root->directory);
+ 
++    if (noexec)
++	return (0);
++
+     adm = Xasprintf ("%s/%s", current_parsed_root->directory, CVSROOTADM);
+     mkdir_if_needed (adm);
+ 
+@@ -1237,8 +1252,8 @@
+ 	}
+     }
+ 
+-    /* Turn on history logging by default.  The user can remove the file
+-       to disable it.  */
++    /* Turn on history logging of write operations by default.
++       The user can remove the file to disable it.  */
+     strcpy (info, adm);
+     strcat (info, "/");
+     strcat (info, CVSROOTADM_HISTORY);
+@@ -1249,11 +1264,6 @@
+ 	fp = xfopen (info, "w");
+ 	if (fclose (fp) < 0)
+ 	    error (1, errno, "cannot close %s", info);
+- 
+-        /* Make the new history file world-writeable, since every CVS
+-           user will need to be able to write to it.  We use chmod()
+-           because xchmod() is too shy. */
+-        chmod (info, 0666);
+     }
+ 
+     /* Make an empty val-tags file to prevent problems creating it later.  */
+@@ -1267,11 +1277,6 @@
+ 	fp = xfopen (info, "w");
+ 	if (fclose (fp) < 0)
+ 	    error (1, errno, "cannot close %s", info);
+- 
+-        /* Make the new val-tags file world-writeable, since every CVS
+-           user will need to be able to write to it.  We use chmod()
+-           because xchmod() is too shy. */
+-        chmod (info, 0666);
+     }
+ 
+     free (info);
+--- cvs-1.12.13+real.orig/src/modules.c
++++ cvs-1.12.13+real/src/modules.c
+@@ -450,7 +450,7 @@
+ 	    case '?':
+ 		error (0, 0,
+ 		       "modules file has invalid option for key %s value %s",
+-		       key.dptr, value);
++		       (char *)key.dptr, value);
+ 		err++;
+ 		goto do_module_return;
+ 	}
+--- cvs-1.12.13+real.orig/src/parseinfo.c
++++ cvs-1.12.13+real/src/parseinfo.c
+@@ -230,7 +230,7 @@
+ 	return true;
+     }
+ 
+-    /* Record the factor character (kilo, mega, giga, tera).  */
++    /* Record the factor character (kibi, mebi, gibi, tebi).  */
+     if (!isdigit (p[strlen(p) - 1]))
+     {
+ 	switch (p[strlen(p) - 1])
+@@ -241,16 +241,16 @@
+ 		factor = xtimes (factor, 1024);
+ 	    case 'M':
+ 		factor = xtimes (factor, 1024);
+-	    case 'k':
++	    case 'K':
+ 		factor = xtimes (factor, 1024);
+ 		break;
+ 	    default:
+ 		error (0, 0,
+     "%s: Unknown %s factor: `%c'",
+-		       infopath, option, p[strlen(p)]);
++		       infopath, option, p[strlen(p) - 1]);
+ 		return false;
+ 	}
+-	TRACE (TRACE_DATA, "readSizeT(): Found factor %u for %s",
++	TRACE (TRACE_DATA, "readSizeT(): Found factor %zu for %s",
+ 	       factor, option);
+     }
+ 
+@@ -274,9 +274,9 @@
+ 	/* Don't return an error, just max out.  */
+ 	num = SIZE_MAX;
+ 
+-    TRACE (TRACE_DATA, "readSizeT(): read number %u for %s", num, option);
++    TRACE (TRACE_DATA, "readSizeT(): read number %zu for %s", num, option);
+     *val = xtimes (strtoul (p, NULL, 10), factor);
+-    TRACE (TRACE_DATA, "readSizeT(): returnning %u for %s", *val, option);
++    TRACE (TRACE_DATA, "readSizeT(): returnning %zu for %s", *val, option);
+     return true;
+ }
+ 
+@@ -298,7 +298,7 @@
+     new->MaxCompressionLevel = 9;
+ #endif /* SERVER_SUPPORT */
+ #ifdef PROXY_SUPPORT
+-    new->MaxProxyBufferSize = (size_t)(8 * 1024 * 1024); /* 8 megabytes,
++    new->MaxProxyBufferSize = (size_t)(8 * 1024 * 1024); /* 8 mebibytes,
+                                                           * by default.
+                                                           */
+ #endif /* PROXY_SUPPORT */
+@@ -392,6 +392,9 @@
+      */
+     bool processing = true;
+     bool processed = true;
++#ifdef SERVER_SUPPORT
++    size_t dummy_sizet;
++#endif
+ 
+     TRACE (TRACE_FUNCTION, "parse_config (%s)", cvsroot);
+ 
+@@ -613,18 +616,23 @@
+ 	}
+ 	else if (strcmp (line, "LogHistory") == 0)
+ 	{
+-	    if (strcmp (p, "all") != 0)
+-	    {
+-		static bool gotone = false;
+-		if (gotone)
+-		    error (0, 0, "\
++	    static char *prevpath = NULL;
++	    static unsigned int prevln;
++
++	    if (prevpath != NULL) {
++		error (0, 0, "\
+ %s [%u]: warning: duplicate LogHistory entry found.",
+-			   infopath, ln);
+-		else
+-		    gotone = true;
+-		free (retval->logHistory);
+-		retval->logHistory = xstrdup (p);
++		  infopath, ln);
++		error (0, 0, "\
++%s [%u]: notice: this was the first definition.",
++		  prevpath, prevln);
++	    } else {
++		prevln = ln;
++		prevpath = xstrdup(infopath);
+ 	    }
++	    free(retval->logHistory);
++	    retval->logHistory = xstrdup(strcmp(p, "all") ? p :
++	      ALL_HISTORY_REC_TYPES);
+ 	}
+ 	else if (strcmp (line, "RereadLogAfterVerify") == 0)
+ 	{
+@@ -689,13 +697,44 @@
+ 	    readBool (infopath, "UseArchiveCommentLeader", p,
+ 		      &retval->UseArchiveCommentLeader);
+ #ifdef SERVER_SUPPORT
+-	else if (!strcmp (line, "MinCompressionLevel"))
+-	    readSizeT (infopath, "MinCompressionLevel", p,
+-		       &retval->MinCompressionLevel);
+-	else if (!strcmp (line, "MaxCompressionLevel"))
+-	    readSizeT (infopath, "MaxCompressionLevel", p,
+-		       &retval->MaxCompressionLevel);
++	else if (!strcmp (line, "MinCompressionLevel")) {
++	    readSizeT (infopath, "MinCompressionLevel", p, &dummy_sizet);
++	    retval->MinCompressionLevel = dummy_sizet;
++	}
++	else if (!strcmp (line, "MaxCompressionLevel")) {
++	    readSizeT (infopath, "MaxCompressionLevel", p, &dummy_sizet);
++	    retval->MaxCompressionLevel = dummy_sizet;
++	}
+ #endif /* SERVER_SUPPORT */
++	else if (!strcmp (line, "tag")) {
++	    char *pp;
++
++	    pp = Xasprintf("%s=Id", p);
++	    RCS_setlocalid (infopath, ln, &retval->keywords, pp);
++	    free(pp);
++
++#if !defined(LOCK_COMPATIBILITY) || !defined(SUPPORT_OLD_INFO_FMT_STRINGS)
++	    error (0, 0, "%s: found keyword '%s' in repository",
++		   infopath, line);
++	    error (readonlyfs ? 0 : 1, 0, readonlyfs
++		? "Danger: Granting read access to incompatible repository!"
++		: "Do not try to access a cvs 1.11 repository!");
++#endif
++	}
++#if !defined(LOCK_COMPATIBILITY) || !defined(SUPPORT_OLD_INFO_FMT_STRINGS)
++	else if ((!strcmp (line, "umask"))
++	  || (!strcmp (line, "DisableXProg")) || (!strcmp (line, "dlimit"))
++	  || (!strcmp (line, "forceReadOnlyFS"))) {
++	    /* We are dealing with keywords removed between cvs 1.11.1p1
++	       and cvs 1.12.10; odds are we are not being able to handle
++	       access or concurrent access with 1.11 cvs correctly */
++	    error (0, 0, "%s: found keyword '%s' in repository",
++		   infopath, line);
++	    error (readonlyfs ? 0 : 1, 0, readonlyfs
++		? "Danger: Granting read access to incompatible repository!"
++		: "Do not try to access a cvs 1.11 repository!");
++	}
++#endif
+ 	else
+ 	    /* We may be dealing with a keyword which was added in a
+ 	       subsequent version of CVS.  In that case it is a good idea
+--- cvs-1.12.13+real.orig/src/parseinfo.h
++++ cvs-1.12.13+real/src/parseinfo.h
+@@ -1,3 +1,5 @@
++/* $MirOS: src/gnu/usr.bin/cvs/src/parseinfo.h,v 1.4 2010/09/19 19:43:07 tg Exp $ */
++
+ /*
+  *    Copyright (c) 2004  Derek Price, Ximbiot <http://ximbiot.com>,
+  *                        and the Free Software Foundation
+@@ -53,8 +55,8 @@
+     size_t MaxProxyBufferSize;
+ #endif /* PROXY_SUPPORT */
+ #ifdef SERVER_SUPPORT
+-    size_t MinCompressionLevel;
+-    size_t MaxCompressionLevel;
++    unsigned MinCompressionLevel;
++    unsigned MaxCompressionLevel;
+ #endif /* SERVER_SUPPORT */
+ #ifdef PRESERVE_PERMISSIONS_SUPPORT
+     bool preserve_perms;
+--- cvs-1.12.13+real.orig/src/patch.c
++++ cvs-1.12.13+real/src/patch.c
+@@ -46,13 +46,13 @@
+ 
+ static const char *const patch_usage[] =
+ {
+-    "Usage: %s %s [-flR] [-c|-u] [-s|-t] [-V %%d] [-k kopt]\n",
++    "Usage: %s %s [-flR] [-c|-u[p]] [-s|-t] [-V %%d] [-k kopt]\n",
+     "    -r rev|-D date [-r rev2 | -D date2] modules...\n",
+     "\t-f\tForce a head revision match if tag/date not found.\n",
+     "\t-l\tLocal directory only, not recursive\n",
+     "\t-R\tProcess directories recursively.\n",
+     "\t-c\tContext diffs (default)\n",
+-    "\t-u\tUnidiff format.\n",
++    "\t-u\tUnidiff format (-p works the same as in diff).\n",
+     "\t-s\tShort patch - one liner per file.\n",
+     "\t-t\tTop two diffs - last change made to the file.\n",
+     "\t-V vers\tUse RCS Version \"vers\" for keyword expansion.\n",
+@@ -78,7 +78,7 @@
+ 	usage (patch_usage);
+ 
+     optind = 0;
+-    while ((c = getopt (argc, argv, "+V:k:cuftsQqlRD:r:")) != -1)
++    while ((c = getopt (argc, argv, "+V:k:cupftsQqlRD:r:")) != -1)
+     {
+ 	switch (c)
+ 	{
+@@ -149,10 +149,13 @@
+ 		       "the -V option is obsolete and should not be used");
+ 		break;
+ 	    case 'u':
+-		unidiff = 1;		/* Unidiff */
++		unidiff |= 1;		/* Unidiff */
+ 		break;
+ 	    case 'c':			/* Context diff */
+-		unidiff = 0;
++		unidiff &= ~1;
++		break;
++	    case 'p':
++		unidiff |= 2;		/* Unidiff context */
+ 		break;
+ 	    case '?':
+ 	    default:
+@@ -167,6 +170,8 @@
+     if (argc < 1)
+ 	usage (patch_usage);
+ 
++    if (!(unidiff & 1))
++	unidiff = 0;
+     if (toptwo_diffs && patch_short)
+ 	error (1, 0, "-t and -s options are mutually exclusive");
+     if (toptwo_diffs && (date1 != NULL || date2 != NULL ||
+@@ -202,6 +207,8 @@
+ 	    send_arg("-s");
+ 	if (unidiff)
+ 	    send_arg("-u");
++	if (unidiff & 2)
++	    send_arg("-p");
+ 
+ 	if (rev1)
+ 	    option_with_arg ("-r", rev1);
+@@ -270,6 +277,7 @@
+     int which;
+     char *repository;
+     char *where;
++    char *cp;
+ 
+     TRACE ( TRACE_FUNCTION, "patch_proc ( %s, %s, %s, %d, %d, %s, %s )",
+ 	    xwhere ? xwhere : "(null)",
+@@ -292,7 +300,6 @@
+     /* if mfile isn't null, we need to set up to do only part of the module */
+     if (mfile != NULL)
+     {
+-	char *cp;
+ 	char *path;
+ 
+ 	/* if the portion of the module is a path, put the dir part on repos */
+@@ -342,14 +349,30 @@
+ 
+     if (rev1 != NULL && !rev1_validated)
+     {
+-	tag_check_valid (rev1, argc - 1, argv + 1, local_specified, 0,
+-			 repository, false);
++	if ((cp = strchr(rev1, ':')) != NULL)
++	{
++	    *cp++ = '\0';
++	    date1 = Make_Date (cp);
++	    if (*rev1 == '\0')
++		rev1 = NULL;
++	}
++	if (rev1)
++	    tag_check_valid (rev1, argc - 1, argv + 1, local_specified, 0,
++			     repository, false);
+ 	rev1_validated = 1;
+     }
+     if (rev2 != NULL && !rev2_validated)
+     {
+-	tag_check_valid (rev2, argc - 1, argv + 1, local_specified, 0,
+-			 repository, false);
++	if ((cp = strchr(rev2, ':')) != NULL)
++	{
++	    *cp++ = '\0';
++	    date2 = Make_Date (cp);
++	    if (*rev2 == '\0')
++		rev2 = NULL;
++	}
++	if (rev2)
++	    tag_check_valid (rev2, argc - 1, argv + 1, local_specified, 0,
++			     repository, false);
+ 	rev2_validated = 1;
+     }
+ 
+@@ -571,6 +594,7 @@
+ 
+     if (unidiff) run_add_arg_p (&dargc, &darg_allocated, &dargv, "-u");
+     else run_add_arg_p (&dargc, &darg_allocated, &dargv, "-c");
++    if (unidiff & 2) run_add_arg_p (&dargc, &darg_allocated, &dargv, "-p");
+     switch (diff_exec (tmpfile1, tmpfile2, NULL, NULL, dargc, dargv,
+ 		       tmpfile3))
+     {
+@@ -671,7 +695,10 @@
+ 	       program.  */
+ 	    if (unidiff)
+ 	    {
+-		cvs_output ("diff -u ", 0);
++		if (unidiff & 2)
++		    cvs_output ("diff -up ", 0);
++		else
++		    cvs_output ("diff -u ", 0);
+ 		cvs_output (file1, 0);
+ 		cvs_output (" ", 1);
+ 		cvs_output (file2, 0);
+--- cvs-1.12.13+real.orig/src/rcs.c
++++ cvs-1.12.13+real/src/rcs.c
+@@ -103,6 +103,7 @@
+ static char *truncate_revnum_in_place (char *);
+ static char *truncate_revnum (const char *);
+ static char *printable_date (const char *);
++static char *mdoc_date (const char *);
+ static char *escape_keyword_value (const char *, int *);
+ static void expand_keywords (RCSNode *, RCSVers *, const char *,
+                              const char *, size_t, enum kflag, char *,
+@@ -2166,6 +2167,8 @@
+ 
+ 	if (! RCS_nodeisbranch (rcs, tag))
+ 	{
++	    if (! strcmp (date, "BASE"))
++		return RCS_gettag (rcs, tag, force_tag_match, simple_tag);
+ 	    /* We can't get a particular date if the tag is not a
+                branch.  */
+ 	    return NULL;
+@@ -2177,6 +2180,15 @@
+ 	else
+ 	    branch = xstrdup (tag);
+ 
++	if (! strcmp (date, "BASE"))
++	{
++	    /* Cut off the branch suffix and return.  */
++	    rev = strrchr (branch, '.');
++	    if (rev)
++		*rev = '\0';
++	    return branch;
++	}
++
+ 	/* Fetch the revision of branch as of date.  */
+ 	rev = RCS_getdatebranch (rcs, date, branch);
+ 	free (branch);
+@@ -2470,7 +2482,7 @@
+     check_rev = xrev;
+ 
+     local_branch_num = getenv("CVS_LOCAL_BRANCH_NUM");
+-    if (local_branch_num)
++    if (local_branch_num && *local_branch_num)
+     {
+       rev_num = atoi(local_branch_num);
+       if (rev_num < 2)
+@@ -3120,6 +3132,7 @@
+     struct timespec revdate;
+     Node *p;
+     RCSVers *vers;
++    int y;
+ 
+     /* make sure we have something to look at... */
+     assert (rcs != NULL);
+@@ -3134,7 +3147,7 @@
+     vers = p->data;
+ 
+     /* split up the date */
+-    if (sscanf (vers->date, SDATEFORM, &xtm.tm_year, &xtm.tm_mon,
++    if (sscanf (vers->date, SDATEFORM, &y, &xtm.tm_mon,
+ 		&xtm.tm_mday, &xtm.tm_hour, &xtm.tm_min, &xtm.tm_sec) != 6)
+ 	error (1, 0, "%s: invalid date for revision %s (%s)", rcs->print_path,
+ 	       rev, vers->date);
+@@ -3144,15 +3157,14 @@
+        2000+, RCS files contain all four digits and we subtract 1900,
+        because the tm_year field should contain years since 1900.  */
+ 
+-    if (xtm.tm_year >= 100 && xtm.tm_year < 2000)
++    if (y >= 100 && y < 2000)
+ 	error (0, 0, "%s: non-standard date format for revision %s (%s)",
+ 	       rcs->print_path, rev, vers->date);
+-    if (xtm.tm_year >= 1900)
+-	xtm.tm_year -= 1900;
++    xtm.tm_year = y - ((y >= 1900) ? 1900 : 0);
+ 
+     /* put the date in a form getdate can grok */
+-    tdate = Xasprintf ("%d-%d-%d %d:%d:%d -0000",
+-		       xtm.tm_year + 1900, xtm.tm_mon, xtm.tm_mday,
++    tdate = Xasprintf ("%ld-%d-%d %d:%d:%d -0000",
++		       (long)xtm.tm_year + 1900, xtm.tm_mon, xtm.tm_mday,
+ 		       xtm.tm_hour, xtm.tm_min, xtm.tm_sec);
+ 
+     /* Turn it into seconds since the epoch.
+@@ -3173,7 +3185,7 @@
+ 	/* Put an appropriate string into `date', if we were given one. */
+ 	ftm = gmtime (&revdate.tv_sec);
+ 	(void) sprintf (date, DATEFORM,
+-			ftm->tm_year + (ftm->tm_year < 100 ? 0 : 1900),
++			(long)ftm->tm_year + (ftm->tm_year < 100 ? 0L : 1900L),
+ 			ftm->tm_mon + 1, ftm->tm_mday, ftm->tm_hour,
+ 			ftm->tm_min, ftm->tm_sec);
+     }
+@@ -3475,6 +3487,7 @@
+     KEYWORD_REVISION,
+     KEYWORD_SOURCE,
+     KEYWORD_STATE,
++    KEYWORD_MDOCDATE,
+     KEYWORD_LOCALID
+ };
+ struct rcs_keyword
+@@ -3511,6 +3524,7 @@
+     KEYWORD_INIT (new, KEYWORD_REVISION, "Revision");
+     KEYWORD_INIT (new, KEYWORD_SOURCE, "Source");
+     KEYWORD_INIT (new, KEYWORD_STATE, "State");
++    KEYWORD_INIT (new, KEYWORD_MDOCDATE, "Mdocdate");
+ 
+     return new;
+ }
+@@ -3544,6 +3558,30 @@
+ 
+ 
+ 
++/* Convert an RCS date string into an mdoc string.  This is like
++   the RCS date2str function, but for manual pages.  */
++static char *
++mdoc_date (const char *rcs_date)
++{
++    int year, mon, mday, hour, min, sec;
++    char buf[100];
++    const char *months[] = { "January", "February", "March", "April",
++	"May", "June", "July", "August",
++	"September", "October", "November", "December",
++	"corrupt" };
++
++    (void) sscanf (rcs_date, SDATEFORM, &year, &mon, &mday, &hour, &min,
++		   &sec);
++    if (mon < 1 || mon > 12)
++	mon = 13;
++    if (year < 1900)
++	year += 1900;
++    sprintf (buf, "%s %d %04d", months[mon - 1], mday, year);
++    return xstrdup (buf);
++}
++
++
++
+ /* Escape the characters in a string so that it can be included in an
+    RCS value.  */
+ static char *
+@@ -3680,13 +3718,13 @@
+ 	srch_len -= (srch_next + 1) - srch;
+ 	srch = srch_next + 1;
+ 
+-	/* Look for the first non alphabetic character after the '$'.  */
++	/* Look for the first non alphanumeric character after the '$'.  */
+ 	send = srch + srch_len;
+ 	for (s = srch; s < send; s++)
+-	    if (! isalpha ((unsigned char) *s))
++	    if (! isalnum ((unsigned char) *s))
+ 		break;
+ 
+-	/* If the first non alphabetic character is not '$' or ':',
++	/* If the first non alphanumeric character is not '$' or ':',
+            then this is not an RCS keyword.  */
+ 	if (s == send || (*s != '$' && *s != ':'))
+ 	    continue;
+@@ -3741,6 +3779,11 @@
+ 		free_value = 1;
+ 		break;
+ 
++	    case KEYWORD_MDOCDATE:
++		value = mdoc_date (ver->date);
++		free_value = 1;
++		break;
++
+ 	    case KEYWORD_CVSHEADER:
+ 	    case KEYWORD_HEADER:
+ 	    case KEYWORD_ID:
+@@ -4177,6 +4220,9 @@
+ 	       : (sout != RUN_TTY ? sout
+ 		  : "(stdout)"))));
+ 
++    if (rev && *rev == '-')
++	++rev;
++
+     assert (rev == NULL || isdigit ((unsigned char) *rev));
+ 
+     if (noexec && !server_active && workfile != NULL)
+@@ -5081,7 +5127,7 @@
+ 	(void) time (&modtime);
+     ftm = gmtime (&modtime);
+     delta->date = Xasprintf (DATEFORM,
+-			     ftm->tm_year + (ftm->tm_year < 100 ? 0 : 1900),
++			     (long)ftm->tm_year + (ftm->tm_year < 100 ? 0L : 1900L),
+ 			     ftm->tm_mon + 1, ftm->tm_mday, ftm->tm_hour,
+ 			     ftm->tm_min, ftm->tm_sec);
+     if (flags & RCS_FLAGS_DEAD)
+@@ -7235,6 +7281,7 @@
+ /* Walk the deltas in RCS to get to revision VERSION.
+ 
+    If OP is RCS_ANNOTATE, then write annotations using cvs_output.
++   If OP is RCS_ANNOTATE_BACKWARDS, do the same backwards.
+ 
+    If OP is RCS_FETCH, then put the contents of VERSION into a
+    newly-malloc'd array and put a pointer to it in *TEXT.  Each line
+@@ -7263,6 +7310,7 @@
+     RCSVers *vers;
+     RCSVers *prev_vers;
+     RCSVers *trunk_vers;
++    RCSVers *top_vers;
+     char *next;
+     int ishead, isnext, isversion, onbranch;
+     Node *node;
+@@ -7285,6 +7333,7 @@
+     vers = NULL;
+     prev_vers = NULL;
+     trunk_vers = NULL;
++    top_vers = NULL;
+     next = NULL;
+     onbranch = 0;
+     foundhead = 0;
+@@ -7332,12 +7381,28 @@
+ 	    vers = node->data;
+ 	    next = vers->next;
+ 
++	    /* The top version is either HEAD or
++	       the last version on the branch.  */
++	    if (top_vers == NULL ||
++		(onbranch && (op == RCS_ANNOTATE_BACKWARDS)))
++		top_vers = vers;
++
+ 	    /* Compare key and trunkversion now, because key points to
+ 	       storage controlled by rcsbuf_getkey.  */
+ 	    if (STREQ (branchversion, key))
+ 	        isversion = 1;
+ 	    else
+ 	        isversion = 0;
++
++	    /* If we are going back and up a branch, and this is
++	       the version we should start annotating, we need to
++	       clear out all accumulated annotations.  */
++	    if ((op == RCS_ANNOTATE_BACKWARDS) && onbranch && STREQ (version, key)) {
++		unsigned int ln;
++
++		for (ln = 0; ln < curlines.nlines; ++ln)
++		    curlines.vector[ln]->vers = NULL;
++	    }
+ 	}
+ 
+ 	while (1)
+@@ -7365,17 +7430,27 @@
+ 		rcsbuf_valpolish (rcsbuf, value, 0, &vallen);
+ 		if (ishead)
+ 		{
+-		    if (! linevector_add (&curlines, value, vallen, NULL, 0))
++		    if (! linevector_add (&curlines, value, vallen,
++			   (op == RCS_ANNOTATE_BACKWARDS) ? vers : NULL, 0))
+ 			error (1, 0, "invalid rcs file %s", rcs->print_path);
+ 
+ 		    ishead = 0;
+ 		}
+ 		else if (isnext)
+ 		{
++		    RCSVers *addv, *delv;
++
++		    if (op == RCS_ANNOTATE_BACKWARDS) {
++			addv = onbranch ? NULL : prev_vers;
++			delv = onbranch ? vers : NULL;
++		    } else {
++			addv = onbranch ? vers : NULL;
++			delv = onbranch ? NULL : prev_vers;
++		    }
++
+ 		    if (! apply_rcs_changes (&curlines, value, vallen,
+ 					     rcs->path,
+-					     onbranch ? vers : NULL,
+-					     onbranch ? NULL : prev_vers))
++					     addv, delv))
+ 			error (1, 0, "invalid change text in %s", rcs->print_path);
+ 		}
+ 		break;
+@@ -7384,6 +7459,14 @@
+ 
+ 	if (isversion)
+ 	{
++	    /* If we're going backwards and not up a branch, and we
++	       reached the version to start at, we're done.  */
++	    if ((op == RCS_ANNOTATE_BACKWARDS) && !onbranch && STREQ (version, key)) {
++		foundhead = 1;
++		linevector_copy (&headlines, &curlines);
++		break;
++	    }
++
+ 	    /* This is either the version we want, or it is the
+                branchpoint to the version we want.  */
+ 	    if (STREQ (branchversion, version))
+@@ -7391,7 +7474,9 @@
+ 	        /* This is the version we want.  */
+ 		linevector_copy (&headlines, &curlines);
+ 		foundhead = 1;
+-		if (onbranch)
++		/* If we are annotating backwards, we have to
++		   continue tracking when we're tracking a branch.  */
++		if (onbranch && !(op == RCS_ANNOTATE_BACKWARDS))
+ 		{
+ 		    /* We have found this version by tracking up a
+                        branch.  Restore back to the lines we saved
+@@ -7480,6 +7565,7 @@
+     switch (op)
+     {
+ 	case RCS_ANNOTATE:
++	case RCS_ANNOTATE_BACKWARDS:
+ 	    {
+ 		unsigned int ln;
+ 
+--- cvs-1.12.13+real.orig/src/rcs.h
++++ cvs-1.12.13+real/src/rcs.h
+@@ -1,3 +1,5 @@
++/* $MirOS: src/gnu/usr.bin/cvs/src/rcs.h,v 1.5 2010/09/19 19:43:09 tg Exp $ */
++
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
+  *
+@@ -33,7 +35,7 @@
+    CVS) will put this into RCS files.  Considered obsolete.  */
+ #define RCSDEAD		"dead"
+ 
+-#define	DATEFORM	"%02d.%02d.%02d.%02d.%02d.%02d"
++#define	DATEFORM	"%02ld.%02d.%02d.%02d.%02d.%02d"
+ #define	SDATEFORM	"%d.%d.%d.%d.%d.%d"
+ 
+ /*
+@@ -189,7 +191,7 @@
+ struct rcsbuffer;
+ 
+ /* What RCS_deltas is supposed to do.  */
+-enum rcs_delta_op {RCS_ANNOTATE, RCS_FETCH};
++enum rcs_delta_op {RCS_ANNOTATE, RCS_ANNOTATE_BACKWARDS, RCS_FETCH};
+ 
+ /*
+  * exported interfaces
+--- cvs-1.12.13+real.orig/src/rcscmds.c
++++ cvs-1.12.13+real/src/rcscmds.c
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2021 mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -92,7 +93,10 @@
+ static void
+ call_diff_add_arg (const char *s)
+ {
+-    TRACE (TRACE_DATA, "call_diff_add_arg (%s)", s);
++    if (s)
++	TRACE (TRACE_DATA, "call_diff_add_arg (%s)", s);
++    else
++	TRACE (TRACE_DATA, "call_diff_add_arg NULL");
+     run_add_arg_p (&call_diff_argc, &call_diff_arg_allocated, &call_diff_argv,
+ 		   s);
+ }
+--- cvs-1.12.13+real.orig/src/root.c
++++ cvs-1.12.13+real/src/root.c
+@@ -1,4 +1,7 @@
+ /*
++ * Copyright © 2017
++ *	mirabilos <m@mirbsd.org>
++ *
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+@@ -265,6 +268,7 @@
+    directories.  Then we can check against them when a remote user
+    hands us a CVSROOT directory.  */
+ static List *root_allow;
++static List *root_allow_regexp;
+ 
+ static void
+ delconfig (Node *n)
+@@ -288,15 +292,65 @@
+ }
+ 
+ void
++root_allow_regexp_add (const char *arg, const char *configPath)
++{
++    Node *n;
++
++    if (!root_allow_regexp) root_allow_regexp = getlist();
++    n = getnode();
++    n->key = xstrdup (arg);
++
++    /* This is a regexp, not the final cvsroot path - we cannot attach
++       it a config. So we attach configPath and we'll root_allow_add()
++       the actual, matching root in root_allow_compare_regexp() */
++    n->data = (void*)configPath;
++
++    addnode (root_allow_regexp, n);
++}
++
++void
+ root_allow_free (void)
+ {
+     dellist (&root_allow);
++    dellist (&root_allow_regexp);
++}
++
++int
++root_allow_used (void)
++{
++    return root_allow || root_allow_regexp;
++}
++
++/* walklist() callback for determining if 'root_to_check' matches
++   n->key (a regexp). If yes, 'root_to_check' will be added as if
++   directly specified through --allow-root.
++ */
++static int
++root_allow_compare_regexp (Node *n, void *root_to_check)
++{
++  int status;
++  regex_t re;
++
++  if (regcomp(&re, n->key,
++	      REG_EXTENDED|REG_NOSUB) != 0)
++  {
++      return 0;      /* report error? */
++  }
++  status = regexec(&re, root_to_check, (size_t) 0, NULL, 0);
++  regfree(&re);
++  if (status == 0)
++  {
++      /* n->data contains gConfigPath */
++      root_allow_add (root_to_check, n->data);
++      return 1;
++  }
++  return 0;
+ }
+ 
+ bool
+ root_allow_ok (const char *arg)
+ {
+-    if (!root_allow)
++    if (!root_allow_used())
+     {
+ 	/* Probably someone upgraded from CVS before 1.9.10 to 1.9.10
+ 	   or later without reading the documentation about
+@@ -308,12 +362,18 @@
+ 	   back "error" rather than waiting for the next request which
+ 	   expects responses.  */
+ 	printf ("\
+-error 0 Server configuration missing --allow-root in inetd.conf\n");
++error 0 Server configuration missing --allow-root or --allow-root-regexp in inetd.conf\n");
+ 	exit (EXIT_FAILURE);
+     }
+ 
++    /* Look for 'arg' in the list of full-path allowed roots */
+     if (findnode (root_allow, arg))
+ 	return true;
++
++    /* Match 'arg' against the list of allowed roots regexps */
++    if (walklist (root_allow_regexp, root_allow_compare_regexp, (void*)arg))
++      return true;
++
+     return false;
+ }
+ 
+@@ -436,6 +496,9 @@
+ }
+ 
+ 
++#if defined(CLIENT_SUPPORT) || defined (SERVER_SUPPORT)
++static char *validate_hostname(const char *) __attribute__((__malloc__));
++#endif /* defined(CLIENT_SUPPORT) || defined (SERVER_SUPPORT) */
+ 
+ /*
+  * Parse a CVSROOT string to allocate and return a new cvsroot_t structure.
+@@ -535,6 +598,12 @@
+ 	    method = "";
+ #endif /* defined (CLIENT_SUPPORT) || defined (SERVER_SUPPORT) */
+ 
++    if (NULL == method)
++	{
++	    error (0, 0, "Missing method in CVSROOT.");
++	    goto error_exit;
++	}
++
+ 	/* Now we have an access method -- see if it's valid. */
+ 
+ 	if (!strcasecmp (method, "local"))
+@@ -547,6 +616,16 @@
+ 	    newroot->method = gserver_method;
+ 	else if (!strcasecmp (method, "server"))
+ 	    newroot->method = server_method;
++	else if (strncmp (method, "ext=", 4) == 0)
++	{
++	    newroot->cvs_rsh = xstrdup(method + 4);
++	    newroot->method = ext_method;
++	}
++	else if (!strcasecmp (method, "extssh"))
++	{
++	    newroot->cvs_rsh = xstrdup("ssh");
++	    newroot->method = extssh_method;
++	}
+ 	else if (!strcasecmp (method, "ext"))
+ 	    newroot->method = ext_method;
+ 	else if (!strcasecmp (method, "fork"))
+@@ -573,37 +652,40 @@
+ 	    TRACE (TRACE_DATA, "CVSROOT option=`%s' value=`%s'", p, q);
+ 	    if (!strcasecmp (p, "proxy"))
+ 	    {
+-		newroot->proxy_hostname = xstrdup (q);
++		if (!(newroot->proxy_hostname = validate_hostname(q))) {
++			error(0, 0, "Invalid proxy hostname: %s", q);
++			goto error_exit;
++		}
+ 	    }
+ 	    else if (!strcasecmp (p, "proxyport"))
+ 	    {
+ 		char *r = q;
+-		if (*r == '-') r++;
+-		while (*r)
+-		{
+-		    if (!isdigit(*r++))
+-		    {
++
++		do {
++		    if (!isdigit(*r)) {
++ proxy_port_error:
+ 			error (0, 0,
+ "CVSROOT may only specify a positive, non-zero, integer proxy port (not `%s').",
+ 			       q);
+ 			goto error_exit;
+ 		    }
+-		}
+-		if ((newroot->proxy_port = atoi (q)) <= 0)
+-		    error (0, 0,
+-"CVSROOT may only specify a positive, non-zero, integer proxy port (not `%s').",
+-			   q);
++		} while (*++r);
++		if ((newroot->proxy_port = atoi(q)) <= 0 ||
++		    newroot->proxy_port > 65535)
++			goto proxy_port_error;
+ 	    }
+ 	    else if (!strcasecmp (p, "CVS_RSH"))
+ 	    {
+ 		/* override CVS_RSH environment variable */
+-		if (newroot->method == ext_method)
+-		    newroot->cvs_rsh = xstrdup (q);
++		if (newroot->method == ext_method
++		    || newroot->method == extssh_method)
++		newroot->cvs_rsh = xstrdup (q);
+ 	    }
+ 	    else if (!strcasecmp (p, "CVS_SERVER"))
+ 	    {
+ 		/* override CVS_SERVER environment variable */
+ 		if (newroot->method == ext_method
++		    || newroot->method == extssh_method
+ 		    || newroot->method == fork_method)
+ 		    newroot->cvs_server = xstrdup (q);
+ 	    }
+@@ -635,7 +717,8 @@
+     newroot->isremote = (newroot->method != local_method);
+ 
+ #if defined (CLIENT_SUPPORT) || defined (SERVER_SUPPORT)
+-    if (readonlyfs && newroot->isremote)
++    if (readonlyfs && newroot->isremote && (newroot->method != ext_method)
++      && (newroot->method != extssh_method) && (newroot->method != fork_method))
+ 	error (1, 0,
+ "Read-only repository feature unavailable with remote roots (cvsroot = %s)",
+ 	       cvsroot_copy);
+@@ -682,7 +765,22 @@
+ 		/* a blank username is impossible, so leave it NULL in that
+ 		 * case so we know to use the default username
+ 		 */
++	    {
++		/* for want of strcspn */
++		if (/* no at, obviously */ strchr(cvsroot_copy, '@') ||
++		    /* no colon, interference with CVSROOT/passwd file */
++		    strchr(cvsroot_copy, ':') ||
++		    /* no linefeeds, interference with pserver protocol */
++		    strchr(cvsroot_copy, '\012')) {
++			error(0, 0, "Bad username \"%s\"", cvsroot_copy);
++			goto error_exit;
++		}
++		/* other limitations include not beginning with a
++		 * hyphen-minus but that’s not even a requirement
++		 * in POSIX, let alone other operating environments…
++		 */
+ 		newroot->username = xstrdup (cvsroot_copy);
++	    }
+ 
+ 	    cvsroot_copy = ++p;
+ 	}
+@@ -693,24 +791,18 @@
+ 	if ((p = strchr (cvsroot_copy, ':')) != NULL)
+ 	{
+ 	    *p++ = '\0';
+-	    if (strlen(p))
++	    if (*p)
+ 	    {
++		char qch;
++
+ 		q = p;
+-		if (*q == '-') q++;
+-		while (*q)
++		while ((qch = *q++))
+ 		{
+-		    if (!isdigit(*q++))
+-		    {
+-			error (0, 0,
+-"CVSROOT may only specify a positive, non-zero, integer port (not `%s').",
+-				p);
+-			error (0, 0,
+-                               "Perhaps you entered a relative pathname?");
+-			goto error_exit;
+-		    }
++		    if (!isdigit(qch))
++			goto parse_port_error;
+ 		}
+-		if ((newroot->port = atoi (p)) <= 0)
+-		{
++		if ((newroot->port = atoi(p)) <= 0 || newroot->port > 65535) {
++ parse_port_error:
+ 		    error (0, 0,
+ "CVSROOT may only specify a positive, non-zero, integer port (not `%s').",
+ 			    p);
+@@ -720,12 +812,8 @@
+ 	    }
+ 	}
+ 
+-	/* copy host */
+-	if (*cvsroot_copy != '\0')
+-	    /* blank hostnames are invalid, but for now leave the field NULL
+-	     * and catch the error during the sanity checks later
+-	     */
+-	    newroot->hostname = xstrdup (cvsroot_copy);
++	/* check and copy host */
++	newroot->hostname = validate_hostname(cvsroot_copy);
+ 
+ 	/* restore the '/' */
+ 	cvsroot_copy = firstslash;
+@@ -750,7 +838,9 @@
+ #if defined(CLIENT_SUPPORT) || defined (SERVER_SUPPORT)
+     if (newroot->username && ! newroot->hostname)
+     {
+-	error (0, 0, "Missing hostname in CVSROOT.");
++	/* this defangs sanity.sh tests for remote reject, though */
++ bad_hostname:
++	error (0, 0, "Missing or bad hostname in CVSROOT.");
+ 	goto error_exit;
+     }
+ 
+@@ -828,6 +918,7 @@
+     case server_method:
+     case ext_method:
+ 	no_port = 1;
++    case extssh_method:
+ 	/* no_password already set */
+ 	check_hostname = 1;
+ 	break;
+@@ -863,16 +954,13 @@
+     }
+ 
+     if (check_hostname && !newroot->hostname)
+-    {
+-	error (0, 0, "Didn't specify hostname in CVSROOT.");
+-	goto error_exit;
+-    }
++	goto bad_hostname;
+ 
+     if (no_port && newroot->port)
+     {
+         error (0, 0,
+-"CVSROOT port specification is only valid for gserver, kserver,");
+-        error (0, 0, "and pserver connection methods.");
++"CVSROOT port specification is only valid for extssh,");
++        error (0, 0, "gserver, kserver and pserver connection methods.");
+         goto error_exit;
+     }
+ #endif /* defined(CLIENT_SUPPORT) || defined (SERVER_SUPPORT) */
+@@ -1052,3 +1140,78 @@
+    /* NOTREACHED */
+ }
+ #endif
++
++#if defined(CLIENT_SUPPORT) || defined (SERVER_SUPPORT)
++#define CLS_INVALID	0
++#define CLS_INSIDE	1
++#define CLS_OUTSIDE	2
++#define CLS_SEPARATOR	4
++/* EBCDIC safe */
++#define CLASSIFY(x)	classify[(unsigned char)(x)]
++static char *
++validate_hostname(const char *s)
++{
++	char *buf, *cp;
++	size_t sz;
++	static char classify_initialised = 0, *classify;
++
++	/* initialise classification table */
++	if (!classify_initialised) {
++		const char *ccp;
++
++		classify = xmalloc(256);
++		for (sz = 0; sz < 256; ++sz)
++			CLASSIFY(sz) = CLS_INVALID;
++		for (ccp = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz";
++		    *ccp; ++ccp)
++			CLASSIFY(*ccp) = CLS_INSIDE | CLS_OUTSIDE;
++		CLASSIFY('-') = CLS_INSIDE;
++		CLASSIFY('.') = CLS_SEPARATOR;
++		classify_initialised = 1;
++	}
++
++	/* total size limit tolerating a trailing dot */
++	if ((sz = strlen(s)) > 256)
++		return (NULL);
++	buf = xstrdup(s);
++
++	/* drop trailing dot */
++	if ((unsigned char)buf[sz - 1] == (unsigned char)'.')
++		buf[--sz] = '\0';
++	/* recheck */
++	if (sz > 255) {
++ err:
++		free(buf);
++		return (NULL);
++	}
++
++	/* check each label */
++	cp = buf;
++ loop:
++	/* must begin with [0-9A-Za-z] */
++	if (!(CLASSIFY(*cp++) & CLS_OUTSIDE))
++		goto err;
++	sz = 1;
++	/* arbitrary many [0-9A-Za-z-] */
++	while (CLASSIFY(*cp) & CLS_INSIDE) {
++		++cp;
++		++sz;
++	}
++	/* except the last must have been [0-9A-Za-z] again */
++	if (!(CLASSIFY(cp[-1]) & CLS_OUTSIDE))
++		goto err;
++	/* maximum label size */
++	if (sz > 63)
++		goto err;
++	/* next label? */
++	if (CLASSIFY(*cp) & CLS_SEPARATOR) {
++		++cp;
++		goto loop;
++	}
++	/* must be end of string now */
++	if (*cp)
++		goto err;
++	/* it is, everything okay */
++	return (buf);
++}
++#endif /* defined(CLIENT_SUPPORT) || defined (SERVER_SUPPORT) */
+--- cvs-1.12.13+real.orig/src/root.h
++++ cvs-1.12.13+real/src/root.h
+@@ -1,3 +1,5 @@
++/* $MirOS: src/gnu/usr.bin/cvs/src/root.h,v 1.5 2017/01/08 19:13:05 tg Exp $ */
++
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
+  *
+@@ -22,6 +24,7 @@
+     kserver_method,
+     gserver_method,
+     ext_method,
++    extssh_method,
+     fork_method
+ } CVSmethod;
+ extern const char method_names[][16];	/* change this in root.c if you change
+@@ -62,8 +65,10 @@
+ 	__attribute__ ((__malloc__));
+ void Create_Root (const char *dir, const char *rootdir);
+ void root_allow_add (const char *, const char *configPath);
++void root_allow_regexp_add (const char *, const char *configPath);
+ void root_allow_free (void);
+ bool root_allow_ok (const char *);
++int root_allow_used (void);
+ struct config *get_root_allow_config (const char *arg, const char *configPath);
+ const char *primary_root_translate (const char *root_in);
+ const char *primary_root_inverse_translate (const char *root_in);
+--- cvs-1.12.13+real.orig/src/rsh-client.c
++++ cvs-1.12.13+real/src/rsh-client.c
+@@ -53,11 +53,13 @@
+     char *cvs_server = (root->cvs_server != NULL
+ 			? root->cvs_server : getenv ("CVS_SERVER"));
+     int i = 0;
+-    /* This needs to fit "rsh", "-b", "-l", "USER", "host",
+-       "cmd (w/ args)", and NULL.  We leave some room to grow. */
+-    char *rsh_argv[10];
++    /* This needs to fit "rsh", "-b", "-l", "USER", "-p", port,
++       "--", "host", "cvs", "-R", "server", and NULL.
++       We leave some room to grow. */
++    char *rsh_argv[16];
++    char argvport[16];
+ 
+-    if (!cvs_rsh)
++    if (!cvs_rsh || !*cvs_rsh)
+ 	/* People sometimes suggest or assume that this should default
+ 	   to "remsh" on systems like HPUX in which that is the
+ 	   system-supplied name for the rsh program.  However, that
+@@ -79,7 +81,7 @@
+ 	   if that is what they want (the manual already tells them
+ 	   that).  */
+ 	cvs_rsh = RSH_DFLT;
+-    if (!cvs_server)
++    if (!cvs_server || !*cvs_server)
+ 	cvs_server = "cvs";
+ 
+     /* The command line starts out with rsh. */
+@@ -97,8 +99,20 @@
+ 	rsh_argv[i++] = root->username;
+     }
+ 
++    if (root->method == extssh_method && root->port)
++    {
++	snprintf(argvport, sizeof(argvport), "%d", root->port);
++	rsh_argv[i++] = "-p";
++	rsh_argv[i++] = argvport;
++    }
++
++    /* Only non-option arguments from here. (CVE-2017-12836) */
++    rsh_argv[i++] = "--";
++
+     rsh_argv[i++] = root->hostname;
+     rsh_argv[i++] = cvs_server;
++    if (readonlyfs)
++	rsh_argv[i++] = "-R";
+     rsh_argv[i++] = "server";
+ 
+     /* Mark the end of the arg list. */
+@@ -139,9 +153,9 @@
+     int tofd, fromfd;
+     int child_pid;
+ 
+-    if (!cvs_rsh)
++    if (!cvs_rsh || !*cvs_rsh)
+ 	cvs_rsh = RSH_DFLT;
+-    if (!cvs_server)
++    if (!cvs_server || !*cvs_server)
+ 	cvs_server = "cvs";
+ 
+     /* Pass the command to rsh as a single string.  This shouldn't
+@@ -154,10 +168,11 @@
+      * on the server machine does not set CVSROOT to something
+      * containing a colon (or better yet, upgrade the server).
+      */
+-    command = Xasprintf ("%s server", cvs_server);
++    command = Xasprintf ("%s%s server", cvs_server, readonlyfs ? " -R" : "");
+ 
+     {
+-        char *argv[10];
++	char argvport[16];
++        char *argv[16];
+ 	char **p = argv;
+ 
+ 	*p++ = cvs_rsh;
+@@ -171,6 +186,15 @@
+ 	    *p++ = root->username;
+ 	}
+ 
++	if (root->method == extssh_method && root->port)
++	{
++		snprintf(argvport, sizeof(argvport), "%d", root->port);
++		*p++ = "-p";
++		*p++ = argvport;
++	}
++
++	*p++ = "--";
++
+ 	*p++ = root->hostname;
+ 	*p++ = command;
+ 	*p++ = NULL;
+--- cvs-1.12.13+real.orig/src/sanity.sh
++++ cvs-1.12.13+real/src/sanity.sh
+@@ -1,11 +1,17 @@
+ #! /bin/sh
+ :
++# $MirOS: src/gnu/usr.bin/cvs/src/sanity.sh,v 1.21 2021/01/30 02:06:07 tg Exp $
++#-
++# set DISABLE_ANY_RSH=1 to skip rsh and ssh calls
++#
+ #	sanity.sh -- a growing testsuite for cvs.
+ #
+ # The copyright notice said: "Copyright (C) 1992, 1993 Cygnus Support"
+ # I'm not adding new copyright notices for new years as our recent 
+ # practice has been to include copying terms without copyright notices.
+ #
++# © 2016, 2017, 2021 mirabilos <m@mirbsd.org>
++#
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 2, or (at your option)
+@@ -22,7 +28,7 @@
+ usage ()
+ {
+     echo "Usage: `basename $0` --help"
+-    echo "Usage: `basename $0` [--eklr] [-c CONFIG-FILE] [-f FROM-TEST] \\"
++    echo "Usage: `basename $0` [-eklnpr] [-c CONFIG-FILE] [-f FROM-TEST] \\"
+     echo "                 [-h HOSTNAME] [-s CVS-FOR-CVS-SERVER] CVS-TO-TEST \\"
+     echo "                 [TESTS-TO-RUN...]"
+ }
+@@ -37,59 +43,74 @@
+ {
+     usage
+     echo
+-    echo "-H|--help	display this text"
++    echo "-H|--help        display this text"
+     echo "-c CONFIG-FILE"
+     echo "--config=CONFIG_FILE"
+-    echo "		use an alternate test suite config file (defaults to"
+-    echo "		\`sanity.config.sh' in the same directory as"
+-    echo "		CVS-TO-TEST is found in)"
+-    echo "-e|--skipfail Treat tests that would otherwise be nonfatally skipped"
+-    echo "              for reasons like missing tools as failures, exiting"
+-    echo "              with an error message.  Also treat warnings as"
+-    echo "		failures."
++    echo "                 use an alternate test suite config file (defaults to"
++    echo "                 'sanity.config.sh' in the same directory as"
++    echo "                 CVS-TO-TEST is found in)"
++    echo "-e|--skipfail    Treat tests that would otherwise be nonfatally skipped"
++    echo "                 for reasons like missing tools as failures, exiting"
++    echo "                 with an error message.  Also treat warnings as"
++    echo "                 failures."
+     echo "-f FROM-TEST"
+     echo "--from-test=FROM-TEST"
+-    echo "		run TESTS-TO-RUN, skipping all tests in the list before"
+-    echo "		FROM-TEST"
++    echo "                 run TESTS-TO-RUN, skipping all tests in the list before"
++    echo "                 FROM-TEST"
+     echo "-h HOSTNAME"
+     echo "--hostname HOSTNAME"
+-    echo "              Use :ext:HOSTNAME to run remote tests rather than"
+-    echo "              :fork:.  Implies --remote and assumes that \$TESTDIR"
+-    echo "              resolves to the same directory on both the client and"
+-    echo "              the server."
+-    echo "-k|--keep	try to keep directories created by individual tests"
+-    echo "		around, exiting after the first test which supports"
+-    echo "		--keep"
+-    echo "-l|--link-root"
+-    echo "		test CVS using a symlink to a real CVSROOT"
+-    echo "-n|--noredirect"
+-    echo "              test a secondary/primary CVS server (writeproxy)"
+-    echo "              configuration with the Redirect response disabled"
+-    echo "              (implies --proxy)."
+-    echo "-p|--proxy	test a secondary/primary CVS server (writeproxy)"
+-    echo "              configuration (implies --remote)."
+-    echo "-r|--remote	test client/server, as opposed to local, CVS"
++    echo "                 Use :ext:HOSTNAME to run remote tests rather than"
++    echo "                 :fork:.  Implies --remote and assumes that \$TESTDIR"
++    echo "                 resolves to the same directory on both the client and"
++    echo "                 the server."
++    echo "-k|--keep        try to keep directories created by individual tests"
++    echo "                 around, exiting after the first test which supports"
++    echo "                 --keep"
++    echo "-l|--link-root   test CVS using a symlink to a real CVSROOT"
++    echo "-n|--noredirect  test a secondary/primary CVS server (writeproxy)"
++    echo "                 configuration with the Redirect response disabled"
++    echo "                 (implies --proxy)."
++    echo "-p|--proxy       test a secondary/primary CVS server (writeproxy)"
++    echo "                 configuration (implies --remote)."
++    echo "-r|--remote      test client/server, as opposed to local, CVS"
+     echo "-s CVS-FOR-CVS-SERVER"
+     echo "--server=CVS-FOR-CVS-SERVER"
+-    echo "		use CVS-FOR-CVS-SERVER as the path to the CVS SERVER"
+-    echo "		executable to be tested (defaults to CVS-TO-TEST and"
+-    echo "		implies --remote)"
+-    echo
+-    echo "CVS-TO-TEST	the path to the CVS executable to be tested; used as"
+-    echo "		the path to the CVS client when CVS-FOR-CVS-SERVER is"
+-    echo "		specified"
+-    echo "TESTS-TO-RUN	the names of the tests to run (defaults to all tests)"
++    echo "                 use CVS-FOR-CVS-SERVER as the path to the CVS SERVER"
++    echo "                 executable to be tested (defaults to CVS-TO-TEST and"
++    echo "                 implies --remote)"
++    echo ""
++    echo "CVS-TO-TEST      the path to the CVS executable to be tested; used as"
++    echo "                 the path to the CVS client when CVS-FOR-CVS-SERVER is"
++    echo "                 specified"
++    echo "TESTS-TO-RUN     the names of the tests to run (defaults to all tests)"
+     exit 2
+ }
+ 
+ checklongoptarg()
+ {
+     if test "x$1" != xoptional && test -z "$OPTARG"; then
+-	echo "option \`--$LONGOPT' requires an argument" >&2
++	echo "option '--$LONGOPT' requires an argument" >&2
+ 	exit_usage
+     fi
+ }
+ 
++do_save_TZ()
++{
++	saveset_TZ=${TZ+false}
++	save_TZ=$TZ
++	TZ=UTC0; export TZ
++}
++
++do_restore_TZ()
++{
++	if $saveset_TZ :; then
++		unset TZ
++	else
++		TZ=$save_TZ
++		export TZ
++	fi
++}
++
+ # See TODO list at end of file.
+ 
+ # required to make this script work properly.
+@@ -155,7 +176,7 @@
+ 		checklongoptarg
+ 		;;
+ 	    h)
+-		echo "\`--h' is ambiguous.  Could mean \`--help' or \`--hostname'" >&2
++		echo "'--h' is ambiguous.  Could mean '--help' or '--hostname'" >&2
+ 		exit_usage
+ 		;;
+ 	    he|hel|help)
+@@ -187,7 +208,7 @@
+ 		OPTARG=
+ 		;;
+ 	    s)
+-		echo "\`--s' is ambiguous.  Could mean \`--server' or \`--skipfail'" >&2
++		echo "'--s' is ambiguous.  Could mean '--server' or '--skipfail'" >&2
+ 		exit_usage
+ 		;;
+ 	    se|ser|serv|serve|server)
+@@ -312,7 +333,7 @@
+ 	. "$configfile"
+ else
+ 	echo "WARNING: Failed to locate test suite config file" >&2
+-	echo "         \`$configfile'." >&2
++	echo "         '$configfile'." >&2
+ fi
+ 
+ 
+@@ -326,7 +347,7 @@
+     # Verify that $CVS_RSH $remotehost works.
+     result=`$CVS_RSH $remotehost 'echo test'`
+     if test $? != 0 || test "x$result" != "xtest"; then
+-	echo "\`$CVS_RSH $remotehost' failed." >&2
++	echo "'$CVS_RSH $remotehost' failed." >&2
+ 	exit 1
+     fi
+ fi
+@@ -373,7 +394,7 @@
+     fi
+     if $CVS_RSH $remotehost "${servercvs} --version </dev/null |
+          grep '^Concurrent.*(.*server)$' >/dev/null 2>&1"; then :; else
+-      echo "CVS executable \`$remotehost:${servercvs}' does not contain server support." >&2
++      echo "CVS executable '$remotehost:${servercvs}' does not contain server support." >&2
+       exit 1
+     fi
+   else
+@@ -388,7 +409,7 @@
+     fi
+     if ${servercvs} --version </dev/null |
+          grep '^Concurrent.*(.*server)$' >/dev/null 2>&1; then :; else
+-      echo "CVS executable \`${servercvs}' does not contain server support." >&2
++      echo "CVS executable '${servercvs}' does not contain server support." >&2
+       exit 1
+     fi
+   fi
+@@ -399,7 +420,7 @@
+ if $remote; then
+   if ${testcvs} --version </dev/null |
+        grep '^Concurrent.*(client.*)$' >/dev/null 2>&1; then :; else
+-    echo "CVS executable \`${testcvs}' does not contain client support." >&2
++    echo "CVS executable '${testcvs}' does not contain client support." >&2
+     exit 1
+   fi
+ fi
+@@ -418,7 +439,7 @@
+ dokeep() 
+ { 
+     if ${keep}; then
+-      echo "Keeping ${TESTDIR} for test case \`${what}' and exiting due to --keep"
++      echo "Keeping ${TESTDIR} for test case '${what}' and exiting due to --keep"
+       exit 0
+     fi
+ }
+@@ -436,7 +457,7 @@
+ echo '(Note that the test can take an hour or more to run and periodically stops'
+ echo 'for as long as one minute.  Do not assume there is a problem just because'
+ echo 'nothing seems to happen for a long time.  If you cannot live without'
+-echo "running status, try the command: \`tail -f check.log' from another window.)"
++echo "running status, try the command: 'tail -f check.log' from another window.)"
+ 
+ # Regexp to match what the CVS client will call itself in output that it prints.
+ # FIXME: we don't properly quote this--if the name contains . we'll
+@@ -681,6 +702,10 @@
+ #! $TESTSHELL
+ hostname=\$1
+ shift
++if test x"\$hostname" = x"--"; then
++	hostname=\$1
++	shift
++fi
+ exec \
+ $CVS_RSH \
+ 	 \$hostname \
+@@ -750,7 +775,7 @@
+     fi
+   fi
+   if $verbad; then
+-    echo "The command \`$vercmd' does not support the --version option."
++    echo "The command '$vercmd' does not support the --version option."
+   fi
+   # It does not really matter that --version is not supported
+   return 0
+@@ -796,10 +821,10 @@
+     fi
+   done
+   if test -n "$TOOL"; then
+-    echo "Notice: The default version of \`$default_TOOL' is defective." >>$LOGFILE
+-    echo "using \`$TOOL' and hoping for the best." >>$LOGFILE
+-    echo "Notice: The default version of \`$default_TOOL' is defective." >&2
+-    echo "using \`$TOOL' and hoping for the best." >&2
++    echo "Notice: The default version of '$default_TOOL' is defective." >>$LOGFILE
++    echo "using '$TOOL' and hoping for the best." >>$LOGFILE
++    echo "Notice: The default version of '$default_TOOL' is defective." >&2
++    echo "using '$TOOL' and hoping for the best." >&2
+     echo $TOOL
+   else
+     echo $default_TOOL
+@@ -812,7 +837,7 @@
+   if $id -u >/dev/null 2>&1 && $id -un >/dev/null 2>&1; then
+     return 0
+   else
+-    echo "Running these tests requires an \`id' program that understands the"
++    echo "Running these tests requires an 'id' program that understands the"
+     echo "-u and -n flags.  Make sure that such an id (GNU, or many but not"
+     echo "all vendor-supplied versions) is in your path."
+     return 1
+@@ -941,8 +966,8 @@
+ else
+   DOTSTAR='\(.\|
+ \)*'
+-  echo "Notice: DOTSTAR changed from sane \`.*' value to \`$DOTSTAR\`"
+-  echo "to workaround GNU expr version 1.10 thru 1.12 bug where \`.'"
++  echo "Notice: DOTSTAR changed from sane '.*' value to '$DOTSTAR'"
++  echo "to workaround GNU expr version 1.10 thru 1.12 bug where '.'"
+   echo "does not match a newline."
+ fi
+ return 0
+@@ -1059,7 +1084,7 @@
+     rm -rf $TESTDIR/ls-test
+ fi
+ if $ls $TESTDIR/ls-test >/dev/null 2>&1; then
+-  echo "Notice: \`$ls' is defective."
++  echo "Notice: '$ls' is defective."
+   echo 'This is a version of ls which does not correctly'
+   echo 'return false for files that do not exist. Some tests may'
+   echo 'spuriously pass or fail.'
+@@ -1205,11 +1230,16 @@
+ # 77.
+ require_rsh ()
+ {
++  if test x"$DISABLE_ANY_RSH" = x"1"; then
++    skipreason="administratively prohibited"
++    return 77
++  fi
++
+   host=${remotehost-"`hostname`"}
+   result=`$1 $host 'echo test'`
+   rc=$?
+   if test $? != 0 || test "x$result" != "xtest"; then
+-    skipreason="\`$1 $host' failed rc=$rc result=$result"
++    skipreason="'$1 $host' failed rc=$rc result=$result"
+     return 77
+   fi
+ 
+@@ -1301,7 +1331,7 @@
+ fail ()
+ {
+   echo "FAIL: $1" | tee -a ${LOGFILE}
+-  echo "*** Please see the \`TESTS' and \`check.log' files for more information." >&2
++  echo "*** Please see the 'TESTS' and 'check.log' files for more information." >&2
+   # This way the tester can go and see what remnants were left
+   exit 1
+ }
+@@ -1313,7 +1343,7 @@
+   if $remote && $LS $TMPDIR/cvs-serv* >/dev/null 2>&1; then
+     # A true value means ls found files/directories with these names.
+     # Give the server some time to finish, then retry.
+-    sleep 1
++    sleep 2
+     if $LS $TMPDIR/cvs-serv* >/dev/null 2>&1; then
+       warn "$1" "Found cvs-serv* directories in $TMPDIR."
+       # The above will exit if $skipfail
+@@ -1503,6 +1533,9 @@
+ # lack \|).
+ dotest ()
+ {
++  #echo dotest >$TESTDIR/_dotest.fun
++  #pwd >$TESTDIR/_dotest.cwd
++  #printf '%s\n' "$2" >$TESTDIR/_dotest.cmd
+   rm -f $TESTDIR/dotest.ex? 2>&1
+   eval "$2" >$TESTDIR/dotest.tmp 2>&1
+   status=$?
+@@ -1518,6 +1551,9 @@
+ # Like dotest except only 2 args and result must exactly match stdin
+ dotest_lit ()
+ {
++  #echo dotest_lit >$TESTDIR/_dotest.fun
++  #pwd >$TESTDIR/_dotest.cwd
++  #printf '%s\n' "$2" >$TESTDIR/_dotest.cmd
+   rm -f $TESTDIR/dotest.ex? 2>&1
+   eval "$2" >$TESTDIR/dotest.tmp 2>&1
+   status=$?
+@@ -1543,6 +1579,9 @@
+ # Like dotest except exitstatus should be nonzero.
+ dotest_fail ()
+ {
++  #echo dotest_fail >$TESTDIR/_dotest.fun
++  #pwd >$TESTDIR/_dotest.cwd
++  #printf '%s\n' "$2" >$TESTDIR/_dotest.cmd
+   rm -f $TESTDIR/dotest.ex? 2>&1
+   eval "$2" >$TESTDIR/dotest.tmp 2>&1
+   status=$?
+@@ -1558,6 +1597,9 @@
+ # Like dotest except output is sorted.
+ dotest_sort ()
+ {
++  #echo dotest_sort >$TESTDIR/_dotest.fun
++  #pwd >$TESTDIR/_dotest.cwd
++  #printf '%s\n' "$2" >$TESTDIR/_dotest.cmd
+   rm -f $TESTDIR/dotest.ex? 2>&1
+   eval "$2" >$TESTDIR/dotest.tmp1 2>&1
+   status=$?
+@@ -1574,6 +1616,9 @@
+ # Like dotest_fail except output is sorted.
+ dotest_fail_sort ()
+ {
++  #echo dotest_fail_sort >$TESTDIR/_dotest.fun
++  #pwd >$TESTDIR/_dotest.cwd
++  #printf '%s\n' "$2" >$TESTDIR/_dotest.cmd
+   rm -f $TESTDIR/dotest.ex? 2>&1
+   eval "$2" >$TESTDIR/dotest.tmp1 2>&1
+   status=$?
+@@ -1622,6 +1667,7 @@
+ 	tests="$tests parseroot parseroot2 parseroot3 files spacefiles"
+ 	tests="${tests} commit-readonly commit-add-missing"
+ 	tests="${tests} status"
++	tests="${tests} suck"
+ 	# Branching, tagging, removing, adding, multiple directories
+ 	tests="${tests} rdiff rdiff-short"
+ 	tests="${tests} rdiff2 diff diffnl death death2"
+@@ -1694,7 +1740,7 @@
+ 	  count=`expr $count + 1`
+ 	done
+ 	if test $count != 1; then
+-		echo "No such test \`$fromtest'." >&2
++		echo "No such test '$fromtest'." >&2
+ 		exit 2
+ 	fi
+ 	# make sure it is in $tests
+@@ -1702,7 +1748,7 @@
+ 		*" $fromtest "*)
+ 			;;
+ 		*)
+-			echo "No such test \`$fromtest'." >&2
++			echo "No such test '$fromtest'." >&2
+ 			exit 2
+ 			;;
+ 	esac
+@@ -2600,6 +2646,25 @@
+ ###
+ dotest init-1 "$testcvs init"
+ 
++# We might need to allow "cvs admin" access and full history.
++mkdir wnt
++cd wnt
++dotest init-1a "$testcvs -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++cd CVSROOT
++sed -e 's/^#UserAdminOptions=/UserAdminOptions=/' \
++    -e '/^LogHistory/d' \
++    <config >tmpconfig
++mv tmpconfig config
++dotest init-1b "$testcvs -q ci -m allow-cvs-admin" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++cd ../..
++rm -r wnt
++
++write_secondary_wrapper() { :; }
++CVS_SERVER_secondary_wrapper_orig=$CVS_SERVER
++
+ # Now hide the primary root behind a secondary if requested.
+ if $proxy; then
+     # Save the primary root.
+@@ -2626,6 +2691,7 @@
+     if $noredirect; then
+ 	# Wrap the CVS server to allow --primary-root to be set by the
+ 	# secondary.
++    write_secondary_wrapper() {
+ 	cat <<EOF >$TESTDIR/secondary-wrapper
+ #! $TESTSHELL
+ CVS_SERVER=$TESTDIR/primary-wrapper
+@@ -2633,8 +2699,10 @@
+ 
+ # No need to check the PID of the last client since we are testing with
+ # Redirect disabled.
+-proot_arg="--allow-root=$SECONDARY_CVSROOT_DIRNAME"
+-exec $CVS_SERVER \$proot_arg "\$@"
++proot_arg="--allow-root=$SECONDARY_CVSROOT_DIRNAME \
++	--allow-root=$TESTDIR/crerepos \
++	--allow-root=$PRIMARY_CVSROOT_DIRNAME"
++exec $CVS_SERVER_secondary_wrapper_orig \$proot_arg "\$@"
+ EOF
+ 	cat <<EOF >$TESTDIR/primary-wrapper
+ #! $TESTSHELL
+@@ -2644,7 +2712,8 @@
+ fi
+ exec $CVS_SERVER "\$@"
+ EOF
+-
++    }
++	write_secondary_wrapper
+ 	CVS_SERVER_secondary=$TESTDIR/secondary-wrapper
+ 	CVS_SERVER=$CVS_SERVER_secondary
+ 
+@@ -2685,10 +2754,10 @@
+     # were written to.
+     case "\$cmd" in
+       add|import)
+-	# For \`add', we need a recursive update due to quirks in rsync syntax,
++	# For 'add', we need a recursive update due to quirks in rsync syntax,
+ 	# but it shouldn't affect efficiency since any new dir should be empty.
+ 	#
+-	# For \`import', a recursive update is necessary since subdirs may have
++	# For 'import', a recursive update is necessary since subdirs may have
+ 	# been added underneath the root dir we were passed. 
+         $RSYNC -rglop \\
+ 	       $PRIMARY_CVSROOT_DIRNAME/"\$dir" \\
+@@ -2696,7 +2765,7 @@
+         ;;
+ 
+       tag)
+-	# \`tag' may have changed CVSROOT/val-tags too.
++	# 'tag' may have changed CVSROOT/val-tags too.
+         $RSYNC -glop \\
+                $PRIMARY_CVSROOT_DIRNAME/CVSROOT/val-tags \\
+                $SECONDARY_CVSROOT_DIRNAME/CVSROOT
+@@ -2726,7 +2795,7 @@
+ esac # \$dir
+ 
+ # Avoid timestamp comparison issues with rsync.
+-sleep 1
++sleep 2
+ EOF
+     chmod a+x $TESTDIR/sync-secondary
+ 
+@@ -2781,6 +2850,21 @@
+ ###
+ dotest init-2 "$testcvs init"
+ 
++# We might need to allow "cvs admin" access and full history.
++mkdir wnt
++cd wnt
++dotest init-2a "$testcvs -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++cd CVSROOT
++sed -e 's/^#UserAdminOptions=/UserAdminOptions=/' \
++    -e '/^LogHistory/d' \
++    <config >tmpconfig
++mv tmpconfig config
++dotest init-2b "$testcvs -q ci -m allow-cvs-admin" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++cd ../..
++rm -r wnt
+ 
+ 
+ ###
+@@ -2804,8 +2888,9 @@
+ Concurrent Versions System (CVS) [0-9.]*.*
+ 
+ Copyright (C) [0-9]* Free Software Foundation, Inc.
++Copyright (c) [0-9]* mirabilos .m.mirbsd.org.
+ 
+-Senior active maintainers include Larry Jones, Derek R. Price,
++Senior no longer active maintainers include Larry Jones, Derek R. Price,
+ and Mark D. Baushke.  Please see the AUTHORS and README files from the CVS
+ distribution kit for a complete list of contributors and copyrights.
+ 
+@@ -2822,8 +2907,8 @@
+ #Secondary Server: Concurrent Versions System (CVS) [0-9p.]* (.*server)'
+ 	  if $remote; then
+ 		dotest version-2r "${testcvs} version" \
+-'Client: Concurrent Versions System (CVS) [0-9p.]* (client.*)
+-Server: Concurrent Versions System (CVS) [0-9p.]* (.*server)'
++'Client: Concurrent Versions System (CVS) [0-9p.]*\(-Mir[^ ]*\)* (client.*)
++Server: Concurrent Versions System (CVS) [0-9p.]*\(-Mir[^ ]*\)* (.*server)'
+ 	  else
+ 		dotest version-2 "${testcvs} version" \
+ 'Concurrent Versions System (CVS) [0-9.]*.*'
+@@ -2846,7 +2931,7 @@
+ 	  dotest basica-0a "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest basica-0b "$testcvs add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd ..
+ 	  rm -r 1
+ 
+@@ -2865,17 +2950,17 @@
+ 	  # Remote CVS gives the "cannot open CVS/Entries" error, which is
+ 	  # clearly a bug, but not a simple one to fix.
+ 	  dotest basica-1a10 "$testcvs -n add sdir" \
+-"Directory $CVSROOT_DIRNAME/first-dir/sdir added to the repository" \
++"Directory $CVSROOT_DIRNAME/first-dir/sdir put under version control" \
+ "$SPROG add: cannot open CVS/Entries for reading: No such file or directory
+-Directory $CVSROOT_DIRNAME/first-dir/sdir added to the repository"
++Directory $CVSROOT_DIRNAME/first-dir/sdir put under version control"
+ 	  dotest_fail basica-1a11 \
+ 	    "test -d $CVSROOT_DIRNAME/first-dir/sdir"
+ 	  dotest basica-2 "$testcvs add sdir" \
+-"Directory $CVSROOT_DIRNAME/first-dir/sdir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir/sdir put under version control"
+ 	  cd sdir
+ 	  mkdir ssdir
+ 	  dotest basica-3 "$testcvs add ssdir" \
+-"Directory $CVSROOT_DIRNAME/first-dir/sdir/ssdir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir/sdir/ssdir put under version control"
+ 	  cd ssdir
+ 	  echo ssfile >ssfile
+ 
+@@ -3145,7 +3230,7 @@
+ 	  dotest basicb-0d0 "${testcvs} -q co -l ." ""
+ 	  mkdir first-dir
+ 	  dotest basicb-0e "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd ..
+ 	  rm -r 2
+ 
+@@ -3165,8 +3250,8 @@
+ 	  # special only when it is directly in $CVSROOT/CVSROOT.
+ 	  mkdir Emptydir sdir2
+ 	  dotest basicb-2 "${testcvs} add Emptydir sdir2" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/Emptydir added to the repository
+-Directory ${CVSROOT_DIRNAME}/first-dir/sdir2 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/Emptydir put under version control
++Directory ${CVSROOT_DIRNAME}/first-dir/sdir2 put under version control"
+ 	  cd Emptydir
+ 	  echo sfile1 starts >sfile1
+ 	  dotest basicb-2a10 "${testcvs} -n add sfile1" \
+@@ -3288,7 +3373,7 @@
+ 	  dotest basicb-14 "${testcvs} -q co -l ." 'U topfile'
+ 	  mkdir second-dir
+ 	  dotest basicb-15 "${testcvs} add second-dir" \
+-"Directory ${CVSROOT_DIRNAME}/second-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/second-dir put under version control"
+ 	  cd second-dir
+ 	  touch aa
+ 	  dotest basicb-16 "${testcvs} add aa" \
+@@ -3327,10 +3412,17 @@
+ 	  # many other folks are still using the older 'invalid option'
+ 	  # lib/getopt.c will use POSIX when __posixly_correct
+ 	  # otherwise the other, so accept both of them. -- mdb
++	  # Added optional single quotes. -- mirabilos
++	  # The above is actually untrue, POSIX only documents some older
++	  # texts that can be used and explicitly leaves open the format
++	  # of these messages. Also, GNU getopt is broken and does not
++	  # use __progname in the first place. *sigh* -- mirabilos
++	  # Also supporting either argv0 with both errors and optional
++	  # quotes now. -- mirabilos
+ 	  dotest_fail basicb-21 "${testcvs} -q admin -H" \
+-"admin: invalid option -- H
++"admin: i[ln][lv][ea][gl][ai][ld] option -- '*H'*
+ ${CPROG} \[admin aborted\]: specify ${CPROG} -H admin for usage information" \
+-"admin: illegal option -- H
++"cvs: i[ln][lv][ea][gl][ai][ld] option -- '*H'*
+ ${CPROG} \[admin aborted\]: specify ${CPROG} -H admin for usage information"
+ 	  cd ..
+ 	  rmdir 1
+@@ -3356,8 +3448,8 @@
+ 	  dotest basicc-2 "$testcvs -q co -l ."
+ 	  mkdir first-dir second-dir
+ 	  dotest basicc-3 "${testcvs} add first-dir second-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository
+-Directory ${CVSROOT_DIRNAME}/second-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control
++Directory ${CVSROOT_DIRNAME}/second-dir put under version control"
+ 	  # Old versions of CVS often didn't create this top-level CVS
+ 	  # directory in the first place.  I think that maybe the only
+ 	  # way to get it to work currently is to let CVS create it,
+@@ -3807,7 +3899,7 @@
+ 	  for i in dir1 dir2 dir3 dir4 dir5 dir6 dir7 dir8; do
+ 	    mkdir $i
+ 	    dotest deep-2-$i "${testcvs} add $i" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir1[/dir0-9]* added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir1[/dir0-9]* put under version control"
+ 	    cd $i
+ 	    echo file1 >file1
+ 	    dotest deep-3-$i "${testcvs} add file1" \
+@@ -3924,7 +4016,7 @@
+ 			if test ! -d $i ; then
+ 				mkdir $i
+ 				dotest basic2-2-$i "${testcvs} add $i" \
+-"Directory ${CVSROOT_DIRNAME}/.*/$i added to the repository"
++"Directory ${CVSROOT_DIRNAME}/.*/$i put under version control"
+ 			fi
+ 
+ 			cd $i
+@@ -4907,14 +4999,14 @@
+ 
+ 	  # try and list a file before it's created, during an old revision, in
+ 	  # a period when it was dead and in the future
+-	  time_prebirth=`date '+%Y-%m-%d %H:%M:%S'` ; sleep 1
++	  time_prebirth=`date '+%Y-%m-%d %H:%M:%S'` ; sleep 2
+ 	  touch dated
+ 	  dotest ls-D-init-1 "$testcvs -Q add dated"
+ 	  dotest ls-D-init-2 "$testcvs -Q ci -mm dated"
+-	  time_newborn=`date '+%Y-%m-%d %H:%M:%S'` ; sleep 1
++	  time_newborn=`date '+%Y-%m-%d %H:%M:%S'` ; sleep 2
+ 	  echo mm >> dated
+ 	  dotest ls-D-init-2 "$testcvs -Q ci -mm dated"
+-	  time_predeath=`date '+%Y-%m-%d %H:%M:%S'` ; sleep 1
++	  time_predeath=`date '+%Y-%m-%d %H:%M:%S'` ; sleep 2
+ 	  rm dated
+ 	  dotest ls-D-init-3 "$testcvs -Q rm dated"
+ 	  dotest ls-D-init-4 "$testcvs -Q ci -mm dated"
+@@ -4963,7 +5055,6 @@
+ 	    CVSROOT=":pserver;proxy=localhost;proxyport=8080:localhost/dev/null"
+ 	    dotest parseroot-3r "$testcvs -d'$CVSROOT' logout" \
+ "Logging out of :pserver:$username@localhost:2401/dev/null
+-$CPROG logout: warning: failed to open $HOME/\.cvspass for reading: No such file or directory
+ $CPROG logout: Entry not found."
+ 	    CVSROOT=":pserver;proxyport=8080:localhost/dev/null"
+ 	    dotest_fail parseroot-4r "$testcvs -d'$CVSROOT' logout" \
+@@ -5010,7 +5101,7 @@
+ 	  dotest files-1 "${testcvs} -q co -l ." ""
+ 	  mkdir first-dir
+ 	  dotest files-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch tfile
+ 	  dotest files-3 "${testcvs} add tfile" \
+@@ -5023,7 +5114,7 @@
+ 	  dotest files-6 "${testcvs} -q update -r C" ""
+ 	  mkdir dir
+ 	  dotest files-7 "${testcvs} add dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir added to the repository
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir put under version control
+ --> Using per-directory sticky tag .C'"
+ 	  cd dir
+ 	  touch .file
+@@ -5032,12 +5123,12 @@
+ ${SPROG} add: use .${SPROG} commit. to add this file permanently"
+ 	  mkdir sdir
+ 	  dotest files-7c "${testcvs} add sdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir/sdir added to the repository
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir/sdir put under version control
+ --> Using per-directory sticky tag .C'"
+ 	  cd sdir
+ 	  mkdir ssdir
+ 	  dotest files-8 "${testcvs} add ssdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir/sdir/ssdir added to the repository
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir/sdir/ssdir put under version control
+ --> Using per-directory sticky tag .C'"
+ 	  cd ssdir
+ 	  touch .file
+@@ -5117,10 +5208,10 @@
+ initial revision: 1\.1"
+ 	  mkdir 'first dir'
+ 	  dotest spacefiles-4 "${testcvs} add 'first dir'" \
+-"Directory ${CVSROOT_DIRNAME}/first dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first dir put under version control"
+ 	  mkdir ./-b
+ 	  dotest spacefiles-5 "${testcvs} add -- -b" \
+-"Directory ${CVSROOT_DIRNAME}/-b added to the repository"
++"Directory ${CVSROOT_DIRNAME}/-b put under version control"
+ 	  cd 'first dir'
+ 	  touch 'a file'
+ 	  dotest spacefiles-6 "${testcvs} add 'a file'" \
+@@ -5193,7 +5284,7 @@
+ 		dotest status-init-1 "$testcvs -q co -l ."
+ 		mkdir first-dir
+ 		dotest status-init-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 		cd first-dir
+ 		echo a line >tfile
+ 		dotest status-init-3 "${testcvs} add tfile" \
+@@ -5285,7 +5376,7 @@
+                 cd ..
+                 mkdir fourth-dir
+                 dotest status-init-8 "$testcvs add fourth-dir" \
+-"Directory $CVSROOT_DIRNAME/fourth-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/fourth-dir put under version control"
+                 cd fourth-dir
+                 echo yet another line >t3file
+                 dotest status-init-9 "$testcvs add t3file" \
+@@ -5297,7 +5388,7 @@
+                 cd ../first-dir
+                 mkdir third-dir
+                 dotest status-init-11 "$testcvs add third-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir/third-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir/third-dir put under version control"
+                 cd third-dir
+                 echo another line >t2file
+                 dotest status-init-12 "$testcvs add t2file" \
+@@ -5650,7 +5741,7 @@
+ 	  dotest diff-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest diff-2 "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  # diff is anomalous.  Most CVS commands print the "nothing
+@@ -5697,7 +5788,7 @@
+ 	  dotest diffnl-000 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest diffnl-001 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 
+ 	  ${AWK} 'BEGIN {printf("one\ntwo\nthree\nfour\nfive\nsix")}' </dev/null >abc
+@@ -5861,7 +5952,7 @@
+ 		# doesn't get confused by it.
+ 		mkdir subdir
+ 		dotest 65a0 "${testcvs} add subdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir put under version control"
+ 		cd subdir
+ 		echo file in subdir >sfile
+ 		dotest 65a1 "${testcvs} add sfile" \
+@@ -6590,7 +6681,7 @@
+ 	  dotest rmadd-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest rmadd-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo first file1 >file1
+ 	  dotest rmadd-3 "${testcvs} add file1" \
+@@ -6668,6 +6759,7 @@
+ 	         >$CVSROOT_DIRNAME/CVSROOT/val-tags-tmp
+ 	    mv $CVSROOT_DIRNAME/CVSROOT/val-tags-tmp \
+ 	       $CVSROOT_DIRNAME/CVSROOT/val-tags
++	    rm -f $CVSROOT_DIRNAME/CVSROOT/val-tags.db
+ 
+ 	    dotest rmadd-18 "$testcvs -q update -p -r mynonbranch file1" \
+ "first file1"
+@@ -6733,7 +6825,7 @@
+ 	  # now try forced revision with recursion
+ 	  mkdir sub
+ 	  dotest rmadd-26 "${testcvs} -q add sub" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/sub added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/sub put under version control"
+ 	  echo hello >sub/subfile
+ 	  dotest rmadd-27 "${testcvs} -q add sub/subfile" \
+ "${SPROG} add: use .${SPROG} commit. to add this file permanently"
+@@ -6790,7 +6882,7 @@
+ 	  dotest rmadd2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest rmadd2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo 'initial contents' >file1
+ 	  dotest rmadd2-3 "${testcvs} add file1" \
+@@ -6890,7 +6982,7 @@
+ 	  dotest rmadd3-init1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest rmadd3-init2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  echo initial content for file1 >file1
+@@ -6941,7 +7033,7 @@
+ 	  dotest resurrection-init1 "$testcvs -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest resurrection-init2 "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  echo initial content for file1 >file1
+@@ -7106,11 +7198,11 @@
+ 	  dotest dirs2-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest dirs2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  mkdir sdir
+ 	  dotest dirs2-3 "${testcvs} add sdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/sdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/sdir put under version control"
+ 	  touch sdir/file1
+ 	  dotest dirs2-4 "${testcvs} add sdir/file1" \
+ "${SPROG} add: scheduling file .sdir/file1. for addition
+@@ -7452,7 +7544,7 @@
+ '"${SPROG}"' add: use .'"${SPROG}"' commit. to add this file permanently'
+ 	  mkdir dir1
+ 	  dotest branches2-9 "${testcvs} add dir1" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 added to the repository
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 put under version control
+ --> Using per-directory sticky tag "'`'"b1'"
+ 	  echo "file3 first revision" > dir1/file3
+ 	  dotest branches2-10 "${testcvs} add dir1/file3" \
+@@ -7802,7 +7894,7 @@
+ 	  cd first-dir
+ 	  mkdir dir2
+ 	  dotest branches2-25 "${testcvs} add dir2" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir2 added to the repository
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir2 put under version control
+ --> Using per-directory sticky tag "'`'"b1'"
+ 	  echo "file4 first revision" > dir2/file4
+ 	  dotest branches2-26 "${testcvs} add dir2/file4" \
+@@ -7952,10 +8044,10 @@
+ 	  cd first-dir
+ 	  mkdir branches mixed mixed2 versions
+ 	  dotest branches4-2 "${testcvs} -q add branches mixed mixed2 versions" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/branches added to the repository
+-Directory ${CVSROOT_DIRNAME}/first-dir/mixed added to the repository
+-Directory ${CVSROOT_DIRNAME}/first-dir/mixed2 added to the repository
+-Directory ${CVSROOT_DIRNAME}/first-dir/versions added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/branches put under version control
++Directory ${CVSROOT_DIRNAME}/first-dir/mixed put under version control
++Directory ${CVSROOT_DIRNAME}/first-dir/mixed2 put under version control
++Directory ${CVSROOT_DIRNAME}/first-dir/versions put under version control"
+ 
+ 	  echo file1 >branches/file1
+ 	  echo file2 >branches/file2
+@@ -8031,7 +8123,7 @@
+ 	  dotest tagc-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest tagc-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch file1 file2
+ 	  dotest tagc-3 "${testcvs} add file1 file2" \
+@@ -8052,7 +8144,7 @@
+ T file2"
+ 	  # Avoid timestamp granularity bugs (FIXME: CVS should be
+ 	  # doing the sleep, right?).
+-	  sleep 1
++	  sleep 2
+ 	  echo myedit >>file1
+ 	  dotest tagc-6a "${testcvs} rm -f file2" \
+ "${SPROG} remove: scheduling .file2. for removal
+@@ -8193,7 +8285,7 @@
+ 	  dotest tagf-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest tagf-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch file1 file2
+ 	  dotest tagf-3 "${testcvs} add file1 file2" \
+@@ -8397,7 +8489,7 @@
+ 	  dotest tag-space-init-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest tag-space-init-2 "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch file1
+ 	  dotest tag-space-init-3 "$testcvs add file1" \
+@@ -8672,7 +8764,7 @@
+ 	  dotest rcslib-merge-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest rcslib-merge-2 "$testcvs -q add first-dir" \
+-"Directory $CVSROOT_DIRNAME.*/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME.*/first-dir put under version control"
+ 	  cd ..; rm -r 1
+ 
+ 	  dotest rcslib-merge-3 "$testcvs -q co first-dir" ""
+@@ -9320,8 +9412,7 @@
+ 	  # Also the -d option.
+ 
+ 	  # Set a predictable time zone for these tests.
+-	  save_TZ=$TZ
+-	  TZ=UTC0; export TZ
++	  do_save_TZ
+ 
+ 	  mkdir 1; cd 1
+ 	  mkdir adir bdir cdir
+@@ -9444,7 +9535,7 @@
+ 	  dotest_fail importc-12 "test -d ${TESTDIR}/other" ""
+ 
+ 	  dokeep
+-	  TZ=$save_TZ
++	  do_restore_TZ
+ 	  cd ..
+ 	  rm -r 1 2
+ 	  modify_repo rm -rf $CVSROOT_DIRNAME/first-dir
+@@ -9757,7 +9848,19 @@
+ N import-quirks-4/file1
+ N import-quirks-4/file2
+ N import-quirks-4/file3
+-No conflicts created by this import"
++No conflicts created by this import
++cvs import: warning: you are using an even vendor branch, which can
++lead to problems: '1.1.2'.  Use an odd branch such as '1.1.3' instead." \
++"
++
++N import-quirks-4/file1
++N import-quirks-4/file2
++N import-quirks-4/file3
++No conflicts created by this import
++cvs import: warning: you are using an even vendor branch, which can
++cvs import: warning: you are using an even vendor branch, which can
++lead to problems: '1.1.2'.  Use an odd branch such as '1.1.3' instead.
++lead to problems: '1.1.2'.  Use an odd branch such as '1.1.3' instead."
+ 
+ 	  dokeep
+ 	  cd ..
+@@ -9785,14 +9888,18 @@
+ 	  # Create the module.
+ 	  dotest import-after-initial-1 \
+ 	    "$testcvs -Q import -m. $module X Y" ''
++	  sync >/dev/null 2>&1
+ 
+ 	  file=m
+ 	  # Check it out and add a file.
+ 	  dotest import-after-initial-2 "$testcvs -Q co $module" ''
++	  sync >/dev/null 2>&1
+ 	  cd $module
+ 	  echo original > $file
+ 	  dotest import-after-initial-3 "${testcvs} -Q add $file" ""
++	  sync >/dev/null 2>&1
+ 	  dotest import-after-initial-4 "$testcvs -Q ci -m. $file"
++	  sync >/dev/null 2>&1
+ 
+ 	  # Delay a little so the following import isn't done in the same
+ 	  # second as the preceding commit.
+@@ -9803,12 +9910,14 @@
+ 	  mkdir sub
+ 	  cd sub
+ 	  echo newer-via-import > $file
++	  sync >/dev/null 2>&1
+ 	  dotest import-after-initial-5 \
+ 	    "$testcvs -Q import -m. $module X Y2" ''
++	  sync >/dev/null 2>&1
+ 	  cd ..
+ 
+ 	  # Sleep a second so we're sure to be after the second of the import.
+-	  sleep 1
++	  sleep 2
+ 
+ 	  dotest import-after-initial-6 \
+ 	    "$testcvs -Q update -p -D now $file" 'original'
+@@ -10380,7 +10489,7 @@
+ 	  dotest join2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest join2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 	  echo 'initial contents of file1' >file1
+ 	  dotest join2-3 "${testcvs} add file1" \
+@@ -10489,7 +10598,7 @@
+ 	  dotest join3-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest join3-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo 'initial contents of file1' >file1
+ 	  dotest join3-3 "${testcvs} add file1" \
+@@ -11130,7 +11239,7 @@
+ 	  module=x
+ 	  mkdir $module
+ 	  dotest join-admin-0-2 "$testcvs -q add $module" \
+-"Directory $CVSROOT_DIRNAME/$module added to the repository"
++"Directory $CVSROOT_DIRNAME/$module put under version control"
+ 	  cd $module
+ 
+ 	  # Create a file so applying the first tag works.
+@@ -11182,7 +11291,7 @@
+ 	  module=x
+ 	  mkdir $module
+ 	  dotest join-admin-2-2 "$testcvs -q add $module" \
+-"Directory ${CVSROOT_DIRNAME}/x added to the repository"
++"Directory ${CVSROOT_DIRNAME}/x put under version control"
+ 	  cd $module
+ 
+ 	  # Create a file so applying the first tag works.
+@@ -11252,7 +11361,7 @@
+ 	  dotest join-rm-init-1 "$testcvs -q co -l ." ''
+ 	  mkdir $module
+ 	  dotest join-rm-init-2 "$testcvs -q add $module" \
+-"Directory $CVSROOT_DIRNAME/$module added to the repository"
++"Directory $CVSROOT_DIRNAME/$module put under version control"
+ 	  cd $module
+ 
+ 	  # add some files.
+@@ -11497,7 +11606,7 @@
+ 		echo add a line >>a
+ 		mkdir dir1
+ 		dotest conflicts-127b "${testcvs} add dir1" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 put under version control"
+ 		dotest conflicts-128 "${testcvs} -q ci -m changed" \
+ "$CVSROOT_DIRNAME/first-dir/a,v  <--  a
+ new revision: 1\.2; previous revision: 1\.1"
+@@ -11945,7 +12054,7 @@
+ 	  dotest conflicts3-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest conflicts3-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd ..
+ 	  mkdir 2; cd 2
+ 	  dotest conflicts3-3 "${testcvs} -q co -l first-dir" ''
+@@ -11994,7 +12103,7 @@
+ 	  # and see that CVS doesn't lose its mind.
+ 	  mkdir sdir
+ 	  dotest conflicts3-14 "${testcvs} add sdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/sdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/sdir put under version control"
+ 	  touch sdir/sfile
+ 	  dotest conflicts3-14a "${testcvs} add sdir/sfile" \
+ "${SPROG} add: scheduling file .sdir/sfile. for addition
+@@ -12107,7 +12216,7 @@
+ 	  dotest clean-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest clean-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo "The usual boring test text." > cleanme.txt
+           dotest clean-3 "${testcvs} add cleanme.txt" \
+@@ -12437,12 +12546,12 @@
+ 	  cd first-dir
+ 	  mkdir subdir
+ 	  dotest modules-143a "${testcvs} add subdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir put under version control"
+ 
+ 	  cd subdir
+ 	  mkdir ssdir
+ 	  dotest modules-143b "${testcvs} add ssdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir/ssdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir/ssdir put under version control"
+ 
+ 	  touch a b
+ 
+@@ -12699,9 +12808,9 @@
+ 	  mkdir first-dir second-dir third-dir
+ 	  dotest modules2-setup-2 \
+ "${testcvs} add first-dir second-dir third-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository
+-Directory ${CVSROOT_DIRNAME}/second-dir added to the repository
+-Directory ${CVSROOT_DIRNAME}/third-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control
++Directory ${CVSROOT_DIRNAME}/second-dir put under version control
++Directory ${CVSROOT_DIRNAME}/third-dir put under version control"
+ 	  cd third-dir
+ 	  touch file3
+ 	  dotest modules2-setup-3 "${testcvs} add file3" \
+@@ -12947,7 +13056,7 @@
+ 	  dotest modules3-0 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest modules3-1 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 
+ 	  cd first-dir
+ 	  echo file1 >file1
+@@ -13008,11 +13117,11 @@
+ 	    cd second-dir
+ 	    mkdir suba
+ 	    dotest modules3-7-workaround1 "${testcvs} add suba" \
+-"Directory ${CVSROOT_DIRNAME}/second-dir/suba added to the repository"
++"Directory ${CVSROOT_DIRNAME}/second-dir/suba put under version control"
+ 	    cd suba
+ 	    mkdir subb
+ 	    dotest modules3-7-workaround2 "${testcvs} add subb" \
+-"Directory ${CVSROOT_DIRNAME}/second-dir/suba/subb added to the repository"
++"Directory ${CVSROOT_DIRNAME}/second-dir/suba/subb put under version control"
+ 	    cd ../..
+ 	  fi
+ 
+@@ -13113,13 +13222,13 @@
+ 	  dotest modules4-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest modules4-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 
+ 	  cd first-dir
+           mkdir subdir subdir_long
+           dotest modules4-3 "${testcvs} add subdir subdir_long" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir added to the repository
+-Directory ${CVSROOT_DIRNAME}/first-dir/subdir_long added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir put under version control
++Directory ${CVSROOT_DIRNAME}/first-dir/subdir_long put under version control"
+ 
+ 	  echo file1 > file1
+ 	  dotest modules4-4 "${testcvs} add file1" \
+@@ -13248,11 +13357,11 @@
+ 	  cd first-dir
+ 	  mkdir subdir
+ 	  dotest modules5-2 "${testcvs} add subdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir put under version control"
+ 	  cd subdir
+ 	  mkdir ssdir
+ 	  dotest modules5-3 "${testcvs} add ssdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir/ssdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir/ssdir put under version control"
+ 	  touch a b
+ 	  dotest modules5-4 "${testcvs} add a b" \
+ "${SPROG} add: scheduling file .a. for addition
+@@ -13291,7 +13400,7 @@
+ 	  for i in checkout export tag; do
+ 	    cat >> ${CVSROOT_DIRNAME}/$i.sh <<EOF
+ #! $TESTSHELL
+-sleep 1
++sleep 2
+ echo "$i script invoked in \`pwd\`"
+ echo "args: \$@"
+ EOF
+@@ -13950,12 +14059,12 @@
+ 	  mkdir mod2-2
+ 	  mkdir mod2-2/sub2-2
+ 	  dotest cvsadm-2a "${testcvs} add mod1 mod1-2 mod2 mod2/sub2 mod2-2 mod2-2/sub2-2" \
+-"Directory ${CVSROOT_DIRNAME}/mod1 added to the repository
+-Directory ${CVSROOT_DIRNAME}/mod1-2 added to the repository
+-Directory ${CVSROOT_DIRNAME}/mod2 added to the repository
+-Directory ${CVSROOT_DIRNAME}/mod2/sub2 added to the repository
+-Directory ${CVSROOT_DIRNAME}/mod2-2 added to the repository
+-Directory ${CVSROOT_DIRNAME}/mod2-2/sub2-2 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/mod1 put under version control
++Directory ${CVSROOT_DIRNAME}/mod1-2 put under version control
++Directory ${CVSROOT_DIRNAME}/mod2 put under version control
++Directory ${CVSROOT_DIRNAME}/mod2/sub2 put under version control
++Directory ${CVSROOT_DIRNAME}/mod2-2 put under version control
++Directory ${CVSROOT_DIRNAME}/mod2-2/sub2-2 put under version control"
+ 
+ 	  # Populate the directories for the halibut
+ 	  echo "file1" > mod1/file1
+@@ -15001,7 +15110,7 @@
+ 	  echo "file1" > mod1/file1
+ 	  mkdir moda/modasub
+ 	  dotest emptydir-3b "${testcvs} add moda/modasub" \
+-"Directory ${CVSROOT_DIRNAME}/moda/modasub added to the repository"
++"Directory ${CVSROOT_DIRNAME}/moda/modasub put under version control"
+ 	  echo "filea" > moda/modasub/filea
+ 	  dotest emptydir-4 "${testcvs} add mod1/file1 moda/modasub/filea" \
+ "${SPROG} add: scheduling file .mod1/file1. for addition
+@@ -15328,8 +15437,8 @@
+ 	  dotest toplevel-1 "${testcvs} -q co -l ." ''
+ 	  mkdir top-dir second-dir
+ 	  dotest toplevel-2 "${testcvs} add top-dir second-dir" \
+-"Directory ${CVSROOT_DIRNAME}/top-dir added to the repository
+-Directory ${CVSROOT_DIRNAME}/second-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/top-dir put under version control
++Directory ${CVSROOT_DIRNAME}/second-dir put under version control"
+ 	  cd top-dir
+ 
+ 	  touch file1
+@@ -15447,8 +15556,8 @@
+ 	  dotest toplevel2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir top-dir second-dir
+ 	  dotest toplevel2-2 "${testcvs} add top-dir second-dir" \
+-"Directory ${CVSROOT_DIRNAME}/top-dir added to the repository
+-Directory ${CVSROOT_DIRNAME}/second-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/top-dir put under version control
++Directory ${CVSROOT_DIRNAME}/second-dir put under version control"
+ 	  cd top-dir
+ 
+ 	  touch file1
+@@ -15686,7 +15795,7 @@
+ 	  # can see the "CVS:" lines.
+ 	  cat >${TESTDIR}/editme <<EOF
+ #!${TESTSHELL}
+-sleep 1
++sleep 2
+ sed <\$1 -e 's/^/x/' >${TESTDIR}/edit.new
+ mv ${TESTDIR}/edit.new \$1
+ exit 0
+@@ -15697,7 +15806,7 @@
+ 	  dotest editor-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest editor-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch file1 file2
+ 	  dotest editor-3 "${testcvs} add file1 file2" \
+@@ -15741,6 +15850,7 @@
+ revision 1\.1
+ date: ${ISO8601DATE};  author: ${username};  state: Exp;  commitid: ${commitid};
+ branches:  1\.1\.2;
++x
+ xCVS: ----------------------------------------------------------------------
+ xCVS: Enter Log.  Lines beginning with .CVS:. are removed automatically
+ xCVS:
+@@ -15752,6 +15862,7 @@
+ ----------------------------
+ revision 1\.1\.2\.1
+ date: ${ISO8601DATE};  author: ${username};  state: Exp;  lines: ${PLUS}1 -0;  commitid: ${commitid};
++x
+ xCVS: ----------------------------------------------------------------------
+ xCVS: Enter Log.  Lines beginning with .CVS:. are removed automatically
+ xCVS:
+@@ -15779,6 +15890,7 @@
+ revision 1\.1
+ date: ${ISO8601DATE};  author: ${username};  state: Exp;  commitid: ${commitid};
+ branches:  1\.1\.2;
++x
+ xCVS: ----------------------------------------------------------------------
+ xCVS: Enter Log.  Lines beginning with .CVS:. are removed automatically
+ xCVS:
+@@ -15790,6 +15902,7 @@
+ ----------------------------
+ revision 1\.1\.2\.1
+ date: ${ISO8601DATE};  author: ${username};  state: Exp;  lines: ${PLUS}1 -0;  commitid: ${commitid};
++x
+ xCVS: ----------------------------------------------------------------------
+ xCVS: Enter Log.  Lines beginning with .CVS:. are removed automatically
+ xCVS:
+@@ -15811,6 +15924,7 @@
+ revision 1\.1
+ date: ${ISO8601DATE};  author: ${username};  state: Exp;  commitid: ${commitid};
+ branches:  1\.1\.2;
++x
+ xCVS: ----------------------------------------------------------------------
+ xCVS: Enter Log.  Lines beginning with .CVS:. are removed automatically
+ xCVS:
+@@ -15822,6 +15936,7 @@
+ ----------------------------
+ revision 1\.1\.2\.1
+ date: ${ISO8601DATE};  author: ${username};  state: Exp;  lines: ${PLUS}1 -0;  commitid: ${commitid};
++x
+ xCVS: ----------------------------------------------------------------------
+ xCVS: Enter Log.  Lines beginning with .CVS:. are removed automatically
+ xCVS:
+@@ -15836,7 +15951,7 @@
+ 	  # Test CVS's response to an unchanged log message
+ 	  cat >${TESTDIR}/editme <<EOF
+ #!${TESTSHELL}
+-sleep 1
++sleep 2
+ exit 0
+ EOF
+ 	  chmod +x ${TESTDIR}/editme
+@@ -15849,7 +15964,7 @@
+ 	  # Test CVS's response to an empty log message
+ 	  cat >${TESTDIR}/editme <<EOF
+ #!${TESTSHELL}
+-sleep 1
++sleep 2
+ cat /dev/null >\$1
+ exit 0
+ EOF
+@@ -15863,7 +15978,7 @@
+ 	  # Test CVS's response to a log message with one blank line
+ 	  cat >${TESTDIR}/editme <<EOF
+ #!${TESTSHELL}
+-sleep 1
++sleep 2
+ echo >\$1
+ exit 0
+ EOF
+@@ -15877,7 +15992,7 @@
+ 	  # Test CVS's response to a log message with only comments
+ 	  cat >${TESTDIR}/editme <<EOF
+ #!${TESTSHELL}
+-sleep 1
++sleep 2
+ cat \$1 >${TESTDIR}/edit.new
+ mv ${TESTDIR}/edit.new \$1
+ exit 0
+@@ -15905,7 +16020,7 @@
+ 	  cd ../first-dir
+ 	  cat >${TESTDIR}/editme <<EOF
+ #!${TESTSHELL}
+-sleep 1
++sleep 2
+ cp /dev/null \$1
+ exit 1
+ EOF
+@@ -16065,7 +16180,7 @@
+ 	  cd ..
+ 	  mkdir env
+ 	  dotest env-3 "${testcvs} -q add env" \
+-"Directory ${CVSROOT_DIRNAME}/env added to the repository"
++"Directory ${CVSROOT_DIRNAME}/env put under version control"
+ 	  cd env
+ 	  echo testing >file1
+ 	  dotest env-4 "${testcvs} add file1" \
+@@ -16159,7 +16274,7 @@
+ 	  dotest errmsg2-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest errmsg2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 	  dotest_fail errmsg2-3 "${testcvs} add CVS" \
+ "${CPROG} add: cannot add special file .CVS.; skipping"
+@@ -16189,7 +16304,7 @@
+ 	  mkdir sdir
+ 	  cd ..
+ 	  dotest errmsg2-8 "${testcvs} add first-dir/sdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/sdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/sdir put under version control"
+ 	  # while we're here... check commit with no CVS directory
+ 	  dotest_fail errmsg2-8a "${testcvs} -q ci first-dir nonexistant" \
+ "${CPROG} commit: nothing known about .nonexistant'
+@@ -16205,7 +16320,7 @@
+ 	  mkdir sdir10
+ 	  dotest errmsg2-10 "${testcvs} add file10 sdir10" \
+ "${SPROG} add: scheduling file .file10. for addition
+-Directory ${CVSROOT_DIRNAME}/first-dir/sdir10 added to the repository
++Directory ${CVSROOT_DIRNAME}/first-dir/sdir10 put under version control
+ ${SPROG} add: use .${SPROG} commit. to add this file permanently"
+ 	  dotest errmsg2-11 "${testcvs} -q ci -m add-file10" \
+ "$CVSROOT_DIRNAME/first-dir/file10,v  <--  file10
+@@ -16219,7 +16334,7 @@
+ 	  cd ..
+ 	  mkdir first-dir/sdir10/ssdir
+ 	  dotest errmsg2-13 "${testcvs} add first-dir/sdir10/ssdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/sdir10/ssdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/sdir10/ssdir put under version control"
+ 
+ 	  touch first-dir/sdir10/ssdir/ssfile
+ 	  dotest errmsg2-14 \
+@@ -16360,7 +16475,7 @@
+ 	  dotest adderrmsg-init1 "${testcvs} -q co -l ." ''
+ 	  mkdir adderrmsg-dir
+ 	  dotest adderrmsg-init2 "${testcvs} add adderrmsg-dir" \
+-"Directory ${CVSROOT_DIRNAME}/adderrmsg-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/adderrmsg-dir put under version control"
+           cd adderrmsg-dir
+ 
+ 	  # try to add the admin dir
+@@ -16839,7 +16954,7 @@
+ 	  dotest watch4-0a "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest watch4-0b "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 
+ 	  cd first-dir
+ 	  dotest watch4-1 "${testcvs} watch on" ''
+@@ -16854,7 +16969,7 @@
+ 	  # Now test the analogous behavior for directories.
+ 	  mkdir subdir
+ 	  dotest watch4-4 "${testcvs} add subdir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/subdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/subdir put under version control"
+ 	  cd subdir
+ 	  touch sfile
+ 	  dotest watch4-5 "${testcvs} add sfile" \
+@@ -16945,7 +17060,7 @@
+ 	  dotest watch5-0a "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest watch5-0b "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 
+ 	  cd first-dir
+ 	  dotest watch5-1 "${testcvs} watch on" ''
+@@ -17125,7 +17240,7 @@
+ 	  dotest edit-check-0a "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest edit-check-0b "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 
+ 	  cd first-dir
+ 	  dotest edit-check-1 "$testcvs watch on"
+@@ -17243,7 +17358,7 @@
+ 
+             # Manually fake another editor:
+ 
+-            # Try to gaurantee a seperate name for an "other" user editting
++            # Try to guarantee a seperate name for an "other" user editing
+             # the file.
+           otherUser="dummyUser"
+           if [ x"$USER" = x"$otherUser" ]  ; then
+@@ -17374,7 +17489,7 @@
+ 
+           mkdir second-dir
+           dotest edit-check-32c "$testcvs add second-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir/second-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir/second-dir put under version control"
+           cd second-dir
+           echo ThirdFile >file3
+ 
+@@ -18770,7 +18885,7 @@
+ 	  dotest mwrap-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest mwrap-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch aa
+ 	  dotest mwrap-3 "${testcvs} add aa" \
+@@ -19180,7 +19295,7 @@
+     exit 0
+ else
+     echo "No BugId found."
+-    sleep 1
++    sleep 2
+     exit 1
+ fi
+ EOF
+@@ -19747,7 +19862,7 @@
+ 	  dotest taginfo-newfmt-8 "${testcvs} -q tag tag1" ""
+ 	  mkdir sdir
+ 	  dotest taginfo-newfmt-8b "${testcvs} -q add sdir" \
+-"Directory ${TESTDIR}/cvsroot/first-dir/sdir added to the repository"
++"Directory ${TESTDIR}/cvsroot/first-dir/sdir put under version control"
+ 	  touch sdir/file3
+ 	  dotest taginfo-newfmt-8c "${testcvs} -q add sdir/file3" \
+ "${SPROG} add: use .${SPROG} commit. to add this file permanently"
+@@ -20043,7 +20158,7 @@
+ new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
+ $SPROG commit: Rebuilding administrative file database"
+ 
+-	    sleep 1
++	    sleep 2
+ 	    echo '# noop' >> config
+ 	    dotest config-7 "$testcvs -q ci -mlog-commit" \
+ "$CVSROOT_DIRNAME/CVSROOT/config,v  <--  config
+@@ -21586,7 +21701,7 @@
+ 	  dotest logopt-1 "$testcvs -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest logopt-2 "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo hi >file1
+ 	  dotest logopt-3 "${testcvs} add file1" \
+@@ -21631,7 +21746,7 @@
+ 	  dotest ann-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest ann-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  cat >file1 <<EOF
+ this
+@@ -21811,7 +21926,7 @@
+ 	  module=x
+ 	  mkdir $module
+ 	  dotest ann-id-2 "${testcvs} add $module" \
+-"Directory ${CVSROOT_DIRNAME}/$module added to the repository"
++"Directory ${CVSROOT_DIRNAME}/$module put under version control"
+ 	  cd $module
+ 
+ 	  file=m
+@@ -21946,9 +22061,10 @@
+ 	    # can look up '..' and want to ask the user about the unknown host
+ 	    # key or somesuch.  Which error message we get depends on whether
+ 	    # false finishes running before we try to talk to it or not.
++	    # We don't even get to talk to it as of 1.12.13-MirOS-0AB8.2 tho.
+ 	    dotest_fail crerepos-6a "CVS_RSH=false ${testcvs} -q -d ../crerepos get ." \
+-"${SPROG} \[checkout aborted\]: end of file from server (consult above messages if any)" \
+-"${SPROG} \[checkout aborted\]: received broken pipe signal"
++"${SPROG} checkout: Missing or bad hostname in CVSROOT\.
++${SPROG} \[checkout aborted\]: Bad CVSROOT: .\.\./crerepos.\."
+ 	    cd ..
+ 	    rm -r 1
+ 
+@@ -21972,7 +22088,7 @@
+ 	  dotest crerepos-8 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest crerepos-9 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch file1
+ 	  dotest crerepos-10 "${testcvs} add file1" \
+@@ -21988,7 +22104,7 @@
+ 	  dotest crerepos-12 "$testcvs -d $CREREPOS_ROOT -q co -l ."
+ 	  mkdir crerepos-dir
+ 	  dotest crerepos-13 "$testcvs add crerepos-dir" \
+-"Directory $TESTDIR/crerepos/crerepos-dir added to the repository"
++"Directory $TESTDIR/crerepos/crerepos-dir put under version control"
+ 	  cd crerepos-dir
+ 	  touch cfile
+ 	  dotest crerepos-14 "${testcvs} add cfile" \
+@@ -22039,8 +22155,7 @@
+ 
+ 	  # Save the timezone and set it to UTC for these tests to make the
+ 	  # value more predicatable.
+-	  save_TZ=$TZ
+-	  TZ=UTC0; export TZ
++	  do_save_TZ
+ 
+ 	  modify_repo mkdir $CVSROOT_DIRNAME/first-dir
+ 
+@@ -22517,7 +22632,7 @@
+ revision 1\.4"
+ 
+ 	  dokeep
+-	  TZ=$save_TZ
++	  do_restore_TZ
+ 	  cd ..
+ 	  rm -r first-dir
+ 	  modify_repo rm -rf $CVSROOT_DIRNAME/first-dir
+@@ -22707,8 +22822,7 @@
+ 	  # revisions 1.1 and 1.1.1.1 differ by 1 second.
+ 
+ 	  # Need a predictable time zone.
+-	  save_TZ=$TZ
+-	  TZ=UTC0; export TZ
++	  do_save_TZ
+ 
+           mkdir rcs4
+           cd rcs4
+@@ -22766,7 +22880,7 @@
+    Sticky Options:	(none)'
+ 
+ 	  dokeep
+-	  TZ=$save_TZ
++	  do_restore_TZ
+ 	  cd ../..
+           rm -r rcs4
+           modify_repo rm -rf $CVSROOT_DIRNAME/rcs4-dir
+@@ -23087,11 +23201,11 @@
+ 	  dotest backuprecover-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest backuprecover-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 	  mkdir dir
+ 	  dotest backuprecover-3 "${testcvs} add dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir put under version control"
+ 	  touch file1 dir/file2
+ 	  dotest backuprecover-4 "${testcvs} -q add file1 dir/file2" \
+ "${SPROG} add: use \`${SPROG} commit' to add these files permanently"
+@@ -23348,7 +23462,7 @@
+           dotest sshstdio-1 "$testcvs -d $SSHSTDIO_ROOT -q co -l ."
+           mkdir first-dir
+           dotest sshstdio-2 "$testcvs add first-dir" \
+-  "Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++  "Directory $CVSROOT_DIRNAME/first-dir put under version control"
+           cd first-dir
+           a='aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa'
+           c='aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaacaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa'
+@@ -23497,7 +23611,7 @@
+ 	  dotest parseroot3-9 "$testcvs -Q co -ldtop ."
+ 	  dotest parseroot3-10 "test -d top"
+ 	  dotest parseroot3-11 "test -d top/CVS"
+-	  dotest parseroot3-10 "cat top/CVS/Root" "$CVSROOT"
++	  dotest parseroot3-12 "cat top/CVS/Root" "$CVSROOT"
+ 
+ 	  dokeep
+ 	  cd ..
+@@ -23526,16 +23640,17 @@
+ 	    continue
+ 	  fi
+ 
++	  # times have been tweaked so leap seconds don't matter
+ 	  cat <<EOF >$CVSROOT_DIRNAME/CVSROOT/history
+-O3395c677|anonymous|<remote>/*0|ccvs||ccvs
++O3395c684|anonymous|<remote>/*0|ccvs||ccvs
+ O3396c677|anonymous|<remote>/src|ccvs||src
+ O3397c677|kingdon|<remote>/*0|ccvs||ccvs
+ M339cafae|nk|<remote>|ccvs/src|1.229|sanity.sh
+-M339cafff|anonymous|<remote>|ccvs/src|1.23|Makefile
++M339cb00c|anonymous|<remote>|ccvs/src|1.23|Makefile
+ M339dc339|kingdon|~/work/*0|ccvs/src|1.231|sanity.sh
+ W33a6eada|anonymous|<remote>*4|ccvs/emx||Makefile.in
+ C3b235f50|kingdon|<remote>|ccvs/emx|1.3|README
+-M3b23af50|kingdon|~/work/*0|ccvs/doc|1.281|cvs.texinfo
++M3b23af62|kingdon|~/work/*0|ccvs/doc|1.281|cvs.texinfo
+ EOF
+ 
+ 	  dotest history-1 "${testcvs} history -e -a" \
+@@ -23691,7 +23806,7 @@
+ 	  dotest modes-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest modes-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch aa
+ 	  dotest modes-3 "${testcvs} add aa" \
+@@ -23817,7 +23932,7 @@
+ 	  dotest modes2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest modes2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch aa
+ 	  dotest modes2-3 "${testcvs} add aa" \
+@@ -23864,8 +23979,8 @@
+ 	  dotest modes3-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir second-dir
+ 	  dotest modes3-2 "${testcvs} add first-dir second-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository
+-Directory ${CVSROOT_DIRNAME}/second-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control
++Directory ${CVSROOT_DIRNAME}/second-dir put under version control"
+ 	  touch first-dir/aa second-dir/ab
+ 	  dotest modes3-3 "${testcvs} add first-dir/aa second-dir/ab" \
+ "${SPROG} add: scheduling file .first-dir/aa. for addition
+@@ -23944,7 +24059,7 @@
+ 	  dotest stamps-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest stamps-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  touch aa
+ 	  echo '$''Id$' >kw
+@@ -24073,7 +24188,7 @@
+ 	  dotest perms-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest perms-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  touch foo
+@@ -24115,7 +24230,7 @@
+ 	  dotest symlinks-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest symlinks-2 "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  dotest symlinks-2.1 "ln -s $TESTDIR/fumble slink"
+@@ -24158,7 +24273,7 @@
+ 	  dotest symlinks2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest symlinks2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo nonsymlink > slink
+ 	  dotest symlinks2-3 "${testcvs} add slink" \
+@@ -24196,7 +24311,7 @@
+ 	  dotest hardlinks-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest hardlinks-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  # Make up some ugly filenames, to test that they get
+@@ -24285,7 +24400,7 @@
+ 	  dotest sticky-1 "$testcvs -q co -l ."
+ 	  mkdir first-dir
+ 	  dotest sticky-2 "$testcvs add first-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  touch file1
+@@ -24390,7 +24505,7 @@
+ 	  dotest keyword-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest keyword-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 
+ 	  echo '$''Author$' > file1
+@@ -24595,7 +24710,7 @@
+ 	  dotest keywordlog-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest keywordlog-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 	  echo initial >file1
+ 	  dotest keywordlog-3 "${testcvs} add file1" \
+@@ -24852,7 +24967,7 @@
+ xx"
+ 
+ 	  cd ../CVSROOT
+-	  echo "MaxCommentLeaderLength=1k" >>config
++	  echo "MaxCommentLeaderLength=1K" >>config
+ 	  dotest keywordlog-35 "$testcvs -Q ci -mset-MaxCommentLeaderLength"
+ 
+ 	  cd ../first-dir
+@@ -24892,7 +25007,7 @@
+ 	  dotest keywordname-init-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest keywordname-init-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  echo '$'"Name$" >file1
+@@ -25012,7 +25127,7 @@
+ 	  dotest keyword2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest keyword2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 
+ 	  echo '$''Revision$' >> file1
+@@ -25214,7 +25329,7 @@
+ ${PLUS} modify on branch
+ ${PLUS} modify on branch after brtag"
+ 
+-	  # With a branch sticky tag, HEAD is the head of the trunk.
++	  # Even with a branch sticky tag, HEAD is the head of the trunk.
+ 	  dotest head-br1-setup "${testcvs} -q update -r br1" "[UP] file1"
+ 	  dotest head-br1-update "${testcvs} -q update -r HEAD -p file1" \
+ "imported contents
+@@ -25222,7 +25337,26 @@
+ add a line on trunk after trunktag"
+ 	  # But diff thinks that HEAD is "br1".  Case (b) from cvs.texinfo.
+ 	  # Probably people are relying on it.
+-	  dotest head-br1-diff "${testcvs} -q diff -c -r HEAD -r br1" ""
++	  #dotest head-br1-diff "${testcvs} -q diff -c -r HEAD -r br1" ""
++	  dotest head-br1-diffdot "${testcvs} -q diff -c -r .bhead -r br1" ""
++	  # Always. Fuck people relying on it.
++	  dotest_fail head-br1-diff "${testcvs} -q diff -c -r HEAD -r br1" \
++"Index: file1
++===================================================================
++RCS file: ${CVSROOT_DIRNAME}/first-dir/file1,v
++retrieving revision 1\.3
++retrieving revision 1\.3\.2\.2
++diff -c -r1\.3 -r1\.3\.2\.2
++\*\*\* file1	${RFCDATE}	1\.3
++--- file1	${RFCDATE}	1\.3\.2\.2
++\*\*\*\*\*\*\*\*\*\*\*\*\*\*\*
++\*\*\* 1,3 \*\*\*\*
++--- 1,5 ----
++  imported contents
++  add a line on trunk
++  add a line on trunk after trunktag
++${PLUS} modify on branch
++${PLUS} modify on branch after brtag"
+ 
+ 	  # With a nonbranch sticky tag on a branch,
+ 	  # HEAD is the head of the trunk
+@@ -25235,7 +25369,26 @@
+ 	  # CVS 1.9 and older thought that HEAD is "brtag" (this was
+ 	  # noted as "strange, maybe accidental").  But "br1" makes a
+ 	  # whole lot more sense.
+-	  dotest head-brtag-diff "${testcvs} -q diff -c -r HEAD -r br1" ""
++	  #dotest head-brtag-diff "${testcvs} -q diff -c -r HEAD -r br1" ""
++	  dotest head-brtag-diffdot "${testcvs} -q diff -c -r .bhead -r br1" ""
++	  # HEAD is always tip of the trunk.
++	  dotest_fail head-brtag-diff "${testcvs} -q diff -c -r HEAD -r br1" \
++"Index: file1
++===================================================================
++RCS file: ${CVSROOT_DIRNAME}/first-dir/file1,v
++retrieving revision 1\.3
++retrieving revision 1\.3\.2\.2
++diff -c -r1\.3 -r1\.3\.2\.2
++\*\*\* file1	${RFCDATE}	1\.3
++--- file1	${RFCDATE}	1\.3\.2\.2
++\*\*\*\*\*\*\*\*\*\*\*\*\*\*\*
++\*\*\* 1,3 \*\*\*\*
++--- 1,5 ----
++  imported contents
++  add a line on trunk
++  add a line on trunk after trunktag
++${PLUS} modify on branch
++${PLUS} modify on branch after brtag"
+ 
+ 	  # With a nonbranch sticky tag on the trunk, HEAD is the head
+ 	  # of the trunk, I think.
+@@ -25319,12 +25472,11 @@
+ 	  #		for checkout and update as well.
+ 	  #
+ 	  mkdir 1; cd 1
+-	  save_TZ=$TZ
+-	  TZ=UTC0; export TZ
++	  do_save_TZ
+ 	  dotest tagdate-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest tagdate-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  echo trunk-1 >file1
+@@ -25784,7 +25936,7 @@
+ 
+ 	  unset date_T1 date_T2 date_T3 date_T4 date_T5
+ 	  unset date_T6 date_T7 date_T8 date_T9
+-	  TZ=$save_TZ
++	  do_restore_TZ
+ 
+ 	  dokeep
+ 	  rm -r 1 2 3 4
+@@ -25802,7 +25954,7 @@
+ 	  dotest multibranch2-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest multibranch2-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+ 	  cd first-dir
+ 
+ 	  echo trunk-1 >file1
+@@ -26038,7 +26190,7 @@
+ 	  dotest admin-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest admin-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 
+ 	  dotest_fail admin-3 "${testcvs} -q admin -i file1" \
+@@ -27002,7 +27154,7 @@
+ 	  dotest reserved-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest reserved-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 	  touch file1
+ 	  dotest reserved-3 "${testcvs} add file1" \
+@@ -28061,18 +28213,18 @@
+ 	  dotest release-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest release-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 	  mkdir dir1
+ 	  dotest release-3 "${testcvs} add dir1" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 put under version control"
+ 	  mkdir dir2
+ 	  dotest release-4 "${testcvs} add dir2" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir2 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir2 put under version control"
+           cd dir2
+ 	  mkdir dir3
+ 	  dotest release-5 "${testcvs} add dir3" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir2/dir3 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir2/dir3 put under version control"
+ 
+           cd ../..
+ 	  dotest release-6 "${testcvs} release -d first-dir/dir2/dir3 first-dir/dir1" \
+@@ -28093,11 +28245,11 @@
+           cd first-dir
+ 	  mkdir dir1
+ 	  dotest release-10 "${testcvs} add dir1" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir1 put under version control"
+           cd dir2
+ 	  mkdir dir3
+ 	  dotest release-11 "${testcvs} add dir3" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir/dir2/dir3 added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir/dir2/dir3 put under version control"
+ 
+           cd ../..
+ 	  dotest release-12 "${testcvs} release first-dir/dir2/dir3 first-dir/dir1" \
+@@ -28148,7 +28300,7 @@
+           cd first-dir
+ 	  mkdir second-dir
+ 	  dotest release-18 "$testcvs add second-dir" \
+-"Directory $CVSROOT_DIRNAME/first-dir/second-dir added to the repository"
++"Directory $CVSROOT_DIRNAME/first-dir/second-dir put under version control"
+ 
+ 	  cd second-dir
+ 	  touch file1
+@@ -28756,8 +28908,34 @@
+ 	  testcvs2="$testcvs -d '$CVSROOT2'"
+ 
+ 	  dotest multiroot-setup-1 "mkdir $CVSROOT1_DIRNAME $CVSROOT2_DIRNAME"
++
+ 	  dotest multiroot-setup-2 "$testcvs1 init"
++	  # remove automatically-created LogHistory to work around the fact
++	  # that CVS does not track those per root (and thus warns about
++	  # encountering multiple of these entries)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot-setup-2a "$testcvs1 -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot-setup-2b "$testcvs1 -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
++
+ 	  dotest multiroot-setup-3 "$testcvs2 init"
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot-setup-3a "$testcvs2 -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot-setup-3b "$testcvs2 -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 
+ 	  #
+ 	  # create some directories in ${CVSROOT1_DIRNAME}
+@@ -28766,8 +28944,8 @@
+ 	  dotest multiroot-setup-4 "${testcvs1} co -l ." "${SPROG} checkout: Updating ."
+ 	  mkdir mod1-1 mod1-2
+ 	  dotest multiroot-setup-5 "${testcvs1} add mod1-1 mod1-2" \
+-"Directory ${CVSROOT1_DIRNAME}/mod1-1 added to the repository
+-Directory ${CVSROOT1_DIRNAME}/mod1-2 added to the repository"
++"Directory ${CVSROOT1_DIRNAME}/mod1-1 put under version control
++Directory ${CVSROOT1_DIRNAME}/mod1-2 put under version control"
+ 	  echo file1-1 > mod1-1/file1-1
+ 	  echo file1-2 > mod1-2/file1-2
+ 	  dotest multiroot-setup-6 "${testcvs1} add mod1-1/file1-1 mod1-2/file1-2" \
+@@ -28792,8 +28970,8 @@
+ 	  dotest multiroot-setup-8 "${testcvs2} co -l ." "${SPROG} checkout: Updating ."
+ 	  mkdir mod2-1 mod2-2
+ 	  dotest multiroot-setup-9 "${testcvs2} add mod2-1 mod2-2" \
+-"Directory ${CVSROOT2_DIRNAME}/mod2-1 added to the repository
+-Directory ${CVSROOT2_DIRNAME}/mod2-2 added to the repository"
++"Directory ${CVSROOT2_DIRNAME}/mod2-1 put under version control
++Directory ${CVSROOT2_DIRNAME}/mod2-2 put under version control"
+ 	  echo file2-1 > mod2-1/file2-1
+ 	  echo file2-2 > mod2-2/file2-2
+ 	  dotest multiroot-setup-6 "${testcvs2} add mod2-1/file2-1 mod2-2/file2-2" \
+@@ -29861,7 +30039,29 @@
+ 	  CVSROOT2=`newroot $CVSROOT2_DIRNAME`
+ 
+ 	  dotest multiroot2-1 "${testcvs} -d ${CVSROOT1} init" ""
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot2-1a "$testcvs -d ${CVSROOT1} -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot2-1b "$testcvs -d ${CVSROOT1} -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 	  dotest multiroot2-2 "${testcvs} -d ${CVSROOT2} init" ""
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot2-2a "$testcvs -d ${CVSROOT2} -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot2-2b "$testcvs -d ${CVSROOT2} -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 
+ 	  mkdir imp-dir; cd imp-dir
+ 	  echo file1 >file1
+@@ -30017,12 +30217,34 @@
+ 
+ 	  mkdir 1; cd 1
+ 	  dotest multiroot3-1 "${testcvs} -d ${CVSROOT1} init" ""
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot3-1a "$testcvs -d ${CVSROOT1} -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot3-1b "$testcvs -d ${CVSROOT1} -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 	  dotest multiroot3-2 "${testcvs} -d ${CVSROOT1} -q co -l ." ""
+ 	  mkdir dir1
+ 	  dotest multiroot3-3 "${testcvs} add dir1" \
+-"Directory ${TESTDIR}/root1/dir1 added to the repository"
++"Directory ${TESTDIR}/root1/dir1 put under version control"
+ 	  dotest multiroot3-4 "${testcvs} -d ${CVSROOT2} init" ""
+ 	  rm -r CVS
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot3-4a "$testcvs -d ${CVSROOT2} -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot3-4b "$testcvs -d ${CVSROOT2} -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 	  dotest multiroot3-5 "${testcvs} -d ${CVSROOT2} -q co -l ." ""
+ 	  mkdir dir2
+ 
+@@ -30037,7 +30259,7 @@
+ 	  echo "D/dir2////" >>CVS/Entries
+ 
+ 	  dotest multiroot3-7 "${testcvs} add dir2" \
+-"Directory ${TESTDIR}/root2/dir2 added to the repository"
++"Directory ${TESTDIR}/root2/dir2 put under version control"
+ 
+ 	  touch dir1/file1 dir2/file2
+ 	  if $remote; then
+@@ -30143,10 +30365,21 @@
+ 
+ 	  mkdir 1; cd 1
+ 	  dotest multiroot4-1 "${testcvs} -d ${CVSROOT1} init" ""
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot4-1a "$testcvs -d ${CVSROOT1} -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot4-1b "$testcvs -d ${CVSROOT1} -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 	  dotest multiroot4-2 "${testcvs} -d ${CVSROOT1} -q co -l ." ""
+ 	  mkdir dircom
+ 	  dotest multiroot4-3 "${testcvs} add dircom" \
+-"Directory ${TESTDIR}/root1/dircom added to the repository"
++"Directory ${TESTDIR}/root1/dircom put under version control"
+ 	  cd dircom
+ 	  touch file1
+ 	  dotest multiroot4-4 "${testcvs} add file1" \
+@@ -30158,10 +30391,21 @@
+ 	  cd ../..
+ 	  mkdir 2; cd 2
+ 	  dotest multiroot4-6 "${testcvs} -d ${CVSROOT2} init" ""
++	  # remove automatically-created LogHistory (see above)
++	  mkdir wrkarnd; cd wrkarnd
++	  dotest multiroot4-6a "$testcvs -d ${CVSROOT2} -q co CVSROOT" "[UP] CVSROOT${DOTSTAR}"
++	  cd CVSROOT
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
++	  dotest multiroot4-6b "$testcvs -d ${CVSROOT2} -q ci -m workaround-LogHistory" "" \
++".*/CVSROOT/config,v  <--  config
++new revision: 1\.[0-9]*; previous revision: 1\.[0-9]*
++$SPROG commit: Rebuilding administrative file database"
++	  cd ../..; rm -r wrkarnd
+ 	  dotest multiroot4-7 "${testcvs} -d ${CVSROOT2} -q co -l ." ""
+ 	  mkdir dircom
+ 	  dotest multiroot4-8 "${testcvs} add dircom" \
+-"Directory ${TESTDIR}/root2/dircom added to the repository"
++"Directory ${TESTDIR}/root2/dircom put under version control"
+ 	  cd dircom
+ 	  touch file2
+ 	  dotest multiroot4-9 "${testcvs} add file2" \
+@@ -30179,7 +30423,7 @@
+ 	  # repository) and so on would also look the same.
+ 	  mkdir sdir2
+ 	  dotest multiroot4-11 "${testcvs} -d ${CVSROOT2} add sdir2" \
+-"Directory ${TESTDIR}/root2/dircom/sdir2 added to the repository"
++"Directory ${TESTDIR}/root2/dircom/sdir2 put under version control"
+ 
+ 	  dotest multiroot4-12 "${testcvs} -q update" ""
+ 	  cd ..
+@@ -30208,7 +30452,7 @@
+ 	  dotest rmroot-setup-1 "${testcvs} -q co -l ." ''
+ 	  mkdir first-dir
+ 	  dotest rmroot-setup-2 "${testcvs} add first-dir" \
+-"Directory ${CVSROOT_DIRNAME}/first-dir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/first-dir put under version control"
+           cd first-dir
+ 	  touch file1 file2
+ 	  dotest rmroot-setup-3 "${testcvs} add file1 file2" \
+@@ -30383,7 +30627,7 @@
+ willfail:   :whocares
+ EOF
+ 	    dotest_fail pserver-3 "$servercvs pserver" \
+-"error 0 Server configuration missing --allow-root in inetd.conf" <<EOF
++"error 0 Server configuration missing --allow-root or --allow-root-regexp in inetd.conf" <<EOF
+ BEGIN AUTH REQUEST
+ $CVSROOT_DIRNAME
+ testme
+@@ -30391,6 +30635,26 @@
+ END AUTH REQUEST
+ EOF
+ 
++	    regexp='^'`dirname ${CVSROOT_DIRNAME}`'/[^/]+$'
++	    dotest pserver-3b "${testcvs} --allow-root-regexp=$regexp pserver" \
++"I LOVE YOU" <<EOF
++BEGIN AUTH REQUEST
++${CVSROOT_DIRNAME}
++testme
++Ay::'d
++END AUTH REQUEST
++EOF
++
++	    regexp='^'`dirname ${CVSROOT_DIRNAME}`'/[^/]+$'
++	    dotest_fail pserver-3c "${testcvs} --allow-root-regexp=$regexp pserver" \
++"$CPROG \\[pserver aborted\\]: ${CVSROOT_DIRNAME}/subdir: no such repository" <<EOF
++BEGIN AUTH REQUEST
++${CVSROOT_DIRNAME}/subdir
++testme
++Ay::'d
++END AUTH REQUEST
++EOF
++
+ 	    # Confirm that not sending a newline during auth cannot constitute
+ 	    # a denial-of-service attack.  This assumes that PATH_MAX is less
+ 	    # than 65536 bytes.  If PATH_MAX is larger than 65535 bytes, this
+@@ -30925,7 +31189,7 @@
+ EOF
+ 
+ 	    dotest server-9 "${servercvs} server" \
+-"E Protocol error; misformed Notify request
++"E Protocol error; malformed Notify request
+ error  " <<EOF
+ Root ${TESTDIR}/crerepos
+ Directory .
+@@ -31033,6 +31297,8 @@
+ EOF
+ 	    echo THIS-CONFIG-OPTION-IS-BAD=XXX >$TESTDIR/newconfig
+ 	    dotest_fail server-20 "$testcvs server -c $TESTDIR/newconfig" \
++"Usage: cvs server
++Normally invoked by a cvs client on a remote machine." \
+ "E $SPROG \[server aborted\]: Invalid path to config file specified: \`$TESTDIR/newconfig'" <<EOF
+ Root $TESTDIR/crerepos
+ Directory .
+@@ -31041,6 +31307,8 @@
+ EOF
+ 	    dotest_fail server-21 \
+ "$testcvs server -c /etc/cvs/this-shouldnt-exist" \
++"Usage: cvs server
++Normally invoked by a cvs client on a remote machine." \
+ "E $SPROG \[server aborted\]: Failed to resolve path: \`/etc/cvs/this-shouldnt-exist': No such file or directory" <<EOF
+ Root $TESTDIR/crerepos
+ Directory .
+@@ -31101,7 +31369,7 @@
+ noop
+ EOF
+ 
+-	    dotest 2-3 "${servercvs} server" \
++	    dotest server2-3 "${servercvs} server" \
+ "E protocol error: directory '${TESTDIR}' not within root '${CVSROOT_DIRNAME}'
+ error  " <<EOF
+ Root ${CVSROOT_DIRNAME}
+@@ -31123,6 +31391,20 @@
+ Unchanged foo/bar
+ noop
+ EOF
++
++	    dotest server2-5 \
++"${servercvs} --allow-root=${CVSROOT_DIRNAME}.bad server" \
++"E Bad root ${CVSROOT_DIRNAME}
++error  " <<EOF
++Root ${CVSROOT_DIRNAME}
++noop
++EOF
++	    dotest server2-6 \
++"${servercvs} --allow-root=${CVSROOT_DIRNAME} server" \
++"ok" <<EOF
++Root ${CVSROOT_DIRNAME}
++noop
++EOF
+ 	    servercvs=$save_servercvs
+ 	  fi
+ 	  ;;
+@@ -31301,7 +31583,7 @@
+ 	  #
+ 	  # Incidentally, I can reproduce this behavior with Linux 2.4.20 and
+ 	  # Bash 2.05 or Bash 2.05b.
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-10 "$testcvs update" \
+ "$CPROG update: Server attempted to update a file via an invalid pathname:
+ $CPROG \[update aborted\]: \`$HOME/.bashrc'\."
+@@ -31322,7 +31604,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-11 "$testcvs update" \
+ "$CPROG \[update aborted\]: patch original file \./\.bashrc does not exist"
+ 
+@@ -31342,7 +31624,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-12 "$testcvs update" \
+ "$CPROG update: Server attempted to update a file via an invalid pathname:
+ $CPROG \[update aborted\]: \`\.\./\.\./home/.bashrc'\."
+@@ -31362,7 +31644,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-13 "$testcvs update" \
+ "$CPROG update: Server attempted to update a file via an invalid pathname:
+ $CPROG \[update aborted\]: \`$HOME/.bashrc'\."
+@@ -31382,7 +31664,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-14 "$testcvs update" \
+ "$CPROG update: Server attempted to update a file via an invalid pathname:
+ $CPROG \[update aborted\]: \`\.\./\.\./home/.bashrc'\."
+@@ -31402,7 +31684,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-15 "$testcvs update" \
+ "$CPROG update: Server attempted to update a file via an invalid pathname:
+ $CPROG \[update aborted\]: \`$HOME/.bashrc'\."
+@@ -31422,7 +31704,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-16 "$testcvs update" \
+ "$CPROG update: Server attempted to update a file via an invalid pathname:
+ $CPROG \[update aborted\]: \`\.\./\.\./home/.bashrc'\."
+@@ -31446,7 +31728,7 @@
+ echo "ok"
+ cat >/dev/null
+ EOF
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-18 "$testcvs update" \
+ "$CPROG \[update aborted\]: protocol error: Copy-file tried to specify directory"
+ 
+@@ -31459,7 +31741,7 @@
+ 	  # Check that the client detects redirect loops.
+ 	  cat >$TESTDIR/serveme <<EOF
+ #!$TESTSHELL
+-echo "Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set Gssapi-authenticate expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version"
++echo "Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set Gssapi-authenticate expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version suck"
+ echo "ok"
+ echo "Redirect $CVSROOT"
+ 
+@@ -31467,7 +31749,7 @@
+ cat >/dev/null
+ EOF
+ 	  echo newstuff >file1
+-	  sleep 1
++	  sleep 2
+ 	  dotest_fail client-20 "$testcvs ci" \
+ "$CPROG commit: Examining \.
+ $CPROG \[commit aborted\]: \`Redirect' loop detected\.  Server misconfiguration$QUESTION"
+@@ -31709,7 +31991,7 @@
+ 	  cd second
+ 	  mkdir otherdir
+ 	  dotest template-add-1 "${testcvs} add otherdir" \
+-"Directory ${CVSROOT_DIRNAME}/second/otherdir added to the repository"
++"Directory ${CVSROOT_DIRNAME}/second/otherdir put under version control"
+ 	  if $remote; then
+ 	    dotest template-add-2r \
+ "cmp otherdir/CVS/Template ${TESTDIR}/template/temp.def" ''
+@@ -31845,6 +32127,7 @@
+ 	  SECONDARY_CVSROOT_save=$SECONDARY_CVSROOT
+ 	  SECONDARY_CVSROOT_DIRNAME=$TESTDIR/writeproxy_cvsroot
+ 	  SECONDARY_CVSROOT=`newroot $SECONDARY_CVSROOT_DIRNAME`
++	  write_secondary_wrapper
+ 
+ 	  # Initialize the primary repository
+ 	  dotest writeproxy-init-1 "$testcvs -d$PRIMARY_CVSROOT init"
+@@ -31856,6 +32139,10 @@
+ ALL (cat >/dev/null; echo %R) >$TESTDIR/referrer
+ ALL $RSYNC -gopr --delete $PRIMARY_CVSROOT_DIRNAME/ $SECONDARY_CVSROOT_DIRNAME
+ EOF
++	  # remove automatically-created LogHistory to work around the fact
++	  # that we see both writeproxy and primary config here
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
+ 	  cat >>config <<EOF
+ PrimaryServer=$PRIMARY_CVSROOT
+ EOF
+@@ -31868,7 +32155,7 @@
+ 	  save_CVS_SERVER=$CVS_SERVER
+ 	  ln -s $PRIMARY_CVSROOT_DIRNAME $TESTDIR/primary_link
+ 	  dotest writeproxy-0 "$CVS_SERVER server" \
+-"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version
++"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version suck
+ ok
+ ok
+ ok" \
+@@ -32021,6 +32308,7 @@
+ 	  PRIMARY_CVSROOT=$PRIMARY_CVSROOT_save
+ 	  SECONDARY_CVSROOT_DIRNAME=$SECONDARY_CVSROOT_DIRNAME_save
+ 	  SECONDARY_CVSROOT=$SECONDARY_CVSROOT_save
++	  write_secondary_wrapper
+ 	  ;;
+ 
+ 
+@@ -32054,10 +32342,11 @@
+ 	  PRIMARY_CVSROOT=`newroot $PRIMARY_CVSROOT_DIRNAME`
+ 	  SECONDARY_CVSROOT_DIRNAME_save=$SECONDARY_CVSROOT_DIRNAME
+ 	  SECONDARY_CVSROOT_DIRNAME=$TESTDIR/writeproxy_cvsroot
++	  write_secondary_wrapper
+ 
+ 	  # Initialize the primary repository
+ 	  dotest writeproxy-noredirect-init-1 \
+-"$testcvs -d'$PRIMARY_CVSROOT' init"
++"$testcvs -d'$PRIMARY_CVSROOT_DIRNAME' init"
+ 	  mkdir writeproxy-noredirect; cd writeproxy-noredirect
+ 	  mkdir primary; cd primary
+ 	  dotest writeproxy-noredirect-init-2 \
+@@ -32066,6 +32355,9 @@
+ 	  cat >>loginfo <<EOF
+ ALL $RSYNC -gopr --delete $PRIMARY_CVSROOT_DIRNAME/ $SECONDARY_CVSROOT_DIRNAME
+ EOF
++	  # remove automatically-created LogHistory (see above)
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
+ 	  cat >>config <<EOF
+ PrimaryServer=$PRIMARY_CVSROOT
+ EOF
+@@ -32088,7 +32380,7 @@
+ 
+ # No need to check the PID of the last client since we are testing with
+ # Redirect disabled.
+-proot_arg="--allow-root $SECONDARY_CVSROOT_DIRNAME"
++proot_arg="--allow-root ${PRIMARY_CVSROOT##*:} --allow-root $SECONDARY_CVSROOT_DIRNAME"
+ exec $servercvs \$proot_arg "\$@"
+ EOF
+ 	  cat <<EOF >$TESTDIR/writeproxy-primary-wrapper
+@@ -32152,7 +32444,7 @@
+ 	  mv $TESTDIR/save-root $PRIMARY_CVSROOT_DIRNAME
+ 
+ 	  dotest writeproxy-noredirect-5 "$CVS_SERVER server" \
+-"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version
++"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version suck
+ ok
+ ok
+ ok
+@@ -32184,7 +32476,7 @@
+ 	  cd firstdir
+ 	  echo now you see me >file1
+ 	  dotest writeproxy-noredirect-6 "$CVS_SERVER server" \
+-"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version
++"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version suck
+ ok
+ ok
+ ok
+@@ -32214,7 +32506,7 @@
+ 	  echo /file1/0/dummy+timestamp// >>CVS/Entries
+ 
+ 	  dotest writeproxy-noredirect-7 "$CVS_SERVER server" \
+-"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version
++"Valid-requests Root Valid-responses valid-requests Command-prep Referrer Repository Directory Relative-directory Max-dotdot Static-directory Sticky Entry Kopt Checkin-time Modified Is-modified UseUnchanged Unchanged Notify Hostname LocalDir Questionable Argument Argumentx Global_option Gzip-stream wrapper-sendme-rcsOptions Set ${DOTSTAR}expand-modules ci co update diff log rlog list rlist global-list-quiet ls add remove update-patches gzip-file-contents status rdiff tag rtag import admin export history release watch-on watch-off watch-add watch-remove watchers editors edit init annotate rannotate noop version suck
+ ok
+ ok
+ Mode u=rw,g=rw,o=r
+@@ -32287,6 +32579,7 @@
+ 	  PRIMARY_CVSROOT_DIRNAME=$PRIMARY_CVSROOT_DIRNAME_save
+ 	  PRIMARY_CVSROOT=$PRIMARY_CVSROOT_save
+ 	  SECONDARY_CVSROOT_DIRNAME=$SECONDARY_CVSROOT_DIRNAME_save
++	  write_secondary_wrapper
+ 	  ;;
+ 
+ 
+@@ -32327,9 +32620,10 @@
+ 
+ 	  # Set new roots.
+ 	  PRIMARY_CVSROOT_DIRNAME=$TESTDIR/primary_cvsroot
+-	  PRIMARY_CVSROOT=:ext:$host$PRIMARY_CVSROOT_DIRNAME
++	  PRIMARY_CVSROOT=:ext:$host:$PRIMARY_CVSROOT_DIRNAME
+ 	  SECONDARY_CVSROOT_DIRNAME=$TESTDIR/writeproxy_cvsroot
+-	  SECONDARY_CVSROOT=":ext;Redirect=yes:$host$SECONDARY_CVSROOT_DIRNAME"
++	  SECONDARY_CVSROOT=":ext;Redirect=yes:$host:$SECONDARY_CVSROOT_DIRNAME"
++	  write_secondary_wrapper
+ 
+ 	  # Initialize the primary repository
+ 	  dotest writeproxy-ssh-init-1 "$testcvs -d$PRIMARY_CVSROOT init"
+@@ -32343,6 +32637,9 @@
+ 	  cat >>loginfo <<EOF
+ ALL echo Referrer=%R; cat >/dev/null
+ EOF
++	  # remove automatically-created LogHistory (see above)
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
+ 	  cat >>config <<EOF
+ PrimaryServer=$PRIMARY_CVSROOT
+ EOF
+@@ -32391,6 +32688,7 @@
+ 	  PRIMARY_CVSROOT=$PRIMARY_CVSROOT_save
+ 	  SECONDARY_CVSROOT_DIRNAME=$SECONDARY_CVSROOT_DIRNAME_save
+ 	  SECONDARY_CVSROOT=$SECONDARY_CVSROOT_save
++	  write_secondary_wrapper
+ 	  ;;
+ 
+ 
+@@ -32426,9 +32724,10 @@
+ 
+ 	  # Set new roots.
+ 	  PRIMARY_CVSROOT_DIRNAME=$TESTDIR/primary_cvsroot
+-	  PRIMARY_CVSROOT=:ext:$host$PRIMARY_CVSROOT_DIRNAME
++	  PRIMARY_CVSROOT=:ext:$host:$PRIMARY_CVSROOT_DIRNAME
+ 	  SECONDARY_CVSROOT_DIRNAME=$TESTDIR/writeproxy_cvsroot
+-	  SECONDARY_CVSROOT=":ext;Redirect=no:$host$PRIMARY_CVSROOT_DIRNAME"
++	  SECONDARY_CVSROOT=":ext;Redirect=no:$host:$PRIMARY_CVSROOT_DIRNAME"
++	  write_secondary_wrapper
+ 
+ 	  # Initialize the primary repository
+ 	  dotest writeproxy-ssh-noredirect-init-1 \
+@@ -32444,6 +32743,9 @@
+ 	  cat >>loginfo <<EOF
+ ALL echo Referrer=%R; cat >/dev/null
+ EOF
++	  # remove automatically-created LogHistory (see above)
++	  sed -e '/^LogHistory/d' <config >tmpconfig
++	  mv tmpconfig config
+ 	  cat >>config <<EOF
+ PrimaryServer=$PRIMARY_CVSROOT
+ EOF
+@@ -32463,8 +32765,8 @@
+ 
+ # No need to check the PID of the last client since we are testing with
+ # Redirect disabled.
+-proot_arg="--allow-root=$SECONDARY_CVSROOT_DIRNAME"
+-exec $CVS_SERVER \$proot_arg "\$@"
++proot_arg="--allow-root ${PRIMARY_CVSROOT##*:} --allow-root=$SECONDARY_CVSROOT_DIRNAME"
++exec $CVS_SERVER_secondary_wrapper_orig \$proot_arg "\$@"
+ EOF
+ 	  cat <<EOF >$TESTDIR/writeproxy-primary-wrapper
+ #! $TESTSHELL
+@@ -32517,6 +32819,7 @@
+ 	  PRIMARY_CVSROOT=$PRIMARY_CVSROOT_save
+ 	  SECONDARY_CVSROOT_DIRNAME=$SECONDARY_CVSROOT_DIRNAME_save
+ 	  SECONDARY_CVSROOT=$SECONDARY_CVSROOT_save
++	  write_secondary_wrapper
+ 	  rm $TESTDIR/writeproxy-secondary-wrapper \
+ 	     $TESTDIR/writeproxy-primary-wrapper
+ 	  CVS_SERVER=$CVS_SERVER_save
+@@ -32836,7 +33139,7 @@
+   *-> walklist ( list=${PFMT}, proc=${PFMT}, closure=${PFMT} )
+   *-> walklist ( list=${PFMT}, proc=${PFMT}, closure=${PFMT} )
+   *-> walklist ( list=${PFMT}, proc=${PFMT}, closure=${PFMT} )
+-Directory ${CVSROOT_DIRNAME}/trace/subdir added to the repository" \
++Directory ${CVSROOT_DIRNAME}/trace/subdir put under version control" \
+ "
+   *callerdat=${PFMT}, argc=1, argv=${PFMT},
+   *direntproc=${PFMT}, dirleavproc=${PFMT},
+@@ -32868,7 +33171,7 @@
+   *-> walklist ( list=${PFMT}, proc=${PFMT}, closure=${PFMT} )
+   *-> walklist ( list=${PFMT}, proc=${PFMT}, closure=${PFMT} )
+   *-> walklist ( list=${PFMT}, proc=${PFMT}, closure=${PFMT} )
+-${DOTSTAR}Directory ${CVSROOT_DIRNAME}/trace/subdir added to the repository
++${DOTSTAR}Directory ${CVSROOT_DIRNAME}/trace/subdir put under version control
+ S -> CVS_SERVER_SLEEP not set\.
+ S -> Lock_Cleanup()
+ S -> Lock_Cleanup()
+@@ -35508,6 +35811,35 @@
+ 
+ 
+ 
++	suck)
++	  modify_repo mkdir $CVSROOT_DIRNAME/first-dir
++	  dotest suck-init-1 "$testcvs -Q co first-dir"
++
++	  cd first-dir
++	  ${AWK} 'BEGIN { for (i = 64; i < 96; i++) printf "%02x %c\n", i-64, i }' \
++	    </dev/null | ${TR} '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_' \
++	    '\000\001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037' \
++	    | ${TR} 'abcdef' 'ABCDEF' >alloctet.dat
++	  ${AWK} 'BEGIN { for (i = 32; i < 256; i++) printf "%02X %c\n", i, i }' \
++	    </dev/null >>alloctet.dat
++
++	  dotest suck-1 "$testcvs -Q add alloctet.dat"
++	  dotest suck-2 "$testcvs -Q ci -m added"
++
++	  cd ..
++
++	  dotest suck-3 "$testcvs -Q suck first-dir/alloctet.dat >commavs"
++	  echo "first-dir/alloctet.dat,v" >commavl
++	  cat $CVSROOT_DIRNAME/first-dir/alloctet.dat,v >>commavl
++	  dotest suck-eq "diff commavs commavl"
++
++	  dokeep
++	  rm -r first-dir commavs commavl
++	  modify_repo rm -rf $CVSROOT_DIRNAME/first-dir
++	  ;;
++
++
++
+ 	*)
+ 	   echo $what is not the name of a test -- ignored
+ 	   ;;
+@@ -35545,7 +35877,7 @@
+ 	    if cmp $file $TESTDIR/`basename $file`-clean >/dev/null 2>&1; then
+ 		:;
+ 	    else
+-		echo "\`$file' and \`$TESTDIR/`basename $file`-clean' differ." \
++		echo "'$file' and '$TESTDIR/`basename $file`-clean' differ." \
+ 		     >>$LOGFILE
+ 		problem=:
+ 	    fi
+@@ -35599,7 +35931,7 @@
+   extendedinfo="$extendedinfo)"
+ fi
+ 
+-echo "OK, all $passed tests passed$extendedinfo."
++echo "OK, all $passed tests passed$extendedinfo." | tee -a $LOGFILE
+ 
+ # TODO:
+ # * Test `cvs update -d foo' (where foo does not exist).
+--- cvs-1.12.13+real.orig/src/server.c
++++ cvs-1.12.13+real/src/server.c
+@@ -1,12 +1,18 @@
+-/* This program is free software; you can redistribute it and/or modify
+-   it under the terms of the GNU General Public License as published by
+-   the Free Software Foundation; either version 2, or (at your option)
+-   any later version.
+-
+-   This program is distributed in the hope that it will be useful,
+-   but WITHOUT ANY WARRANTY; without even the implied warranty of
+-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-   GNU General Public License for more details.  */
++/*
++ * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2005, 2010, 2011, 2013, 2016, 2017, 2021
++ *	mirabilos <m@mirbsd.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
+ 
+ #include "cvs.h"
+ 
+@@ -80,6 +86,13 @@
+ /* for select */
+ # include "xselect.h"
+ 
++/* for TCP_NODELAY */
++# include <netinet/tcp.h>
++
++# ifndef S_ISSOCK
++#   define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK)
++# endif
++
+ # ifndef O_NONBLOCK
+ #   define O_NONBLOCK O_NDELAY
+ # endif
+@@ -497,6 +510,7 @@
+ 
+ /* Allocate SIZE bytes for pending_error_text and return nonzero
+    if we could do it.  */
++static size_t alloc_pending_sz;
+ static inline int
+ alloc_pending_internal (char **dest, size_t size)
+ {
+@@ -506,6 +520,7 @@
+ 	pending_error = ENOMEM;
+ 	return 0;
+     }
++    alloc_pending_sz = size;
+     return 1;
+ }
+ 
+@@ -539,8 +554,8 @@
+ 
+ 
+ 
+-static int
+-supported_response (char *name)
++int
++supported_response (const char *name)
+ {
+     struct response *rs;
+ 
+@@ -677,6 +692,9 @@
+  */
+ static pid_t command_pid;
+ 
++static void outbuf_memory_error (struct buffer *)
++	__attribute__((__noreturn__));
++
+ static void
+ outbuf_memory_error (struct buffer *buf)
+ {
+@@ -700,6 +718,8 @@
+ }
+ 
+ 
++static void input_memory_error (struct buffer *)
++	__attribute__((__noreturn__));
+ 
+ static void
+ input_memory_error (struct buffer *buf)
+@@ -779,7 +799,7 @@
+     if (!ISABSOLUTE (arg))
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E Root %s must be an absolute pathname", arg);
+ 	return;
+     }
+@@ -794,7 +814,7 @@
+     if (current_parsed_root != NULL)
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E Protocol error: Duplicate Root request, for %s", arg);
+ 	return;
+     }
+@@ -815,7 +835,7 @@
+ 		/* The explicitness is to aid people who are writing clients.
+ 		   I don't see how this information could help an
+ 		   attacker.  */
+-		sprintf (pending_error_text, "\
++		snprintf(pending_error_text, alloc_pending_sz, "\
+ E Protocol error: Root says \"%s\" but pserver says \"%s\"",
+ 			 current_parsed_root->directory, Pserver_Repos);
+ 	    return;
+@@ -823,6 +843,14 @@
+     }
+ # endif
+ 
++    if (root_allow_used() && !root_allow_ok(arg))
++    {
++	if (alloc_pending (80 + strlen (arg)))
++	    snprintf(pending_error_text, alloc_pending_sz,
++		     "E Bad root %s", arg);
++	return;
++    }
++
+     /* For pserver, this will already have happened, and the call will do
+        nothing.  But for rsh, we need to do it now.  */
+     config = get_root_allow_config (current_parsed_root->directory,
+@@ -865,7 +893,7 @@
+ 	if (!ISABSOLUTE (get_cvs_tmp_dir ()))
+ 	{
+ 	    if (alloc_pending (80 + strlen (get_cvs_tmp_dir ())))
+-		sprintf (pending_error_text,
++		snprintf(pending_error_text, alloc_pending_sz,
+ 			 "E Value of %s for TMPDIR is not absolute",
+ 			 get_cvs_tmp_dir ());
+ 
+@@ -925,7 +953,7 @@
+ 	    if (status)
+ 	    {
+ 		if (alloc_pending (80 + strlen (server_temp_dir)))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ 			    "E can't create temporary directory %s",
+ 			    server_temp_dir);
+ 		pending_error = status;
+@@ -935,7 +963,7 @@
+ 	    {
+ 		int save_errno = errno;
+ 		if (alloc_pending (80 + strlen (server_temp_dir)))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ "E cannot change permissions on temporary directory %s",
+ 			     server_temp_dir);
+ 		pending_error = save_errno;
+@@ -945,7 +973,7 @@
+ 	    {
+ 		int save_errno = errno;
+ 		if (alloc_pending (80 + strlen (server_temp_dir)))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ "E cannot change to temporary directory %s",
+ 			     server_temp_dir);
+ 		pending_error = save_errno;
+@@ -976,7 +1004,7 @@
+ 
+ 	if (forced && !quiet
+ 	    && alloc_pending_warning (120 + strlen (program_name)))
+-	    sprintf (pending_warning_text,
++	    snprintf(pending_warning_text, alloc_pending_sz,
+ "E %s server: Forcing compression level %d (allowed: %d <= z <= %d).",
+ 		     program_name, gzip_level, config->MinCompressionLevel,
+ 		     config->MaxCompressionLevel);
+@@ -995,7 +1023,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (path)))
+-	    sprintf (pending_error_text, "E Cannot access %s", path);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E Cannot access %s", path);
+ 	pending_error = save_errno;
+     }
+     free (path);
+@@ -1060,7 +1089,7 @@
+     if (!ISABSOLUTE (repos))
+     {
+ 	if (alloc_pending (repos_len + 80))
+-	    sprintf (pending_error_text, "\
++	    snprintf(pending_error_text, alloc_pending_sz, "\
+ E protocol error: %s is not absolute", repos);
+ 	return 1;
+     }
+@@ -1072,7 +1101,7 @@
+ 	if (alloc_pending (strlen (current_parsed_root->directory)
+ 			   + strlen (repos)
+ 			   + 80))
+-	    sprintf (pending_error_text, "\
++	    snprintf(pending_error_text, alloc_pending_sz, "\
+ E protocol error: directory '%s' not within root '%s'",
+ 		     repos, current_parsed_root->directory);
+ 	return 1;
+@@ -1099,7 +1128,7 @@
+     {
+ 	if (alloc_pending (strlen (file)
+ 			   + 80))
+-	    sprintf (pending_error_text, "\
++	    snprintf(pending_error_text, alloc_pending_sz, "\
+ E protocol error: directory '%s' not within current directory",
+ 		     file);
+ 	return 1;
+@@ -1168,7 +1197,7 @@
+     if (ISABSOLUTE (dir))
+     {
+ 	if (alloc_pending (80 + strlen (dir)))
+-	    sprintf ( pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		      "E absolute pathnames invalid for server (specified `%s')",
+ 		      dir);
+ 	return;
+@@ -1176,7 +1205,7 @@
+     if (pathname_levels (dir) > max_dotdot_limit)
+     {
+ 	if (alloc_pending (80 + strlen (dir)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E protocol error: `%s' has too many ..", dir);
+ 	return;
+     }
+@@ -1191,7 +1220,7 @@
+ 	&& dir[dir_len - 1] == '/')
+     {
+ 	if (alloc_pending (80 + dir_len))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E protocol error: invalid directory syntax in %s", dir);
+ 	return;
+     }
+@@ -1222,7 +1251,8 @@
+ 	&& status != EEXIST)
+     {
+ 	if (alloc_pending (80 + strlen (gDirname)))
+-	    sprintf (pending_error_text, "E cannot mkdir %s", gDirname);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot mkdir %s", gDirname);
+ 	pending_error = status;
+ 	return;
+     }
+@@ -1237,7 +1267,8 @@
+     if (status != 0)
+     {
+ 	if (alloc_pending (80 + strlen (gDirname)))
+-	    sprintf (pending_error_text, "E cannot create_adm_p %s", gDirname);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot create_adm_p %s", gDirname);
+ 	pending_error = status;
+ 	return;
+     }
+@@ -1246,7 +1277,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (gDirname)))
+-	    sprintf (pending_error_text, "E cannot change to %s", gDirname);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot change to %s", gDirname);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1258,7 +1290,7 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (gDirname) + strlen (CVSADM)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E cannot mkdir %s/%s", gDirname, CVSADM);
+ 	pending_error = save_errno;
+ 	return;
+@@ -1274,7 +1306,7 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (gDirname) + strlen (CVSADM_REP)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E cannot open %s/%s", gDirname, CVSADM_REP);
+ 	pending_error = save_errno;
+ 	return;
+@@ -1283,7 +1315,7 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (gDirname) + strlen (CVSADM_REP)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E error writing %s/%s", gDirname, CVSADM_REP);
+ 	pending_error = save_errno;
+ 	fclose (f);
+@@ -1301,7 +1333,7 @@
+ 	{
+ 	    int save_errno = errno;
+ 	    if (alloc_pending (80 + strlen (gDirname) + strlen (CVSADM_REP)))
+-		sprintf (pending_error_text,
++		snprintf(pending_error_text, alloc_pending_sz,
+ 			 "E error writing %s/%s", gDirname, CVSADM_REP);
+ 	    pending_error = save_errno;
+ 	    fclose (f);
+@@ -1312,7 +1344,7 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (gDirname) + strlen (CVSADM_REP)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E error writing %s/%s", gDirname, CVSADM_REP);
+ 	pending_error = save_errno;
+ 	fclose (f);
+@@ -1322,7 +1354,7 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (gDirname) + strlen (CVSADM_REP)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E error closing %s/%s", gDirname, CVSADM_REP);
+ 	pending_error = save_errno;
+ 	return;
+@@ -1334,7 +1366,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_ENT)))
+-	    sprintf (pending_error_text, "E cannot open %s", CVSADM_ENT);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot open %s", CVSADM_ENT);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1342,7 +1375,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_ENT)))
+-	    sprintf (pending_error_text, "E cannot close %s", CVSADM_ENT);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot close %s", CVSADM_ENT);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1353,13 +1387,13 @@
+ static void
+ serve_repository (char *arg)
+ {
++    static const char msg[] = "E Repository request is obsolete; aborted";
+ # ifdef PROXY_SUPPORT
+     assert (!proxy_log);
+ # endif /* PROXY_SUPPORT */
+ 
+     if (alloc_pending (80))
+-	strcpy (pending_error_text,
+-		"E Repository request is obsolete; aborted");
++	memcpy(pending_error_text, msg, sizeof(msg));
+     return;
+ }
+ 
+@@ -1454,7 +1488,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_ENTSTAT)))
+-	    sprintf (pending_error_text, "E cannot open %s", CVSADM_ENTSTAT);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot open %s", CVSADM_ENTSTAT);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1462,7 +1497,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_ENTSTAT)))
+-	    sprintf (pending_error_text, "E cannot close %s", CVSADM_ENTSTAT);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot close %s", CVSADM_ENTSTAT);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1486,7 +1522,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_TAG)))
+-	    sprintf (pending_error_text, "E cannot open %s", CVSADM_TAG);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot open %s", CVSADM_TAG);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1494,7 +1531,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_TAG)))
+-	    sprintf (pending_error_text, "E cannot write to %s", CVSADM_TAG);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot write to %s", CVSADM_TAG);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1502,7 +1540,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_TAG)))
+-	    sprintf (pending_error_text, "E cannot close %s", CVSADM_TAG);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot close %s", CVSADM_TAG);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1565,7 +1604,8 @@
+ 	    {
+ 		int save_errno = errno;
+ 		if (alloc_pending (40))
+-		    strcpy (pending_error_text, "E unable to write");
++		    memcpy(pending_error_text, "E unable to write",
++		      sizeof("E unable to write"));
+ 		pending_error = save_errno;
+ 
+ 		/* Read and discard the file data.  */
+@@ -1604,7 +1644,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (40 + strlen (arg)))
+-	    sprintf (pending_error_text, "E cannot open %s", arg);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot open %s", arg);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1675,7 +1716,7 @@
+ 	if (gunzip_and_write (fd, file, (unsigned char *) filebuf, size))
+ 	{
+ 	    if (alloc_pending (80))
+-		sprintf (pending_error_text,
++		snprintf(pending_error_text, alloc_pending_sz,
+ 			 "E aborting due to compression error");
+ 	}
+ 	free (filebuf);
+@@ -1700,7 +1741,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (40 + strlen (arg)))
+-	    sprintf (pending_error_text, "E cannot close %s", arg);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot close %s", arg);
+ 	pending_error = save_errno;
+ 	return;
+     }
+@@ -1763,7 +1805,7 @@
+ 		 * the end of the string, so just exit.
+ 		 */
+ 		if (alloc_pending (80))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ 		             "E Malformed Entry encountered.");
+ 		return;
+ 	    }
+@@ -1807,7 +1849,7 @@
+ 	    if (kopt != NULL)
+ 	    {
+ 		if (alloc_pending (strlen (name) + 80))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ 			     "E protocol error: both Kopt and Entry for %s",
+ 			     arg);
+ 		free (kopt);
+@@ -1935,7 +1977,7 @@
+ 
+     if (read_size < 0 && alloc_pending (80))
+     {
+-	sprintf (pending_error_text,
++	snprintf(pending_error_text, alloc_pending_sz,
+ 		 "E client sent invalid (negative) file size");
+ 	return;
+     }
+@@ -1999,7 +2041,8 @@
+ 	{
+ 	    int save_errno = errno;
+ 	    if (alloc_pending (80 + strlen (arg)))
+-		sprintf (pending_error_text, "E cannot utime %s", arg);
++		snprintf(pending_error_text, alloc_pending_sz,
++		    "E cannot utime %s", arg);
+ 	    pending_error = save_errno;
+ 	    free (mode_text);
+ 	    return;
+@@ -2013,7 +2056,7 @@
+ 	if (status)
+ 	{
+ 	    if (alloc_pending (40 + strlen (arg)))
+-		sprintf (pending_error_text,
++		snprintf(pending_error_text, alloc_pending_sz,
+ 			 "E cannot change mode for %s", arg);
+ 	    pending_error = status;
+ 	    return;
+@@ -2077,7 +2120,7 @@
+ 		 * the end of the string, so just exit.
+ 		 */
+ 		if (alloc_pending (80))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ 		             "E Malformed Entry encountered.");
+ 		return;
+ 	    }
+@@ -2175,7 +2218,7 @@
+ 	if (!cp || *cp != '/')
+ 	{
+ 	    if (alloc_pending (80))
+-		sprintf (pending_error_text,
++		snprintf(pending_error_text, alloc_pending_sz,
+ 			 "E protocol error: Malformed Entry");
+ 	    return;
+ 	}
+@@ -2217,7 +2260,7 @@
+     if (kopt != NULL)
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E protocol error: duplicate Kopt request: %s", arg);
+ 	return;
+     }
+@@ -2230,7 +2273,7 @@
+     if (strlen (arg) > 10)
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E protocol error: invalid Kopt request: %s", arg);
+ 	return;
+     }
+@@ -2261,7 +2304,7 @@
+     if (checkin_time_valid)
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E protocol error: duplicate Checkin-time request: %s",
+ 		     arg);
+ 	return;
+@@ -2270,7 +2313,8 @@
+     if (!get_date (&t, arg, NULL))
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text, "E cannot parse date %s", arg);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot parse date %s", arg);
+ 	return;
+     }
+ 
+@@ -2305,7 +2349,8 @@
+ 	{
+ 	    int save_errno = errno;
+ 	    if (alloc_pending (80 + strlen (CVSADM_ENT)))
+-		sprintf (pending_error_text, "E cannot open %s", CVSADM_ENT);
++		snprintf(pending_error_text, alloc_pending_sz,
++		    "E cannot open %s", CVSADM_ENT);
+ 	    pending_error = save_errno;
+ 	}
+     }
+@@ -2317,7 +2362,7 @@
+ 	    {
+ 		int save_errno = errno;
+ 		if (alloc_pending (80 + strlen(CVSADM_ENT)))
+-		    sprintf (pending_error_text,
++		    snprintf(pending_error_text, alloc_pending_sz,
+ 			     "E cannot write to %s", CVSADM_ENT);
+ 		pending_error = save_errno;
+ 	    }
+@@ -2332,7 +2377,8 @@
+     {
+ 	int save_errno = errno;
+ 	if (alloc_pending (80 + strlen (CVSADM_ENT)))
+-	    sprintf (pending_error_text, "E cannot close %s", CVSADM_ENT);
++	    snprintf(pending_error_text, alloc_pending_sz,
++	      "E cannot close %s", CVSADM_ENT);
+ 	pending_error = save_errno;
+     }
+ }
+@@ -2350,6 +2396,7 @@
+     bool *pre = closure;
+ 
+     /* %c = cvs_cmd_name
++     * %I = commit ID
+      * %p = shortrepos
+      * %r = repository
+      */
+@@ -2367,6 +2414,7 @@
+ # endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+ 	                      filter,
+ 	                      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ 	                      "R", "s", referrer ? referrer->original : "NONE",
+ 	                      "p", "s", ".",
+ 	                      "r", "s", current_parsed_root->directory,
+@@ -2753,7 +2801,7 @@
+ 	{
+ # endif /* PROXY_SUPPORT */
+ 	    if (alloc_pending (160) + strlen (program_name))
+-		sprintf (pending_error_text, 
++		snprintf(pending_error_text, alloc_pending_sz, 
+ "E This CVS server does not support disconnected `%s edit'.  For now, remove all `%s' files in your workspace and try your command again.",
+ 			 program_name, CVSADM_NOTIFY);
+ 	return;
+@@ -2869,8 +2917,8 @@
+   error:
+     pending_error = 0;
+     if (alloc_pending (80))
+-	strcpy (pending_error_text,
+-		"E Protocol error; misformed Notify request");
++	snprintf(pending_error_text, alloc_pending_sz,
++		"E Protocol error; malformed Notify request");
+     if (data != NULL)
+ 	free (data);
+     if (new != NULL)
+@@ -2987,7 +3035,7 @@
+     if (argument_count >= 10000)
+     {
+ 	if (alloc_pending (80))
+-	    sprintf (pending_error_text, 
++	    snprintf(pending_error_text, alloc_pending_sz, 
+ 		     "E Protocol error: too many arguments");
+ 	return;
+     }
+@@ -3028,7 +3076,7 @@
+     if (argument_count <= 1) 
+     {
+ 	if (alloc_pending (80))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ "E Protocol error: called argumentx without prior call to argument");
+ 	return;
+     }
+@@ -3061,7 +3109,7 @@
+     {
+     error_return:
+ 	if (alloc_pending (strlen (arg) + 80))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E Protocol error: bad global option %s",
+ 		     arg);
+ 	return;
+@@ -3238,7 +3286,7 @@
+     if (gDirname == NULL)
+     {
+ 	if (alloc_pending (80))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ "E Protocol error: `Directory' missing");
+ 	return;
+     }
+@@ -3519,7 +3567,7 @@
+      * Therefore, we wish to avoid reprocessing the command since that would
+      * cause endless recursion.
+      */
+-    if (isProxyServer())
++    if ((command != version || current_parsed_root) && isProxyServer())
+     {
+ # ifdef PROXY_SUPPORT
+ 	if (reprocessing)
+@@ -3552,7 +3600,7 @@
+ 	if (lookup_command_attribute (cmd_name)
+ 		    & CVS_CMD_MODIFIES_REPOSITORY
+ 	    && alloc_pending (120))
+-	    sprintf (pending_error_text, 
++	    snprintf(pending_error_text, alloc_pending_sz, 
+ "E You need a CVS client that supports the `Redirect' response for write requests to this server.");
+ 	return;
+ # endif /* PROXY_SUPPORT */
+@@ -3716,7 +3764,7 @@
+ 	 * Set this in .bashrc if you want to give yourself time to attach
+ 	 * to the subprocess with a debugger.
+ 	 */
+-	if (getenv ("CVS_SERVER_SLEEP"))
++	if (getenv("CVS_SERVER_SLEEP") && *getenv("CVS_SERVER_SLEEP"))
+ 	{
+ 	    int secs = atoi (getenv ("CVS_SERVER_SLEEP"));
+ 	    TRACE (TRACE_DATA, "Sleeping CVS_SERVER_SLEEP (%d) seconds", secs);
+@@ -3922,7 +3970,11 @@
+ 	    {
+ 		FD_SET (stderr_pipe[0], &readfds);
+ 	    }
+-	    if (protocol_pipe[0] >= 0)
++	    if (protocol_pipe[0] >= 0
++#ifdef SERVER_FLOWCONTROL
++		&& !have_flowcontrolled
++#endif
++	       )
+ 	    {
+ 		FD_SET (protocol_pipe[0], &readfds);
+ 	    }
+@@ -4621,6 +4673,14 @@
+ 
+ 
+ static void
++serve_suck (char *arg)
++{
++  do_cvs_command ("suck", suck);
++}
++
++
++
++static void
+ serve_add (char *arg)
+ {
+     do_cvs_command ("add", add);
+@@ -4808,7 +4868,7 @@
+     if (!ISABSOLUTE (arg))
+     {
+ 	if (alloc_pending (80 + strlen (arg)))
+-	    sprintf (pending_error_text,
++	    snprintf(pending_error_text, alloc_pending_sz,
+ 		     "E init %s must be an absolute pathname", arg);
+     }
+ # ifdef AUTH_SERVER_SUPPORT
+@@ -4820,7 +4880,7 @@
+ 		/* The explicitness is to aid people who are writing clients.
+ 		   I don't see how this information could help an
+ 		   attacker.  */
+-		sprintf (pending_error_text, "\
++		snprintf(pending_error_text, alloc_pending_sz, "\
+ E Protocol error: init says \"%s\" but pserver says \"%s\"",
+ 			 arg, Pserver_Repos);
+ 	}
+@@ -5237,6 +5297,7 @@
+ 	{
+ 	    free (vers->ts_user);
+ 	    vers->ts_user = NULL;
++	    vers->ts_user_ists = 0;
+ 	}
+     }
+     else if (scratched_file == NULL && entries_line == NULL)
+@@ -5482,7 +5543,7 @@
+ 
+     if (forced && !quiet
+ 	&& alloc_pending_warning (120 + strlen (program_name)))
+-	sprintf (pending_warning_text,
++	snprintf(pending_warning_text, alloc_pending_sz,
+ "E %s server: Forcing compression level %d (allowed: %d <= z <= %d).",
+ 		 program_name, level, config->MinCompressionLevel,
+ 		 config->MaxCompressionLevel);
+@@ -5513,7 +5574,7 @@
+ 
+     if (forced && !quiet
+ 	&& alloc_pending_warning (120 + strlen (program_name)))
+-	sprintf (pending_warning_text,
++	snprintf(pending_warning_text, alloc_pending_sz,
+ "E %s server: Forcing compression level %d (allowed: %d <= z <= %d).",
+ 		 program_name, level, config->MinCompressionLevel,
+ 		 config->MaxCompressionLevel);
+@@ -5838,7 +5899,7 @@
+ 
+     if (!referrer
+ 	&& alloc_pending (80 + strlen (arg)))
+-	sprintf (pending_error_text,
++	snprintf(pending_error_text, alloc_pending_sz,
+ 		 "E Protocol error: Invalid Referrer: `%s'",
+ 		 arg);
+ }
+@@ -5856,7 +5917,7 @@
+ /*
+  * Parts of this table are shared with the client code,
+  * but the client doesn't need to know about the handler
+- * functions.
++ * functions. It likes to write to the flags field, though.
+  */
+ 
+ struct request requests[] =
+@@ -5962,6 +6023,7 @@
+   REQ_LINE("rannotate", serve_rannotate, 0),
+   REQ_LINE("noop", serve_noop, RQ_ROOTLESS),
+   REQ_LINE("version", serve_version, RQ_ROOTLESS),
++  REQ_LINE("suck", serve_suck, 0),
+   REQ_LINE(NULL, NULL, 0)
+ 
+ #undef REQ_LINE
+@@ -6271,8 +6333,12 @@
+ 
+ static const char *const server_usage[] =
+ {
++#ifdef ALLOW_CONFIG_OVERRIDE
+     "Usage: %s %s [-c config-file]\n",
+     "\t-c config-file\tPath to an alternative CVS config file.\n",
++#else
++    "Usage: %s %s\n",
++#endif
+     "Normally invoked by a cvs client on a remote machine.\n",
+     NULL
+ };
+@@ -6289,8 +6355,8 @@
+     {
+ 	switch (c)
+ 	{
+-#ifdef ALLOW_CONFIG_OVERRIDE
+ 	    case 'c':
++#ifdef ALLOW_CONFIG_OVERRIDE
+ 		if (gConfigPath) free (gConfigPath);
+ 		gConfigPath = xstrdup (optarg);
+ 		break;
+@@ -6319,7 +6385,7 @@
+      * Set this in .bashrc if you want to give yourself time to attach
+      * to the subprocess with a debugger.
+      */
+-    if (getenv ("CVS_PARENT_SERVER_SLEEP"))
++    if (getenv("CVS_PARENT_SERVER_SLEEP") && *getenv("CVS_PARENT_SERVER_SLEEP"))
+     {
+ 	int secs = atoi (getenv ("CVS_PARENT_SERVER_SLEEP"));
+ 	TRACE (TRACE_DATA, "Sleeping CVS_PARENT_SERVER_SLEEP (%d) seconds",
+@@ -6433,7 +6499,7 @@
+ 		    && current_parsed_root == NULL)
+ 		{
+ 		    if (alloc_pending (80))
+-			sprintf (pending_error_text,
++			snprintf(pending_error_text, alloc_pending_sz,
+ 				 "E Protocol error: Root request missing");
+ 		}
+ 		else
+@@ -6446,7 +6512,7 @@
+ 			 * been requested by the client.
+ 			 */
+ 			if (alloc_pending (80 + strlen (program_name)))
+-			    sprintf (pending_error_text,
++			    snprintf(pending_error_text, alloc_pending_sz,
+ "E %s [server aborted]: Compression must be used with this server.",
+ 				     program_name);
+ 		    }
+@@ -6671,6 +6737,22 @@
+ 
+ extern char *crypt (const char *, const char *);
+ 
++char *crypt_trad(const char *, const char *);
++
++char *
++crypt_trad(const char *key, const char *setting)
++{
++	char *rv;
++	static char buf[2];
++
++	if ((rv = crypt(key, setting)) == NULL) {
++		buf[0] = setting && (*setting == 'x') ? '*' : 'x';
++		buf[1] = '\0';
++		rv = buf;
++	}
++
++	return (rv);
++}
+ 
+ /*
+  * 0 means no entry found for this user.
+@@ -6799,7 +6881,7 @@
+ 
+ 	/* Verify blank passwords directly, otherwise use crypt(). */
+ 	if ((found_password == NULL)
+-	    || ((strcmp (found_password, crypt (password, found_password))
++	    || ((strcmp (found_password, crypt_trad (password, found_password))
+ 		 == 0)))
+ 	{
+ 	    /* Give host_user_ptr permanent storage. */
+@@ -6811,7 +6893,7 @@
+ #ifdef LOG_AUTHPRIV
+ 	syslog (LOG_AUTHPRIV | LOG_NOTICE,
+ 		"password mismatch for %s in %s: %s vs. %s", username,
+-		repository, crypt(password, found_password), found_password);
++		repository, crypt_trad(password, found_password), found_password);
+ #endif
+ 	    *host_user_ptr = NULL;
+ 	    retval	 = 2;
+@@ -6887,7 +6969,7 @@
+ static int
+ check_pam_password (char **username, char *password)
+ {
+-    int retval, err;
++    int retval;
+     struct pam_conv conv = { cvs_pam_conv, 0 };
+     char *pam_stage = "start";
+ 
+@@ -6930,7 +7012,7 @@
+ 
+     return retval == PAM_SUCCESS;       /* indicate success */
+ }
+-#endif
++#else /* !HAVE_PAM */
+ 
+ static int
+ check_system_password (char *username, char *password)
+@@ -6976,14 +7058,14 @@
+     if (*found_passwd)
+     {
+ 	/* user exists and has a password */
+-	if (strcmp (found_passwd, crypt (password, found_passwd)) == 0)
++	if (strcmp (found_passwd, crypt_trad (password, found_passwd)) == 0)
+ 	    return 1;
+ 	else
+ 	{
+ #ifdef LOG_AUTHPRIV
+ 	    syslog (LOG_AUTHPRIV | LOG_NOTICE,
+ 		    "password mismatch for %s: %s vs. %s", username,
+-		    crypt(password, found_passwd), found_passwd);
++		    crypt_trad(password, found_passwd), found_passwd);
+ #endif
+ 	    return 0;
+ 	}
+@@ -6996,6 +7078,7 @@
+ #endif
+     return 1;
+ }
++#endif /* !HAVE_PAM */
+ 
+ 
+ 
+@@ -7164,8 +7247,10 @@
+        if the client dies while we are waiting for input.  */
+     {
+ 	int on = 1;
++	struct stat sb;
+ 
+-	if (setsockopt (STDIN_FILENO, SOL_SOCKET, SO_KEEPALIVE,
++	if (fstat (STDIN_FILENO, &sb) == 0 && S_ISSOCK(sb.st_mode) &&
++	    setsockopt (STDIN_FILENO, SOL_SOCKET, SO_KEEPALIVE,
+ 			&on, sizeof on) < 0)
+ 	{
+ # ifdef HAVE_SYSLOG_H
+@@ -7175,6 +7260,23 @@
+     }
+ #endif
+ 
++#ifdef TCP_NODELAY
++    /* Avoid latency due to Nagle algorithm.  */
++    {
++	int on = 1;
++	struct stat sb;
++
++	if (fstat (STDOUT_FILENO, &sb) == 0 && S_ISSOCK(sb.st_mode) &&
++	    setsockopt (STDOUT_FILENO, IPPROTO_TCP, TCP_NODELAY,
++			&on, sizeof on) < 0)
++	{
++# ifdef HAVE_SYSLOG_H
++	    syslog (LOG_DAEMON | LOG_ERR, "error setting TCP_NODELAY: %m");
++# endif /* HAVE_SYSLOG_H */
++	}
++    }
++#endif
++
+     /* Make sure the protocol starts off on the right foot... */
+     pserver_read_line (&tmp, NULL);
+ 
+@@ -7317,8 +7419,10 @@
+        if the client dies while we are waiting for input.  */
+     {
+ 	int on = 1;
++	struct stat sb;
+ 
+-	if (setsockopt (STDIN_FILENO, SOL_SOCKET, SO_KEEPALIVE,
++	if (fstat (STDIN_FILENO, &sb) == 0 && S_ISSOCK(sb.st_mode) &&
++	    setsockopt (STDIN_FILENO, SOL_SOCKET, SO_KEEPALIVE,
+ 			   (char *) &on, sizeof on) < 0)
+ 	{
+ # ifdef HAVE_SYSLOG_H
+@@ -7328,6 +7432,23 @@
+     }
+ #endif
+ 
++#ifdef TCP_NODELAY
++    /* Avoid latency due to Nagle algorithm.  */
++    {
++	int on = 1;
++	struct stat sb;
++
++	if (fstat (STDOUT_FILENO, &sb) == 0 && S_ISSOCK(sb.st_mode) &&
++	    setsockopt (STDOUT_FILENO, IPPROTO_TCP, TCP_NODELAY,
++			   (char *) &on, sizeof on) < 0)
++	{
++# ifdef HAVE_SYSLOG_H
++	    syslog (LOG_DAEMON | LOG_ERR, "error setting TCP_NODELAY: %m");
++# endif /* HAVE_SYSLOG_H */
++	}
++    }
++#endif
++
+     status = krb_recvauth (KOPT_DO_MUTUAL, STDIN_FILENO, &ticket, "rcmd",
+ 			   instance, &peer, &laddr, &auth, "", sched,
+ 			   version);
+@@ -7611,6 +7732,12 @@
+ void
+ cvs_output (const char *str, size_t len)
+ {
++    cvs_output_ex (str, len, 'M');
++}
++
++void
++cvs_output_ex (const char *str, size_t len, int buftag)
++{
+     if (len == 0)
+ 	len = strlen (str);
+ #ifdef SERVER_SUPPORT
+@@ -7619,7 +7746,7 @@
+ 	if (buf_to_net)
+ 	{
+ 	    buf_output (saved_output, str, len);
+-	    buf_copy_lines (buf_to_net, saved_output, 'M');
++	    buf_copy_lines (buf_to_net, saved_output, buftag);
+ 	}
+ # if HAVE_SYSLOG_H
+ 	else
+@@ -7634,7 +7761,7 @@
+ 	if (protocol)
+ 	{
+ 	    buf_output (saved_output, str, len);
+-	    buf_copy_lines (protocol, saved_output, 'M');
++	    buf_copy_lines (protocol, saved_output, buftag);
+ 	    buf_send_counted (protocol);
+ 	}
+ # if HAVE_SYSLOG_H
+--- cvs-1.12.13+real.orig/src/server.h
++++ cvs-1.12.13+real/src/server.h
+@@ -1,3 +1,5 @@
++/* $MirOS: src/gnu/usr.bin/cvs/src/server.h,v 1.2 2017/11/18 23:04:57 tg Exp $ */
++
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
+  *
+@@ -161,7 +163,7 @@
+ struct request
+ {
+   /* Name of the request.  */
+-  char *name;
++  const char *name;
+ 
+ #ifdef SERVER_SUPPORT
+   /*
+--- cvs-1.12.13+real.orig/src/status.c
++++ cvs-1.12.13+real/src/status.c
+@@ -213,8 +213,11 @@
+ 	cvs_output ("   Working revision:\t", 0);
+ 	cvs_output (vers->vn_user, 0);
+ 
+-	/* Only add the UTC timezone if there is a time to use. */
+-	if (!server_active && strlen (vers->ts_rcs) > 0)
++	/* Only add the UTC timezone if there is a time to use.
++	 * ts_rcs sometimes contains only "=" character so we check len > 1 */
++	if (!server_active && strlen (vers->ts_rcs) > 1 &&
++	    /* prevent an ugly error message */
++	    strcmp(vers->ts_rcs, "Result of merge") != 0)
+ 	{
+ 	    /* Convert from the asctime() format to ISO 8601 */
+ 	    char *buf;
+--- cvs-1.12.13+real.orig/src/subr.c
++++ cvs-1.12.13+real/src/subr.c
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2006, 2007, 2011, 2017, 2021 mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -315,8 +316,12 @@
+ 	char *name;
+ 
+ 	/* super-user; try getlogin() to distinguish */
+-	if (((name = getlogin ()) || (name = getenv("LOGNAME")) ||
+-	     (name = getenv("USER"))) && *name)
++	name = getlogin();
++	if (!name || !*name)
++		name = getenv("LOGNAME");
++	if (!name || !*name)
++		name = getenv("USER");
++	if (name && *name)
+ 	{
+ 	    cache = xstrdup (name);
+ 	    return cache;
+@@ -795,7 +800,21 @@
+     return buf;
+ }
+ 
++static time_t
++sleep_past_chk(struct timespec *ts)
++{
++#ifdef HAVE_GETTIMEOFDAY
++	struct timeval tv;
+ 
++	gettimeofday(&tv, NULL);
++	ts->tv_sec = tv.tv_sec;
++	ts->tv_nsec = tv.tv_usec * 1000;
++#else
++	ts->tv_sec = time(NULL);
++	ts->tv_nsec = 0;
++#endif
++	return (ts->tv_sec);
++}
+ 
+ /*
+  * We can only travel forwards in time, not backwards.  :)
+@@ -803,41 +822,52 @@
+ void
+ sleep_past (time_t desttime)
+ {
+-    time_t t;
+-    long s;
+-    long us;
++	struct timespec t;
+ 
+-    while (time (&t) <= desttime)
+-    {
++	while (sleep_past_chk(&t) <= desttime) {
++		t.tv_sec = desttime - t.tv_sec;
+ #ifdef HAVE_GETTIMEOFDAY
+-	struct timeval tv;
+-	gettimeofday (&tv, NULL);
+-	if (tv.tv_sec > desttime)
+-	    break;
+-	s = desttime - tv.tv_sec;
+-	if (tv.tv_usec > 0)
+-	    us = 1000000 - tv.tv_usec;
+-	else
+-	{
+-	    s++;
+-	    us = 0;
+-	}
++		if (t.tv_nsec > 0)
++			t.tv_nsec = 1000000000L - t.tv_nsec;
++		else {
++			++t.tv_sec;
++			t.tv_nsec = 0;
++		}
+ #else
+-	/* default to 20 ms increments */
+-	s = desttime - t;
+-	us = 20000;
++		/* default to 20ms increments */
++		t.tv_nsec = 20000000L;
+ #endif
+-
+-	{
+-	    struct timespec ts;
+-	    ts.tv_sec = s;
+-	    ts.tv_nsec = us * 1000;
+-	    (void)nanosleep (&ts, NULL);
++		nanosleep(&t, NULL);
+ 	}
+-    }
++
++	/* sleep another 20ms to avoid races (LP#12230) */
++	/* so I’m not the only one whose clock can go backwards… */
++	t.tv_sec = 0;
++	t.tv_nsec = 20000000L;
++	nanosleep(&t, NULL);
+ }
+ 
++#ifdef HAVE_GETTIMEOFDAY
++/*
++ * Ensure time never travels backwards for us. :(
++ * This file is the only user of gettimeofday in all CVS,
++ * and everything else calls time always, so wrap it.
++ */
++time_t
++time(time_t *tp)
++{
++	register time_t t;
++	struct timeval tv;
++	static time_t lt = 0;
+ 
++	gettimeofday(&tv, NULL);
++	t = tv.tv_sec < lt ? lt : tv.tv_sec;
++	lt = t;
++	if (tp)
++		*tp = t;
++	return (t);
++}
++#endif
+ 
+ /* used to store callback data in a list indexed by the user format string
+  */
+@@ -1045,7 +1075,9 @@
+ 				 */
+     Node *p;
+     struct cmdline_bindings *b;
++#ifdef SUPPORT_OLD_INFO_FMT_STRINGS
+     static int warned_of_deprecation = 0;
++#endif
+     char key[] = "?";		/* Used as temporary storage for a single
+ 				 * character search string used to locate a
+ 				 * hash key.
+@@ -1285,7 +1317,7 @@
+ 	    		dellist(&pflist);
+ 	    		free(b);
+ 			error (1, 0,
+-"internal error:  unknown integer arg size (%d)",
++"internal error:  unknown integer arg size (%zd)",
+                                length);
+ 			break;
+ 		}
+@@ -1328,7 +1360,7 @@
+ 	    		dellist(&pflist);
+ 	    		free(b);
+ 			error (1, 0,
+-"internal error:  unknown floating point arg size (%d)",
++"internal error:  unknown floating point arg size (%zd)",
+                                length);
+ 			break;
+ 		}
+@@ -1704,7 +1736,7 @@
+ 			doff = d - buf;
+ 			expand_string (&buf, &length, doff + strlen(outstr));
+ 			d = buf + doff;
+-			strncpy(d, outstr, strlen(outstr));
++			memcpy(d, outstr, strlen(outstr));
+ 			d += strlen(outstr);
+ #ifdef SUPPORT_OLD_INFO_FMT_STRINGS
+ 			if (!onearg)
+@@ -1735,7 +1767,7 @@
+ 		    doff = d - buf;
+ 		    expand_string (&buf, &length, doff + strlen(srepos));
+ 		    d = buf + doff;
+-		    strncpy(d, srepos, strlen(srepos));
++		    memcpy(d, srepos, strlen(srepos));
+ 		    d += strlen(srepos);
+ 		}
+ #endif /* SUPPORT_OLD_INFO_FMT_STRINGS */
+--- cvs-1.12.13+real.orig/src/suck.c
++++ cvs-1.12.13+real/src/suck.c
+@@ -0,0 +1,140 @@
++/*-
++ * Copyright (c) 2011
++ *	mirabilos <m@mirbsd.org>
++ *
++ * Provided that these terms and disclaimer and all copyright notices
++ * are retained or reproduced in an accompanying document, permission
++ * is granted to deal in this work without restriction, including un-
++ * limited rights to use, publicly perform, distribute, sell, modify,
++ * merge, give away, or sublicence.
++ *
++ * This work is provided "AS IS" and WITHOUT WARRANTY of any kind, to
++ * the utmost extent permitted by applicable law, neither express nor
++ * implied; without malicious intent or gross negligence. In no event
++ * may a licensor, author or contributor be held liable for indirect,
++ * direct, other damage, loss, or other issues arising in any way out
++ * of dealing in the work, even if advised of the possibility of such
++ * damage or existence of a defect, except proven that it results out
++ * of said person's immediate fault when using the work as intended.
++ *-
++ * Download a ,v file from the repository
++ */
++
++#include "cvs.h"
++
++#ifdef HAVE_MMAP
++#include <sys/mman.h>
++
++#ifndef MAP_FILE
++#define MAP_FILE 0
++#endif
++
++#ifndef MAP_FAILED
++#define MAP_FAILED ((void *)-1)
++#endif
++#endif
++
++static const char * const suck_usage[] = {
++	"Usage: %s %s module/filename\n",
++	NULL
++};
++
++int
++suck(int argc, char *argv[])
++{
++	size_t m, n;
++	int fd;
++	char *buf, *cp, *fn;
++	struct stat sb;
++	FILE *fp;
++	RCSNode *rcs;
++
++	if (argc != 2)
++		usage(suck_usage);
++
++#ifdef CLIENT_SUPPORT
++	if (current_parsed_root->isremote) {
++		start_server();
++
++		if (!supported_request("suck"))
++			error(1, 0, "server does not support %s", "suck");
++
++		send_arg(argv[1]);
++		send_to_server("suck\012", 0);
++
++		return (get_responses_and_close());
++	}
++#endif
++
++	/* check for ../ attack */
++	if (pathname_levels(argv[1]) > 0)
++		error(1, 0, "path %s outside of repository", argv[1]);
++
++	/* repo + / + module/file */
++	cp = Xasprintf("%s/%s", current_parsed_root->directory, argv[1]);
++
++	/* find the slash */
++	if ((fn = cp + (last_component(cp) - cp)) == cp)
++		usage(suck_usage);
++
++	/* repo/module + file */
++	fn[-1] = '\0';
++
++	/* check if it's a valid RCS file, not /etc/passwd or somesuch */
++	if ((rcs = RCS_parse(fn, cp)) == NULL) {
++		error(1, 0, "not a valid RCS file: %s/%s", cp, fn);
++		return (1);
++	}
++
++	/* save the real pathname of the RCS file for later */
++	fn = xstrdup(rcs->path);
++
++	/* free up resources allocated until now */
++	freercsnode(&rcs);
++	free(cp);
++
++	/* attempt to open the file ourselves */
++	if ((fp = CVS_FOPEN(fn, FOPEN_BINARY_READ)) == NULL)
++		error(1, errno, "Could not open RCS archive %s", fn);
++	if (fstat(fd = fileno(fp), &sb) < 0)
++		error(1, errno, "Could not stat RCS archive %s", fn);
++
++	/*XXX this code will fail for large files */
++
++	/* attempt to slurp entire file into memory */
++#ifdef HAVE_MMAP
++	buf = mmap(NULL, sb.st_size, PROT_READ, MAP_PRIVATE, fd, 0);
++	if (buf == NULL || buf == MAP_FAILED) {
++		error(0, errno, "Could not map memory to RCS archive %s", fn);
++#endif
++	/* backup: just read */
++		cp = buf = xmalloc(n = sb.st_size);
++		while (n) {
++			m = read(fd, cp, n);
++			if (m == (size_t)-1)
++				error(1, errno,
++				    "Could not read RCS archive %s", fn);
++			cp += m;
++			n -= m;
++		}
++#ifdef HAVE_MMAP
++	}
++#endif
++
++	/* write real pathname plus newline as text */
++	cvs_output(fn + strlen(current_parsed_root->directory) + 1, 0);
++	cvs_output("\n", 1);
++
++	/* write file content as binary */
++	cvs_output_binary(buf, sb.st_size);
++
++	/* release all resources allocated */
++#ifdef HAVE_MMAP
++	munmap(buf, sb.st_size);
++#endif
++	fclose(fp);
++	free(fn);
++
++	/* success */
++	return (0);
++}
+--- cvs-1.12.13+real.orig/src/tag.c
++++ cvs-1.12.13+real/src/tag.c
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright (C) 1986-2005 The Free Software Foundation, Inc.
++ * Copyright (c) 2005, 2006, 2021 mirabilos <m@mirbsd.org>
+  *
+  * Portions Copyright (C) 1998-2005 Derek Price, Ximbiot <http://ximbiot.com>,
+  *                                  and others.
+@@ -310,6 +311,7 @@
+      * %b = branch mode = "?" (delete ops - unknown) | "T" (branch)
+      *                    | "N" (not branch)
+      * %c = cvs_cmd_name
++     * %I = commit ID
+      * %p = path from $CVSROOT
+      * %r = path from root
+      * %{sVv} = attribute list = file name, old version tag will be deleted
+@@ -333,6 +335,7 @@
+ 			      "b", "c", delete_flag
+ 			      ? '?' : branch_mode ? 'T' : 'N',
+ 			      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 			      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+@@ -747,6 +750,7 @@
+      * %b = branch mode = "?" (delete ops - unknown) | "T" (branch)
+      *                    | "N" (not branch)
+      * %c = cvs_cmd_name
++     * %I = commit ID
+      * %p = path from $CVSROOT
+      * %r = path from root
+      * %{sVv} = attribute list = file name, old version tag will be deleted
+@@ -770,6 +774,7 @@
+ 			      "b", "c", delete_flag
+ 			      ? '?' : branch_mode ? 'T' : 'N',
+ 			      "c", "s", cvs_cmd_name,
++			      "I", "s", global_session_id,
+ #ifdef SERVER_SUPPORT
+ 			      "R", "s", referrer ? referrer->original : "NONE",
+ #endif /* SERVER_SUPPORT */
+@@ -902,7 +907,7 @@
+ 	doff = d - *c->buf;
+ 	expand_string (c->buf, c->length, doff + strlen (arg));
+ 	d = *c->buf + doff;
+-	strncpy (d, arg, strlen (arg));
++	memcpy (d, arg, strlen (arg));
+ 	d += strlen (arg);
+ 
+ 	free (arg);
+@@ -1235,14 +1240,14 @@
+     else if (strcmp (version, "0") == 0)
+     {
+ 	if (!quiet)
+-	    error (0, 0, "couldn't tag added but un-commited file `%s'",
++	    error (0, 0, "couldn't tag added but un-committed file `%s'",
+ 	           finfo->file);
+ 	goto free_vars_and_return;
+     }
+     else if (version[0] == '-')
+     {
+ 	if (!quiet)
+-	    error (0, 0, "skipping removed but un-commited file `%s'",
++	    error (0, 0, "skipping removed but un-committed file `%s'",
+ 		   finfo->file);
+ 	goto free_vars_and_return;
+     }
+@@ -1450,6 +1455,7 @@
+  *   		2. If IDB is non-NULL and val-tags cannot be opened for write.
+  *   		   This allows callers to ignore the harmless inability to
+  *   		   update the val-tags cache.
++ *		3. If CVSREADONLYFS is set (same as #2 above).
+  *   false	If the file could be opened and the tag is not present.
+  */
+ static int is_in_val_tags (DBM **idb, const char *name)
+@@ -1459,6 +1465,10 @@
+     datum mytag;
+     int status;
+ 
++    /* do nothing if we know we fail anyway */
++    if (readonlyfs)
++      return 1;
++
+     /* Casting out const should be safe here - input datums are not
+      * written to by the myndbm functions.
+      */
+@@ -1580,7 +1590,7 @@
+  *     we are already there, or "" if we should do a W_LOCAL recursion.
+  *     Sorry for three cases, but the "" case is needed in case the
+  *     working directories come from diverse parts of the repository, the
+- *     NULL case avoids an unneccesary chdir, and the non-NULL, non-""
++ *     NULL case avoids an unnecessary chdir, and the non-NULL, non-""
+  *     case is needed for checkout, where we don't want to chdir if the
+  *     tag is found in CVSROOTADM_VALTAGS, but there is not (yet) any
+  *     local directory.
+--- cvs-1.12.13+real.orig/src/update.c
++++ cvs-1.12.13+real/src/update.c
+@@ -58,7 +58,7 @@
+ static int patch_file (struct file_info *finfo,
+                        Vers_TS *vers_ts, 
+                        int *docheckout, struct stat *file_info,
+-                       unsigned char *checksum);
++                       md5_uint32 *checksum);
+ static void patch_file_write (void *, const char *, size_t);
+ #endif
+ static int merge_file (struct file_info *finfo, Vers_TS *vers);
+@@ -723,7 +723,7 @@
+ 		{
+ 		    int docheckout;
+ 		    struct stat file_info;
+-		    unsigned char checksum[16];
++		    md5_uint32 checksum[4];
+ 
+ 		    retval = patch_file (finfo,
+ 					 vers, &docheckout,
+@@ -735,7 +735,8 @@
+ 					    (rcs_diff_patches
+ 					     ? SERVER_RCS_DIFF
+ 					     : SERVER_PATCHED),
+-					    file_info.st_mode, checksum,
++					    file_info.st_mode,
++					    (void *)checksum,
+ 					    NULL);
+ 			break;
+ 		    }
+@@ -1181,6 +1182,7 @@
+ 	{
+ 	    free (vers->ts_user);
+ 	    vers->ts_user = NULL;
++	    vers->ts_user_ists = 0;
+ 	}
+     }
+     return 0;
+@@ -1197,7 +1199,7 @@
+ {
+     char *backup;
+     int set_time, retval = 0;
+-    int status;
++    int status = 0;
+     int file_is_dead;
+     struct buffer *revbuf;
+ 
+@@ -1366,6 +1368,7 @@
+ 
+ 		if (xvers_ts->ts_user != NULL)
+ 		    free (xvers_ts->ts_user);
++		xvers_ts->ts_user_ists = 0; /*XXX really? */
+ 		xvers_ts->ts_user = xstrdup (xvers_ts->ts_rcs);
+ 	    }
+ 
+@@ -1511,7 +1514,7 @@
+  */
+ static int
+ patch_file (struct file_info *finfo, Vers_TS *vers_ts, int *docheckout,
+-	    struct stat *file_info, unsigned char *checksum)
++	    struct stat *file_info, md5_uint32 *checksum)
+ {
+     char *backup;
+     char *file1;
+--- cvs-1.12.13+real.orig/src/vers_ts.c
++++ cvs-1.12.13+real/src/vers_ts.c
+@@ -268,7 +268,10 @@
+ 	    time_stamp_server (finfo->file, vers_ts, entdata);
+ 	else
+ #endif
++	  {
+ 	    vers_ts->ts_user = time_stamp (finfo->file);
++	    vers_ts->ts_user_ists = 1;
++	  }
+     }
+ 
+     return (vers_ts);
+@@ -339,6 +342,7 @@
+     {
+         struct tm *tm_p;
+ 
++	vers_ts->ts_user_ists = 1;
+ 	vers_ts->ts_user = xmalloc (25);
+ 	/* We want to use the same timestamp format as is stored in the
+ 	   st_mtime.  For unix (and NT I think) this *must* be universal
+--- cvs-1.12.13+real.orig/src/version.c
++++ cvs-1.12.13+real/src/version.c
+@@ -16,6 +16,7 @@
+ 
+ #include "cvs.h"
+ 
++static const
+ #ifdef CLIENT_SUPPORT
+ #ifdef SERVER_SUPPORT
+ char *config_string = " (client/server)\n";
+@@ -81,4 +82,3 @@
+ #endif
+     return err;
+ }
+-	
+--- cvs-1.12.13+real.orig/src/watch.c
++++ cvs-1.12.13+real/src/watch.c
+@@ -459,7 +459,7 @@
+ 	    cvs_output (p++, 1);
+ 	if (*p == '\0')
+ 	{
+-	    /* Only happens if attribute is misformed.  */
++	    /* Only happens if attribute is malformed.  */
+ 	    cvs_output ("\n", 1);
+ 	    break;
+ 	}
+--- cvs-1.12.13+real.orig/src/wrapper.c
++++ cvs-1.12.13+real/src/wrapper.c
+@@ -86,7 +86,7 @@
+        move this to a per-connection data structure, or better yet
+        think about a cleaner solution.  */
+     static int wrap_setup_already_done = 0;
+-    char *homedir;
++    char *homedir = NULL;
+ 
+     if (wrap_setup_already_done != 0)
+         return;
+@@ -107,6 +107,11 @@
+ 	free (file);
+     }
+ 
++#ifdef SERVER_SUPPORT
++    if (!server_active)
++#endif
++    {
++
+     /* Then add entries found in home dir, (if user has one) and file
+        exists.  */
+     homedir = get_homedir ();
+@@ -115,6 +120,8 @@
+        hand it might be obnoxious to complain when CVS will function
+        just fine without .cvswrappers (and many users won't even know what
+        .cvswrappers is).  */
++    }
++
+     if (homedir != NULL)
+     {
+ 	char *file = strcat_filename_onto_homedir (homedir, CVSDOTWRAPPER);
+@@ -339,11 +346,19 @@
+     if (!line || line[0] == '#')
+ 	return;
+ 
++    /* Allows user to declare all wrappers null and void */
++    if (line[0] == '!') {
++      wrap_kill ();
++      return;
++    }
++
+     memset (&e, 0, sizeof(e));
+ 
+ 	/* Search for the wild card */
+     while (*line && isspace ((unsigned char) *line))
+ 	++line;
++    if (!*line)
++	return;
+     for (temp = line;
+ 	 *line && !isspace ((unsigned char) *line);
+ 	 ++line)
+--- cvs-1.12.13+real.orig/src/zlib.c
++++ cvs-1.12.13+real/src/zlib.c
+@@ -229,7 +229,7 @@
+ 	   would fetch all the available bytes, and at least one byte.  */
+ 
+ 	status = (*cb->buf->input) (cb->buf->closure, bd->text,
+-				    need, BUFFER_DATA_SIZE, &nread);
++				    need ? 1 : 0, BUFFER_DATA_SIZE, &nread);
+ 
+ 	if (status == -2)
+ 	    /* Don't try to recover from memory allcoation errors.  */
+--- cvs-1.12.13/configure.orig	2005-10-03 15:36:42.000000000 +0200
++++ cvs-1.12.13/configure	2022-10-23 14:36:34.653406085 +0200
+@@ -10582,7 +10582,7 @@
+   am_aux_dir=`cd $ac_aux_dir && pwd`
+ 
+   # getdate.y works with bison only.
+-  : ${YACC="\${SHELL} $am_aux_dir/bison-missing --run bison -y"}
++  : ${YACC="\${SHELL} $am_aux_dir/missing --run bison -y"}
+ 
+ 
+ 
diff --git a/patches/dante-1.4.2.local.patch b/patches/dante-1.4.3.local.patch
index 0a6c8c75..42916c1b 100644
--- a/patches/dante-1.4.2.local.patch
+++ b/patches/dante-1.4.3.local.patch
@@ -1,7 +1,16 @@
-diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
---- dante-1.4.2.orig/configure	2017-02-03 15:17:15.000000000 +0100
-+++ dante-1.4.2/configure	2018-08-04 19:01:29.524396348 +0200
-@@ -15341,10 +15341,8 @@
+diff -ru dante-1.4.3.orig/configure dante-1.4.3/configure
+--- dante-1.4.3.orig/configure	2021-04-30 21:29:06.000000000 +0200
++++ dante-1.4.3/configure	2024-02-22 00:14:19.279836011 +0100
+@@ -3314,8 +3314,6 @@
+ #NOTE: save CFLAGS; wish to compile without -O2 when debugging
+ oCFLAGS="$CFLAGS"
+ oLDFLAGS="$LDFLAGS"
+-unset CFLAGS
+-unset LDFLAGS
+ case `pwd` in
+   *\ * | *\	*)
+     { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Libtool does not cope well with whitespace in \`pwd\`" >&5
+@@ -15347,10 +15345,8 @@
  $as_echo_n "checking whether realloc with a NULL pointer calls malloc... " >&6; }
  if test "$cross_compiling" = yes; then :
  
@@ -14,7 +23,7 @@ diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
  else
    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
-@@ -16923,8 +16921,9 @@
+@@ -16929,8 +16925,9 @@
  { $as_echo "$as_me:${as_lineno-$LINENO}: checking read/send-side pipe system" >&5
  $as_echo_n "checking read/send-side pipe system... " >&6; }
  if test "$cross_compiling" = yes; then :
@@ -26,7 +35,7 @@ diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
  else
    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
-@@ -17226,13 +17225,10 @@
+@@ -17232,13 +17229,10 @@
   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for errorless select behavior with high timeouts" >&5
  $as_echo_n "checking for errorless select behavior with high timeouts... " >&6; }
   if test "$cross_compiling" = yes; then :
@@ -43,7 +52,7 @@ diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
  _ACEOF
  else
    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-@@ -23228,12 +23224,13 @@
+@@ -23234,12 +23228,13 @@
  
  #AC_CHECK_FUNCS will add HAVE_foo define as long as function exists,
  #check overselves as we only want define set if function is also working.
@@ -60,7 +69,7 @@ diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
  else
    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
-@@ -23286,8 +23283,9 @@
+@@ -23292,8 +23287,9 @@
  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for working sockatmark" >&5
  $as_echo_n "checking for working sockatmark... " >&6; }
  if test "$cross_compiling" = yes; then :
@@ -72,7 +81,7 @@ diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
  else
    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
-@@ -23888,8 +23886,9 @@
+@@ -23894,8 +23890,9 @@
  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for CLOCK_MONOTONIC clock_gettime() support" >&5
  $as_echo_n "checking for CLOCK_MONOTONIC clock_gettime() support... " >&6; }
  if test "$cross_compiling" = yes; then :
@@ -84,9 +93,10 @@ diff -ru dante-1.4.2.orig/configure dante-1.4.2/configure
  else
    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
  /* end confdefs.h.  */
-diff -ru dante-1.4.2.orig/dlib/Makefile.in dante-1.4.2/dlib/Makefile.in
---- dante-1.4.2.orig/dlib/Makefile.in	2017-02-03 15:17:27.000000000 +0100
-+++ dante-1.4.2/dlib/Makefile.in	2018-08-05 01:50:52.803073351 +0200
+Only in dante-1.4.3: configure.orig
+diff -ru dante-1.4.3.orig/dlib/Makefile.in dante-1.4.3/dlib/Makefile.in
+--- dante-1.4.3.orig/dlib/Makefile.in	2021-04-30 21:30:18.000000000 +0200
++++ dante-1.4.3/dlib/Makefile.in	2024-02-22 00:14:19.283169345 +0100
 @@ -409,7 +409,7 @@
  	../libscompat/pselect.c ../libscompat/setproctitle.c \
  	../libscompat/strlcpy.c ../libscompat/strvis.c \
@@ -96,3 +106,27 @@ diff -ru dante-1.4.2.orig/dlib/Makefile.in dante-1.4.2/dlib/Makefile.in
  libdsocks_la_LIBADD = @LIBDSCSRC@ @DLIBDEPS@ @LIBSCOMPAT@
  libdsocks_la_DEPENDENCIES = Makefile.am _reconf @LIBDSCSRC@ \
  	$(am__append_1)
+Only in dante-1.4.3/dlib: Makefile.in.orig
+diff -ru dante-1.4.3.orig/include/symbols_preload.txt dante-1.4.3/include/symbols_preload.txt
+--- dante-1.4.3.orig/include/symbols_preload.txt	2024-02-22 00:37:06.753086184 +0100
++++ dante-1.4.3/include/symbols_preload.txt	2024-02-22 00:37:21.979752748 +0100
+@@ -2,11 +2,9 @@
+ bind
+ bindresvport
+ connect
+-freehostent
+ getaddrinfo
+ gethostbyname
+ gethostbyname2
+-getipnodebyname
+ getpeername
+ getsockname
+ getsockopt
+@@ -16,7 +14,6 @@
+ recv
+ recvfrom
+ recvmsg
+-rresvport
+ send
+ sendmsg
+ sendto
diff --git a/patches/dbus-1.11.20.local.patch b/patches/dbus-1.11.20.local.patch
deleted file mode 100644
index 9d53ef2a..00000000
--- a/patches/dbus-1.11.20.local.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-diff -ru dbus-1.11.20.orig/bus/Makefile.in dbus-1.11.20/bus/Makefile.in
---- dbus-1.11.20.orig/bus/Makefile.in	2017-10-03 08:46:44.000000000 +0200
-+++ dbus-1.11.20/bus/Makefile.in	2017-10-10 01:13:19.263921202 +0200
-@@ -164,8 +164,8 @@
- 	$(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \
- 	$(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \
- 	$(am__DEPENDENCIES_1)
--dbus_daemon_DEPENDENCIES = $(top_builddir)/dbus/libdbus-1.la \
--	$(top_builddir)/dbus/libdbus-internal.la $(am__DEPENDENCIES_1) \
-+dbus_daemon_DEPENDENCIES = $(top_builddir)/dbus/libdbus-internal.la \
-+	$(top_builddir)/dbus/libdbus-1.la $(am__DEPENDENCIES_1) \
- 	$(am__DEPENDENCIES_2)
- AM_V_lt = $(am__v_lt_@AM_V@)
- am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
-@@ -182,8 +182,8 @@
- am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \
- 	$(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1)
- dbus_daemon_launch_helper_DEPENDENCIES =  \
--	$(top_builddir)/dbus/libdbus-1.la \
--	$(top_builddir)/dbus/libdbus-internal.la $(am__DEPENDENCIES_3)
-+	$(top_builddir)/dbus/libdbus-internal.la \
-+	$(top_builddir)/dbus/libdbus-1.la $(am__DEPENDENCIES_3)
- am__objects_4 =  \
- 	dbus_daemon_launch_helper_test-config-loader-expat.$(OBJEXT) \
- 	dbus_daemon_launch_helper_test-config-parser-common.$(OBJEXT) \
-@@ -196,8 +196,8 @@
- dbus_daemon_launch_helper_test_OBJECTS =  \
- 	$(am_dbus_daemon_launch_helper_test_OBJECTS)
- dbus_daemon_launch_helper_test_DEPENDENCIES =  \
--	$(top_builddir)/dbus/libdbus-1.la \
--	$(top_builddir)/dbus/libdbus-internal.la $(am__DEPENDENCIES_3)
-+	$(top_builddir)/dbus/libdbus-internal.la \
-+	$(top_builddir)/dbus/libdbus-1.la $(am__DEPENDENCIES_3)
- am__test_bus_SOURCES_DIST = activation.c activation.h \
- 	activation-exit-codes.h apparmor.c apparmor.h audit.c audit.h \
- 	bus.c bus.h config-loader-expat.c config-parser.c \
-@@ -223,8 +223,8 @@
- 	$(am__objects_5)
- test_bus_launch_helper_OBJECTS = $(am_test_bus_launch_helper_OBJECTS)
- test_bus_launch_helper_DEPENDENCIES =  \
--	$(top_builddir)/dbus/libdbus-1.la \
--	$(top_builddir)/dbus/libdbus-internal.la $(am__DEPENDENCIES_3)
-+	$(top_builddir)/dbus/libdbus-internal.la \
-+	$(top_builddir)/dbus/libdbus-1.la $(am__DEPENDENCIES_3)
- am_test_bus_system_OBJECTS = config-loader-expat.$(OBJEXT) \
- 	config-parser-common.$(OBJEXT) config-parser-trivial.$(OBJEXT) \
- 	utils.$(OBJEXT) test-system.$(OBJEXT)
-@@ -685,8 +685,8 @@
- 	main.c
- 
- dbus_daemon_LDADD = \
--	$(top_builddir)/dbus/libdbus-1.la	\
--	$(top_builddir)/dbus/libdbus-internal.la	\
-+	$(top_builddir)/dbus/libdbus-internal.la 	\
-+	$(top_builddir)/dbus/libdbus-1.la		\
- 	$(EFENCE)					\
- 	$(DBUS_BUS_LIBS)
- 
-@@ -709,8 +709,8 @@
- 	$(LAUNCH_HELPER_SOURCES)
- 
- dbus_daemon_launch_helper_LDADD = \
-+	$(top_builddir)/dbus/libdbus-internal.la \
- 	$(top_builddir)/dbus/libdbus-1.la \
--	$(top_builddir)/dbus/libdbus-internal.la	\
- 	$(DBUS_LAUNCHER_LIBS)
- 
- dbus_daemon_launch_helper_test_SOURCES = \
-diff -ru dbus-1.11.20.orig/dbus/dbus-sysdeps.h dbus-1.11.20/dbus/dbus-sysdeps.h
---- dbus-1.11.20.orig/dbus/dbus-sysdeps.h	2017-09-27 16:15:31.000000000 +0200
-+++ dbus-1.11.20/dbus/dbus-sysdeps.h	2017-10-10 01:24:40.402809152 +0200
-@@ -53,7 +53,7 @@
-  * DBusPollFD
-  */ 
- #ifdef HAVE_POLL
--#include <sys/poll.h>
-+#include <poll.h>
- #endif
- 
- #ifdef DBUS_WINCE
-diff -ru dbus-1.11.20.orig/dbus/dbus-sysdeps-unix.c dbus-1.11.20/dbus/dbus-sysdeps-unix.c
---- dbus-1.11.20.orig/dbus/dbus-sysdeps-unix.c	2017-10-02 10:41:48.000000000 +0200
-+++ dbus-1.11.20/dbus/dbus-sysdeps-unix.c	2017-10-10 01:24:57.590686601 +0200
-@@ -69,7 +69,7 @@
- #include <sys/uio.h>
- #endif
- #ifdef HAVE_POLL
--#include <sys/poll.h>
-+#include <poll.h>
- #endif
- #ifdef HAVE_BACKTRACE
- #include <execinfo.h>
-diff -ru dbus-1.11.20.orig/dbus/Makefile.in dbus-1.11.20/dbus/Makefile.in
---- dbus-1.11.20.orig/dbus/Makefile.in	2017-10-03 08:46:45.000000000 +0200
-+++ dbus-1.11.20/dbus/Makefile.in	2017-10-10 00:54:28.948451539 +0200
-@@ -250,7 +250,7 @@
- @DBUS_WIN_TRUE@am_libdbus_init_win_la_OBJECTS = dbus-init-win.lo
- libdbus_init_win_la_OBJECTS = $(am_libdbus_init_win_la_OBJECTS)
- @DBUS_WIN_TRUE@am_libdbus_init_win_la_rpath =
--libdbus_internal_la_DEPENDENCIES = $(am__DEPENDENCIES_1) libdbus-1.la
-+libdbus_internal_la_DEPENDENCIES = $(am__DEPENDENCIES_1)
- am__libdbus_internal_la_SOURCES_DIST = dbus-asv-util.c dbus-asv-util.h \
- 	dbus-auth-script.c dbus-auth-script.h dbus-auth-util.c \
- 	dbus-credentials-util.c dbus-mainloop.c dbus-mainloop.h \
-@@ -838,7 +838,7 @@
- 	$(dbus_res_ldflag) \
- 	$(NULL)
- 
--libdbus_internal_la_LIBADD = $(LIBDBUS_LIBS) libdbus-1.la
-+libdbus_internal_la_LIBADD = $(LIBDBUS_LIBS)
- @DBUS_WIN_TRUE@AM_CXXFLAGS = \
- @DBUS_WIN_TRUE@	$(CODE_COVERAGE_CXXFLAGS) \
- @DBUS_WIN_TRUE@	$(NULL)
-diff -Naur dbus-1.11.20.orig/Makefile.in dbus-1.11.20/Makefile.in
---- dbus-1.11.20.orig/Makefile.in       2017-10-03 00:46:44.000000000 -0600
-+++ dbus-1.11.20/Makefile.in    2017-12-07 10:56:37.853995935 -0700
-@@ -498,7 +498,7 @@
- top_build_prefix = @top_build_prefix@
- top_builddir = @top_builddir@
- top_srcdir = @top_srcdir@
--SUBDIRS = dbus bus tools test doc
-+SUBDIRS = dbus bus tools doc
- pkgconfigdir = $(libdir)/pkgconfig
- pkgconfig_DATA = dbus-1.pc
- cmakeconfigdir = $(libdir)/cmake/DBus1
---- dbus-1.11.20/test/Makefile.in.orig	2017-10-03 06:46:45.000000000 +0000
-+++ dbus-1.11.20/test/Makefile.in	2018-10-14 20:56:47.156000000 +0000
-@@ -2288,7 +2288,7 @@
- @DBUS_ENABLE_INSTALLED_TESTS_TRUE@		$(installable_tests); }
- 
- all-local: copy-config-local uninstalled-config-local
--	$(AM_V_at)$(MKDIR_P) -m700 XDG_RUNTIME_DIR
-+	$(AM_V_at)$(MKDIR_P) -m 700 XDG_RUNTIME_DIR
- 
- copy-config-local:
- 	$(AM_V_at)$(MKDIR_P) data/valid-config-files/session.d
diff --git a/patches/dbus_host-1.11.20.local.patch b/patches/dbus_host-1.11.20.local.patch
deleted file mode 100644
index 0d2da4f4..00000000
--- a/patches/dbus_host-1.11.20.local.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- dbus-1.11.20/test/Makefile.in.orig	2017-10-03 06:46:45.000000000 +0000
-+++ dbus-1.11.20/test/Makefile.in	2018-10-14 20:56:47.156000000 +0000
-@@ -2288,7 +2288,7 @@
- @DBUS_ENABLE_INSTALLED_TESTS_TRUE@		$(installable_tests); }
- 
- all-local: copy-config-local uninstalled-config-local
--	$(AM_V_at)$(MKDIR_P) -m700 XDG_RUNTIME_DIR
-+	$(AM_V_at)$(MKDIR_P) -m 700 XDG_RUNTIME_DIR
- 
- copy-config-local:
- 	$(AM_V_at)$(MKDIR_P) data/valid-config-files/session.d
diff --git a/patches/ed-1.18_pre.local.patch b/patches/ed-1.20_pre.local.patch
index ad5d95e0..624c9d12 100644
--- a/patches/ed-1.18_pre.local.patch
+++ b/patches/ed-1.20_pre.local.patch
@@ -1,12 +1,11 @@
 diff -ru ed-1.17.orig/configure ed-1.17/configure
 --- ed-1.17.orig/configure	2021-01-06 14:06:29.000000000 +0100
 +++ ed-1.17/configure	2021-01-13 12:29:03.995851327 +0100
-@@ -23,7 +23,7 @@
+@@ -23,7 +23,6 @@
  program_prefix=
  CC=gcc
  CPPFLAGS=
 -CFLAGS='-Wall -W -O2'
-+CFLAGS ?= '-Wall -W -O2'
  LDFLAGS=
  
  # checking whether we are using GNU C.
diff --git a/patches/elinks-0.15.0_pre.local.patch b/patches/elinks-0.15.0_pre.local.patch
index e57afb81..64b1684f 100644
--- a/patches/elinks-0.15.0_pre.local.patch
+++ b/patches/elinks-0.15.0_pre.local.patch
@@ -1,7 +1,26 @@
-diff -ru elinks-0.15.0.orig/configure elinks-0.15.0/configure
---- elinks-0.15.0.orig/configure	2021-12-24 20:57:15.000000000 +0100
-+++ elinks-0.15.0/configure	2022-01-01 15:57:15.992481385 +0100
-@@ -13347,59 +13347,9 @@
+--- elinks-0.15.0/configure.orig	2021-12-24 20:57:15.000000000 +0100
++++ elinks-0.15.0/configure	2023-03-27 08:37:42.627732227 +0200
+@@ -10345,18 +10345,10 @@
+ 			fi
+ 		fi
+ 
+-		       for ac_header in term.h
+-do :
+-  ac_fn_cxx_check_header_compile "$LINENO" "term.h" "ac_cv_header_term_h" "$ac_includes_default"
+-if test "x$ac_cv_header_term_h" = xyes
+-then :
++ac_cv_header_term_h=yes
+   printf "%s\n" "#define HAVE_TERM_H 1" >>confdefs.h
+  CONFIG_TERMINFO=yes
+-else $as_nop
+-  CONFIG_TERMINFO=no; break;
+-fi
+ 
+-done
+ 		if test "$CONFIG_TERMINFO" = yes; then
+ 			{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for setupterm in -ltinfo" >&5
+ printf %s "checking for setupterm in -ltinfo... " >&6; }
+@@ -13347,59 +13339,9 @@
  
  		chosen_ssl_library="GNUTLS"
  
diff --git a/patches/enchant-2.3.3_pre.local.patch b/patches/enchant-2.3.3_pre.local.patch
new file mode 100644
index 00000000..73ac0afb
--- /dev/null
+++ b/patches/enchant-2.3.3_pre.local.patch
@@ -0,0 +1,27 @@
+diff -ru enchant-2.3.3.orig/configure enchant-2.3.3/configure
+--- enchant-2.3.3.orig/configure	2022-04-16 15:58:24.000000000 +0000
++++ enchant-2.3.3/configure	2022-08-02 12:42:43.209993400 +0000
+@@ -8100,23 +8100,6 @@
+ ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ ac_compiler_gnu=$ac_cv_c_compiler_gnu
+ 
+-  if test x$ax_cxx_compile_cxx11_required = xtrue; then
+-    if test x$ac_success = xno; then
+-      as_fn_error $? "*** A compiler with support for C++11 language features is required." "$LINENO" 5
+-    fi
+-  fi
+-  if test x$ac_success = xno; then
+-    HAVE_CXX11=0
+-    { $as_echo "$as_me:${as_lineno-$LINENO}: No compiler with C++11 support was found" >&5
+-$as_echo "$as_me: No compiler with C++11 support was found" >&6;}
+-  else
+-    HAVE_CXX11=1
+-
+-$as_echo "#define HAVE_CXX11 1" >>confdefs.h
+-
+-  fi
+-
+-
+ 
+ ac_ext=mm
+ ac_cpp='$OBJCXXCPP $CPPFLAGS'
diff --git a/patches/ffmpeg-5.0.1.local.patch b/patches/ffmpeg-6.1.1.local.patch
index 67b0b541..ee0c91f7 100644
--- a/patches/ffmpeg-5.0.1.local.patch
+++ b/patches/ffmpeg-6.1.1.local.patch
@@ -1,17 +1,312 @@
-diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostproc/postprocess_template.c
---- ffmpeg-4.3.orig/libpostproc/postprocess_template.c  2020-06-15 20:54:24.000000000 +0200
-+++ ffmpeg-4.3/libpostproc/postprocess_template.c       2020-07-02 16:12:40.191351530 +0200
-@@ -440,7 +440,7 @@
+diff -ru ffmpeg-6.0.orig/libavcodec/x86/lpc_init.c ffmpeg-6.0/libavcodec/x86/lpc_init.c
+--- ffmpeg-6.0.orig/libavcodec/x86/lpc_init.c   2023-02-27 21:43:45.000000000 +0100
++++ ffmpeg-6.0/libavcodec/x86/lpc_init.c        2023-03-15 10:24:51.602248563 +0100
+@@ -45,9 +45,9 @@
+         x86_reg i = -len*sizeof(double);
+         if(j == lag-2) {
+             __asm__ volatile(
+-                "movsd    "MANGLE(pd_1)", %%xmm0    \n\t"
+-                "movsd    "MANGLE(pd_1)", %%xmm1    \n\t"
+-                "movsd    "MANGLE(pd_1)", %%xmm2    \n\t"
++                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm0    \n\t"
++                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm1    \n\t"
++                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm2    \n\t"
+                 "1:                                 \n\t"
+                 "movapd   (%2,%0), %%xmm3           \n\t"
+                 "movupd -8(%3,%0), %%xmm4           \n\t"
+@@ -76,8 +76,8 @@
+             );
+         } else {
+             __asm__ volatile(
+-                "movsd    "MANGLE(pd_1)", %%xmm0    \n\t"
+-                "movsd    "MANGLE(pd_1)", %%xmm1    \n\t"
++                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm0    \n\t"
++                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm1    \n\t"
+                 "1:                                 \n\t"
+                 "movapd   (%3,%0), %%xmm3           \n\t"
+                 "movupd -8(%4,%0), %%xmm4           \n\t"
+diff -ru ffmpeg-5.1.orig/libavcodec/x86/cabac.h ffmpeg-5.1/libavcodec/x86/cabac.h
+--- ffmpeg-5.1.orig/libavcodec/x86/cabac.h	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libavcodec/x86/cabac.h	2022-08-21 12:11:42.010806805 +0200
+@@ -145,12 +145,12 @@
+         "movzbl "statep"    , "ret"                                     \n\t"\
+         "mov    "range"     , "tmp"                                     \n\t"\
+         "and    $0xC0       , "range"                                   \n\t"\
+-        "movzbl "MANGLE(ff_h264_cabac_tables)"+"lps_off"("ret", "range", 2), "range" \n\t"\
++        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"lps_off"("ret", "range", 2), "range" \n\t"\
+         "sub    "range"     , "tmp"                                     \n\t"\
+         BRANCHLESS_GET_CABAC_UPDATE(ret, low, range, tmp)                    \
+-        "movzbl "MANGLE(ff_h264_cabac_tables)"+"norm_off"("range"), %%ecx    \n\t"\
++        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"norm_off"("range"), %%ecx    \n\t"\
+         "shl    %%cl        , "range"                                   \n\t"\
+-        "movzbl "MANGLE(ff_h264_cabac_tables)"+"mlps_off"+128("ret"), "tmp"  \n\t"\
++        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"mlps_off"+128("ret"), "tmp"  \n\t"\
+         "shl    %%cl        , "low"                                     \n\t"\
+         "mov    "tmpbyte"   , "statep"                                  \n\t"\
+         "test   "lowword"   , "lowword"                                 \n\t"\
+@@ -165,7 +165,7 @@
+         "shr    $15         , %%ecx                                     \n\t"\
+         "bswap  "tmp"                                                   \n\t"\
+         "shr    $15         , "tmp"                                     \n\t"\
+-        "movzbl "MANGLE(ff_h264_cabac_tables)"+"norm_off"(%%ecx), %%ecx \n\t"\
++        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"norm_off"(%%ecx), %%ecx \n\t"\
+         "sub    $0xFFFF     , "tmp"                                     \n\t"\
+         "neg    %%ecx                                                   \n\t"\
+         "add    $7          , %%ecx                                     \n\t"\
+@@ -190,7 +190,7 @@
+     void *tables;
+ 
+     __asm__ volatile(
+-        "lea    "MANGLE(ff_h264_cabac_tables)", %0      \n\t"
++        "lea    "LOCAL_MANGLE(ff_h264_cabac_tables)", %0      \n\t"
+         : "=&r"(tables)
+         : NAMED_CONSTRAINTS_ARRAY(ff_h264_cabac_tables)
+     );
+diff -ru ffmpeg-5.1.orig/libavcodec/x86/cavsdsp.c ffmpeg-5.1/libavcodec/x86/cavsdsp.c
+--- ffmpeg-5.1.orig/libavcodec/x86/cavsdsp.c	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libavcodec/x86/cavsdsp.c	2022-08-21 12:11:42.010806805 +0200
+@@ -61,9 +61,9 @@
+ #define QPEL_CAVSV1(A,B,C,D,E,F,OP,ADD, MUL1, MUL2) \
+         "movd (%0), "#F"            \n\t"\
+         "movq "#C", %%mm6           \n\t"\
+-        "pmullw "MANGLE(MUL1)", %%mm6\n\t"\
++        "pmullw "LOCAL_MANGLE(MUL1)", %%mm6\n\t"\
+         "movq "#D", %%mm7           \n\t"\
+-        "pmullw "MANGLE(MUL2)", %%mm7\n\t"\
++        "pmullw "LOCAL_MANGLE(MUL2)", %%mm7\n\t"\
+         "psllw $3, "#E"             \n\t"\
+         "psubw "#E", %%mm6          \n\t"\
+         "psraw $3, "#E"             \n\t"\
+@@ -76,7 +76,7 @@
+         "psubw "#B", %%mm6          \n\t"\
+         "psraw $1, "#B"             \n\t"\
+         "psubw "#A", %%mm6          \n\t"\
+-        "paddw "MANGLE(ADD)", %%mm6 \n\t"\
++        "paddw "LOCAL_MANGLE(ADD)", %%mm6 \n\t"\
+         "psraw $7, %%mm6            \n\t"\
+         "packuswb %%mm6, %%mm6      \n\t"\
+         OP(%%mm6, (%1), A, d)            \
+@@ -87,12 +87,12 @@
+         "movd (%0), "#F"            \n\t"\
+         "movq "#C", %%mm6           \n\t"\
+         "paddw "#D", %%mm6          \n\t"\
+-        "pmullw "MANGLE(MUL1)", %%mm6\n\t"\
++        "pmullw "LOCAL_MANGLE(MUL1)", %%mm6\n\t"\
+         "add %2, %0                 \n\t"\
+         "punpcklbw %%mm7, "#F"      \n\t"\
+         "psubw "#B", %%mm6          \n\t"\
+         "psubw "#E", %%mm6          \n\t"\
+-        "paddw "MANGLE(ADD)", %%mm6 \n\t"\
++        "paddw "LOCAL_MANGLE(ADD)", %%mm6 \n\t"\
+         "psraw $3, %%mm6            \n\t"\
+         "packuswb %%mm6, %%mm6      \n\t"\
+         OP(%%mm6, (%1), A, d)            \
+@@ -102,9 +102,9 @@
+ #define QPEL_CAVSV3(A,B,C,D,E,F,OP,ADD, MUL1, MUL2) \
+         "movd (%0), "#F"            \n\t"\
+         "movq "#C", %%mm6           \n\t"\
+-        "pmullw "MANGLE(MUL2)", %%mm6\n\t"\
++        "pmullw "LOCAL_MANGLE(MUL2)", %%mm6\n\t"\
+         "movq "#D", %%mm7           \n\t"\
+-        "pmullw "MANGLE(MUL1)", %%mm7\n\t"\
++        "pmullw "LOCAL_MANGLE(MUL1)", %%mm7\n\t"\
+         "psllw $3, "#B"             \n\t"\
+         "psubw "#B", %%mm6          \n\t"\
+         "psraw $3, "#B"             \n\t"\
+@@ -117,7 +117,7 @@
+         "psubw "#E", %%mm6          \n\t"\
+         "psraw $1, "#E"             \n\t"\
+         "psubw "#F", %%mm6          \n\t"\
+-        "paddw "MANGLE(ADD)", %%mm6 \n\t"\
++        "paddw "LOCAL_MANGLE(ADD)", %%mm6 \n\t"\
+         "psraw $7, %%mm6            \n\t"\
+         "packuswb %%mm6, %%mm6      \n\t"\
+         OP(%%mm6, (%1), A, d)            \
+@@ -187,7 +187,7 @@
+     int h=8;\
+     __asm__ volatile(\
+         "pxor %%mm7, %%mm7          \n\t"\
+-        "movq "MANGLE(ff_pw_5)", %%mm6\n\t"\
++        "movq "LOCAL_MANGLE(ff_pw_5)", %%mm6\n\t"\
+         "1:                         \n\t"\
+         "movq    (%0), %%mm0        \n\t"\
+         "movq   1(%0), %%mm2        \n\t"\
+@@ -213,7 +213,7 @@
+         "paddw %%mm3, %%mm5         \n\t"\
+         "psubw %%mm2, %%mm0         \n\t"\
+         "psubw %%mm5, %%mm1         \n\t"\
+-        "movq "MANGLE(ff_pw_4)", %%mm5\n\t"\
++        "movq "LOCAL_MANGLE(ff_pw_4)", %%mm5\n\t"\
+         "paddw %%mm5, %%mm0         \n\t"\
+         "paddw %%mm5, %%mm1         \n\t"\
+         "psraw $3, %%mm0            \n\t"\
+diff -ru ffmpeg-5.1.orig/libavcodec/x86/h264_cabac.c ffmpeg-5.1/libavcodec/x86/h264_cabac.c
+--- ffmpeg-5.1.orig/libavcodec/x86/h264_cabac.c	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libavcodec/x86/h264_cabac.c	2022-08-21 12:11:41.986806805 +0200
+@@ -56,7 +56,7 @@
+     void *tables;
+ 
+     __asm__ volatile(
+-        "lea   "MANGLE(ff_h264_cabac_tables)", %0      \n\t"
++        "lea   "LOCAL_MANGLE(ff_h264_cabac_tables)", %0      \n\t"
+         : "=&r"(tables)
+         : NAMED_CONSTRAINTS_ARRAY(ff_h264_cabac_tables)
+     );
+@@ -132,7 +132,7 @@
+     void *tables;
+ 
+     __asm__ volatile(
+-        "lea    "MANGLE(ff_h264_cabac_tables)", %0      \n\t"
++        "lea    "LOCAL_MANGLE(ff_h264_cabac_tables)", %0      \n\t"
+         : "=&r"(tables)
+         : NAMED_CONSTRAINTS_ARRAY(ff_h264_cabac_tables)
+     );
+@@ -161,7 +161,7 @@
+ #ifdef BROKEN_RELOCATIONS
+         "movzb %c14(%15, %q6), %6\n\t"
+ #else
+-        "movzb "MANGLE(ff_h264_cabac_tables)"+%c14(%6), %6\n\t"
++        "movzb "LOCAL_MANGLE(ff_h264_cabac_tables)"+%c14(%6), %6\n\t"
+ #endif
+         "add %11, %6                            \n\t"
+ 
+diff -ru ffmpeg-5.1.orig/libavcodec/x86/mlpdsp_init.c ffmpeg-5.1/libavcodec/x86/mlpdsp_init.c
+--- ffmpeg-5.1.orig/libavcodec/x86/mlpdsp_init.c	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libavcodec/x86/mlpdsp_init.c	2022-08-21 12:11:42.286806796 +0200
+@@ -47,21 +47,25 @@
+ 
+ #if HAVE_7REGS && HAVE_INLINE_ASM && HAVE_INLINE_ASM_NONLOCAL_LABELS
+ 
+-extern char ff_mlp_firorder_8;
+-extern char ff_mlp_firorder_7;
+-extern char ff_mlp_firorder_6;
+-extern char ff_mlp_firorder_5;
+-extern char ff_mlp_firorder_4;
+-extern char ff_mlp_firorder_3;
+-extern char ff_mlp_firorder_2;
+-extern char ff_mlp_firorder_1;
+-extern char ff_mlp_firorder_0;
++#ifndef ATTR_HIDDEN
++#define ATTR_HIDDEN __attribute__((visibility("hidden")))
++#endif
+ 
+-extern char ff_mlp_iirorder_4;
+-extern char ff_mlp_iirorder_3;
+-extern char ff_mlp_iirorder_2;
+-extern char ff_mlp_iirorder_1;
+-extern char ff_mlp_iirorder_0;
++extern char ATTR_HIDDEN ff_mlp_firorder_8;
++extern char ATTR_HIDDEN ff_mlp_firorder_7;
++extern char ATTR_HIDDEN ff_mlp_firorder_6;
++extern char ATTR_HIDDEN ff_mlp_firorder_5;
++extern char ATTR_HIDDEN ff_mlp_firorder_4;
++extern char ATTR_HIDDEN ff_mlp_firorder_3;
++extern char ATTR_HIDDEN ff_mlp_firorder_2;
++extern char ATTR_HIDDEN ff_mlp_firorder_1;
++extern char ATTR_HIDDEN ff_mlp_firorder_0;
++
++extern char ATTR_HIDDEN ff_mlp_iirorder_4;
++extern char ATTR_HIDDEN ff_mlp_iirorder_3;
++extern char ATTR_HIDDEN ff_mlp_iirorder_2;
++extern char ATTR_HIDDEN ff_mlp_iirorder_1;
++extern char ATTR_HIDDEN ff_mlp_iirorder_0;
+ 
+ static const void * const firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
+                                           &ff_mlp_firorder_2, &ff_mlp_firorder_3,
+diff -ru ffmpeg-5.1.orig/libavcodec/x86/vc1dsp_mmx.c ffmpeg-5.1/libavcodec/x86/vc1dsp_mmx.c
+--- ffmpeg-5.1.orig/libavcodec/x86/vc1dsp_mmx.c	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libavcodec/x86/vc1dsp_mmx.c	2022-08-21 12:11:42.010806805 +0200
+@@ -86,7 +86,7 @@
+     __asm__ volatile(\
+         "mov       $8, %%"FF_REG_c"        \n\t"\
+         LOAD_ROUNDER_MMX("%5")\
+-        "movq      "MANGLE(ff_pw_9)", %%mm6\n\t"\
++        "movq      "LOCAL_MANGLE(ff_pw_9)", %%mm6\n\t"\
+         "1:                                \n\t"\
+         "movd      0(%0   ), %%mm3         \n\t"\
+         "movd      4(%0   ), %%mm4         \n\t"\
+@@ -147,8 +147,8 @@
+      MOVQ "*4+"A1", %%mm2       \n\t"                           \
+      UNPACK("%%mm1")                                            \
+      UNPACK("%%mm2")                                            \
+-     "pmullw    "MANGLE(ff_pw_3)", %%mm1\n\t"                   \
+-     "pmullw    "MANGLE(ff_pw_3)", %%mm2\n\t"                   \
++     "pmullw    "LOCAL_MANGLE(ff_pw_3)", %%mm1\n\t"                   \
++     "pmullw    "LOCAL_MANGLE(ff_pw_3)", %%mm2\n\t"                   \
+      MOVQ "*0+"A2", %%mm3       \n\t"                           \
+      MOVQ "*4+"A2", %%mm4       \n\t"                           \
+      UNPACK("%%mm3")                                            \
+@@ -192,8 +192,8 @@
+     src -= src_stride;                                                  \
+     __asm__ volatile(                                                       \
+         LOAD_ROUNDER_MMX("%5")                                          \
+-        "movq      "MANGLE(ff_pw_53)", %%mm5\n\t"                       \
+-        "movq      "MANGLE(ff_pw_18)", %%mm6\n\t"                       \
++        "movq      "LOCAL_MANGLE(ff_pw_53)", %%mm5\n\t"                       \
++        "movq      "LOCAL_MANGLE(ff_pw_18)", %%mm6\n\t"                       \
+         ".p2align 3                \n\t"                                \
+         "1:                        \n\t"                                \
+         MSPEL_FILTER13_CORE(DO_UNPACK, "movd  1", A1, A2, A3, A4)       \
+@@ -249,15 +249,15 @@
+     rnd -= (-4+58+13-3)*256; /* Add -256 bias */                        \
+     __asm__ volatile(                                                       \
+         LOAD_ROUNDER_MMX("%4")                                          \
+-        "movq      "MANGLE(ff_pw_18)", %%mm6   \n\t"                    \
+-        "movq      "MANGLE(ff_pw_53)", %%mm5   \n\t"                    \
++        "movq      "LOCAL_MANGLE(ff_pw_18)", %%mm6   \n\t"                    \
++        "movq      "LOCAL_MANGLE(ff_pw_53)", %%mm5   \n\t"                    \
+         ".p2align 3                \n\t"                                \
+         "1:                        \n\t"                                \
+         MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4)      \
+         NORMALIZE_MMX("$7")                                             \
+         /* Remove bias */                                               \
+-        "paddw     "MANGLE(ff_pw_128)", %%mm3  \n\t"                    \
+-        "paddw     "MANGLE(ff_pw_128)", %%mm4  \n\t"                    \
++        "paddw     "LOCAL_MANGLE(ff_pw_128)", %%mm3  \n\t"                    \
++        "paddw     "LOCAL_MANGLE(ff_pw_128)", %%mm4  \n\t"                    \
+         TRANSFER_DO_PACK(OP)                                            \
+         "add       $24, %1         \n\t"                                \
+         "add       %3, %2          \n\t"                                \
+@@ -288,8 +288,8 @@
+     rnd = 32-rnd;                                                       \
+     __asm__ volatile (                                                      \
+         LOAD_ROUNDER_MMX("%6")                                          \
+-        "movq      "MANGLE(ff_pw_53)", %%mm5       \n\t"                \
+-        "movq      "MANGLE(ff_pw_18)", %%mm6       \n\t"                \
++        "movq      "LOCAL_MANGLE(ff_pw_53)", %%mm5       \n\t"                \
++        "movq      "LOCAL_MANGLE(ff_pw_18)", %%mm6       \n\t"                \
+         ".p2align 3                \n\t"                                \
+         "1:                        \n\t"                                \
+         MSPEL_FILTER13_CORE(DO_UNPACK, "movd   1", A1, A2, A3, A4)      \
+diff -ru ffmpeg-5.1.orig/libavutil/x86/asm.h ffmpeg-5.1/libavutil/x86/asm.h
+--- ffmpeg-5.1.orig/libavutil/x86/asm.h	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libavutil/x86/asm.h	2022-08-21 12:11:41.786806812 +0200
+@@ -100,7 +100,11 @@
+ #endif
+ 
+ /* Use to export labels from asm. */
++#ifndef __midipix__
+ #define LABEL_MANGLE(a) EXTERN_PREFIX #a
++#else
++#define LABEL_MANGLE(a) #a
++#endif
+ 
+ // Use rip-relative addressing if compiling PIC code on x86-64.
+ #if ARCH_X86_64 && defined(PIC)
+diff -ru ffmpeg-5.1.orig/libpostproc/postprocess_template.c ffmpeg-5.1/libpostproc/postprocess_template.c
+--- ffmpeg-5.1.orig/libpostproc/postprocess_template.c	2022-07-22 19:58:39.000000000 +0200
++++ ffmpeg-5.1/libpostproc/postprocess_template.c	2022-08-21 12:11:41.774806812 +0200
+@@ -441,7 +441,7 @@
          "paddusb %%mm0, %%mm0                   \n\t"
          "psubusb %%mm0, %%mm4                   \n\t"
          "pcmpeqb %%mm7, %%mm4                   \n\t" // d <= QP ? -1 : 0
 -        "psubusb "MANGLE(b01)", %%mm3           \n\t"
 +        "psubusb "LOCAL_MANGLE(b01)", %%mm3     \n\t"
          "pand %%mm4, %%mm3                      \n\t" // d <= QP ? d : 0
-
+ 
          PAVGB(%%mm7, %%mm3)                           // d/2
-@@ -620,7 +620,7 @@
-
+@@ -621,7 +621,7 @@
+ 
          PMINUB(%%mm2, %%mm1, %%mm4)                   // MIN(|lenergy|,|renergy|)/8
          "movq %2, %%mm4                         \n\t" // QP //FIXME QP+1 ?
 -        "paddusb "MANGLE(b01)", %%mm4           \n\t"
@@ -19,16 +314,16 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "pcmpgtb %%mm3, %%mm4                   \n\t" // |menergy|/8 < QP
          "psubusb %%mm1, %%mm3                   \n\t" // d=|menergy|/8-MIN(|lenergy|,|renergy|)/8
          "pand %%mm4, %%mm3                      \n\t"
-@@ -643,7 +643,7 @@
+@@ -644,7 +644,7 @@
          "pand %%mm0, %%mm3                      \n\t"
          PMINUB(%%mm5, %%mm3, %%mm0)
-
+ 
 -        "psubusb "MANGLE(b01)", %%mm3           \n\t"
 +        "psubusb "LOCAL_MANGLE(b01)", %%mm3     \n\t"
          PAVGB(%%mm7, %%mm3)
-
+ 
          "movq (%%"FF_REG_a", %1, 2), %%mm0      \n\t"
-@@ -675,7 +675,7 @@
+@@ -676,7 +676,7 @@
          "movq (%%"FF_REG_a", %1), %%mm3         \n\t" // l2
          "pxor %%mm6, %%mm2                      \n\t" // -l5-1
          "movq %%mm2, %%mm5                      \n\t" // -l5-1
@@ -37,7 +332,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "lea (%%"FF_REG_a", %1, 4), %%"FF_REG_c"\n\t"
          PAVGB(%%mm3, %%mm2)                           // (l2-l5+256)/2
          PAVGB(%%mm0, %%mm4)                           // ~(l4-l3)/4 + 128
-@@ -687,7 +687,7 @@
+@@ -688,7 +688,7 @@
          "pxor %%mm6, %%mm2                      \n\t" // -l1-1
          PAVGB(%%mm3, %%mm2)                           // (l2-l1+256)/2
          PAVGB((%0), %%mm1)                            // (l0-l3+256)/2
@@ -46,7 +341,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          PAVGB(%%mm2, %%mm3)                           // ~(l2-l1)/4 + 128
          PAVGB(%%mm1, %%mm3)                           // ~(l0-l3)/4 +(l2-l1)/8 + 128
          PAVGB(%%mm2, %%mm3)                           // ~(l0-l3)/8 +5(l2-l1)/16 + 128
-@@ -697,14 +697,14 @@
+@@ -698,14 +698,14 @@
          "movq (%%"FF_REG_c", %1, 2), %%mm1      \n\t" // l7
          "pxor %%mm6, %%mm1                      \n\t" // -l7-1
          PAVGB((%0, %1, 4), %%mm1)                     // (l4-l7+256)/2
@@ -56,7 +351,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          PAVGB(%%mm1, %%mm2)                           // ~(l4-l7)/4 +(l6-l5)/8 + 128
          PAVGB(%%mm5, %%mm2)                           // ~(l4-l7)/8 +5(l6-l5)/16 + 128
  // mm0=128-q, mm2=renergy/16 + 128, mm3=lenergy/16 + 128, mm4= menergy/16 + 128
-
+ 
 -        "movq "MANGLE(b00)", %%mm1              \n\t" // 0
 -        "movq "MANGLE(b00)", %%mm5              \n\t" // 0
 +        "movq "LOCAL_MANGLE(b00)", %%mm1        \n\t" // 0
@@ -64,18 +359,18 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "psubb %%mm2, %%mm1                     \n\t" // 128 - renergy/16
          "psubb %%mm3, %%mm5                     \n\t" // 128 - lenergy/16
          PMAXUB(%%mm1, %%mm2)                          // 128 + |renergy/16|
-@@ -713,7 +713,7 @@
-
+@@ -714,7 +714,7 @@
+ 
  // mm0=128-q, mm3=128 + MIN(|lenergy|,|renergy|)/16, mm4= menergy/16 + 128
-
+ 
 -        "movq "MANGLE(b00)", %%mm7              \n\t" // 0
 +        "movq "LOCAL_MANGLE(b00)", %%mm7        \n\t" // 0
          "movq %2, %%mm2                         \n\t" // QP
          PAVGB(%%mm6, %%mm2)                           // 128 + QP/2
          "psubb %%mm6, %%mm2                     \n\t"
-@@ -727,13 +727,13 @@
+@@ -728,13 +728,13 @@
  // mm0=128-q, mm1= SIGN(menergy), mm2= |menergy|/16 < QP/2, mm4= d/16
-
+ 
          "movq %%mm4, %%mm3                      \n\t" // d
 -        "psubusb "MANGLE(b01)", %%mm4           \n\t"
 +        "psubusb "LOCAL_MANGLE(b01)", %%mm4     \n\t"
@@ -83,26 +378,13 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          PAVGB(%%mm7, %%mm4)                           // (d + 32)/64
          "paddb %%mm3, %%mm4                     \n\t" // 5d/64
          "pand %%mm2, %%mm4                      \n\t"
-
+ 
 -        "movq "MANGLE(b80)", %%mm5              \n\t" // 128
 +        "movq "LOCAL_MANGLE(b80)", %%mm5        \n\t" // 128
          "psubb %%mm0, %%mm5                     \n\t" // q
          "paddsb %%mm6, %%mm5                    \n\t" // fix bad rounding
          "pcmpgtb %%mm5, %%mm7                   \n\t" // SIGN(q)
-@@ -990,10 +990,10 @@
-         "psubusw %%mm1, %%mm5                   \n\t" // ld
-
-
--        "movq "MANGLE(w05)", %%mm2              \n\t" // 5
-+        "movq "LOCAL_MANGLE(w05)", %%mm2        \n\t" // 5
-         "pmullw %%mm2, %%mm4                    \n\t"
-         "pmullw %%mm2, %%mm5                    \n\t"
--        "movq "MANGLE(w20)", %%mm2              \n\t" // 32
-+        "movq "LOCAL_MANGLE(w20)", %%mm2        \n\t" // 32
-         "paddw %%mm2, %%mm4                     \n\t"
-         "paddw %%mm2, %%mm5                     \n\t"
-         "psrlw $6, %%mm4                        \n\t"
-@@ -1186,7 +1186,7 @@
+@@ -1187,7 +1187,7 @@
          "psubb %%mm7, %%mm6                     \n\t" // max - min
          "push %%"FF_REG_a"                      \n\t"
          "movd %%mm6, %%eax                      \n\t"
@@ -111,7 +393,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "pop %%"FF_REG_a"                       \n\t"
          " jb 1f                                 \n\t"
          PAVGB(%%mm0, %%mm7)                           // a=(max + min)/2
-@@ -1212,9 +1212,9 @@
+@@ -1213,9 +1213,9 @@
          "psubusb %%mm7, %%mm0                   \n\t"
          "psubusb %%mm7, %%mm2                   \n\t"
          "psubusb %%mm7, %%mm3                   \n\t"
@@ -123,8 +405,8 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
 +        "pcmpeqb "LOCAL_MANGLE(b00)", %%mm3     \n\t" // L00 > a ? 0 : -1
          "paddb %%mm2, %%mm0                     \n\t"
          "paddb %%mm3, %%mm0                     \n\t"
-
-@@ -1235,9 +1235,9 @@
+ 
+@@ -1236,9 +1236,9 @@
          "psubusb %%mm7, %%mm2                   \n\t"
          "psubusb %%mm7, %%mm4                   \n\t"
          "psubusb %%mm7, %%mm5                   \n\t"
@@ -137,7 +419,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "paddb %%mm4, %%mm2                     \n\t"
          "paddb %%mm5, %%mm2                     \n\t"
  // 0, 2, 3, 1
-@@ -1262,7 +1262,7 @@
+@@ -1263,7 +1263,7 @@
          "psubusb " #lx ", " #t1 "               \n\t"\
          "psubusb " #lx ", " #t0 "               \n\t"\
          "psubusb " #lx ", " #sx "               \n\t"\
@@ -146,7 +428,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "pcmpeqb " #lx ", " #t1 "               \n\t" /* src[-1] > a ? 0 : -1*/\
          "pcmpeqb " #lx ", " #t0 "               \n\t" /* src[+1] > a ? 0 : -1*/\
          "pcmpeqb " #lx ", " #sx "               \n\t" /* src[0]  > a ? 0 : -1*/\
-@@ -1278,8 +1278,8 @@
+@@ -1279,8 +1279,8 @@
          PMINUB(t1, pplx, t0)\
          "paddb " #sx ", " #ppsx "               \n\t"\
          "paddb " #psx ", " #ppsx "              \n\t"\
@@ -157,7 +439,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "pcmpeqb " #lx ", " #ppsx "             \n\t"\
          "pand " #ppsx ", " #pplx "              \n\t"\
          "pandn " #dst ", " #ppsx "              \n\t"\
-@@ -2200,7 +2200,7 @@
+@@ -2201,7 +2201,7 @@
  #else //L1_DIFF
  #if defined (FAST_L2_DIFF)
          "pcmpeqb %%mm7, %%mm7                   \n\t"
@@ -166,7 +448,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          "pxor %%mm0, %%mm0                      \n\t"
  #define REAL_L2_DIFF_CORE(a, b)\
          "movq " #a ", %%mm5                     \n\t"\
-@@ -2704,8 +2704,8 @@
+@@ -2705,8 +2705,8 @@
              "movq %%mm6, %%mm1                      \n\t"
              "psllw $2, %%mm0                        \n\t"
              "psllw $2, %%mm1                        \n\t"
@@ -174,13 +456,13 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
 -            "paddw "MANGLE(w04)", %%mm1             \n\t"
 +            "paddw "LOCAL_MANGLE(w04)", %%mm0       \n\t"
 +            "paddw "LOCAL_MANGLE(w04)", %%mm1       \n\t"
-
+ 
  #define NEXT\
              "movq (%0), %%mm2                       \n\t"\
-@@ -3011,10 +3011,10 @@
+@@ -3012,10 +3012,10 @@
              "psubusw %%mm1, %%mm5                   \n\t" // ld
-
-
+ 
+ 
 -            "movq "MANGLE(w05)", %%mm2              \n\t" // 5
 +            "movq "LOCAL_MANGLE(w05)", %%mm2        \n\t" // 5
              "pmullw %%mm2, %%mm4                    \n\t"
@@ -190,9 +472,10 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "paddw %%mm2, %%mm4                     \n\t"
              "paddw %%mm2, %%mm5                     \n\t"
              "psrlw $6, %%mm4                        \n\t"
---- ffmpeg-4.1/libswscale/x86/rgb2rgb_template.c.orig	2018-11-05 23:22:26.000000000 +0000
-+++ ffmpeg-4.1/libswscale/x86/rgb2rgb_template.c	2019-01-16 00:16:40.272000000 +0000
-@@ -114,14 +114,14 @@
+diff -ru ffmpeg-5.1.orig/libswscale/x86/rgb2rgb_template.c ffmpeg-5.1/libswscale/x86/rgb2rgb_template.c
+--- ffmpeg-5.1.orig/libswscale/x86/rgb2rgb_template.c	2022-07-22 19:58:40.000000000 +0200
++++ ffmpeg-5.1/libswscale/x86/rgb2rgb_template.c	2022-08-21 12:14:19.034801888 +0200
+@@ -94,14 +94,14 @@
              "psrlq         $8, %%mm3    \n\t" \
              "psrlq         $8, %%mm6    \n\t" \
              "psrlq         $8, %%mm7    \n\t" \
@@ -215,7 +498,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "por        %%mm2, %%mm0    \n\t" \
              "por        %%mm3, %%mm1    \n\t" \
              "por        %%mm6, %%mm4    \n\t" \
-@@ -734,9 +734,9 @@
+@@ -714,9 +714,9 @@
              "pand          %3, %%mm1    \n\t"
              "pand          %4, %%mm2    \n\t"
              "psllq         $5, %%mm0    \n\t"
@@ -228,7 +511,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movq       %%mm0, %%mm3    \n\t"
              "movq       %%mm1, %%mm4    \n\t"
              "movq       %%mm2, %%mm5    \n\t"
-@@ -765,9 +765,9 @@
+@@ -745,9 +745,9 @@
              "pand          %3, %%mm1    \n\t"
              "pand          %4, %%mm2    \n\t"
              "psllq         $5, %%mm0    \n\t"
@@ -241,7 +524,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movq       %%mm0, %%mm3    \n\t"
              "movq       %%mm1, %%mm4    \n\t"
              "movq       %%mm2, %%mm5    \n\t"
-@@ -841,9 +841,9 @@
+@@ -821,9 +821,9 @@
              "pand          %4, %%mm2    \n\t"
              "psllq         $5, %%mm0    \n\t"
              "psrlq         $1, %%mm2    \n\t"
@@ -254,7 +537,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movq       %%mm0, %%mm3    \n\t"
              "movq       %%mm1, %%mm4    \n\t"
              "movq       %%mm2, %%mm5    \n\t"
-@@ -873,9 +873,9 @@
+@@ -853,9 +853,9 @@
              "pand          %4, %%mm2    \n\t"
              "psllq         $5, %%mm0    \n\t"
              "psrlq         $1, %%mm2    \n\t"
@@ -267,7 +550,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movq       %%mm0, %%mm3    \n\t"
              "movq       %%mm1, %%mm4    \n\t"
              "movq       %%mm2, %%mm5    \n\t"
-@@ -970,7 +970,7 @@
+@@ -950,7 +950,7 @@
              "psllq         $5, %%mm0    \n\t"
              "pmulhw        %5, %%mm0    \n\t"
              "pmulhw        %5, %%mm1    \n\t"
@@ -276,7 +559,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              PACK_RGB32
              ::"r"(d),"r"(s),"m"(mask15b),"m"(mask15g),"m"(mask15r) ,"m"(mul15_mid)
                NAMED_CONSTRAINTS_ADD(mul15_hi)
-@@ -1013,8 +1013,8 @@
+@@ -993,8 +993,8 @@
              "psllq         $5, %%mm0    \n\t"
              "psrlq         $1, %%mm2    \n\t"
              "pmulhw        %5, %%mm0    \n\t"
@@ -287,7 +570,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              PACK_RGB32
              ::"r"(d),"r"(s),"m"(mask16b),"m"(mask16g),"m"(mask16r),"m"(mul15_mid)
                NAMED_CONSTRAINTS_ADD(mul16_mid,mul15_hi)
-@@ -1041,9 +1041,9 @@
+@@ -1021,9 +1021,9 @@
      __asm__ volatile (
          "test             %%"FF_REG_a", %%"FF_REG_a"    \n\t"
          "jns                     2f                     \n\t"
@@ -300,7 +583,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
          ".p2align                 4                     \n\t"
          "1:                                             \n\t"
          PREFETCH" 32(%1, %%"FF_REG_a")                  \n\t"
-@@ -1377,7 +1377,7 @@
+@@ -1355,7 +1355,7 @@
          if (mmxSize) {
          __asm__ volatile(
              "mov                       %4, %%"FF_REG_a" \n\t"
@@ -309,7 +592,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movq      (%0, %%"FF_REG_a"), %%mm4    \n\t"
              "movq                   %%mm4, %%mm2    \n\t"
              "psllq                     $8, %%mm4    \n\t"
-@@ -1595,7 +1595,7 @@
+@@ -1570,7 +1570,7 @@
              __asm__ volatile(
                  "mov                        %2, %%"FF_REG_a"\n\t"
                  "movq          "BGR2Y_IDX"(%3), %%mm6       \n\t"
@@ -318,7 +601,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
                  "pxor                    %%mm7, %%mm7       \n\t"
                  "lea (%%"FF_REG_a", %%"FF_REG_a", 2), %%"FF_REG_d" \n\t"
                  ".p2align                    4              \n\t"
-@@ -1649,7 +1649,7 @@
+@@ -1624,7 +1624,7 @@
                  "psraw                      $7, %%mm4       \n\t"
  
                  "packuswb                %%mm4, %%mm0       \n\t"
@@ -327,7 +610,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
  
                  MOVNTQ"                  %%mm0, (%1, %%"FF_REG_a") \n\t"
                  "add                        $8,      %%"FF_REG_a"  \n\t"
-@@ -1664,7 +1664,7 @@
+@@ -1639,7 +1639,7 @@
          src -= srcStride*2;
          __asm__ volatile(
              "mov                        %4, %%"FF_REG_a"\n\t"
@@ -336,16 +619,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movq          "BGR2U_IDX"(%5), %%mm6       \n\t"
              "pxor                    %%mm7, %%mm7       \n\t"
              "lea (%%"FF_REG_a", %%"FF_REG_a", 2), %%"FF_REG_d" \n\t"
-@@ -1770,7 +1770,7 @@
-             "paddw                   %%mm1, %%mm5       \n\t"
-             "paddw                   %%mm3, %%mm2       \n\t"
-             "paddw                   %%mm5, %%mm2       \n\t"
--            "movq       "MANGLE(ff_w1111)", %%mm5       \n\t"
-+            "movq       "LOCAL_MANGLE(ff_w1111)", %%mm5       \n\t"
-             "psrlw                      $2, %%mm4       \n\t"
-             "psrlw                      $2, %%mm2       \n\t"
- #endif
-@@ -1797,7 +1797,7 @@
+@@ -1717,7 +1717,7 @@
              "punpckldq               %%mm4, %%mm0           \n\t"
              "punpckhdq               %%mm4, %%mm1           \n\t"
              "packsswb                %%mm1, %%mm0           \n\t"
@@ -354,9 +628,10 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
              "movd                    %%mm0, (%2, %%"FF_REG_a") \n\t"
              "punpckhdq               %%mm0, %%mm0              \n\t"
              "movd                    %%mm0, (%3, %%"FF_REG_a") \n\t"
---- ffmpeg-4.1/libswscale/x86/swscale_template.c.orig	2018-11-05 23:22:26.000000000 +0000
-+++ ffmpeg-4.1/libswscale/x86/swscale_template.c	2019-01-16 00:19:06.024000000 +0000
-@@ -429,9 +429,9 @@
+diff -ru ffmpeg-5.1.orig/libswscale/x86/swscale_template.c ffmpeg-5.1/libswscale/x86/swscale_template.c
+--- ffmpeg-5.1.orig/libswscale/x86/swscale_template.c	2022-07-22 19:58:40.000000000 +0200
++++ ffmpeg-5.1/libswscale/x86/swscale_template.c	2022-08-21 12:11:41.774806812 +0200
+@@ -342,9 +342,9 @@
  }
  
  #define REAL_WRITERGB16(dst, dstw, index) \
@@ -369,7 +644,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
      "psrlq           $3, %%mm2  \n\t"\
  \
      "movq         %%mm2, %%mm1  \n\t"\
-@@ -505,9 +505,9 @@
+@@ -418,9 +418,9 @@
  }
  
  #define REAL_WRITERGB15(dst, dstw, index) \
@@ -382,7 +657,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
      "psrlq           $3, %%mm2  \n\t"\
      "psrlq           $1, %%mm5  \n\t"\
  \
-@@ -636,8 +636,8 @@
+@@ -549,8 +549,8 @@
  
  #define WRITEBGR24MMXEXT(dst, dstw, index) \
      /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
@@ -393,7 +668,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
      "pshufw $0x50, %%mm2, %%mm1 \n\t" /* B3 B2 B3 B2  B1 B0 B1 B0 */\
      "pshufw $0x50, %%mm4, %%mm3 \n\t" /* G3 G2 G3 G2  G1 G0 G1 G0 */\
      "pshufw $0x00, %%mm5, %%mm6 \n\t" /* R1 R0 R1 R0  R1 R0 R1 R0 */\
-@@ -656,7 +656,7 @@
+@@ -569,7 +569,7 @@
      "pshufw $0x55, %%mm4, %%mm3 \n\t" /* G4 G3 G4 G3  G4 G3 G4 G3 */\
      "pshufw $0xA5, %%mm5, %%mm6 \n\t" /* R5 R4 R5 R4  R3 R2 R3 R2 */\
  \
@@ -402,7 +677,7 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
      "pand   %%mm7, %%mm3        \n\t" /*       G4        G3       */\
      "pand   %%mm0, %%mm6        \n\t" /*    R4        R3       R2 */\
  \
-@@ -670,7 +670,7 @@
+@@ -583,7 +583,7 @@
  \
      "pand   %%mm7, %%mm1        \n\t" /*       B7        B6       */\
      "pand   %%mm0, %%mm3        \n\t" /*    G7        G6       G5 */\
@@ -411,302 +686,3 @@ diff -ru ffmpeg-4.3.orig/libpostproc/postprocess_template.c ffmpeg-4.3/libpostpr
  \
      "por    %%mm1, %%mm3        \n\t"\
      "por    %%mm3, %%mm6        \n\t"\
---- ffmpeg-4.1/libavcodec/x86/lpc.c.orig	2018-11-01 18:34:25.000000000 +0000
-+++ ffmpeg-4.1/libavcodec/x86/lpc.c	2019-01-16 00:26:53.376000000 +0000
-@@ -40,8 +40,8 @@
-     x86_reg j =  n2*sizeof(int32_t);
-     __asm__ volatile(
-         "movsd   %4,     %%xmm7                \n\t"
--        "movapd  "MANGLE(pd_1)", %%xmm6        \n\t"
--        "movapd  "MANGLE(pd_2)", %%xmm5        \n\t"
-+        "movapd  "LOCAL_MANGLE(pd_1)", %%xmm6        \n\t"
-+        "movapd  "LOCAL_MANGLE(pd_2)", %%xmm5        \n\t"
-         "movlhps %%xmm7, %%xmm7                \n\t"
-         "subpd   %%xmm5, %%xmm7                \n\t"
-         "addsd   %%xmm6, %%xmm7                \n\t"
-@@ -91,9 +91,9 @@
-         x86_reg i = -len*sizeof(double);
-         if(j == lag-2) {
-             __asm__ volatile(
--                "movsd    "MANGLE(pd_1)", %%xmm0    \n\t"
--                "movsd    "MANGLE(pd_1)", %%xmm1    \n\t"
--                "movsd    "MANGLE(pd_1)", %%xmm2    \n\t"
-+                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm0    \n\t"
-+                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm1    \n\t"
-+                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm2    \n\t"
-                 "1:                                 \n\t"
-                 "movapd   (%2,%0), %%xmm3           \n\t"
-                 "movupd -8(%3,%0), %%xmm4           \n\t"
-@@ -122,8 +122,8 @@
-             );
-         } else {
-             __asm__ volatile(
--                "movsd    "MANGLE(pd_1)", %%xmm0    \n\t"
--                "movsd    "MANGLE(pd_1)", %%xmm1    \n\t"
-+                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm0    \n\t"
-+                "movsd    "LOCAL_MANGLE(pd_1)", %%xmm1    \n\t"
-                 "1:                                 \n\t"
-                 "movapd   (%3,%0), %%xmm3           \n\t"
-                 "movupd -8(%4,%0), %%xmm4           \n\t"
---- ffmpeg-4.1/libavutil/x86/asm.h.orig	2018-11-01 18:34:28.000000000 +0000
-+++ ffmpeg-4.1/libavutil/x86/asm.h	2019-01-16 00:36:18.480000000 +0000
-@@ -100,7 +100,11 @@
- #endif
- 
- /* Use to export labels from asm. */
-+#ifndef __midipix__
- #define LABEL_MANGLE(a) EXTERN_PREFIX #a
-+#else
-+#define LABEL_MANGLE(a) #a
-+#endif
- 
- // Use rip-relative addressing if compiling PIC code on x86-64.
- #if ARCH_X86_64 && defined(PIC)
---- ffmpeg-4.1/libavcodec/x86/h264_cabac.c.orig	2018-11-01 18:34:25.000000000 +0000
-+++ ffmpeg-4.1/libavcodec/x86/h264_cabac.c	2019-01-18 20:04:01.480000000 +0000
-@@ -56,7 +56,7 @@
-     void *tables;
- 
-     __asm__ volatile(
--        "lea   "MANGLE(ff_h264_cabac_tables)", %0      \n\t"
-+        "lea   "LOCAL_MANGLE(ff_h264_cabac_tables)", %0      \n\t"
-         : "=&r"(tables)
-         : NAMED_CONSTRAINTS_ARRAY(ff_h264_cabac_tables)
-     );
-@@ -132,7 +132,7 @@
-     void *tables;
- 
-     __asm__ volatile(
--        "lea    "MANGLE(ff_h264_cabac_tables)", %0      \n\t"
-+        "lea    "LOCAL_MANGLE(ff_h264_cabac_tables)", %0      \n\t"
-         : "=&r"(tables)
-         : NAMED_CONSTRAINTS_ARRAY(ff_h264_cabac_tables)
-     );
-@@ -161,7 +161,7 @@
- #ifdef BROKEN_RELOCATIONS
-         "movzb %c14(%15, %q6), %6\n\t"
- #else
--        "movzb "MANGLE(ff_h264_cabac_tables)"+%c14(%6), %6\n\t"
-+        "movzb "LOCAL_MANGLE(ff_h264_cabac_tables)"+%c14(%6), %6\n\t"
- #endif
-         "add %11, %6                            \n\t"
- 
---- ffmpeg-4.1/libavcodec/x86/cabac.h.orig	2018-11-01 18:34:25.000000000 +0000
-+++ ffmpeg-4.1/libavcodec/x86/cabac.h	2019-01-18 20:20:12.052000000 +0000
-@@ -143,12 +143,12 @@
-         "movzbl "statep"    , "ret"                                     \n\t"\
-         "mov    "range"     , "tmp"                                     \n\t"\
-         "and    $0xC0       , "range"                                   \n\t"\
--        "movzbl "MANGLE(ff_h264_cabac_tables)"+"lps_off"("ret", "range", 2), "range" \n\t"\
-+        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"lps_off"("ret", "range", 2), "range" \n\t"\
-         "sub    "range"     , "tmp"                                     \n\t"\
-         BRANCHLESS_GET_CABAC_UPDATE(ret, low, range, tmp)                    \
--        "movzbl "MANGLE(ff_h264_cabac_tables)"+"norm_off"("range"), %%ecx    \n\t"\
-+        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"norm_off"("range"), %%ecx    \n\t"\
-         "shl    %%cl        , "range"                                   \n\t"\
--        "movzbl "MANGLE(ff_h264_cabac_tables)"+"mlps_off"+128("ret"), "tmp"  \n\t"\
-+        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"mlps_off"+128("ret"), "tmp"  \n\t"\
-         "shl    %%cl        , "low"                                     \n\t"\
-         "mov    "tmpbyte"   , "statep"                                  \n\t"\
-         "test   "lowword"   , "lowword"                                 \n\t"\
-@@ -163,7 +163,7 @@
-         "shr    $15         , %%ecx                                     \n\t"\
-         "bswap  "tmp"                                                   \n\t"\
-         "shr    $15         , "tmp"                                     \n\t"\
--        "movzbl "MANGLE(ff_h264_cabac_tables)"+"norm_off"(%%ecx), %%ecx \n\t"\
-+        "movzbl "LOCAL_MANGLE(ff_h264_cabac_tables)"+"norm_off"(%%ecx), %%ecx \n\t"\
-         "sub    $0xFFFF     , "tmp"                                     \n\t"\
-         "neg    %%ecx                                                   \n\t"\
-         "add    $7          , %%ecx                                     \n\t"\
-@@ -183,7 +183,7 @@
-     void *tables;
- 
-     __asm__ volatile(
--        "lea    "MANGLE(ff_h264_cabac_tables)", %0      \n\t"
-+        "lea    "LOCAL_MANGLE(ff_h264_cabac_tables)", %0      \n\t"
-         : "=&r"(tables)
-         : NAMED_CONSTRAINTS_ARRAY(ff_h264_cabac_tables)
-     );
---- ffmpeg-4.1/libavcodec/x86/cavsdsp.c.orig	2018-11-01 18:34:25.000000000 +0000
-+++ ffmpeg-4.1/libavcodec/x86/cavsdsp.c	2019-01-18 20:26:50.820000000 +0000
-@@ -69,9 +69,9 @@
- #define QPEL_CAVSV1(A,B,C,D,E,F,OP,ADD, MUL1, MUL2) \
-         "movd (%0), "#F"            \n\t"\
-         "movq "#C", %%mm6           \n\t"\
--        "pmullw "MANGLE(MUL1)", %%mm6\n\t"\
-+        "pmullw "LOCAL_MANGLE(MUL1)", %%mm6\n\t"\
-         "movq "#D", %%mm7           \n\t"\
--        "pmullw "MANGLE(MUL2)", %%mm7\n\t"\
-+        "pmullw "LOCAL_MANGLE(MUL2)", %%mm7\n\t"\
-         "psllw $3, "#E"             \n\t"\
-         "psubw "#E", %%mm6          \n\t"\
-         "psraw $3, "#E"             \n\t"\
-@@ -84,7 +84,7 @@
-         "psubw "#B", %%mm6          \n\t"\
-         "psraw $1, "#B"             \n\t"\
-         "psubw "#A", %%mm6          \n\t"\
--        "paddw "MANGLE(ADD)", %%mm6 \n\t"\
-+        "paddw "LOCAL_MANGLE(ADD)", %%mm6 \n\t"\
-         "psraw $7, %%mm6            \n\t"\
-         "packuswb %%mm6, %%mm6      \n\t"\
-         OP(%%mm6, (%1), A, d)            \
-@@ -95,12 +95,12 @@
-         "movd (%0), "#F"            \n\t"\
-         "movq "#C", %%mm6           \n\t"\
-         "paddw "#D", %%mm6          \n\t"\
--        "pmullw "MANGLE(MUL1)", %%mm6\n\t"\
-+        "pmullw "LOCAL_MANGLE(MUL1)", %%mm6\n\t"\
-         "add %2, %0                 \n\t"\
-         "punpcklbw %%mm7, "#F"      \n\t"\
-         "psubw "#B", %%mm6          \n\t"\
-         "psubw "#E", %%mm6          \n\t"\
--        "paddw "MANGLE(ADD)", %%mm6 \n\t"\
-+        "paddw "LOCAL_MANGLE(ADD)", %%mm6 \n\t"\
-         "psraw $3, %%mm6            \n\t"\
-         "packuswb %%mm6, %%mm6      \n\t"\
-         OP(%%mm6, (%1), A, d)            \
-@@ -110,9 +110,9 @@
- #define QPEL_CAVSV3(A,B,C,D,E,F,OP,ADD, MUL1, MUL2) \
-         "movd (%0), "#F"            \n\t"\
-         "movq "#C", %%mm6           \n\t"\
--        "pmullw "MANGLE(MUL2)", %%mm6\n\t"\
-+        "pmullw "LOCAL_MANGLE(MUL2)", %%mm6\n\t"\
-         "movq "#D", %%mm7           \n\t"\
--        "pmullw "MANGLE(MUL1)", %%mm7\n\t"\
-+        "pmullw "LOCAL_MANGLE(MUL1)", %%mm7\n\t"\
-         "psllw $3, "#B"             \n\t"\
-         "psubw "#B", %%mm6          \n\t"\
-         "psraw $3, "#B"             \n\t"\
-@@ -125,7 +125,7 @@
-         "psubw "#E", %%mm6          \n\t"\
-         "psraw $1, "#E"             \n\t"\
-         "psubw "#F", %%mm6          \n\t"\
--        "paddw "MANGLE(ADD)", %%mm6 \n\t"\
-+        "paddw "LOCAL_MANGLE(ADD)", %%mm6 \n\t"\
-         "psraw $7, %%mm6            \n\t"\
-         "packuswb %%mm6, %%mm6      \n\t"\
-         OP(%%mm6, (%1), A, d)            \
-@@ -195,7 +195,7 @@
-     int h=8;\
-     __asm__ volatile(\
-         "pxor %%mm7, %%mm7          \n\t"\
--        "movq "MANGLE(ff_pw_5)", %%mm6\n\t"\
-+        "movq "LOCAL_MANGLE(ff_pw_5)", %%mm6\n\t"\
-         "1:                         \n\t"\
-         "movq    (%0), %%mm0        \n\t"\
-         "movq   1(%0), %%mm2        \n\t"\
-@@ -221,7 +221,7 @@
-         "paddw %%mm3, %%mm5         \n\t"\
-         "psubw %%mm2, %%mm0         \n\t"\
-         "psubw %%mm5, %%mm1         \n\t"\
--        "movq "MANGLE(ff_pw_4)", %%mm5\n\t"\
-+        "movq "LOCAL_MANGLE(ff_pw_4)", %%mm5\n\t"\
-         "paddw %%mm5, %%mm0         \n\t"\
-         "paddw %%mm5, %%mm1         \n\t"\
-         "psraw $3, %%mm0            \n\t"\
---- ffmpeg-4.1/libavcodec/x86/vc1dsp_mmx.c.orig	2018-11-01 18:34:25.000000000 +0000
-+++ ffmpeg-4.1/libavcodec/x86/vc1dsp_mmx.c	2019-01-18 20:30:04.396000000 +0000
-@@ -86,7 +86,7 @@
-     __asm__ volatile(\
-         "mov       $8, %%"FF_REG_c"        \n\t"\
-         LOAD_ROUNDER_MMX("%5")\
--        "movq      "MANGLE(ff_pw_9)", %%mm6\n\t"\
-+        "movq      "LOCAL_MANGLE(ff_pw_9)", %%mm6\n\t"\
-         "1:                                \n\t"\
-         "movd      0(%0   ), %%mm3         \n\t"\
-         "movd      4(%0   ), %%mm4         \n\t"\
-@@ -147,8 +147,8 @@
-      MOVQ "*4+"A1", %%mm2       \n\t"                           \
-      UNPACK("%%mm1")                                            \
-      UNPACK("%%mm2")                                            \
--     "pmullw    "MANGLE(ff_pw_3)", %%mm1\n\t"                   \
--     "pmullw    "MANGLE(ff_pw_3)", %%mm2\n\t"                   \
-+     "pmullw    "LOCAL_MANGLE(ff_pw_3)", %%mm1\n\t"                   \
-+     "pmullw    "LOCAL_MANGLE(ff_pw_3)", %%mm2\n\t"                   \
-      MOVQ "*0+"A2", %%mm3       \n\t"                           \
-      MOVQ "*4+"A2", %%mm4       \n\t"                           \
-      UNPACK("%%mm3")                                            \
-@@ -192,8 +192,8 @@
-     src -= src_stride;                                                  \
-     __asm__ volatile(                                                       \
-         LOAD_ROUNDER_MMX("%5")                                          \
--        "movq      "MANGLE(ff_pw_53)", %%mm5\n\t"                       \
--        "movq      "MANGLE(ff_pw_18)", %%mm6\n\t"                       \
-+        "movq      "LOCAL_MANGLE(ff_pw_53)", %%mm5\n\t"                       \
-+        "movq      "LOCAL_MANGLE(ff_pw_18)", %%mm6\n\t"                       \
-         ".p2align 3                \n\t"                                \
-         "1:                        \n\t"                                \
-         MSPEL_FILTER13_CORE(DO_UNPACK, "movd  1", A1, A2, A3, A4)       \
-@@ -249,15 +249,15 @@
-     rnd -= (-4+58+13-3)*256; /* Add -256 bias */                        \
-     __asm__ volatile(                                                       \
-         LOAD_ROUNDER_MMX("%4")                                          \
--        "movq      "MANGLE(ff_pw_18)", %%mm6   \n\t"                    \
--        "movq      "MANGLE(ff_pw_53)", %%mm5   \n\t"                    \
-+        "movq      "LOCAL_MANGLE(ff_pw_18)", %%mm6   \n\t"                    \
-+        "movq      "LOCAL_MANGLE(ff_pw_53)", %%mm5   \n\t"                    \
-         ".p2align 3                \n\t"                                \
-         "1:                        \n\t"                                \
-         MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4)      \
-         NORMALIZE_MMX("$7")                                             \
-         /* Remove bias */                                               \
--        "paddw     "MANGLE(ff_pw_128)", %%mm3  \n\t"                    \
--        "paddw     "MANGLE(ff_pw_128)", %%mm4  \n\t"                    \
-+        "paddw     "LOCAL_MANGLE(ff_pw_128)", %%mm3  \n\t"                    \
-+        "paddw     "LOCAL_MANGLE(ff_pw_128)", %%mm4  \n\t"                    \
-         TRANSFER_DO_PACK(OP)                                            \
-         "add       $24, %1         \n\t"                                \
-         "add       %3, %2          \n\t"                                \
-@@ -288,8 +288,8 @@
-     rnd = 32-rnd;                                                       \
-     __asm__ volatile (                                                      \
-         LOAD_ROUNDER_MMX("%6")                                          \
--        "movq      "MANGLE(ff_pw_53)", %%mm5       \n\t"                \
--        "movq      "MANGLE(ff_pw_18)", %%mm6       \n\t"                \
-+        "movq      "LOCAL_MANGLE(ff_pw_53)", %%mm5       \n\t"                \
-+        "movq      "LOCAL_MANGLE(ff_pw_18)", %%mm6       \n\t"                \
-         ".p2align 3                \n\t"                                \
-         "1:                        \n\t"                                \
-         MSPEL_FILTER13_CORE(DO_UNPACK, "movd   1", A1, A2, A3, A4)      \
---- ffmpeg-4.1/libavcodec/x86/mlpdsp_init.c.orig	2019-02-25 12:22:33.426318908 -0500
-+++ ffmpeg-4.1/libavcodec/x86/mlpdsp_init.c	2019-02-25 12:25:34.936668206 -0500
-@@ -44,21 +44,25 @@
- 
- #if HAVE_7REGS && HAVE_INLINE_ASM && HAVE_INLINE_ASM_NONLOCAL_LABELS
- 
--extern char ff_mlp_firorder_8;
--extern char ff_mlp_firorder_7;
--extern char ff_mlp_firorder_6;
--extern char ff_mlp_firorder_5;
--extern char ff_mlp_firorder_4;
--extern char ff_mlp_firorder_3;
--extern char ff_mlp_firorder_2;
--extern char ff_mlp_firorder_1;
--extern char ff_mlp_firorder_0;
-+#ifndef ATTR_HIDDEN
-+#define ATTR_HIDDEN __attribute__((visibility("hidden")))
-+#endif
- 
--extern char ff_mlp_iirorder_4;
--extern char ff_mlp_iirorder_3;
--extern char ff_mlp_iirorder_2;
--extern char ff_mlp_iirorder_1;
--extern char ff_mlp_iirorder_0;
-+extern char ATTR_HIDDEN ff_mlp_firorder_8;
-+extern char ATTR_HIDDEN ff_mlp_firorder_7;
-+extern char ATTR_HIDDEN ff_mlp_firorder_6;
-+extern char ATTR_HIDDEN ff_mlp_firorder_5;
-+extern char ATTR_HIDDEN ff_mlp_firorder_4;
-+extern char ATTR_HIDDEN ff_mlp_firorder_3;
-+extern char ATTR_HIDDEN ff_mlp_firorder_2;
-+extern char ATTR_HIDDEN ff_mlp_firorder_1;
-+extern char ATTR_HIDDEN ff_mlp_firorder_0;
-+
-+extern char ATTR_HIDDEN ff_mlp_iirorder_4;
-+extern char ATTR_HIDDEN ff_mlp_iirorder_3;
-+extern char ATTR_HIDDEN ff_mlp_iirorder_2;
-+extern char ATTR_HIDDEN ff_mlp_iirorder_1;
-+extern char ATTR_HIDDEN ff_mlp_iirorder_0;
- 
- static const void * const firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
-                                           &ff_mlp_firorder_2, &ff_mlp_firorder_3,
diff --git a/patches/ffmpeg-5.0.1_pre.local.patch b/patches/ffmpeg-6.1.1_pre.local.patch
index d8e39cba..d8e39cba 100644
--- a/patches/ffmpeg-5.0.1_pre.local.patch
+++ b/patches/ffmpeg-6.1.1_pre.local.patch
diff --git a/patches/file-5.45_pre.local.patch b/patches/file-5.45_pre.local.patch
new file mode 100644
index 00000000..c3cbd39d
--- /dev/null
+++ b/patches/file-5.45_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru file-5.42.orig/src/Makefile.in file-5.42/src/Makefile.in
+--- file-5.42.orig/src/Makefile.in	2022-06-29 22:49:15.379469079 +0200
++++ file-5.42/src/Makefile.in	2022-06-29 22:56:35.117265729 +0200
+@@ -199,7 +199,7 @@
+ CCLD = $(CC)
+ LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
+ 	$(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+-	$(AM_LDFLAGS) $(LDFLAGS) -o $@
++	$(AM_LDFLAGS) -o $@
+ AM_V_CCLD = $(am__v_CCLD_@AM_V@)
+ am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
+ am__v_CCLD_0 = @echo "  CCLD    " $@;
diff --git a/patches/file_host-5.45_pre.local.patch b/patches/file_host-5.45_pre.local.patch
new file mode 100644
index 00000000..c3cbd39d
--- /dev/null
+++ b/patches/file_host-5.45_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru file-5.42.orig/src/Makefile.in file-5.42/src/Makefile.in
+--- file-5.42.orig/src/Makefile.in	2022-06-29 22:49:15.379469079 +0200
++++ file-5.42/src/Makefile.in	2022-06-29 22:56:35.117265729 +0200
+@@ -199,7 +199,7 @@
+ CCLD = $(CC)
+ LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
+ 	$(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+-	$(AM_LDFLAGS) $(LDFLAGS) -o $@
++	$(AM_LDFLAGS) -o $@
+ AM_V_CCLD = $(am__v_CCLD_@AM_V@)
+ am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
+ am__v_CCLD_0 = @echo "  CCLD    " $@;
diff --git a/patches/fontconfig-2.14.1.local.patch b/patches/fontconfig-2.14.1.local.patch
new file mode 100644
index 00000000..01ff6c07
--- /dev/null
+++ b/patches/fontconfig-2.14.1.local.patch
@@ -0,0 +1,21 @@
+diff -ru fontconfig-2.14.1.orig/src/fcstat.c fontconfig-2.14.1/src/fcstat.c
+--- fontconfig-2.14.1.orig/src/fcstat.c	2021-07-08 07:47:01.000000000 +0200
++++ fontconfig-2.14.1/src/fcstat.c	2023-01-18 13:38:16.297077648 +0100
+@@ -373,7 +373,7 @@
+ 	p = buf.f_fstypename;
+ #  endif
+     }
+-#elif defined(HAVE_FSTATFS) && (defined(HAVE_STRUCT_STATFS_F_FLAGS) || defined(HAVE_STRUCT_STATFS_F_FSTYPENAME) || defined(__linux__))
++#elif defined(HAVE_FSTATFS) && (defined(HAVE_STRUCT_STATFS_F_FLAGS) || defined(HAVE_STRUCT_STATFS_F_FSTYPENAME) || defined(__linux__) || defined(__midipix__))
+     struct statfs buf;
+ 
+     memset (statb, 0, sizeof (FcStatFS));
+@@ -386,7 +386,7 @@
+ #  endif
+ #  if defined(HAVE_STRUCT_STATFS_F_FSTYPENAME)
+ 	p = buf.f_fstypename;
+-#  elif defined(__linux__) || defined (__EMSCRIPTEN__)
++#  elif defined(__linux__) || defined(__midipix__) || defined (__EMSCRIPTEN__)
+ 	switch (buf.f_type)
+ 	{
+ 	case 0x6969: /* nfs */
diff --git a/patches/gcal-4.1_pre.local.patch b/patches/gcal-4.1_pre.local.patch
new file mode 100644
index 00000000..dc6c3fa6
--- /dev/null
+++ b/patches/gcal-4.1_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru gcal-4.1.orig/configure gcal-4.1/configure
+--- gcal-4.1.orig/configure	2017-01-22 18:09:59.000000000 +0100
++++ gcal-4.1/configure	2023-01-31 14:35:28.553255306 +0100
+@@ -8769,7 +8769,7 @@
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_ncurses_initscr" >&5
+ $as_echo "$ac_cv_lib_ncurses_initscr" >&6; }
+ if test "x$ac_cv_lib_ncurses_initscr" = xyes; then :
+-  TTYLIBS="-lncurses"
++  TTYLIBS="-lncurses -ltinfo"
+ fi
+ 
+   if test -z "$TTYLIBS"; then
diff --git a/patches/gdk-2.36.10.local.patch b/patches/gdk-2.36.10.local.patch
deleted file mode 100644
index 3c19f614..00000000
--- a/patches/gdk-2.36.10.local.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -ru gdk-pixbuf-2.36.10.orig/thumbnailer/Makefile.in gdk-pixbuf-2.36.10/thumbnailer/Makefile.in
---- gdk-pixbuf-2.36.10.orig/thumbnailer/Makefile.in	2017-09-11 13:00:44.000000000 +0200
-+++ gdk-pixbuf-2.36.10/thumbnailer/Makefile.in	2017-09-15 20:57:24.196896220 +0200
-@@ -453,7 +453,7 @@
- 	$(top_builddir)/gdk-pixbuf/libgdk_pixbuf-$(GDK_PIXBUF_API_VERSION).la
- 
- thumbnailerdir = $(datadir)/thumbnailers/
--thumbnailer_DATA = gdk-pixbuf-thumbnailer.thumbnailer
-+thumbnailer_DATA = 
- EXTRA_DIST = gdk-pixbuf-thumbnailer.thumbnailer.in
- CLEANFILES = $(thumbnailer_DATA)
- all: all-am
diff --git a/patches/ghostpdl-9.52.local.patch b/patches/ghostpdl-9.52.local.patch
index 11712f1a..5a9646fe 100644
--- a/patches/ghostpdl-9.52.local.patch
+++ b/patches/ghostpdl-9.52.local.patch
@@ -31,7 +31,17 @@ diff -ru ghostpdl-9.52.orig/base/fapi_ft.c ghostpdl-9.52/base/fapi_ft.c
 diff -ru ghostpdl-9.52.orig/configure ghostpdl-9.52/configure
 --- ghostpdl-9.52.orig/configure        2020-06-05 13:19:23.032760767 +0200
 +++ ghostpdl-9.52/configure     2020-06-05 13:18:58.367780811 +0200
-@@ -10957,7 +10957,7 @@
+@@ -7566,9 +7566,6 @@
+ 
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for local zlib source" >&5
+ $as_echo_n "checking for local zlib source... " >&6; }
+-# we must define ZLIBDIR regardless because png.mak does a -I$(ZLIBDIR)
+-# this seems a harmless default
+-ZLIBDIR=src
+ AUX_SHARED_ZLIB=
+ ZLIBCFLAGS=""
+ 
+@@ -10957,7 +10954,7 @@
    enableval=$enable_dynamic;
    if test "x$enable_dynamic" != xno; then
      case $host in
diff --git a/patches/giflib-5.2.1.local.patch b/patches/giflib-5.2.1.local.patch
deleted file mode 100644
index 597708b6..00000000
--- a/patches/giflib-5.2.1.local.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -ru giflib-5.2.1.orig/Makefile giflib-5.2.1/Makefile
---- giflib-5.2.1.orig/Makefile	2019-06-24 18:08:57.000000000 +0200
-+++ giflib-5.2.1/Makefile	2020-06-22 16:38:04.273418161 +0200
-@@ -61,7 +61,7 @@
- 
- LDLIBS=libgif.a -lm
- 
--all: libgif.so libgif.a libutil.so libutil.a $(UTILS)
-+all: libgif.so libgif.a libutil.a $(UTILS)
- 	$(MAKE) -C doc
- 
- $(UTILS):: libgif.a libutil.a
diff --git a/patches/giflib-5.2.2.local.patch b/patches/giflib-5.2.2.local.patch
new file mode 100644
index 00000000..8e421d52
--- /dev/null
+++ b/patches/giflib-5.2.2.local.patch
@@ -0,0 +1,32 @@
+diff -ru giflib-5.2.2.orig/doc/Makefile giflib-5.2.2/doc/Makefile
+--- giflib-5.2.2.orig/doc/Makefile      2024-02-18 19:15:05.000000000 +0100
++++ giflib-5.2.2/doc/Makefile   2024-03-11 15:46:56.522195535 +0100
+@@ -15,7 +15,7 @@
+ .adoc.html:
+        asciidoc $<
+
+-all: allhtml manpages
++all: manpages
+
+ # The distinction between XMLMAN and XMLINTERNAL is because
+ # some pages shouldn't be installed as part of a binary package;
+diff -ru giflib-5.2.2.orig/Makefile giflib-5.2.2/Makefile
+--- giflib-5.2.2.orig/Makefile	2024-02-19 02:01:50.000000000 +0100
++++ giflib-5.2.2/Makefile	2024-03-11 10:30:17.730765319 +0100
+@@ -8,7 +8,6 @@
+ #
+ OFLAGS = -O0 -g
+ OFLAGS  = -O2
+-CFLAGS  = -std=gnu99 -fPIC -Wall -Wno-format-truncation $(OFLAGS)
+ 
+ SHELL = /bin/sh
+ TAR = tar
+@@ -87,7 +86,7 @@
+ LIBUTILSOMAJOR	= libutil.$(LIBMAJOR).$(SOEXTENSION)
+ endif
+ 
+-all: $(LIBGIFSO) libgif.a $(LIBUTILSO) libutil.a $(UTILS)
++all: $(LIBGIFSO) libgif.a libutil.a $(UTILS)
+ ifeq ($(UNAME), Darwin)
+ else
+ 	$(MAKE) -C doc
diff --git a/patches/git-2.35.2.local.patch b/patches/git-2.35.8.local.patch
index 0b885529..581f6ea7 100644
--- a/patches/git-2.35.2.local.patch
+++ b/patches/git-2.35.8.local.patch
@@ -79,3 +79,25 @@
  	$(QUIET_LINK)$(CC) $(ALL_CFLAGS) -o $@ $(ALL_LDFLAGS) $(filter %.o,$^) $(filter %.a,$^) $(LIBS)
  
  check-sha1:: t/helper/test-tool$X
+--- git-2.35.6/git-compat-util.h.orig	2022-12-13 13:17:26.000000000 +0100
++++ git-2.35.6/git-compat-util.h	2023-03-28 08:13:34.179644083 +0200
+@@ -221,7 +221,7 @@
+ #include <time.h>
+ #include <signal.h>
+ #include <assert.h>
+-#include <regex.h>
++#include <pcreposix.h>
+ #include <utime.h>
+ #include <syslog.h>
+ #if !defined(NO_POLL_H)
+--- git-2.35.6/compat/regex/regex.c.orig	2022-12-13 13:17:26.000000000 +0100
++++ git-2.35.6/compat/regex/regex.c	2023-03-28 08:18:00.186635875 +0200
+@@ -66,7 +66,7 @@
+ #undef alloca
+ #define alloca alloca_is_bad_you_should_never_use_it
+ #endif
+-#include <regex.h>
++#include "compat/regex/regex.h"
+ #include "regex_internal.h"
+ 
+ #include "regex_internal.c"
diff --git a/patches/git/git-no-owner-check.patch b/patches/git/git-no-owner-check.patch
new file mode 100644
index 00000000..a4cf34db
--- /dev/null
+++ b/patches/git/git-no-owner-check.patch
@@ -0,0 +1,25 @@
+diff -ru git-2.35.5.orig/setup.c git-2.35.5/setup.c
+--- git-2.35.5.orig/setup.c	2022-10-06 23:44:02.000000000 +0200
++++ git-2.35.5/setup.c	2022-10-19 13:48:26.183628821 +0200
+@@ -1130,6 +1130,13 @@
+ static int ensure_valid_ownership(const char *gitfile,
+ 				const char *worktree, const char *gitdir)
+ {
++#if 1
++	(void)gitfile;
++	(void)worktree;
++	(void)gitdir;
++
++	return 1;
++#else
+ 	struct safe_directory_data data = {
+ 		.path = worktree ? worktree : gitdir
+ 	};
+@@ -1148,6 +1155,7 @@
+ 	read_very_early_config(safe_directory_cb, &data);
+ 
+ 	return data.is_safe;
++#endif
+ }
+ 
+ enum discovery_result {
diff --git a/patches/git_host b/patches/git_host
new file mode 120000
index 00000000..0899c299
--- /dev/null
+++ b/patches/git_host
@@ -0,0 +1 @@
+git
\ No newline at end of file
diff --git a/patches/glew-2.1.0.local.patch b/patches/glew-2.1.0.local.patch
deleted file mode 100644
index 4221c9c5..00000000
--- a/patches/glew-2.1.0.local.patch
+++ /dev/null
@@ -1,21 +0,0 @@
-diff -Nru glew-2.1.0.orig/config/Makefile.midipix glew-2.1.0/config/Makefile.midipix
---- glew-2.1.0.orig/config/Makefile.midipix	1970-01-01 01:00:00.000000000 +0100
-+++ glew-2.1.0/config/Makefile.midipix	2018-07-19 22:26:01.674783470 +0200
-@@ -0,0 +1,17 @@
-+NAME = $(GLEW_NAME)
-+CC = gcc
-+LD = gcc
-+LDFLAGS.GL = -lGL -lX11
-+NAME = GLEW
-+WARN = -Wall -W
-+POPT = -O2
-+CFLAGS.EXTRA += -fPIC -I./include
-+CFLAGS.EXTRA += -Wcast-qual
-+CFLAGS.EXTRA += -ansi -pedantic
-+CFLAGS.EXTRA += -fno-stack-protector
-+BIN.SUFFIX =
-+LIB.SONAME = lib$(NAME).so.$(SO_MAJOR)
-+LIB.DEVLNK = lib$(NAME).so
-+LIB.SHARED = lib$(NAME).so.$(SO_VERSION)
-+LIB.STATIC = lib$(NAME).a
-+LDFLAGS.SO = -shared -Wl,-soname=$(LIB.SONAME) -Wl,--out-dsolib,lib/lib$(NAME).lib.a
diff --git a/patches/gnupg-2.3.8.local.patch b/patches/gnupg-2.3.8.local.patch
new file mode 100644
index 00000000..7e2d9617
--- /dev/null
+++ b/patches/gnupg-2.3.8.local.patch
@@ -0,0 +1,13 @@
+diff -ru gnupg-2.3.8.orig/dirmngr/server.c gnupg-2.3.8/dirmngr/server.c
+--- gnupg-2.3.8.orig/dirmngr/server.c	2022-10-07 15:23:50.000000000 +0200
++++ gnupg-2.3.8/dirmngr/server.c	2022-10-22 15:52:13.224088828 +0200
+@@ -3137,7 +3137,9 @@
+                ctrl->refcount);
+   else
+     {
++#if USE_LDAP
+       ks_ldap_free_state (ctrl->ks_get_state);
++#endif
+       ctrl->ks_get_state = NULL;
+       release_ctrl_ocsp_certs (ctrl);
+       xfree (ctrl->server_local);
diff --git a/patches/gnupg-2.3.8_pre.local.patch b/patches/gnupg-2.3.8_pre.local.patch
new file mode 100644
index 00000000..947bce1b
--- /dev/null
+++ b/patches/gnupg-2.3.8_pre.local.patch
@@ -0,0 +1,21 @@
+diff -ru gnupg-2.3.8.orig/configure gnupg-2.3.8/configure
+--- gnupg-2.3.8.orig/configure	2022-10-13 17:56:41.000000000 +0200
++++ gnupg-2.3.8/configure	2022-10-22 15:45:44.541933579 +0200
+@@ -9004,7 +9004,7 @@
+ 
+   if test $ok = yes; then
+     LIBASSUAN_CFLAGS=`$LIBASSUAN_CONFIG --cflags`
+-    LIBASSUAN_LIBS=`$LIBASSUAN_CONFIG --libs`
++    LIBASSUAN_LIBS="-lassuan -lgpg-error"
+     have_libassuan=yes
+   else
+     LIBASSUAN_CFLAGS=""
+@@ -9183,7 +9183,7 @@
+   fi
+   if test $ok = yes; then
+     KSBA_CFLAGS=`$KSBA_CONFIG --cflags`
+-    KSBA_LIBS=`$KSBA_CONFIG --libs`
++    KSBA_LIBS="-lksba -lgpg-error -lnpth"
+     have_ksba=yes
+     if test -z "$use_gpgrt_config"; then
+       libksba_config_host=`$KSBA_CONFIG --host 2>/dev/null || echo none`
diff --git a/patches/gnutls-3.7.6.local.patch b/patches/gnutls-3.8.5.local.patch
index 968143cf..968143cf 100644
--- a/patches/gnutls-3.7.6.local.patch
+++ b/patches/gnutls-3.8.5.local.patch
diff --git a/patches/gnutls-3.7.6_pre.local.patch b/patches/gnutls-3.8.5_pre.local.patch
index b214ccc0..b214ccc0 100644
--- a/patches/gnutls-3.7.6_pre.local.patch
+++ b/patches/gnutls-3.8.5_pre.local.patch
diff --git a/patches/graphicsmagick-1.3.35_pre.local.patch b/patches/graphicsmagick-1.3.42_pre.local.patch
index 8ccf465c..8ccf465c 100644
--- a/patches/graphicsmagick-1.3.35_pre.local.patch
+++ b/patches/graphicsmagick-1.3.42_pre.local.patch
diff --git a/patches/gtk2-2.24.31.local.patch b/patches/gtk2-2.24.31.local.patch
deleted file mode 100644
index fe47cd61..00000000
--- a/patches/gtk2-2.24.31.local.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-diff -ru gtk+-2.24.31.orig/gtk/Makefile.in gtk+-2.24.31/gtk/Makefile.in
---- gtk+-2.24.31.orig/gtk/Makefile.in	2016-09-09 21:33:09.000000000 +0200
-+++ gtk+-2.24.31/gtk/Makefile.in	2017-10-20 00:08:05.310575203 +0200
-@@ -1937,7 +1937,7 @@
- libgtk_win32_2_0_la_LDFLAGS = $(libtool_opts) -Wl,-luuid
- libgtk_quartz_2_0_la_LDFLAGS = $(libtool_opts)
- libgtk_directfb_2_0_la_LDFLAGS = $(libtool_opts)
--libgtk_x11_2_0_la_LIBADD = $(libadd)
-+libgtk_x11_2_0_la_LIBADD = $(libadd) -latk-1.0 -lglib-2.0 -lgobject-2.0
- libgtk_win32_2_0_la_LIBADD = $(libadd) -lole32 -lgdi32 -lcomdlg32 -lwinspool -lcomctl32
- libgtk_quartz_2_0_la_LIBADD = $(libadd)
- libgtk_directfb_2_0_la_LIBADD = $(libadd)
-diff -ru gtk+-2.24.31.orig/Makefile.in gtk+-2.24.31/Makefile.in
---- gtk+-2.24.31.orig/Makefile.in	2016-09-09 21:33:07.000000000 +0200
-+++ gtk+-2.24.31/Makefile.in	2017-10-20 00:07:42.010704831 +0200
-@@ -564,7 +564,7 @@
- 	|| { echo "Gtk+Tests:ERROR: Failed to start Xvfb environment for X11 target tests."; exit 1; } \
- 	&& DISPLAY=:$$XID && export DISPLAY
- 
--SRC_SUBDIRS = gdk gtk modules demos tests perf
-+SRC_SUBDIRS = gdk gtk modules perf
- SUBDIRS = po po-properties $(SRC_SUBDIRS) docs m4macros build
- 
- # require automake 1.4
-
---- gtk+-2.24.31/configure.orig	2016-09-09 19:33:11.000000000 +0000
-+++ gtk+-2.24.31/configure	2017-11-28 09:52:56.536000000 +0000
-@@ -24351,7 +24351,7 @@
- GLIB_PREFIX="`$PKG_CONFIG --variable=prefix glib-2.0`"
- ATK_PREFIX="`$PKG_CONFIG --variable=prefix atk`"
- PANGO_PREFIX="`$PKG_CONFIG --variable=prefix pango`"
--CAIRO_PREFIX="`pkg-config --variable=prefix cairo`"
-+CAIRO_PREFIX="`$PKG_CONFIG --variable=prefix cairo`"
- 
- 
- 
diff --git a/patches/gxemul-0.7.0.local.patch b/patches/gxemul-0.7.0.local.patch
new file mode 100644
index 00000000..69693038
--- /dev/null
+++ b/patches/gxemul-0.7.0.local.patch
@@ -0,0 +1,56 @@
+diff -ru gxemul-0.7.0.orig/src/cpus/cpu_riscv.c gxemul-0.7.0/src/cpus/cpu_riscv.c
+--- gxemul-0.7.0.orig/src/cpus/cpu_riscv.c	2021-04-22 18:04:18.000000000 +0000
++++ gxemul-0.7.0/src/cpus/cpu_riscv.c	2022-10-18 15:23:16.025840300 +0000
+@@ -401,13 +401,13 @@
+ 		if (!(cpu->cd.riscv.extensions & RISCV_EXT_C))
+ 			debug("compressed (req. C ext)\t; ");
+ 
+-		uint w13 = (iw >> 13) & 7;
+-		uint w0 = (iw >> 0) & 3;
+-		uint op = (w13 << 2) | w0;
++		uint32_t w13 = (iw >> 13) & 7;
++		uint32_t w0 = (iw >> 0) & 3;
++		uint32_t op = (w13 << 2) | w0;
+ 
+-		uint rs1rd = (iw >> 7) & 31;
+-		uint rs2 = (iw >> 2) & 31;
+-		uint rprim_2 = ((iw >> 2) & 7) + RISCV_CREGBASE;
++		uint32_t rs1rd = (iw >> 7) & 31;
++		uint32_t rs2 = (iw >> 2) & 31;
++		uint32_t rprim_2 = ((iw >> 2) & 7) + RISCV_CREGBASE;
+ 		uint64_t nzimm5 = ((iw & (1 << 12)) ? -1 : 0) << 5;
+ 		uint64_t nzimm;
+ 
+diff -ru gxemul-0.7.0.orig/src/cpus/cpu_riscv_instr.c gxemul-0.7.0/src/cpus/cpu_riscv_instr.c
+--- gxemul-0.7.0.orig/src/cpus/cpu_riscv_instr.c	2021-04-22 18:04:18.000000000 +0000
++++ gxemul-0.7.0/src/cpus/cpu_riscv_instr.c	2022-10-18 15:22:53.407914100 +0000
+@@ -209,11 +209,11 @@
+ 	 */
+ 
+ 	if (instr_length_in_bytes == sizeof(uint16_t)) {
+-		uint w13 = (iw >> 13) & 7;
+-		uint w0 = (iw >> 0) & 3;
+-		uint op = (w13 << 2) | w0;
++		uint32_t w13 = (iw >> 13) & 7;
++		uint32_t w0 = (iw >> 0) & 3;
++		uint32_t op = (w13 << 2) | w0;
+ 
+-		uint rs1rd = (iw >> 7) & 31;
++		uint32_t rs1rd = (iw >> 7) & 31;
+ 		uint64_t nzimm5 = ((iw & (1 << 12)) ? -1 : 0) << 5;
+ 		uint64_t nzimm = nzimm5 | ((iw >> 2) & 31);
+ 
+diff -ru gxemul-0.7.0.orig/src/include/thirdparty/alpha_rpb.h gxemul-0.7.0/src/include/thirdparty/alpha_rpb.h
+--- gxemul-0.7.0.orig/src/include/thirdparty/alpha_rpb.h	2021-04-22 18:04:14.000000000 +0000
++++ gxemul-0.7.0/src/include/thirdparty/alpha_rpb.h	2022-10-18 15:15:22.740823100 +0000
+@@ -334,8 +334,8 @@
+ 	u_int64_t	pcs_reserved_soft;	/* 120: preserved software */
+ 
+ 	struct {				/* 128: inter-console buffers */
+-		u_int	iccb_rxlen;
+-		u_int	iccb_txlen;
++		u_int32_t	iccb_rxlen;
++		u_int32_t	iccb_txlen;
+ 		char	iccb_rxbuf[80];
+ 		char	iccb_txbuf[80];
+ 	} pcs_iccb;
diff --git a/patches/gxemul-0.7.0_pre.local.patch b/patches/gxemul-0.7.0_pre.local.patch
new file mode 100644
index 00000000..ac2c844c
--- /dev/null
+++ b/patches/gxemul-0.7.0_pre.local.patch
@@ -0,0 +1,525 @@
+diff -ru gxemul-0.7.0.orig/configure gxemul-0.7.0/configure
+--- gxemul-0.7.0.orig/configure	2021-04-22 18:04:21.000000000 +0000
++++ gxemul-0.7.0/configure	2022-10-18 18:28:37.542626000 +0000
+@@ -112,11 +112,6 @@
+ 			echo "value, which on this platform is: $DEFAULTPREFIX"
+ 			echo
+ 			exit
+-		else
+-			echo "Invalid option: $a"
+-			echo "Run  $0 --help  to get a list of" \
+-			    "available options."
+-			exit
+ 		fi; fi; fi
+ 	done
+ fi
+@@ -267,44 +262,6 @@
+ 	CC=cc
+ fi
+ 
+-printf "#!/bin/sh\n$CC $CFLAGS _testprog.c -o _testprog >" > _test.sh
+-printf " /dev/null 2> /dev/null\n" >> _test.sh
+-chmod 755 _test.sh
+-./_test.sh > /dev/null 2> /dev/null
+-OK=0
+-if [ -x _testprog ]; then
+-	OK=1
+-	if [ z`./_testprog` = z0,1,1,1,2 ]; then
+-		OK=2
+-	fi
+-fi
+-
+-if [ z$OK = z0 ]; then
+-	printf "broken cc detected: $CC $CFLAGS\n"
+-	printf "The test program:\n\n"
+-	cat _testprog.c
+-	printf "could not be compiled at all.\n"
+-fi
+-
+-if [ z$OK = z1 ]; then
+-	printf "broken cc detected: $CC $CFLAGS\n"
+-	printf "The test program:\n\n"
+-	cat _testprog.c
+-	printf "should have resulted in  0,1,1,1,2  but the result was: "
+-	./_testprog
+-fi
+-
+-if [ z$OK != z2 ]; then
+-	printf "\nPlease set the CC environment variable to a working C "
+-	printf "compiler before running\nthe configure script, and make"
+-	printf " sure that the CFLAGS environment variable is\nalso valid"
+-	printf " for that compiler (e.g. -std=c99 if needed).\n"
+-	exit
+-fi
+-
+-rm -f _testprog
+-rm -f _test.sh
+-
+ 
+ echo "$CC $CFLAGS"
+ 
+@@ -317,120 +274,12 @@
+ if [ z$NOX11 = z ]; then
+ 	printf "checking for X11 headers and libs\n"
+ 
+-	#  Try to compile a small X11 test program:
+-	printf "#include <X11/Xlib.h>
+-	#include <stdio.h>
+-	Display *dis;
+-	void f(void) {
+-		dis = XOpenDisplay(NULL);
+-	}
+-	int main(int argc, char *argv[])
+-	{ printf(\"1\"); return 0; }
+-	" > _test_x11.c
+-
+-	XOK=0
+-
+-	XINCLUDE=-I/usr/X11R6/include
+-	$CC $CFLAGS _test_x11.c -c -o _test_x11.o $XINCLUDE 2> /dev/null
+-
+-	XLIB="-L/usr/X11R6/lib -lX11 -Wl,-rpath,/usr/X11R6/lib"
+-	$CC $CFLAGS _test_x11.o -o _test_x11 $XLIB 2> /dev/null
+-
+-	if [ -x _test_x11 ]; then
+-		if [ 1 = `./_test_x11` ]; then
+-			XOK=1
+-		fi
+-	fi
+-
+-	rm -f _test_x11 _test_x11.o
+-
+-	if [ z$XOK = z0 ]; then
+-		XINCLUDE=-I/usr/X11R7/include
+-		$CC $CFLAGS _test_x11.c -c -o _test_x11.o $XINCLUDE 2> /dev/null
+-
+-		XLIB="-L/usr/X11R7/lib -lX11 -Wl,-rpath,/usr/X11R7/lib"
+-		$CC $CFLAGS _test_x11.o -o _test_x11 $XLIB 2> /dev/null
+-
+-		if [ -x _test_x11 ]; then
+-			if [ 1 = `./_test_x11` ]; then
+-				XOK=1
+-			fi
+-		fi
+-	fi
+-	rm -f _test_x11 _test_x11.o
+-
+-	if [ z$XOK = z0 ]; then
+-		XINCLUDE=-I/usr/local/include
+-		$CC $CFLAGS _test_x11.c -c -o _test_x11.o $XINCLUDE 2> /dev/null
+-
+-		XLIB="-L/usr/local/lib -lX11 -Wl,-rpath,/usr/local/lib"
+-		$CC $CFLAGS _test_x11.o -o _test_x11 $XLIB 2> /dev/null
+-
+-		if [ -x _test_x11 ]; then
+-			if [ 1 = `./_test_x11` ]; then
+-				XOK=1
+-			fi
+-		fi
+-	fi
+-	rm -f _test_x11 _test_x11.o
+-
+-	# MacOS:
+-	if [ z$XOK = z0 ]; then
+-		XINCLUDE=-I/opt/X11/include
+-		$CC $CFLAGS _test_x11.c -c -o _test_x11.o $XINCLUDE 2> /dev/null
+-
+-		XLIB="-L/opt/X11/lib -lX11"
+-		$CC $CFLAGS _test_x11.o -o _test_x11 $XLIB 2> /dev/null
+-
+-		if [ -x _test_x11 ]; then
+-			XOK=1
+-		fi
+-	fi
+-	rm -f _test_x11 _test_x11.o
+-
+-	#  Special case for some 64-bit Linux/x86_64 systems:
+-	if [ z$XOK = z0 ]; then
+-		$CC $CFLAGS _test_x11.c -c -o _test_x11.o $XINCLUDE 2> /dev/null
+-
+-		XLIB="-L/usr/X11R6/lib64 -lX11"
+-		$CC $CFLAGS _test_x11.o -o _test_x11 $XLIB 2> /dev/null
+-
+-		if [ -x _test_x11 ]; then
+-			if [ 1 = `./_test_x11` ]; then
+-				XOK=1
+-			fi
+-		fi
+-	fi
+-	rm -f _test_x11 _test_x11.o
+-
+-	if [ z$XOK = z0 ]; then
+-		XINCLUDE=""
+-		$CC $CFLAGS _test_x11.c -c -o _test_x11.o $XINCLUDE 2> /dev/null
+-
+-		#  -lsocket for Solaris
+-		XLIB="-lX11 -lsocket"
+-		$CC $CFLAGS _test_x11.o -o _test_x11 $XLIB 2> /dev/null
+-
+-		if [ -x _test_x11 ]; then
+-			if [ 1 = `./_test_x11` ]; then
+-				XOK=1
+-			fi
+-		fi
+-		rm -f _test_x11 _test_x11.o
+-	fi
+-
+-	if [ z$XOK = z0 ]; then
+-		echo "Failed to compile X11 test program." \
+-		    "Configuring without X11."
+-	else
+ 		printf "   headers:   $XINCLUDE\n"
+ 		printf "   libraries: $XLIB\n"
+ 		echo "XINCLUDE=$XINCLUDE" >> _Makefile.header
+ 		echo "XLIB=$XLIB" >> _Makefile.header
+ 		printf "#define WITH_X11\n" >> config.h
+-	fi
+ 
+-	rm -f _test_x11.c
+ fi
+ 
+ 
+@@ -549,8 +398,8 @@
+ 		rm -f _testprog
+ 		$CC $CFLAGS -O3 _testprog.c -o _testprog 2> /dev/null
+ 		if [ -x _testprog ]; then
+-			CFLAGS="-O3 $CFLAGS"
+-			printf "yes, -O3\n"
++			CFLAGS="-O0 $CFLAGS"
++			printf "yes, -O0\n"
+ 		else
+ 			CFLAGS="-O $CFLAGS"
+ 			printf "yes, -O\n"
+@@ -843,83 +692,17 @@
+ 
+ #  Check for PRIx64 in inttypes.h:
+ printf "checking for PRIx64 in inttypes.h... "
+-printf "#include <inttypes.h>\nint main(int argc, char *argv[])\n
+-{\n#ifdef PRIx64\nreturn 0;\n#else\nreturn 1;\n#endif\n}\n" > _testpri.c
+-$CC $CFLAGS _testpri.c -o _testpri 2> /dev/null
+-if [ ! -x _testpri ]; then
+-	printf "\nERROR! COULD NOT COMPILE PRIx64 TEST PROGRAM AT ALL!\n"
+-	exit
+-else
+-	if ./_testpri; then
+-		printf "yes\n"
+-	else
+-		$CC $CFLAGS -D__STDC_FORMAT_MACROS _testpri.c -o _testpri 2> /dev/null
+-		if [ -x _testpri ]; then
+-			printf "using __STDC_FORMAT_MACROS\n"
+-			CFLAGS="$CFLAGS -D__STDC_FORMAT_MACROS"
+-		else
+-			printf "no, using an ugly hack instead, "
+-			printf "#define NO_C99_PRINTF_DEFINES\n" >> config.h
+-
+-			# Try llx first:
+-			printf "#include <stdio.h>\n#include <inttypes.h>\nint main(int argc, char *argv[]){
+-			    printf(\"%%llx\\\n\", (int64_t)128);return 0;}\n" > _testpri.c
+-			rm -f _testpri
+-			$CC $CFLAGS $CWARNINGS _testpri.c -o _testpri 2> /dev/null
+-			if [ z`./_testpri` = z80 ]; then
+-				printf "PRIx64=llx\n"
+-				printf "#define NO_C99_64BIT_LONGLONG\n" >> config.h
+-			else
+-				# Try lx too:
+-				printf "#include <stdio.h>\n#include <inttypes.h>\nint main(int argc, char *argv[]){
+-				    printf(\"%%lx\\\n\", (int64_t)128);return 0;}\n" > _testpri.c
+-				rm -f _testpri
+-				$CC $CFLAGS $CWARNINGS _testpri.c -o _testpri 2> _testpri.result
+-				if [ z`./_testpri` = z80 ]; then
+-					printf "PRIx64=lx\n"
+-				else
+-					printf "\nFailed, neither lx nor llx worked!\n"
+-					exit
+-				fi
+-			fi
+-		fi
+-	fi
+-fi
+-rm -f _testpri.c _testpri _testpri.result
+ 
++printf "using __STDC_FORMAT_MACROS\n"
++CFLAGS="$CFLAGS -D__STDC_FORMAT_MACROS"
+ 
+ #  Check for 64-bit off_t:
+ printf "checking for 64-bit off_t... "
+-printf "#include <stdio.h>\n#include <inttypes.h>\n#include <sys/types.h>\n
+-int main(int argc, char *argv[]){printf(\"%%i\\\n\",
+- (int)sizeof(off_t));return 0;}\n" > _testoff.c
+-$CC $CFLAGS _testoff.c -o _testoff 2> /dev/null
+-if [ ! -x _testoff ]; then
+-	printf "\nWARNING! COULD NOT COMPILE off_t TEST PROGRAM AT ALL!\n"
+-else
+-	if [ z`./_testoff` = z8 ]; then
+-		printf "yes\n"
+-	else
+-		$CC $CFLAGS -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE \
+-		    _testoff.c -o _testoff 2> /dev/null
+-		if [ ! -x _testoff ]; then
+-			printf "\nWARNING! COULD NOT COMPILE off_t TEST "
+-			printf "PROGRAM!\n"
+-		else
+-			if [ z`./_testoff` = z8 ]; then
+-				CFLAGS="-D_FILE_OFFSET_BITS=64 $CFLAGS"
+-				CFLAGS="-D_LARGEFILE_SOURCE $CFLAGS"
+-				printf "using -D_FILE_OFFSET_BITS=64"
+-				printf " -D_LARGEFILE_SOURCE\n"
+-			else
+-				printf "NO\n"
+-				printf "Warning! No 64-bit off_t. Continuing "
+-				printf "anyway.\n"
+-			fi
+-		fi
+-	fi
+-fi
+-rm -f _testoff.c _testoff
++
++CFLAGS="-D_FILE_OFFSET_BITS=64 $CFLAGS"
++CFLAGS="-D_LARGEFILE_SOURCE $CFLAGS"
++printf "using -D_FILE_OFFSET_BITS=64"
++printf " -D_LARGEFILE_SOURCE\n"
+ 
+ 
+ #  Check for u_int8_t etc:
+@@ -1004,7 +787,7 @@
+ if (*p) printf("little\\\n"); else printf("big\\\n"); }
+ ' > _test_end.c
+ $CC $CFLAGS _test_end.c -o _test_end 2> /dev/null
+-X=`./_test_end`
++X=little
+ echo $X
+ if [ z$X = zlittle ]; then
+ 	printf "#define HOST_LITTLE_ENDIAN\n" >> config.h
+diff -ru gxemul-0.7.0.orig/src/cpus/Makefile.skel gxemul-0.7.0/src/cpus/Makefile.skel
+--- gxemul-0.7.0.orig/src/cpus/Makefile.skel	2021-04-22 18:04:18.000000000 +0000
++++ gxemul-0.7.0/src/cpus/Makefile.skel	2022-10-18 17:51:18.073318900 +0000
+@@ -21,184 +21,50 @@
+ 
+ ###############################################################################
+ 
+-cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c memory_rw.c \
+-	tmp_alpha_head.c tmp_alpha_tail.c
++cpu_alpha.o: cpu_alpha.c cpu_alpha_instr.c cpu_dyntrans.c memory_rw.c
+ 
+-cpu_alpha_instr.c: cpu_alpha_instr_alu.c tmp_alpha_misc.c
+-
+-tmp_alpha_misc.c: cpu_alpha_instr_loadstore.c generate_alpha_misc
+-	./generate_alpha_misc > tmp_alpha_misc.c
+-
+-tmp_alpha_head.c: generate_head
+-	./generate_head alpha Alpha > tmp_alpha_head.c
+-
+-tmp_alpha_tail.c: generate_tail
+-	./generate_tail alpha Alpha > tmp_alpha_tail.c
++cpu_alpha_instr.c: cpu_alpha_instr_alu.c
+ 
+ 
+ ###############################################################################
+ 
+-cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c memory_rw.c \
+-	tmp_arm_head.c tmp_arm_tail.c
++cpu_arm.o: cpu_arm.c cpu_arm_instr.c cpu_dyntrans.c memory_rw.c
+ 
+ cpu_arm_instr.c: cpu_arm_instr_misc.c
+ 
+-tmp_arm_loadstore.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore > tmp_arm_loadstore.c
+-tmp_arm_loadstore_p0_u0_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 0 0 0 > tmp_arm_loadstore_p0_u0_w0.c
+-tmp_arm_loadstore_p0_u0_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 0 0 1 > tmp_arm_loadstore_p0_u0_w1.c
+-tmp_arm_loadstore_p0_u1_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 0 1 0 > tmp_arm_loadstore_p0_u1_w0.c
+-tmp_arm_loadstore_p0_u1_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 0 1 1 > tmp_arm_loadstore_p0_u1_w1.c
+-tmp_arm_loadstore_p1_u0_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 1 0 0 > tmp_arm_loadstore_p1_u0_w0.c
+-tmp_arm_loadstore_p1_u0_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 1 0 1 > tmp_arm_loadstore_p1_u0_w1.c
+-tmp_arm_loadstore_p1_u1_w0.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 1 1 0 > tmp_arm_loadstore_p1_u1_w0.c
+-tmp_arm_loadstore_p1_u1_w1.c: cpu_arm_instr_loadstore.c generate_arm_loadstore
+-	./generate_arm_loadstore 1 1 1 > tmp_arm_loadstore_p1_u1_w1.c
+-
+-tmp_arm_multi.c: generate_arm_multi cpu_arm_multi.txt
+-	./generate_arm_multi `cat cpu_arm_multi.txt` > tmp_arm_multi.c
+-
+-tmp_arm_dpi.c: cpu_arm_instr_dpi.c generate_arm_dpi
+-	./generate_arm_dpi > tmp_arm_dpi.c
+-
+-tmp_arm_r0.c: generate_arm_r
+-	./generate_arm_r 0x000 0x0ff > tmp_arm_r0.c
+-tmp_arm_r1.c: generate_arm_r
+-	./generate_arm_r 0x100 0x1ff > tmp_arm_r1.c
+-tmp_arm_r2.c: generate_arm_r
+-	./generate_arm_r 0x200 0x2ff > tmp_arm_r2.c
+-tmp_arm_r3.c: generate_arm_r
+-	./generate_arm_r 0x300 0x3ff > tmp_arm_r3.c
+-tmp_arm_r4.c: generate_arm_r
+-	./generate_arm_r 0x400 0x4ff > tmp_arm_r4.c
+-tmp_arm_r5.c: generate_arm_r
+-	./generate_arm_r 0x500 0x5ff > tmp_arm_r5.c
+-tmp_arm_r6.c: generate_arm_r
+-	./generate_arm_r 0x600 0x6ff > tmp_arm_r6.c
+-tmp_arm_r7.c: generate_arm_r
+-	./generate_arm_r 0x700 0x7ff > tmp_arm_r7.c
+-tmp_arm_r8.c: generate_arm_r
+-	./generate_arm_r 0x800 0x8ff > tmp_arm_r8.c
+-tmp_arm_r9.c: generate_arm_r
+-	./generate_arm_r 0x900 0x9ff > tmp_arm_r9.c
+-tmp_arm_ra.c: generate_arm_r
+-	./generate_arm_r 0xa00 0xaff > tmp_arm_ra.c
+-tmp_arm_rb.c: generate_arm_r
+-	./generate_arm_r 0xb00 0xbff > tmp_arm_rb.c
+-tmp_arm_rc.c: generate_arm_r
+-	./generate_arm_r 0xc00 0xcff > tmp_arm_rc.c
+-tmp_arm_rd.c: generate_arm_r
+-	./generate_arm_r 0xd00 0xdff > tmp_arm_rd.c
+-tmp_arm_re.c: generate_arm_r
+-	./generate_arm_r 0xe00 0xeff > tmp_arm_re.c
+-tmp_arm_rf.c: generate_arm_r
+-	./generate_arm_r 0xf00 0xfff > tmp_arm_rf.c
+-
+-tmp_arm_r.c: generate_arm_r
+-	./generate_arm_r 0 0 > tmp_arm_r.c
+-
+-tmp_arm_head.c: generate_head
+-	./generate_head arm ARM > tmp_arm_head.c
+-
+-tmp_arm_tail.c: generate_tail
+-	./generate_tail arm ARM > tmp_arm_tail.c
+-
+-
+-###############################################################################
+-
+-cpu_i960.o: cpu_i960.c cpu_i960_instr.c cpu_dyntrans.c memory_rw.c \
+-	tmp_i960_head.c tmp_i960_tail.c
+-
+-tmp_i960_head.c: generate_head
+-	./generate_head i960 I960 > tmp_i960_head.c
+-
+-tmp_i960_tail.c: generate_tail
+-	./generate_tail i960 I960 > tmp_i960_tail.c
+-
+-
+-###############################################################################
+-
+-cpu_m88k.o: cpu_m88k.c cpu_m88k_instr.c cpu_dyntrans.c memory_rw.c \
+-	tmp_m88k_loadstore.c tmp_m88k_head.c tmp_m88k_tail.c tmp_m88k_bcnd.c
+-
+-tmp_m88k_bcnd.c: generate_m88k_bcnd
+-	./generate_m88k_bcnd > tmp_m88k_bcnd.c
+ 
+-tmp_m88k_loadstore.c: cpu_m88k_instr_loadstore.c generate_m88k_loadstore
+-	./generate_m88k_loadstore > tmp_m88k_loadstore.c
+-
+-tmp_m88k_head.c: generate_head
+-	./generate_head m88k M88K > tmp_m88k_head.c
++###############################################################################
+ 
+-tmp_m88k_tail.c: generate_tail
+-	./generate_tail m88k M88K > tmp_m88k_tail.c
++cpu_i960.o: cpu_i960.c cpu_i960_instr.c cpu_dyntrans.c memory_rw.c
+ 
+ 
+ ###############################################################################
+ 
+-cpu_mips.o: cpu_mips.c cpu_dyntrans.c memory_mips.c \
+-	cpu_mips_instr.c tmp_mips_loadstore.c tmp_mips_loadstore_multi.c \
+-	tmp_mips_head.c tmp_mips_tail.c
+-
+-memory_mips.c: memory_rw.c memory_mips_v2p.c
++cpu_m88k.o: cpu_m88k.c cpu_m88k_instr.c cpu_dyntrans.c memory_rw.c
+ 
+-tmp_mips_loadstore.c: cpu_mips_instr_loadstore.c generate_mips_loadstore
+-	./generate_mips_loadstore > tmp_mips_loadstore.c
+ 
+-tmp_mips_loadstore_multi.c: generate_mips_loadstore_multi
+-	./generate_mips_loadstore_multi > tmp_mips_loadstore_multi.c
++###############################################################################
+ 
+-tmp_mips_head.c: generate_head
+-	./generate_head mips MIPS > tmp_mips_head.c
++cpu_mips.o: cpu_mips.c cpu_dyntrans.c memory_mips.c \
++	cpu_mips_instr.c
+ 
+-tmp_mips_tail.c: generate_tail
+-	./generate_tail mips MIPS > tmp_mips_tail.c
++memory_mips.c: memory_rw.c memory_mips_v2p.c
+ 
+ 
+ ###############################################################################
+ 
+ cpu_ppc.o: cpu_ppc.c cpu_ppc_instr.c cpu_dyntrans.c memory_ppc.c \
+-	memory_rw.c tmp_ppc_head.c tmp_ppc_tail.c tmp_ppc_loadstore.c
+-
+-tmp_ppc_loadstore.c: cpu_ppc_instr_loadstore.c generate_ppc_loadstore
+-	./generate_ppc_loadstore > tmp_ppc_loadstore.c
+-
+-tmp_ppc_head.c: generate_head
+-	./generate_head ppc PPC > tmp_ppc_head.c
+-
+-tmp_ppc_tail.c: generate_tail
+-	./generate_tail ppc PPC > tmp_ppc_tail.c
++	memory_rw.c
+ 
+ 
+ ###############################################################################
+ 
+-cpu_riscv.o: cpu_riscv.c cpu_riscv_instr.c cpu_dyntrans.c memory_rw.c \
+-	tmp_riscv_head.c tmp_riscv_tail.c
+-
+-tmp_riscv_head.c: generate_head
+-	./generate_head riscv RISCV > tmp_riscv_head.c
+-
+-tmp_riscv_tail.c: generate_tail
+-	./generate_tail riscv RISCV > tmp_riscv_tail.c
++cpu_riscv.o: cpu_riscv.c cpu_riscv_instr.c cpu_dyntrans.c memory_rw.c
+ 
+ 
+ ###############################################################################
+ 
+-cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c memory_rw.c \
+-	tmp_sh_head.c tmp_sh_tail.c
+-
+-tmp_sh_head.c: generate_head
+-	./generate_head sh SH > tmp_sh_head.c
+-
+-tmp_sh_tail.c: generate_tail
+-	./generate_tail sh SH > tmp_sh_tail.c
++cpu_sh.o: cpu_sh.c cpu_sh_instr.c cpu_dyntrans.c memory_rw.c
+ 
+ 
+ ###############################################################################
+diff -ru gxemul-0.7.0.orig/src/devices/fonts/Makefile.skel gxemul-0.7.0/src/devices/fonts/Makefile.skel
+--- gxemul-0.7.0.orig/src/devices/fonts/Makefile.skel	2021-04-22 18:04:20.000000000 +0000
++++ gxemul-0.7.0/src/devices/fonts/Makefile.skel	2022-10-18 18:14:35.825867300 +0000
+@@ -1,13 +1,13 @@
+ all: font8x8.c font8x10.c font8x16.c
+ 
+ font8x8.c: Xconv_raw_to_c
+-	./Xconv_raw_to_c vt220l.808 font8x8 > font8x8.c
++	@echo foo.
+ 
+ font8x10.c: Xconv_raw_to_c
+-	./Xconv_raw_to_c vt220l.810 font8x10 > font8x10.c
++	@echo foo.
+ 
+ font8x16.c: Xconv_raw_to_c
+-	./Xconv_raw_to_c vt220l.816 font8x16 > font8x16.c
++	@echo foo.
+ 
+ clean:
+ 	rm -f Xconv_raw_to_c font8x16.c font8x8.c font8x10.c
+diff -ru gxemul-0.7.0.orig/src/include/Makefile.skel gxemul-0.7.0/src/include/Makefile.skel
+--- gxemul-0.7.0.orig/src/include/Makefile.skel	2021-04-22 18:04:15.000000000 +0000
++++ gxemul-0.7.0/src/include/Makefile.skel	2022-10-18 17:19:09.499745700 +0000
+@@ -5,7 +5,7 @@
+ all: ppc_spr_strings.h
+ 
+ ppc_spr_strings.h: make_ppc_spr_strings
+-	grep '#define.SPR_' thirdparty/ppc_spr.h |cut -d _ -f 2- | ./make_ppc_spr_strings > ppc_spr_strings.h
++	@echo foo.
+ 
+ clean:
+ 	rm -f *core ppc_spr_strings.h make_ppc_spr_strings
diff --git a/patches/gxemul/generated.patch b/patches/gxemul/generated.patch
new file mode 100644
index 00000000..1b457106
--- /dev/null
+++ b/patches/gxemul/generated.patch
@@ -0,0 +1,123136 @@
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_alpha_head.c gxemul-0.7.0/src/cpus/tmp_alpha_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_alpha_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_alpha_head.c	2022-10-18 16:37:22.074736200 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES ALPHA_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH alpha
++#define DYNTRANS_ALPHA
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N ALPHA_L2N
++#define DYNTRANS_L3N ALPHA_L3N
++#if !defined(ALPHA_L2N) || !defined(ALPHA_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE alpha_l2_64_table
++#define DYNTRANS_L3_64_TABLE alpha_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC alpha_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE ALPHA_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT ALPHA_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE alpha_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY alpha_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR ALPHA_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY ALPHA_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE alpha_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE alpha_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS alpha_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC alpha_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS alpha_combine_instructions
++#define DISASSEMBLE alpha_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_alpha_instr.c */
++#define instr(n) alpha_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) alpha32_instr_ ## n
++
++#endif
++
++
++#define X(n) void alpha_instr_ ## n(struct cpu *cpu, \
++ struct alpha_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.alpha.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct alpha_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_alpha_misc.c gxemul-0.7.0/src/cpus/tmp_alpha_misc.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_alpha_misc.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_alpha_misc.c	2022-10-18 16:37:22.075737100 +0000
+@@ -0,0 +1,4119 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#define ALU_N alpha_instr_addl
++#define ALU_LONG
++#define ALU_ADD
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_LONG
++#undef ALU_ADD
++#undef ALU_N
++#define ALU_N alpha_instr_subl
++#define ALU_LONG
++#define ALU_SUB
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_LONG
++#undef ALU_SUB
++#undef ALU_N
++#define ALU_N alpha_instr_s4addl
++#define ALU_LONG
++#define ALU_ADD
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_LONG
++#undef ALU_ADD
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s4subl
++#define ALU_LONG
++#define ALU_SUB
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_LONG
++#undef ALU_SUB
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s8addl
++#define ALU_LONG
++#define ALU_ADD
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_LONG
++#undef ALU_ADD
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_s8subl
++#define ALU_LONG
++#define ALU_SUB
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_LONG
++#undef ALU_SUB
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_addq
++#define ALU_ADD
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_ADD
++#undef ALU_N
++#define ALU_N alpha_instr_subq
++#define ALU_SUB
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_SUB
++#undef ALU_N
++#define ALU_N alpha_instr_s4addq
++#define ALU_ADD
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_ADD
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s4subq
++#define ALU_SUB
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_SUB
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s8addq
++#define ALU_ADD
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_ADD
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_s8subq
++#define ALU_SUB
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_SUB
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_addl_imm
++#define ALU_IMM
++#define ALU_LONG
++#define ALU_ADD
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_LONG
++#undef ALU_ADD
++#undef ALU_N
++#define ALU_N alpha_instr_subl_imm
++#define ALU_IMM
++#define ALU_LONG
++#define ALU_SUB
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_LONG
++#undef ALU_SUB
++#undef ALU_N
++#define ALU_N alpha_instr_s4addl_imm
++#define ALU_IMM
++#define ALU_LONG
++#define ALU_ADD
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_LONG
++#undef ALU_ADD
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s4subl_imm
++#define ALU_IMM
++#define ALU_LONG
++#define ALU_SUB
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_LONG
++#undef ALU_SUB
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s8addl_imm
++#define ALU_IMM
++#define ALU_LONG
++#define ALU_ADD
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_LONG
++#undef ALU_ADD
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_s8subl_imm
++#define ALU_IMM
++#define ALU_LONG
++#define ALU_SUB
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_LONG
++#undef ALU_SUB
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_addq_imm
++#define ALU_IMM
++#define ALU_ADD
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_ADD
++#undef ALU_N
++#define ALU_N alpha_instr_subq_imm
++#define ALU_IMM
++#define ALU_SUB
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_SUB
++#undef ALU_N
++#define ALU_N alpha_instr_s4addq_imm
++#define ALU_IMM
++#define ALU_ADD
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_ADD
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s4subq_imm
++#define ALU_IMM
++#define ALU_SUB
++#define ALU_S4
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_SUB
++#undef ALU_S4
++#undef ALU_N
++#define ALU_N alpha_instr_s8addq_imm
++#define ALU_IMM
++#define ALU_ADD
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_ADD
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_s8subq_imm
++#define ALU_IMM
++#define ALU_SUB
++#define ALU_S8
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_SUB
++#undef ALU_S8
++#undef ALU_N
++#define ALU_N alpha_instr_and
++#define ALU_AND
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_AND
++#undef ALU_N
++#define ALU_N alpha_instr_or
++#define ALU_OR
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_OR
++#undef ALU_N
++#define ALU_N alpha_instr_xor
++#define ALU_XOR
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_XOR
++#undef ALU_N
++#define ALU_N alpha_instr_zap
++#define ALU_ZAP
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_ZAP
++#undef ALU_N
++#define ALU_N alpha_instr_sll
++#define ALU_SLL
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_SLL
++#undef ALU_N
++#define ALU_N alpha_instr_srl
++#define ALU_SRL
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_SRL
++#undef ALU_N
++#define ALU_N alpha_instr_sra
++#define ALU_SRA
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_SRA
++#undef ALU_N
++#define ALU_N alpha_instr_andnot
++#define ALU_AND
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_NOT
++#undef ALU_AND
++#undef ALU_N
++#define ALU_N alpha_instr_ornot
++#define ALU_OR
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_NOT
++#undef ALU_OR
++#undef ALU_N
++#define ALU_N alpha_instr_xornot
++#define ALU_XOR
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_NOT
++#undef ALU_XOR
++#undef ALU_N
++#define ALU_N alpha_instr_zapnot
++#define ALU_ZAP
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_NOT
++#undef ALU_ZAP
++#undef ALU_N
++#define ALU_N alpha_instr_and_imm
++#define ALU_IMM
++#define ALU_AND
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_AND
++#undef ALU_N
++#define ALU_N alpha_instr_or_imm
++#define ALU_IMM
++#define ALU_OR
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_OR
++#undef ALU_N
++#define ALU_N alpha_instr_xor_imm
++#define ALU_IMM
++#define ALU_XOR
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_XOR
++#undef ALU_N
++#define ALU_N alpha_instr_zap_imm
++#define ALU_IMM
++#define ALU_ZAP
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_ZAP
++#undef ALU_N
++#define ALU_N alpha_instr_sll_imm
++#define ALU_IMM
++#define ALU_SLL
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_SLL
++#undef ALU_N
++#define ALU_N alpha_instr_srl_imm
++#define ALU_IMM
++#define ALU_SRL
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_SRL
++#undef ALU_N
++#define ALU_N alpha_instr_sra_imm
++#define ALU_IMM
++#define ALU_SRA
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_SRA
++#undef ALU_N
++#define ALU_N alpha_instr_andnot_imm
++#define ALU_IMM
++#define ALU_AND
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_NOT
++#undef ALU_AND
++#undef ALU_N
++#define ALU_N alpha_instr_ornot_imm
++#define ALU_IMM
++#define ALU_OR
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_NOT
++#undef ALU_OR
++#undef ALU_N
++#define ALU_N alpha_instr_xornot_imm
++#define ALU_IMM
++#define ALU_XOR
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_NOT
++#undef ALU_XOR
++#undef ALU_N
++#define ALU_N alpha_instr_zapnot_imm
++#define ALU_IMM
++#define ALU_ZAP
++#define ALU_NOT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_NOT
++#undef ALU_ZAP
++#undef ALU_N
++#define ALU_CMP
++#define ALU_N alpha_instr_cmpult
++#define ALU_UNSIGNED
++#define ALU_CMP_LT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_UNSIGNED
++#undef ALU_CMP_LT
++#undef ALU_N
++#define ALU_N alpha_instr_cmpeq
++#define ALU_CMP_EQ
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMP_EQ
++#undef ALU_N
++#define ALU_N alpha_instr_cmpule
++#define ALU_UNSIGNED
++#define ALU_CMP_LE
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_UNSIGNED
++#undef ALU_CMP_LE
++#undef ALU_N
++#define ALU_N alpha_instr_cmplt
++#define ALU_CMP_LT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMP_LT
++#undef ALU_N
++#define ALU_N alpha_instr_cmple
++#define ALU_CMP_LE
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMP_LE
++#undef ALU_N
++#define ALU_N alpha_instr_cmpult_imm
++#define ALU_IMM
++#define ALU_UNSIGNED
++#define ALU_CMP_LT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_UNSIGNED
++#undef ALU_CMP_LT
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmpeq_imm
++#define ALU_IMM
++#define ALU_CMP_EQ
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMP_EQ
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmpule_imm
++#define ALU_IMM
++#define ALU_UNSIGNED
++#define ALU_CMP_LE
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_UNSIGNED
++#undef ALU_CMP_LE
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmplt_imm
++#define ALU_IMM
++#define ALU_CMP_LT
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMP_LT
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmple_imm
++#define ALU_IMM
++#define ALU_CMP_LE
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMP_LE
++#undef ALU_IMM
++#undef ALU_N
++#undef ALU_CMP
++#define ALU_CMOV
++#define ALU_N alpha_instr_cmovlbs
++#define ALU_CMOV_lbs
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_lbs
++#undef ALU_N
++#define ALU_N alpha_instr_cmovlbc
++#define ALU_CMOV_lbc
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_lbc
++#undef ALU_N
++#define ALU_N alpha_instr_cmoveq
++#define ALU_CMOV_eq
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_eq
++#undef ALU_N
++#define ALU_N alpha_instr_cmovne
++#define ALU_CMOV_ne
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_ne
++#undef ALU_N
++#define ALU_N alpha_instr_cmovlt
++#define ALU_CMOV_lt
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_lt
++#undef ALU_N
++#define ALU_N alpha_instr_cmovge
++#define ALU_CMOV_ge
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_ge
++#undef ALU_N
++#define ALU_N alpha_instr_cmovle
++#define ALU_CMOV_le
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_le
++#undef ALU_N
++#define ALU_N alpha_instr_cmovgt
++#define ALU_CMOV_gt
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_gt
++#undef ALU_N
++#define ALU_N alpha_instr_cmovlbs_imm
++#define ALU_IMM
++#define ALU_CMOV_lbs
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_lbs
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmovlbc_imm
++#define ALU_IMM
++#define ALU_CMOV_lbc
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_lbc
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmoveq_imm
++#define ALU_IMM
++#define ALU_CMOV_eq
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_eq
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmovne_imm
++#define ALU_IMM
++#define ALU_CMOV_ne
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_ne
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmovlt_imm
++#define ALU_IMM
++#define ALU_CMOV_lt
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_lt
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmovge_imm
++#define ALU_IMM
++#define ALU_CMOV_ge
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_ge
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmovle_imm
++#define ALU_IMM
++#define ALU_CMOV_le
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_le
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_N alpha_instr_cmovgt_imm
++#define ALU_IMM
++#define ALU_CMOV_gt
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_CMOV_gt
++#undef ALU_IMM
++#undef ALU_N
++#undef ALU_CMOV
++#define ALU_CMPBGE
++#define ALU_N alpha_instr_cmpbge
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_N
++#define ALU_N alpha_instr_cmpbge_imm
++#define ALU_IMM
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_IMM
++#undef ALU_N
++#undef ALU_CMPBGE
++#define ALU_MSK
++#define ALU_N alpha_instr_mskwh
++#define ALU_W
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_MSK
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_msklh
++#define ALU_L
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_MSK
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskqh
++#define ALU_Q
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_MSK
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extwh
++#define ALU_W
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_EXT
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extlh
++#define ALU_L
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_EXT
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extqh
++#define ALU_Q
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_EXT
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_inswh
++#define ALU_W
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_INS
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_inslh
++#define ALU_L
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_INS
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insqh
++#define ALU_Q
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_INS
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskbl
++#define ALU_B
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_B
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskwl
++#define ALU_W
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskll
++#define ALU_L
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskql
++#define ALU_Q
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extbl
++#define ALU_B
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_B
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extwl
++#define ALU_W
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extll
++#define ALU_L
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extql
++#define ALU_Q
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insbl
++#define ALU_B
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_B
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_inswl
++#define ALU_W
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insll
++#define ALU_L
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insql
++#define ALU_Q
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskwh_imm
++#define ALU_IMM
++#define ALU_W
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_MSK
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_msklh_imm
++#define ALU_IMM
++#define ALU_L
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_MSK
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskqh_imm
++#define ALU_IMM
++#define ALU_Q
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_MSK
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extwh_imm
++#define ALU_IMM
++#define ALU_W
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_EXT
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extlh_imm
++#define ALU_IMM
++#define ALU_L
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_EXT
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extqh_imm
++#define ALU_IMM
++#define ALU_Q
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_EXT
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_inswh_imm
++#define ALU_IMM
++#define ALU_W
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_INS
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_inslh_imm
++#define ALU_IMM
++#define ALU_L
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_INS
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insqh_imm
++#define ALU_IMM
++#define ALU_Q
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_INS
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskbl_imm
++#define ALU_IMM
++#define ALU_B
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_B
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskwl_imm
++#define ALU_IMM
++#define ALU_W
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskll_imm
++#define ALU_IMM
++#define ALU_L
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_MSK
++#define ALU_N alpha_instr_mskql_imm
++#define ALU_IMM
++#define ALU_Q
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_MSK
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extbl_imm
++#define ALU_IMM
++#define ALU_B
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_B
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extwl_imm
++#define ALU_IMM
++#define ALU_W
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extll_imm
++#define ALU_IMM
++#define ALU_L
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_EXT
++#define ALU_N alpha_instr_extql_imm
++#define ALU_IMM
++#define ALU_Q
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_EXT
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insbl_imm
++#define ALU_IMM
++#define ALU_B
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_B
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_inswl_imm
++#define ALU_IMM
++#define ALU_W
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_W
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insll_imm
++#define ALU_IMM
++#define ALU_L
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_L
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define ALU_INS
++#define ALU_N alpha_instr_insql_imm
++#define ALU_IMM
++#define ALU_Q
++#define ALU_LO
++#include "cpu_alpha_instr_alu.c"
++#undef ALU_Q
++#undef ALU_INS
++#undef ALU_LO
++#undef ALU_IMM
++#undef ALU_N
++#define LS_B
++#define LS_GENERIC_N alpha_generic_stb
++#define LS_N alpha_instr_stb
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#define LS_W
++#define LS_GENERIC_N alpha_generic_stw
++#define LS_N alpha_instr_stw
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#define LS_L
++#define LS_GENERIC_N alpha_generic_stl
++#define LS_N alpha_instr_stl
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_stq
++#define LS_N alpha_instr_stq
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#define LS_IGNORE_OFFSET
++#define LS_B
++#define LS_GENERIC_N alpha_generic_stb
++#define LS_N alpha_instr_stb_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_W
++#define LS_GENERIC_N alpha_generic_stw
++#define LS_N alpha_instr_stw_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_L
++#define LS_GENERIC_N alpha_generic_stl
++#define LS_N alpha_instr_stl_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_stq
++#define LS_N alpha_instr_stq_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_B
++#define LS_GENERIC_N alpha_generic_ldb
++#define LS_N alpha_instr_ldb
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_W
++#define LS_GENERIC_N alpha_generic_ldw
++#define LS_N alpha_instr_ldw
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_L
++#define LS_GENERIC_N alpha_generic_ldl
++#define LS_N alpha_instr_ldl
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_ldq
++#define LS_N alpha_instr_ldq
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LOAD
++#define LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_B
++#define LS_GENERIC_N alpha_generic_ldb
++#define LS_N alpha_instr_ldb_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_LOAD
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_W
++#define LS_GENERIC_N alpha_generic_ldw
++#define LS_N alpha_instr_ldw_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_LOAD
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_L
++#define LS_GENERIC_N alpha_generic_ldl
++#define LS_N alpha_instr_ldl_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_LOAD
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_ldq
++#define LS_N alpha_instr_ldq_0
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LOAD
++#undef LS_IGNORE_OFFSET
++#define LS_LLSC
++#define LS_L
++#define LS_GENERIC_N alpha_generic_stl_llsc
++#define LS_N alpha_instr_stl_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_LLSC
++#define LS_LLSC
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_stq_llsc
++#define LS_N alpha_instr_stq_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LLSC
++#define LS_IGNORE_OFFSET
++#define LS_LLSC
++#define LS_L
++#define LS_GENERIC_N alpha_generic_stl_llsc
++#define LS_N alpha_instr_stl_0_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_LLSC
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_LLSC
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_stq_llsc
++#define LS_N alpha_instr_stq_0_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LLSC
++#undef LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_LLSC
++#define LS_L
++#define LS_GENERIC_N alpha_generic_ldl_llsc
++#define LS_N alpha_instr_ldl_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_LOAD
++#undef LS_LLSC
++#define LS_LOAD
++#define LS_LLSC
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_ldq_llsc
++#define LS_N alpha_instr_ldq_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LOAD
++#undef LS_LLSC
++#define LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_LLSC
++#define LS_L
++#define LS_GENERIC_N alpha_generic_ldl_llsc
++#define LS_N alpha_instr_ldl_0_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_L
++#undef LS_LOAD
++#undef LS_LLSC
++#undef LS_IGNORE_OFFSET
++#define LS_IGNORE_OFFSET
++#define LS_LOAD
++#define LS_LLSC
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_ldq_llsc
++#define LS_N alpha_instr_ldq_0_llsc
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LOAD
++#undef LS_LLSC
++#undef LS_IGNORE_OFFSET
++#define LS_UNALIGNED
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_stq_u
++#define LS_N alpha_instr_stq_u
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#define LS_LOAD
++#define LS_Q
++#define LS_GENERIC_N alpha_generic_ldq_u
++#define LS_N alpha_instr_ldq_u
++#include "cpu_alpha_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_Q
++#undef LS_LOAD
++#undef LS_UNALIGNED
++
++
++void (*alpha_loadstore[32])(struct cpu *, struct alpha_instr_call *) = {
++	alpha_instr_stb,
++	alpha_instr_stw,
++	alpha_instr_stl,
++	alpha_instr_stq,
++	alpha_instr_stb_0,
++	alpha_instr_stw_0,
++	alpha_instr_stl_0,
++	alpha_instr_stq_0,
++	alpha_instr_ldb,
++	alpha_instr_ldw,
++	alpha_instr_ldl,
++	alpha_instr_ldq,
++	alpha_instr_ldb_0,
++	alpha_instr_ldw_0,
++	alpha_instr_ldl_0,
++	alpha_instr_ldq_0,
++	alpha_instr_nop,
++	alpha_instr_nop,
++	alpha_instr_stl_llsc,
++	alpha_instr_stq_llsc,
++	alpha_instr_nop,
++	alpha_instr_nop,
++	alpha_instr_stl_0_llsc,
++	alpha_instr_stq_0_llsc,
++	alpha_instr_nop,
++	alpha_instr_nop,
++	alpha_instr_ldl_llsc,
++	alpha_instr_ldq_llsc,
++	alpha_instr_nop,
++	alpha_instr_nop,
++	alpha_instr_ldl_0_llsc,
++	alpha_instr_ldq_0_llsc,
++};
++
++static void alpha_instr_mov_0_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_0_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[0]; }
++static void alpha_instr_mov_1_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_1_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[1]; }
++static void alpha_instr_mov_2_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_2_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[2]; }
++static void alpha_instr_mov_3_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_3_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[3]; }
++static void alpha_instr_mov_4_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_4_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[4]; }
++static void alpha_instr_mov_5_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_5_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[5]; }
++static void alpha_instr_mov_6_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_6_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[6]; }
++static void alpha_instr_mov_7_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_7_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[7]; }
++static void alpha_instr_mov_8_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_8_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[8]; }
++static void alpha_instr_mov_9_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_9_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[9]; }
++static void alpha_instr_mov_10_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_10_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[10]; }
++static void alpha_instr_mov_11_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_11_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[11]; }
++static void alpha_instr_mov_12_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_12_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[12]; }
++static void alpha_instr_mov_13_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_13_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[13]; }
++static void alpha_instr_mov_14_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_14_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[14]; }
++static void alpha_instr_mov_15_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_15_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[15]; }
++static void alpha_instr_mov_16_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_16_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[16]; }
++static void alpha_instr_mov_17_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_17_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[17]; }
++static void alpha_instr_mov_18_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_18_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[18]; }
++static void alpha_instr_mov_19_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_19_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[19]; }
++static void alpha_instr_mov_20_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_20_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[20]; }
++static void alpha_instr_mov_21_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_21_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[21]; }
++static void alpha_instr_mov_22_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_22_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[22]; }
++static void alpha_instr_mov_23_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_23_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[23]; }
++static void alpha_instr_mov_24_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_24_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[24]; }
++static void alpha_instr_mov_25_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_25_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[25]; }
++static void alpha_instr_mov_26_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_26_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[26]; }
++static void alpha_instr_mov_27_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_27_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[27]; }
++static void alpha_instr_mov_28_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_28_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[28]; }
++static void alpha_instr_mov_29_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_29_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[29]; }
++static void alpha_instr_mov_30_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_30_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[30]; }
++static void alpha_instr_mov_31_0(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[0] = 0; }
++static void alpha_instr_mov_31_1(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[1] = 0; }
++static void alpha_instr_mov_31_2(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[2] = 0; }
++static void alpha_instr_mov_31_3(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[3] = 0; }
++static void alpha_instr_mov_31_4(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[4] = 0; }
++static void alpha_instr_mov_31_5(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[5] = 0; }
++static void alpha_instr_mov_31_6(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[6] = 0; }
++static void alpha_instr_mov_31_7(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[7] = 0; }
++static void alpha_instr_mov_31_8(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[8] = 0; }
++static void alpha_instr_mov_31_9(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[9] = 0; }
++static void alpha_instr_mov_31_10(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[10] = 0; }
++static void alpha_instr_mov_31_11(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[11] = 0; }
++static void alpha_instr_mov_31_12(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[12] = 0; }
++static void alpha_instr_mov_31_13(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[13] = 0; }
++static void alpha_instr_mov_31_14(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[14] = 0; }
++static void alpha_instr_mov_31_15(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[15] = 0; }
++static void alpha_instr_mov_31_16(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[16] = 0; }
++static void alpha_instr_mov_31_17(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[17] = 0; }
++static void alpha_instr_mov_31_18(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[18] = 0; }
++static void alpha_instr_mov_31_19(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[19] = 0; }
++static void alpha_instr_mov_31_20(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[20] = 0; }
++static void alpha_instr_mov_31_21(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[21] = 0; }
++static void alpha_instr_mov_31_22(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[22] = 0; }
++static void alpha_instr_mov_31_23(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[23] = 0; }
++static void alpha_instr_mov_31_24(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[24] = 0; }
++static void alpha_instr_mov_31_25(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[25] = 0; }
++static void alpha_instr_mov_31_26(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[26] = 0; }
++static void alpha_instr_mov_31_27(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[27] = 0; }
++static void alpha_instr_mov_31_28(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[28] = 0; }
++static void alpha_instr_mov_31_29(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[29] = 0; }
++static void alpha_instr_mov_31_30(struct cpu *cpu, struct alpha_instr_call *ic)
++{ cpu->cd.alpha.r[30] = 0; }
++
++
++void (*alpha_mov_r_r[32*31])(struct cpu *, struct alpha_instr_call *) = {
++	alpha_instr_nop,
++	alpha_instr_mov_1_0,
++	alpha_instr_mov_2_0,
++	alpha_instr_mov_3_0,
++	alpha_instr_mov_4_0,
++	alpha_instr_mov_5_0,
++	alpha_instr_mov_6_0,
++	alpha_instr_mov_7_0,
++	alpha_instr_mov_8_0,
++	alpha_instr_mov_9_0,
++	alpha_instr_mov_10_0,
++	alpha_instr_mov_11_0,
++	alpha_instr_mov_12_0,
++	alpha_instr_mov_13_0,
++	alpha_instr_mov_14_0,
++	alpha_instr_mov_15_0,
++	alpha_instr_mov_16_0,
++	alpha_instr_mov_17_0,
++	alpha_instr_mov_18_0,
++	alpha_instr_mov_19_0,
++	alpha_instr_mov_20_0,
++	alpha_instr_mov_21_0,
++	alpha_instr_mov_22_0,
++	alpha_instr_mov_23_0,
++	alpha_instr_mov_24_0,
++	alpha_instr_mov_25_0,
++	alpha_instr_mov_26_0,
++	alpha_instr_mov_27_0,
++	alpha_instr_mov_28_0,
++	alpha_instr_mov_29_0,
++	alpha_instr_mov_30_0,
++	alpha_instr_mov_31_0,
++	alpha_instr_mov_0_1,
++	alpha_instr_nop,
++	alpha_instr_mov_2_1,
++	alpha_instr_mov_3_1,
++	alpha_instr_mov_4_1,
++	alpha_instr_mov_5_1,
++	alpha_instr_mov_6_1,
++	alpha_instr_mov_7_1,
++	alpha_instr_mov_8_1,
++	alpha_instr_mov_9_1,
++	alpha_instr_mov_10_1,
++	alpha_instr_mov_11_1,
++	alpha_instr_mov_12_1,
++	alpha_instr_mov_13_1,
++	alpha_instr_mov_14_1,
++	alpha_instr_mov_15_1,
++	alpha_instr_mov_16_1,
++	alpha_instr_mov_17_1,
++	alpha_instr_mov_18_1,
++	alpha_instr_mov_19_1,
++	alpha_instr_mov_20_1,
++	alpha_instr_mov_21_1,
++	alpha_instr_mov_22_1,
++	alpha_instr_mov_23_1,
++	alpha_instr_mov_24_1,
++	alpha_instr_mov_25_1,
++	alpha_instr_mov_26_1,
++	alpha_instr_mov_27_1,
++	alpha_instr_mov_28_1,
++	alpha_instr_mov_29_1,
++	alpha_instr_mov_30_1,
++	alpha_instr_mov_31_1,
++	alpha_instr_mov_0_2,
++	alpha_instr_mov_1_2,
++	alpha_instr_nop,
++	alpha_instr_mov_3_2,
++	alpha_instr_mov_4_2,
++	alpha_instr_mov_5_2,
++	alpha_instr_mov_6_2,
++	alpha_instr_mov_7_2,
++	alpha_instr_mov_8_2,
++	alpha_instr_mov_9_2,
++	alpha_instr_mov_10_2,
++	alpha_instr_mov_11_2,
++	alpha_instr_mov_12_2,
++	alpha_instr_mov_13_2,
++	alpha_instr_mov_14_2,
++	alpha_instr_mov_15_2,
++	alpha_instr_mov_16_2,
++	alpha_instr_mov_17_2,
++	alpha_instr_mov_18_2,
++	alpha_instr_mov_19_2,
++	alpha_instr_mov_20_2,
++	alpha_instr_mov_21_2,
++	alpha_instr_mov_22_2,
++	alpha_instr_mov_23_2,
++	alpha_instr_mov_24_2,
++	alpha_instr_mov_25_2,
++	alpha_instr_mov_26_2,
++	alpha_instr_mov_27_2,
++	alpha_instr_mov_28_2,
++	alpha_instr_mov_29_2,
++	alpha_instr_mov_30_2,
++	alpha_instr_mov_31_2,
++	alpha_instr_mov_0_3,
++	alpha_instr_mov_1_3,
++	alpha_instr_mov_2_3,
++	alpha_instr_nop,
++	alpha_instr_mov_4_3,
++	alpha_instr_mov_5_3,
++	alpha_instr_mov_6_3,
++	alpha_instr_mov_7_3,
++	alpha_instr_mov_8_3,
++	alpha_instr_mov_9_3,
++	alpha_instr_mov_10_3,
++	alpha_instr_mov_11_3,
++	alpha_instr_mov_12_3,
++	alpha_instr_mov_13_3,
++	alpha_instr_mov_14_3,
++	alpha_instr_mov_15_3,
++	alpha_instr_mov_16_3,
++	alpha_instr_mov_17_3,
++	alpha_instr_mov_18_3,
++	alpha_instr_mov_19_3,
++	alpha_instr_mov_20_3,
++	alpha_instr_mov_21_3,
++	alpha_instr_mov_22_3,
++	alpha_instr_mov_23_3,
++	alpha_instr_mov_24_3,
++	alpha_instr_mov_25_3,
++	alpha_instr_mov_26_3,
++	alpha_instr_mov_27_3,
++	alpha_instr_mov_28_3,
++	alpha_instr_mov_29_3,
++	alpha_instr_mov_30_3,
++	alpha_instr_mov_31_3,
++	alpha_instr_mov_0_4,
++	alpha_instr_mov_1_4,
++	alpha_instr_mov_2_4,
++	alpha_instr_mov_3_4,
++	alpha_instr_nop,
++	alpha_instr_mov_5_4,
++	alpha_instr_mov_6_4,
++	alpha_instr_mov_7_4,
++	alpha_instr_mov_8_4,
++	alpha_instr_mov_9_4,
++	alpha_instr_mov_10_4,
++	alpha_instr_mov_11_4,
++	alpha_instr_mov_12_4,
++	alpha_instr_mov_13_4,
++	alpha_instr_mov_14_4,
++	alpha_instr_mov_15_4,
++	alpha_instr_mov_16_4,
++	alpha_instr_mov_17_4,
++	alpha_instr_mov_18_4,
++	alpha_instr_mov_19_4,
++	alpha_instr_mov_20_4,
++	alpha_instr_mov_21_4,
++	alpha_instr_mov_22_4,
++	alpha_instr_mov_23_4,
++	alpha_instr_mov_24_4,
++	alpha_instr_mov_25_4,
++	alpha_instr_mov_26_4,
++	alpha_instr_mov_27_4,
++	alpha_instr_mov_28_4,
++	alpha_instr_mov_29_4,
++	alpha_instr_mov_30_4,
++	alpha_instr_mov_31_4,
++	alpha_instr_mov_0_5,
++	alpha_instr_mov_1_5,
++	alpha_instr_mov_2_5,
++	alpha_instr_mov_3_5,
++	alpha_instr_mov_4_5,
++	alpha_instr_nop,
++	alpha_instr_mov_6_5,
++	alpha_instr_mov_7_5,
++	alpha_instr_mov_8_5,
++	alpha_instr_mov_9_5,
++	alpha_instr_mov_10_5,
++	alpha_instr_mov_11_5,
++	alpha_instr_mov_12_5,
++	alpha_instr_mov_13_5,
++	alpha_instr_mov_14_5,
++	alpha_instr_mov_15_5,
++	alpha_instr_mov_16_5,
++	alpha_instr_mov_17_5,
++	alpha_instr_mov_18_5,
++	alpha_instr_mov_19_5,
++	alpha_instr_mov_20_5,
++	alpha_instr_mov_21_5,
++	alpha_instr_mov_22_5,
++	alpha_instr_mov_23_5,
++	alpha_instr_mov_24_5,
++	alpha_instr_mov_25_5,
++	alpha_instr_mov_26_5,
++	alpha_instr_mov_27_5,
++	alpha_instr_mov_28_5,
++	alpha_instr_mov_29_5,
++	alpha_instr_mov_30_5,
++	alpha_instr_mov_31_5,
++	alpha_instr_mov_0_6,
++	alpha_instr_mov_1_6,
++	alpha_instr_mov_2_6,
++	alpha_instr_mov_3_6,
++	alpha_instr_mov_4_6,
++	alpha_instr_mov_5_6,
++	alpha_instr_nop,
++	alpha_instr_mov_7_6,
++	alpha_instr_mov_8_6,
++	alpha_instr_mov_9_6,
++	alpha_instr_mov_10_6,
++	alpha_instr_mov_11_6,
++	alpha_instr_mov_12_6,
++	alpha_instr_mov_13_6,
++	alpha_instr_mov_14_6,
++	alpha_instr_mov_15_6,
++	alpha_instr_mov_16_6,
++	alpha_instr_mov_17_6,
++	alpha_instr_mov_18_6,
++	alpha_instr_mov_19_6,
++	alpha_instr_mov_20_6,
++	alpha_instr_mov_21_6,
++	alpha_instr_mov_22_6,
++	alpha_instr_mov_23_6,
++	alpha_instr_mov_24_6,
++	alpha_instr_mov_25_6,
++	alpha_instr_mov_26_6,
++	alpha_instr_mov_27_6,
++	alpha_instr_mov_28_6,
++	alpha_instr_mov_29_6,
++	alpha_instr_mov_30_6,
++	alpha_instr_mov_31_6,
++	alpha_instr_mov_0_7,
++	alpha_instr_mov_1_7,
++	alpha_instr_mov_2_7,
++	alpha_instr_mov_3_7,
++	alpha_instr_mov_4_7,
++	alpha_instr_mov_5_7,
++	alpha_instr_mov_6_7,
++	alpha_instr_nop,
++	alpha_instr_mov_8_7,
++	alpha_instr_mov_9_7,
++	alpha_instr_mov_10_7,
++	alpha_instr_mov_11_7,
++	alpha_instr_mov_12_7,
++	alpha_instr_mov_13_7,
++	alpha_instr_mov_14_7,
++	alpha_instr_mov_15_7,
++	alpha_instr_mov_16_7,
++	alpha_instr_mov_17_7,
++	alpha_instr_mov_18_7,
++	alpha_instr_mov_19_7,
++	alpha_instr_mov_20_7,
++	alpha_instr_mov_21_7,
++	alpha_instr_mov_22_7,
++	alpha_instr_mov_23_7,
++	alpha_instr_mov_24_7,
++	alpha_instr_mov_25_7,
++	alpha_instr_mov_26_7,
++	alpha_instr_mov_27_7,
++	alpha_instr_mov_28_7,
++	alpha_instr_mov_29_7,
++	alpha_instr_mov_30_7,
++	alpha_instr_mov_31_7,
++	alpha_instr_mov_0_8,
++	alpha_instr_mov_1_8,
++	alpha_instr_mov_2_8,
++	alpha_instr_mov_3_8,
++	alpha_instr_mov_4_8,
++	alpha_instr_mov_5_8,
++	alpha_instr_mov_6_8,
++	alpha_instr_mov_7_8,
++	alpha_instr_nop,
++	alpha_instr_mov_9_8,
++	alpha_instr_mov_10_8,
++	alpha_instr_mov_11_8,
++	alpha_instr_mov_12_8,
++	alpha_instr_mov_13_8,
++	alpha_instr_mov_14_8,
++	alpha_instr_mov_15_8,
++	alpha_instr_mov_16_8,
++	alpha_instr_mov_17_8,
++	alpha_instr_mov_18_8,
++	alpha_instr_mov_19_8,
++	alpha_instr_mov_20_8,
++	alpha_instr_mov_21_8,
++	alpha_instr_mov_22_8,
++	alpha_instr_mov_23_8,
++	alpha_instr_mov_24_8,
++	alpha_instr_mov_25_8,
++	alpha_instr_mov_26_8,
++	alpha_instr_mov_27_8,
++	alpha_instr_mov_28_8,
++	alpha_instr_mov_29_8,
++	alpha_instr_mov_30_8,
++	alpha_instr_mov_31_8,
++	alpha_instr_mov_0_9,
++	alpha_instr_mov_1_9,
++	alpha_instr_mov_2_9,
++	alpha_instr_mov_3_9,
++	alpha_instr_mov_4_9,
++	alpha_instr_mov_5_9,
++	alpha_instr_mov_6_9,
++	alpha_instr_mov_7_9,
++	alpha_instr_mov_8_9,
++	alpha_instr_nop,
++	alpha_instr_mov_10_9,
++	alpha_instr_mov_11_9,
++	alpha_instr_mov_12_9,
++	alpha_instr_mov_13_9,
++	alpha_instr_mov_14_9,
++	alpha_instr_mov_15_9,
++	alpha_instr_mov_16_9,
++	alpha_instr_mov_17_9,
++	alpha_instr_mov_18_9,
++	alpha_instr_mov_19_9,
++	alpha_instr_mov_20_9,
++	alpha_instr_mov_21_9,
++	alpha_instr_mov_22_9,
++	alpha_instr_mov_23_9,
++	alpha_instr_mov_24_9,
++	alpha_instr_mov_25_9,
++	alpha_instr_mov_26_9,
++	alpha_instr_mov_27_9,
++	alpha_instr_mov_28_9,
++	alpha_instr_mov_29_9,
++	alpha_instr_mov_30_9,
++	alpha_instr_mov_31_9,
++	alpha_instr_mov_0_10,
++	alpha_instr_mov_1_10,
++	alpha_instr_mov_2_10,
++	alpha_instr_mov_3_10,
++	alpha_instr_mov_4_10,
++	alpha_instr_mov_5_10,
++	alpha_instr_mov_6_10,
++	alpha_instr_mov_7_10,
++	alpha_instr_mov_8_10,
++	alpha_instr_mov_9_10,
++	alpha_instr_nop,
++	alpha_instr_mov_11_10,
++	alpha_instr_mov_12_10,
++	alpha_instr_mov_13_10,
++	alpha_instr_mov_14_10,
++	alpha_instr_mov_15_10,
++	alpha_instr_mov_16_10,
++	alpha_instr_mov_17_10,
++	alpha_instr_mov_18_10,
++	alpha_instr_mov_19_10,
++	alpha_instr_mov_20_10,
++	alpha_instr_mov_21_10,
++	alpha_instr_mov_22_10,
++	alpha_instr_mov_23_10,
++	alpha_instr_mov_24_10,
++	alpha_instr_mov_25_10,
++	alpha_instr_mov_26_10,
++	alpha_instr_mov_27_10,
++	alpha_instr_mov_28_10,
++	alpha_instr_mov_29_10,
++	alpha_instr_mov_30_10,
++	alpha_instr_mov_31_10,
++	alpha_instr_mov_0_11,
++	alpha_instr_mov_1_11,
++	alpha_instr_mov_2_11,
++	alpha_instr_mov_3_11,
++	alpha_instr_mov_4_11,
++	alpha_instr_mov_5_11,
++	alpha_instr_mov_6_11,
++	alpha_instr_mov_7_11,
++	alpha_instr_mov_8_11,
++	alpha_instr_mov_9_11,
++	alpha_instr_mov_10_11,
++	alpha_instr_nop,
++	alpha_instr_mov_12_11,
++	alpha_instr_mov_13_11,
++	alpha_instr_mov_14_11,
++	alpha_instr_mov_15_11,
++	alpha_instr_mov_16_11,
++	alpha_instr_mov_17_11,
++	alpha_instr_mov_18_11,
++	alpha_instr_mov_19_11,
++	alpha_instr_mov_20_11,
++	alpha_instr_mov_21_11,
++	alpha_instr_mov_22_11,
++	alpha_instr_mov_23_11,
++	alpha_instr_mov_24_11,
++	alpha_instr_mov_25_11,
++	alpha_instr_mov_26_11,
++	alpha_instr_mov_27_11,
++	alpha_instr_mov_28_11,
++	alpha_instr_mov_29_11,
++	alpha_instr_mov_30_11,
++	alpha_instr_mov_31_11,
++	alpha_instr_mov_0_12,
++	alpha_instr_mov_1_12,
++	alpha_instr_mov_2_12,
++	alpha_instr_mov_3_12,
++	alpha_instr_mov_4_12,
++	alpha_instr_mov_5_12,
++	alpha_instr_mov_6_12,
++	alpha_instr_mov_7_12,
++	alpha_instr_mov_8_12,
++	alpha_instr_mov_9_12,
++	alpha_instr_mov_10_12,
++	alpha_instr_mov_11_12,
++	alpha_instr_nop,
++	alpha_instr_mov_13_12,
++	alpha_instr_mov_14_12,
++	alpha_instr_mov_15_12,
++	alpha_instr_mov_16_12,
++	alpha_instr_mov_17_12,
++	alpha_instr_mov_18_12,
++	alpha_instr_mov_19_12,
++	alpha_instr_mov_20_12,
++	alpha_instr_mov_21_12,
++	alpha_instr_mov_22_12,
++	alpha_instr_mov_23_12,
++	alpha_instr_mov_24_12,
++	alpha_instr_mov_25_12,
++	alpha_instr_mov_26_12,
++	alpha_instr_mov_27_12,
++	alpha_instr_mov_28_12,
++	alpha_instr_mov_29_12,
++	alpha_instr_mov_30_12,
++	alpha_instr_mov_31_12,
++	alpha_instr_mov_0_13,
++	alpha_instr_mov_1_13,
++	alpha_instr_mov_2_13,
++	alpha_instr_mov_3_13,
++	alpha_instr_mov_4_13,
++	alpha_instr_mov_5_13,
++	alpha_instr_mov_6_13,
++	alpha_instr_mov_7_13,
++	alpha_instr_mov_8_13,
++	alpha_instr_mov_9_13,
++	alpha_instr_mov_10_13,
++	alpha_instr_mov_11_13,
++	alpha_instr_mov_12_13,
++	alpha_instr_nop,
++	alpha_instr_mov_14_13,
++	alpha_instr_mov_15_13,
++	alpha_instr_mov_16_13,
++	alpha_instr_mov_17_13,
++	alpha_instr_mov_18_13,
++	alpha_instr_mov_19_13,
++	alpha_instr_mov_20_13,
++	alpha_instr_mov_21_13,
++	alpha_instr_mov_22_13,
++	alpha_instr_mov_23_13,
++	alpha_instr_mov_24_13,
++	alpha_instr_mov_25_13,
++	alpha_instr_mov_26_13,
++	alpha_instr_mov_27_13,
++	alpha_instr_mov_28_13,
++	alpha_instr_mov_29_13,
++	alpha_instr_mov_30_13,
++	alpha_instr_mov_31_13,
++	alpha_instr_mov_0_14,
++	alpha_instr_mov_1_14,
++	alpha_instr_mov_2_14,
++	alpha_instr_mov_3_14,
++	alpha_instr_mov_4_14,
++	alpha_instr_mov_5_14,
++	alpha_instr_mov_6_14,
++	alpha_instr_mov_7_14,
++	alpha_instr_mov_8_14,
++	alpha_instr_mov_9_14,
++	alpha_instr_mov_10_14,
++	alpha_instr_mov_11_14,
++	alpha_instr_mov_12_14,
++	alpha_instr_mov_13_14,
++	alpha_instr_nop,
++	alpha_instr_mov_15_14,
++	alpha_instr_mov_16_14,
++	alpha_instr_mov_17_14,
++	alpha_instr_mov_18_14,
++	alpha_instr_mov_19_14,
++	alpha_instr_mov_20_14,
++	alpha_instr_mov_21_14,
++	alpha_instr_mov_22_14,
++	alpha_instr_mov_23_14,
++	alpha_instr_mov_24_14,
++	alpha_instr_mov_25_14,
++	alpha_instr_mov_26_14,
++	alpha_instr_mov_27_14,
++	alpha_instr_mov_28_14,
++	alpha_instr_mov_29_14,
++	alpha_instr_mov_30_14,
++	alpha_instr_mov_31_14,
++	alpha_instr_mov_0_15,
++	alpha_instr_mov_1_15,
++	alpha_instr_mov_2_15,
++	alpha_instr_mov_3_15,
++	alpha_instr_mov_4_15,
++	alpha_instr_mov_5_15,
++	alpha_instr_mov_6_15,
++	alpha_instr_mov_7_15,
++	alpha_instr_mov_8_15,
++	alpha_instr_mov_9_15,
++	alpha_instr_mov_10_15,
++	alpha_instr_mov_11_15,
++	alpha_instr_mov_12_15,
++	alpha_instr_mov_13_15,
++	alpha_instr_mov_14_15,
++	alpha_instr_nop,
++	alpha_instr_mov_16_15,
++	alpha_instr_mov_17_15,
++	alpha_instr_mov_18_15,
++	alpha_instr_mov_19_15,
++	alpha_instr_mov_20_15,
++	alpha_instr_mov_21_15,
++	alpha_instr_mov_22_15,
++	alpha_instr_mov_23_15,
++	alpha_instr_mov_24_15,
++	alpha_instr_mov_25_15,
++	alpha_instr_mov_26_15,
++	alpha_instr_mov_27_15,
++	alpha_instr_mov_28_15,
++	alpha_instr_mov_29_15,
++	alpha_instr_mov_30_15,
++	alpha_instr_mov_31_15,
++	alpha_instr_mov_0_16,
++	alpha_instr_mov_1_16,
++	alpha_instr_mov_2_16,
++	alpha_instr_mov_3_16,
++	alpha_instr_mov_4_16,
++	alpha_instr_mov_5_16,
++	alpha_instr_mov_6_16,
++	alpha_instr_mov_7_16,
++	alpha_instr_mov_8_16,
++	alpha_instr_mov_9_16,
++	alpha_instr_mov_10_16,
++	alpha_instr_mov_11_16,
++	alpha_instr_mov_12_16,
++	alpha_instr_mov_13_16,
++	alpha_instr_mov_14_16,
++	alpha_instr_mov_15_16,
++	alpha_instr_nop,
++	alpha_instr_mov_17_16,
++	alpha_instr_mov_18_16,
++	alpha_instr_mov_19_16,
++	alpha_instr_mov_20_16,
++	alpha_instr_mov_21_16,
++	alpha_instr_mov_22_16,
++	alpha_instr_mov_23_16,
++	alpha_instr_mov_24_16,
++	alpha_instr_mov_25_16,
++	alpha_instr_mov_26_16,
++	alpha_instr_mov_27_16,
++	alpha_instr_mov_28_16,
++	alpha_instr_mov_29_16,
++	alpha_instr_mov_30_16,
++	alpha_instr_mov_31_16,
++	alpha_instr_mov_0_17,
++	alpha_instr_mov_1_17,
++	alpha_instr_mov_2_17,
++	alpha_instr_mov_3_17,
++	alpha_instr_mov_4_17,
++	alpha_instr_mov_5_17,
++	alpha_instr_mov_6_17,
++	alpha_instr_mov_7_17,
++	alpha_instr_mov_8_17,
++	alpha_instr_mov_9_17,
++	alpha_instr_mov_10_17,
++	alpha_instr_mov_11_17,
++	alpha_instr_mov_12_17,
++	alpha_instr_mov_13_17,
++	alpha_instr_mov_14_17,
++	alpha_instr_mov_15_17,
++	alpha_instr_mov_16_17,
++	alpha_instr_nop,
++	alpha_instr_mov_18_17,
++	alpha_instr_mov_19_17,
++	alpha_instr_mov_20_17,
++	alpha_instr_mov_21_17,
++	alpha_instr_mov_22_17,
++	alpha_instr_mov_23_17,
++	alpha_instr_mov_24_17,
++	alpha_instr_mov_25_17,
++	alpha_instr_mov_26_17,
++	alpha_instr_mov_27_17,
++	alpha_instr_mov_28_17,
++	alpha_instr_mov_29_17,
++	alpha_instr_mov_30_17,
++	alpha_instr_mov_31_17,
++	alpha_instr_mov_0_18,
++	alpha_instr_mov_1_18,
++	alpha_instr_mov_2_18,
++	alpha_instr_mov_3_18,
++	alpha_instr_mov_4_18,
++	alpha_instr_mov_5_18,
++	alpha_instr_mov_6_18,
++	alpha_instr_mov_7_18,
++	alpha_instr_mov_8_18,
++	alpha_instr_mov_9_18,
++	alpha_instr_mov_10_18,
++	alpha_instr_mov_11_18,
++	alpha_instr_mov_12_18,
++	alpha_instr_mov_13_18,
++	alpha_instr_mov_14_18,
++	alpha_instr_mov_15_18,
++	alpha_instr_mov_16_18,
++	alpha_instr_mov_17_18,
++	alpha_instr_nop,
++	alpha_instr_mov_19_18,
++	alpha_instr_mov_20_18,
++	alpha_instr_mov_21_18,
++	alpha_instr_mov_22_18,
++	alpha_instr_mov_23_18,
++	alpha_instr_mov_24_18,
++	alpha_instr_mov_25_18,
++	alpha_instr_mov_26_18,
++	alpha_instr_mov_27_18,
++	alpha_instr_mov_28_18,
++	alpha_instr_mov_29_18,
++	alpha_instr_mov_30_18,
++	alpha_instr_mov_31_18,
++	alpha_instr_mov_0_19,
++	alpha_instr_mov_1_19,
++	alpha_instr_mov_2_19,
++	alpha_instr_mov_3_19,
++	alpha_instr_mov_4_19,
++	alpha_instr_mov_5_19,
++	alpha_instr_mov_6_19,
++	alpha_instr_mov_7_19,
++	alpha_instr_mov_8_19,
++	alpha_instr_mov_9_19,
++	alpha_instr_mov_10_19,
++	alpha_instr_mov_11_19,
++	alpha_instr_mov_12_19,
++	alpha_instr_mov_13_19,
++	alpha_instr_mov_14_19,
++	alpha_instr_mov_15_19,
++	alpha_instr_mov_16_19,
++	alpha_instr_mov_17_19,
++	alpha_instr_mov_18_19,
++	alpha_instr_nop,
++	alpha_instr_mov_20_19,
++	alpha_instr_mov_21_19,
++	alpha_instr_mov_22_19,
++	alpha_instr_mov_23_19,
++	alpha_instr_mov_24_19,
++	alpha_instr_mov_25_19,
++	alpha_instr_mov_26_19,
++	alpha_instr_mov_27_19,
++	alpha_instr_mov_28_19,
++	alpha_instr_mov_29_19,
++	alpha_instr_mov_30_19,
++	alpha_instr_mov_31_19,
++	alpha_instr_mov_0_20,
++	alpha_instr_mov_1_20,
++	alpha_instr_mov_2_20,
++	alpha_instr_mov_3_20,
++	alpha_instr_mov_4_20,
++	alpha_instr_mov_5_20,
++	alpha_instr_mov_6_20,
++	alpha_instr_mov_7_20,
++	alpha_instr_mov_8_20,
++	alpha_instr_mov_9_20,
++	alpha_instr_mov_10_20,
++	alpha_instr_mov_11_20,
++	alpha_instr_mov_12_20,
++	alpha_instr_mov_13_20,
++	alpha_instr_mov_14_20,
++	alpha_instr_mov_15_20,
++	alpha_instr_mov_16_20,
++	alpha_instr_mov_17_20,
++	alpha_instr_mov_18_20,
++	alpha_instr_mov_19_20,
++	alpha_instr_nop,
++	alpha_instr_mov_21_20,
++	alpha_instr_mov_22_20,
++	alpha_instr_mov_23_20,
++	alpha_instr_mov_24_20,
++	alpha_instr_mov_25_20,
++	alpha_instr_mov_26_20,
++	alpha_instr_mov_27_20,
++	alpha_instr_mov_28_20,
++	alpha_instr_mov_29_20,
++	alpha_instr_mov_30_20,
++	alpha_instr_mov_31_20,
++	alpha_instr_mov_0_21,
++	alpha_instr_mov_1_21,
++	alpha_instr_mov_2_21,
++	alpha_instr_mov_3_21,
++	alpha_instr_mov_4_21,
++	alpha_instr_mov_5_21,
++	alpha_instr_mov_6_21,
++	alpha_instr_mov_7_21,
++	alpha_instr_mov_8_21,
++	alpha_instr_mov_9_21,
++	alpha_instr_mov_10_21,
++	alpha_instr_mov_11_21,
++	alpha_instr_mov_12_21,
++	alpha_instr_mov_13_21,
++	alpha_instr_mov_14_21,
++	alpha_instr_mov_15_21,
++	alpha_instr_mov_16_21,
++	alpha_instr_mov_17_21,
++	alpha_instr_mov_18_21,
++	alpha_instr_mov_19_21,
++	alpha_instr_mov_20_21,
++	alpha_instr_nop,
++	alpha_instr_mov_22_21,
++	alpha_instr_mov_23_21,
++	alpha_instr_mov_24_21,
++	alpha_instr_mov_25_21,
++	alpha_instr_mov_26_21,
++	alpha_instr_mov_27_21,
++	alpha_instr_mov_28_21,
++	alpha_instr_mov_29_21,
++	alpha_instr_mov_30_21,
++	alpha_instr_mov_31_21,
++	alpha_instr_mov_0_22,
++	alpha_instr_mov_1_22,
++	alpha_instr_mov_2_22,
++	alpha_instr_mov_3_22,
++	alpha_instr_mov_4_22,
++	alpha_instr_mov_5_22,
++	alpha_instr_mov_6_22,
++	alpha_instr_mov_7_22,
++	alpha_instr_mov_8_22,
++	alpha_instr_mov_9_22,
++	alpha_instr_mov_10_22,
++	alpha_instr_mov_11_22,
++	alpha_instr_mov_12_22,
++	alpha_instr_mov_13_22,
++	alpha_instr_mov_14_22,
++	alpha_instr_mov_15_22,
++	alpha_instr_mov_16_22,
++	alpha_instr_mov_17_22,
++	alpha_instr_mov_18_22,
++	alpha_instr_mov_19_22,
++	alpha_instr_mov_20_22,
++	alpha_instr_mov_21_22,
++	alpha_instr_nop,
++	alpha_instr_mov_23_22,
++	alpha_instr_mov_24_22,
++	alpha_instr_mov_25_22,
++	alpha_instr_mov_26_22,
++	alpha_instr_mov_27_22,
++	alpha_instr_mov_28_22,
++	alpha_instr_mov_29_22,
++	alpha_instr_mov_30_22,
++	alpha_instr_mov_31_22,
++	alpha_instr_mov_0_23,
++	alpha_instr_mov_1_23,
++	alpha_instr_mov_2_23,
++	alpha_instr_mov_3_23,
++	alpha_instr_mov_4_23,
++	alpha_instr_mov_5_23,
++	alpha_instr_mov_6_23,
++	alpha_instr_mov_7_23,
++	alpha_instr_mov_8_23,
++	alpha_instr_mov_9_23,
++	alpha_instr_mov_10_23,
++	alpha_instr_mov_11_23,
++	alpha_instr_mov_12_23,
++	alpha_instr_mov_13_23,
++	alpha_instr_mov_14_23,
++	alpha_instr_mov_15_23,
++	alpha_instr_mov_16_23,
++	alpha_instr_mov_17_23,
++	alpha_instr_mov_18_23,
++	alpha_instr_mov_19_23,
++	alpha_instr_mov_20_23,
++	alpha_instr_mov_21_23,
++	alpha_instr_mov_22_23,
++	alpha_instr_nop,
++	alpha_instr_mov_24_23,
++	alpha_instr_mov_25_23,
++	alpha_instr_mov_26_23,
++	alpha_instr_mov_27_23,
++	alpha_instr_mov_28_23,
++	alpha_instr_mov_29_23,
++	alpha_instr_mov_30_23,
++	alpha_instr_mov_31_23,
++	alpha_instr_mov_0_24,
++	alpha_instr_mov_1_24,
++	alpha_instr_mov_2_24,
++	alpha_instr_mov_3_24,
++	alpha_instr_mov_4_24,
++	alpha_instr_mov_5_24,
++	alpha_instr_mov_6_24,
++	alpha_instr_mov_7_24,
++	alpha_instr_mov_8_24,
++	alpha_instr_mov_9_24,
++	alpha_instr_mov_10_24,
++	alpha_instr_mov_11_24,
++	alpha_instr_mov_12_24,
++	alpha_instr_mov_13_24,
++	alpha_instr_mov_14_24,
++	alpha_instr_mov_15_24,
++	alpha_instr_mov_16_24,
++	alpha_instr_mov_17_24,
++	alpha_instr_mov_18_24,
++	alpha_instr_mov_19_24,
++	alpha_instr_mov_20_24,
++	alpha_instr_mov_21_24,
++	alpha_instr_mov_22_24,
++	alpha_instr_mov_23_24,
++	alpha_instr_nop,
++	alpha_instr_mov_25_24,
++	alpha_instr_mov_26_24,
++	alpha_instr_mov_27_24,
++	alpha_instr_mov_28_24,
++	alpha_instr_mov_29_24,
++	alpha_instr_mov_30_24,
++	alpha_instr_mov_31_24,
++	alpha_instr_mov_0_25,
++	alpha_instr_mov_1_25,
++	alpha_instr_mov_2_25,
++	alpha_instr_mov_3_25,
++	alpha_instr_mov_4_25,
++	alpha_instr_mov_5_25,
++	alpha_instr_mov_6_25,
++	alpha_instr_mov_7_25,
++	alpha_instr_mov_8_25,
++	alpha_instr_mov_9_25,
++	alpha_instr_mov_10_25,
++	alpha_instr_mov_11_25,
++	alpha_instr_mov_12_25,
++	alpha_instr_mov_13_25,
++	alpha_instr_mov_14_25,
++	alpha_instr_mov_15_25,
++	alpha_instr_mov_16_25,
++	alpha_instr_mov_17_25,
++	alpha_instr_mov_18_25,
++	alpha_instr_mov_19_25,
++	alpha_instr_mov_20_25,
++	alpha_instr_mov_21_25,
++	alpha_instr_mov_22_25,
++	alpha_instr_mov_23_25,
++	alpha_instr_mov_24_25,
++	alpha_instr_nop,
++	alpha_instr_mov_26_25,
++	alpha_instr_mov_27_25,
++	alpha_instr_mov_28_25,
++	alpha_instr_mov_29_25,
++	alpha_instr_mov_30_25,
++	alpha_instr_mov_31_25,
++	alpha_instr_mov_0_26,
++	alpha_instr_mov_1_26,
++	alpha_instr_mov_2_26,
++	alpha_instr_mov_3_26,
++	alpha_instr_mov_4_26,
++	alpha_instr_mov_5_26,
++	alpha_instr_mov_6_26,
++	alpha_instr_mov_7_26,
++	alpha_instr_mov_8_26,
++	alpha_instr_mov_9_26,
++	alpha_instr_mov_10_26,
++	alpha_instr_mov_11_26,
++	alpha_instr_mov_12_26,
++	alpha_instr_mov_13_26,
++	alpha_instr_mov_14_26,
++	alpha_instr_mov_15_26,
++	alpha_instr_mov_16_26,
++	alpha_instr_mov_17_26,
++	alpha_instr_mov_18_26,
++	alpha_instr_mov_19_26,
++	alpha_instr_mov_20_26,
++	alpha_instr_mov_21_26,
++	alpha_instr_mov_22_26,
++	alpha_instr_mov_23_26,
++	alpha_instr_mov_24_26,
++	alpha_instr_mov_25_26,
++	alpha_instr_nop,
++	alpha_instr_mov_27_26,
++	alpha_instr_mov_28_26,
++	alpha_instr_mov_29_26,
++	alpha_instr_mov_30_26,
++	alpha_instr_mov_31_26,
++	alpha_instr_mov_0_27,
++	alpha_instr_mov_1_27,
++	alpha_instr_mov_2_27,
++	alpha_instr_mov_3_27,
++	alpha_instr_mov_4_27,
++	alpha_instr_mov_5_27,
++	alpha_instr_mov_6_27,
++	alpha_instr_mov_7_27,
++	alpha_instr_mov_8_27,
++	alpha_instr_mov_9_27,
++	alpha_instr_mov_10_27,
++	alpha_instr_mov_11_27,
++	alpha_instr_mov_12_27,
++	alpha_instr_mov_13_27,
++	alpha_instr_mov_14_27,
++	alpha_instr_mov_15_27,
++	alpha_instr_mov_16_27,
++	alpha_instr_mov_17_27,
++	alpha_instr_mov_18_27,
++	alpha_instr_mov_19_27,
++	alpha_instr_mov_20_27,
++	alpha_instr_mov_21_27,
++	alpha_instr_mov_22_27,
++	alpha_instr_mov_23_27,
++	alpha_instr_mov_24_27,
++	alpha_instr_mov_25_27,
++	alpha_instr_mov_26_27,
++	alpha_instr_nop,
++	alpha_instr_mov_28_27,
++	alpha_instr_mov_29_27,
++	alpha_instr_mov_30_27,
++	alpha_instr_mov_31_27,
++	alpha_instr_mov_0_28,
++	alpha_instr_mov_1_28,
++	alpha_instr_mov_2_28,
++	alpha_instr_mov_3_28,
++	alpha_instr_mov_4_28,
++	alpha_instr_mov_5_28,
++	alpha_instr_mov_6_28,
++	alpha_instr_mov_7_28,
++	alpha_instr_mov_8_28,
++	alpha_instr_mov_9_28,
++	alpha_instr_mov_10_28,
++	alpha_instr_mov_11_28,
++	alpha_instr_mov_12_28,
++	alpha_instr_mov_13_28,
++	alpha_instr_mov_14_28,
++	alpha_instr_mov_15_28,
++	alpha_instr_mov_16_28,
++	alpha_instr_mov_17_28,
++	alpha_instr_mov_18_28,
++	alpha_instr_mov_19_28,
++	alpha_instr_mov_20_28,
++	alpha_instr_mov_21_28,
++	alpha_instr_mov_22_28,
++	alpha_instr_mov_23_28,
++	alpha_instr_mov_24_28,
++	alpha_instr_mov_25_28,
++	alpha_instr_mov_26_28,
++	alpha_instr_mov_27_28,
++	alpha_instr_nop,
++	alpha_instr_mov_29_28,
++	alpha_instr_mov_30_28,
++	alpha_instr_mov_31_28,
++	alpha_instr_mov_0_29,
++	alpha_instr_mov_1_29,
++	alpha_instr_mov_2_29,
++	alpha_instr_mov_3_29,
++	alpha_instr_mov_4_29,
++	alpha_instr_mov_5_29,
++	alpha_instr_mov_6_29,
++	alpha_instr_mov_7_29,
++	alpha_instr_mov_8_29,
++	alpha_instr_mov_9_29,
++	alpha_instr_mov_10_29,
++	alpha_instr_mov_11_29,
++	alpha_instr_mov_12_29,
++	alpha_instr_mov_13_29,
++	alpha_instr_mov_14_29,
++	alpha_instr_mov_15_29,
++	alpha_instr_mov_16_29,
++	alpha_instr_mov_17_29,
++	alpha_instr_mov_18_29,
++	alpha_instr_mov_19_29,
++	alpha_instr_mov_20_29,
++	alpha_instr_mov_21_29,
++	alpha_instr_mov_22_29,
++	alpha_instr_mov_23_29,
++	alpha_instr_mov_24_29,
++	alpha_instr_mov_25_29,
++	alpha_instr_mov_26_29,
++	alpha_instr_mov_27_29,
++	alpha_instr_mov_28_29,
++	alpha_instr_nop,
++	alpha_instr_mov_30_29,
++	alpha_instr_mov_31_29,
++	alpha_instr_mov_0_30,
++	alpha_instr_mov_1_30,
++	alpha_instr_mov_2_30,
++	alpha_instr_mov_3_30,
++	alpha_instr_mov_4_30,
++	alpha_instr_mov_5_30,
++	alpha_instr_mov_6_30,
++	alpha_instr_mov_7_30,
++	alpha_instr_mov_8_30,
++	alpha_instr_mov_9_30,
++	alpha_instr_mov_10_30,
++	alpha_instr_mov_11_30,
++	alpha_instr_mov_12_30,
++	alpha_instr_mov_13_30,
++	alpha_instr_mov_14_30,
++	alpha_instr_mov_15_30,
++	alpha_instr_mov_16_30,
++	alpha_instr_mov_17_30,
++	alpha_instr_mov_18_30,
++	alpha_instr_mov_19_30,
++	alpha_instr_mov_20_30,
++	alpha_instr_mov_21_30,
++	alpha_instr_mov_22_30,
++	alpha_instr_mov_23_30,
++	alpha_instr_mov_24_30,
++	alpha_instr_mov_25_30,
++	alpha_instr_mov_26_30,
++	alpha_instr_mov_27_30,
++	alpha_instr_mov_28_30,
++	alpha_instr_mov_29_30,
++	alpha_instr_nop,
++	alpha_instr_mov_31_30
++};
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_alpha_tail.c gxemul-0.7.0/src/cpus/tmp_alpha_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_alpha_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_alpha_tail.c	2022-10-18 16:37:22.075737100 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF alpha_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES alpha_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF alpha_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC alpha_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE alpha_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE alpha_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW alpha_memory_rw
++#define MEM_ALPHA
++#include "memory_rw.c"
++#undef MEM_ALPHA
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC alpha_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC alpha_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS alpha_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) alpha_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_alpha_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF alpha_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS alpha32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void alpha32_instr_ ## n(struct cpu *cpu, \
++	struct alpha_instr_call *ic)
++#define instr(n) alpha32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY alpha32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC alpha32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE alpha32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE alpha32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC alpha32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC alpha32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS alpha32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) alpha32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_alpha_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS alpha_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 alpha32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF alpha32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(alpha,"Alpha")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_dpi.c gxemul-0.7.0/src/cpus/tmp_arm_dpi.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_dpi.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_dpi.c	2022-10-18 16:37:22.076738100 +0000
+@@ -0,0 +1,7643 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME arm_instr_and
++#define A__NAME__eq arm_instr_and__eq
++#define A__NAME__ne arm_instr_and__ne
++#define A__NAME__cs arm_instr_and__cs
++#define A__NAME__cc arm_instr_and__cc
++#define A__NAME__mi arm_instr_and__mi
++#define A__NAME__pl arm_instr_and__pl
++#define A__NAME__vs arm_instr_and__vs
++#define A__NAME__vc arm_instr_and__vc
++#define A__NAME__hi arm_instr_and__hi
++#define A__NAME__ls arm_instr_and__ls
++#define A__NAME__ge arm_instr_and__ge
++#define A__NAME__lt arm_instr_and__lt
++#define A__NAME__gt arm_instr_and__gt
++#define A__NAME__le arm_instr_and__le
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eor
++#define A__NAME__eq arm_instr_eor__eq
++#define A__NAME__ne arm_instr_eor__ne
++#define A__NAME__cs arm_instr_eor__cs
++#define A__NAME__cc arm_instr_eor__cc
++#define A__NAME__mi arm_instr_eor__mi
++#define A__NAME__pl arm_instr_eor__pl
++#define A__NAME__vs arm_instr_eor__vs
++#define A__NAME__vc arm_instr_eor__vc
++#define A__NAME__hi arm_instr_eor__hi
++#define A__NAME__ls arm_instr_eor__ls
++#define A__NAME__ge arm_instr_eor__ge
++#define A__NAME__lt arm_instr_eor__lt
++#define A__NAME__gt arm_instr_eor__gt
++#define A__NAME__le arm_instr_eor__le
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sub
++#define A__NAME__eq arm_instr_sub__eq
++#define A__NAME__ne arm_instr_sub__ne
++#define A__NAME__cs arm_instr_sub__cs
++#define A__NAME__cc arm_instr_sub__cc
++#define A__NAME__mi arm_instr_sub__mi
++#define A__NAME__pl arm_instr_sub__pl
++#define A__NAME__vs arm_instr_sub__vs
++#define A__NAME__vc arm_instr_sub__vc
++#define A__NAME__hi arm_instr_sub__hi
++#define A__NAME__ls arm_instr_sub__ls
++#define A__NAME__ge arm_instr_sub__ge
++#define A__NAME__lt arm_instr_sub__lt
++#define A__NAME__gt arm_instr_sub__gt
++#define A__NAME__le arm_instr_sub__le
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsb
++#define A__NAME__eq arm_instr_rsb__eq
++#define A__NAME__ne arm_instr_rsb__ne
++#define A__NAME__cs arm_instr_rsb__cs
++#define A__NAME__cc arm_instr_rsb__cc
++#define A__NAME__mi arm_instr_rsb__mi
++#define A__NAME__pl arm_instr_rsb__pl
++#define A__NAME__vs arm_instr_rsb__vs
++#define A__NAME__vc arm_instr_rsb__vc
++#define A__NAME__hi arm_instr_rsb__hi
++#define A__NAME__ls arm_instr_rsb__ls
++#define A__NAME__ge arm_instr_rsb__ge
++#define A__NAME__lt arm_instr_rsb__lt
++#define A__NAME__gt arm_instr_rsb__gt
++#define A__NAME__le arm_instr_rsb__le
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_add
++#define A__NAME__eq arm_instr_add__eq
++#define A__NAME__ne arm_instr_add__ne
++#define A__NAME__cs arm_instr_add__cs
++#define A__NAME__cc arm_instr_add__cc
++#define A__NAME__mi arm_instr_add__mi
++#define A__NAME__pl arm_instr_add__pl
++#define A__NAME__vs arm_instr_add__vs
++#define A__NAME__vc arm_instr_add__vc
++#define A__NAME__hi arm_instr_add__hi
++#define A__NAME__ls arm_instr_add__ls
++#define A__NAME__ge arm_instr_add__ge
++#define A__NAME__lt arm_instr_add__lt
++#define A__NAME__gt arm_instr_add__gt
++#define A__NAME__le arm_instr_add__le
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adc
++#define A__NAME__eq arm_instr_adc__eq
++#define A__NAME__ne arm_instr_adc__ne
++#define A__NAME__cs arm_instr_adc__cs
++#define A__NAME__cc arm_instr_adc__cc
++#define A__NAME__mi arm_instr_adc__mi
++#define A__NAME__pl arm_instr_adc__pl
++#define A__NAME__vs arm_instr_adc__vs
++#define A__NAME__vc arm_instr_adc__vc
++#define A__NAME__hi arm_instr_adc__hi
++#define A__NAME__ls arm_instr_adc__ls
++#define A__NAME__ge arm_instr_adc__ge
++#define A__NAME__lt arm_instr_adc__lt
++#define A__NAME__gt arm_instr_adc__gt
++#define A__NAME__le arm_instr_adc__le
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbc
++#define A__NAME__eq arm_instr_sbc__eq
++#define A__NAME__ne arm_instr_sbc__ne
++#define A__NAME__cs arm_instr_sbc__cs
++#define A__NAME__cc arm_instr_sbc__cc
++#define A__NAME__mi arm_instr_sbc__mi
++#define A__NAME__pl arm_instr_sbc__pl
++#define A__NAME__vs arm_instr_sbc__vs
++#define A__NAME__vc arm_instr_sbc__vc
++#define A__NAME__hi arm_instr_sbc__hi
++#define A__NAME__ls arm_instr_sbc__ls
++#define A__NAME__ge arm_instr_sbc__ge
++#define A__NAME__lt arm_instr_sbc__lt
++#define A__NAME__gt arm_instr_sbc__gt
++#define A__NAME__le arm_instr_sbc__le
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsc
++#define A__NAME__eq arm_instr_rsc__eq
++#define A__NAME__ne arm_instr_rsc__ne
++#define A__NAME__cs arm_instr_rsc__cs
++#define A__NAME__cc arm_instr_rsc__cc
++#define A__NAME__mi arm_instr_rsc__mi
++#define A__NAME__pl arm_instr_rsc__pl
++#define A__NAME__vs arm_instr_rsc__vs
++#define A__NAME__vc arm_instr_rsc__vc
++#define A__NAME__hi arm_instr_rsc__hi
++#define A__NAME__ls arm_instr_rsc__ls
++#define A__NAME__ge arm_instr_rsc__ge
++#define A__NAME__lt arm_instr_rsc__lt
++#define A__NAME__gt arm_instr_rsc__gt
++#define A__NAME__le arm_instr_rsc__le
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orr
++#define A__NAME__eq arm_instr_orr__eq
++#define A__NAME__ne arm_instr_orr__ne
++#define A__NAME__cs arm_instr_orr__cs
++#define A__NAME__cc arm_instr_orr__cc
++#define A__NAME__mi arm_instr_orr__mi
++#define A__NAME__pl arm_instr_orr__pl
++#define A__NAME__vs arm_instr_orr__vs
++#define A__NAME__vc arm_instr_orr__vc
++#define A__NAME__hi arm_instr_orr__hi
++#define A__NAME__ls arm_instr_orr__ls
++#define A__NAME__ge arm_instr_orr__ge
++#define A__NAME__lt arm_instr_orr__lt
++#define A__NAME__gt arm_instr_orr__gt
++#define A__NAME__le arm_instr_orr__le
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mov
++#define A__NAME__eq arm_instr_mov__eq
++#define A__NAME__ne arm_instr_mov__ne
++#define A__NAME__cs arm_instr_mov__cs
++#define A__NAME__cc arm_instr_mov__cc
++#define A__NAME__mi arm_instr_mov__mi
++#define A__NAME__pl arm_instr_mov__pl
++#define A__NAME__vs arm_instr_mov__vs
++#define A__NAME__vc arm_instr_mov__vc
++#define A__NAME__hi arm_instr_mov__hi
++#define A__NAME__ls arm_instr_mov__ls
++#define A__NAME__ge arm_instr_mov__ge
++#define A__NAME__lt arm_instr_mov__lt
++#define A__NAME__gt arm_instr_mov__gt
++#define A__NAME__le arm_instr_mov__le
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bic
++#define A__NAME__eq arm_instr_bic__eq
++#define A__NAME__ne arm_instr_bic__ne
++#define A__NAME__cs arm_instr_bic__cs
++#define A__NAME__cc arm_instr_bic__cc
++#define A__NAME__mi arm_instr_bic__mi
++#define A__NAME__pl arm_instr_bic__pl
++#define A__NAME__vs arm_instr_bic__vs
++#define A__NAME__vc arm_instr_bic__vc
++#define A__NAME__hi arm_instr_bic__hi
++#define A__NAME__ls arm_instr_bic__ls
++#define A__NAME__ge arm_instr_bic__ge
++#define A__NAME__lt arm_instr_bic__lt
++#define A__NAME__gt arm_instr_bic__gt
++#define A__NAME__le arm_instr_bic__le
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvn
++#define A__NAME__eq arm_instr_mvn__eq
++#define A__NAME__ne arm_instr_mvn__ne
++#define A__NAME__cs arm_instr_mvn__cs
++#define A__NAME__cc arm_instr_mvn__cc
++#define A__NAME__mi arm_instr_mvn__mi
++#define A__NAME__pl arm_instr_mvn__pl
++#define A__NAME__vs arm_instr_mvn__vs
++#define A__NAME__vc arm_instr_mvn__vc
++#define A__NAME__hi arm_instr_mvn__hi
++#define A__NAME__ls arm_instr_mvn__ls
++#define A__NAME__ge arm_instr_mvn__ge
++#define A__NAME__lt arm_instr_mvn__lt
++#define A__NAME__gt arm_instr_mvn__gt
++#define A__NAME__le arm_instr_mvn__le
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_ands
++#define A__NAME__eq arm_instr_ands__eq
++#define A__NAME__ne arm_instr_ands__ne
++#define A__NAME__cs arm_instr_ands__cs
++#define A__NAME__cc arm_instr_ands__cc
++#define A__NAME__mi arm_instr_ands__mi
++#define A__NAME__pl arm_instr_ands__pl
++#define A__NAME__vs arm_instr_ands__vs
++#define A__NAME__vc arm_instr_ands__vc
++#define A__NAME__hi arm_instr_ands__hi
++#define A__NAME__ls arm_instr_ands__ls
++#define A__NAME__ge arm_instr_ands__ge
++#define A__NAME__lt arm_instr_ands__lt
++#define A__NAME__gt arm_instr_ands__gt
++#define A__NAME__le arm_instr_ands__le
++#define A__S
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eors
++#define A__NAME__eq arm_instr_eors__eq
++#define A__NAME__ne arm_instr_eors__ne
++#define A__NAME__cs arm_instr_eors__cs
++#define A__NAME__cc arm_instr_eors__cc
++#define A__NAME__mi arm_instr_eors__mi
++#define A__NAME__pl arm_instr_eors__pl
++#define A__NAME__vs arm_instr_eors__vs
++#define A__NAME__vc arm_instr_eors__vc
++#define A__NAME__hi arm_instr_eors__hi
++#define A__NAME__ls arm_instr_eors__ls
++#define A__NAME__ge arm_instr_eors__ge
++#define A__NAME__lt arm_instr_eors__lt
++#define A__NAME__gt arm_instr_eors__gt
++#define A__NAME__le arm_instr_eors__le
++#define A__S
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_subs
++#define A__NAME__eq arm_instr_subs__eq
++#define A__NAME__ne arm_instr_subs__ne
++#define A__NAME__cs arm_instr_subs__cs
++#define A__NAME__cc arm_instr_subs__cc
++#define A__NAME__mi arm_instr_subs__mi
++#define A__NAME__pl arm_instr_subs__pl
++#define A__NAME__vs arm_instr_subs__vs
++#define A__NAME__vc arm_instr_subs__vc
++#define A__NAME__hi arm_instr_subs__hi
++#define A__NAME__ls arm_instr_subs__ls
++#define A__NAME__ge arm_instr_subs__ge
++#define A__NAME__lt arm_instr_subs__lt
++#define A__NAME__gt arm_instr_subs__gt
++#define A__NAME__le arm_instr_subs__le
++#define A__S
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsbs
++#define A__NAME__eq arm_instr_rsbs__eq
++#define A__NAME__ne arm_instr_rsbs__ne
++#define A__NAME__cs arm_instr_rsbs__cs
++#define A__NAME__cc arm_instr_rsbs__cc
++#define A__NAME__mi arm_instr_rsbs__mi
++#define A__NAME__pl arm_instr_rsbs__pl
++#define A__NAME__vs arm_instr_rsbs__vs
++#define A__NAME__vc arm_instr_rsbs__vc
++#define A__NAME__hi arm_instr_rsbs__hi
++#define A__NAME__ls arm_instr_rsbs__ls
++#define A__NAME__ge arm_instr_rsbs__ge
++#define A__NAME__lt arm_instr_rsbs__lt
++#define A__NAME__gt arm_instr_rsbs__gt
++#define A__NAME__le arm_instr_rsbs__le
++#define A__S
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adds
++#define A__NAME__eq arm_instr_adds__eq
++#define A__NAME__ne arm_instr_adds__ne
++#define A__NAME__cs arm_instr_adds__cs
++#define A__NAME__cc arm_instr_adds__cc
++#define A__NAME__mi arm_instr_adds__mi
++#define A__NAME__pl arm_instr_adds__pl
++#define A__NAME__vs arm_instr_adds__vs
++#define A__NAME__vc arm_instr_adds__vc
++#define A__NAME__hi arm_instr_adds__hi
++#define A__NAME__ls arm_instr_adds__ls
++#define A__NAME__ge arm_instr_adds__ge
++#define A__NAME__lt arm_instr_adds__lt
++#define A__NAME__gt arm_instr_adds__gt
++#define A__NAME__le arm_instr_adds__le
++#define A__S
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adcs
++#define A__NAME__eq arm_instr_adcs__eq
++#define A__NAME__ne arm_instr_adcs__ne
++#define A__NAME__cs arm_instr_adcs__cs
++#define A__NAME__cc arm_instr_adcs__cc
++#define A__NAME__mi arm_instr_adcs__mi
++#define A__NAME__pl arm_instr_adcs__pl
++#define A__NAME__vs arm_instr_adcs__vs
++#define A__NAME__vc arm_instr_adcs__vc
++#define A__NAME__hi arm_instr_adcs__hi
++#define A__NAME__ls arm_instr_adcs__ls
++#define A__NAME__ge arm_instr_adcs__ge
++#define A__NAME__lt arm_instr_adcs__lt
++#define A__NAME__gt arm_instr_adcs__gt
++#define A__NAME__le arm_instr_adcs__le
++#define A__S
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbcs
++#define A__NAME__eq arm_instr_sbcs__eq
++#define A__NAME__ne arm_instr_sbcs__ne
++#define A__NAME__cs arm_instr_sbcs__cs
++#define A__NAME__cc arm_instr_sbcs__cc
++#define A__NAME__mi arm_instr_sbcs__mi
++#define A__NAME__pl arm_instr_sbcs__pl
++#define A__NAME__vs arm_instr_sbcs__vs
++#define A__NAME__vc arm_instr_sbcs__vc
++#define A__NAME__hi arm_instr_sbcs__hi
++#define A__NAME__ls arm_instr_sbcs__ls
++#define A__NAME__ge arm_instr_sbcs__ge
++#define A__NAME__lt arm_instr_sbcs__lt
++#define A__NAME__gt arm_instr_sbcs__gt
++#define A__NAME__le arm_instr_sbcs__le
++#define A__S
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rscs
++#define A__NAME__eq arm_instr_rscs__eq
++#define A__NAME__ne arm_instr_rscs__ne
++#define A__NAME__cs arm_instr_rscs__cs
++#define A__NAME__cc arm_instr_rscs__cc
++#define A__NAME__mi arm_instr_rscs__mi
++#define A__NAME__pl arm_instr_rscs__pl
++#define A__NAME__vs arm_instr_rscs__vs
++#define A__NAME__vc arm_instr_rscs__vc
++#define A__NAME__hi arm_instr_rscs__hi
++#define A__NAME__ls arm_instr_rscs__ls
++#define A__NAME__ge arm_instr_rscs__ge
++#define A__NAME__lt arm_instr_rscs__lt
++#define A__NAME__gt arm_instr_rscs__gt
++#define A__NAME__le arm_instr_rscs__le
++#define A__S
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_tsts
++#define A__NAME__eq arm_instr_tsts__eq
++#define A__NAME__ne arm_instr_tsts__ne
++#define A__NAME__cs arm_instr_tsts__cs
++#define A__NAME__cc arm_instr_tsts__cc
++#define A__NAME__mi arm_instr_tsts__mi
++#define A__NAME__pl arm_instr_tsts__pl
++#define A__NAME__vs arm_instr_tsts__vs
++#define A__NAME__vc arm_instr_tsts__vc
++#define A__NAME__hi arm_instr_tsts__hi
++#define A__NAME__ls arm_instr_tsts__ls
++#define A__NAME__ge arm_instr_tsts__ge
++#define A__NAME__lt arm_instr_tsts__lt
++#define A__NAME__gt arm_instr_tsts__gt
++#define A__NAME__le arm_instr_tsts__le
++#define A__S
++#define A__TST
++#include "cpu_arm_instr_dpi.c"
++#undef A__TST
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_teqs
++#define A__NAME__eq arm_instr_teqs__eq
++#define A__NAME__ne arm_instr_teqs__ne
++#define A__NAME__cs arm_instr_teqs__cs
++#define A__NAME__cc arm_instr_teqs__cc
++#define A__NAME__mi arm_instr_teqs__mi
++#define A__NAME__pl arm_instr_teqs__pl
++#define A__NAME__vs arm_instr_teqs__vs
++#define A__NAME__vc arm_instr_teqs__vc
++#define A__NAME__hi arm_instr_teqs__hi
++#define A__NAME__ls arm_instr_teqs__ls
++#define A__NAME__ge arm_instr_teqs__ge
++#define A__NAME__lt arm_instr_teqs__lt
++#define A__NAME__gt arm_instr_teqs__gt
++#define A__NAME__le arm_instr_teqs__le
++#define A__S
++#define A__TEQ
++#include "cpu_arm_instr_dpi.c"
++#undef A__TEQ
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmps
++#define A__NAME__eq arm_instr_cmps__eq
++#define A__NAME__ne arm_instr_cmps__ne
++#define A__NAME__cs arm_instr_cmps__cs
++#define A__NAME__cc arm_instr_cmps__cc
++#define A__NAME__mi arm_instr_cmps__mi
++#define A__NAME__pl arm_instr_cmps__pl
++#define A__NAME__vs arm_instr_cmps__vs
++#define A__NAME__vc arm_instr_cmps__vc
++#define A__NAME__hi arm_instr_cmps__hi
++#define A__NAME__ls arm_instr_cmps__ls
++#define A__NAME__ge arm_instr_cmps__ge
++#define A__NAME__lt arm_instr_cmps__lt
++#define A__NAME__gt arm_instr_cmps__gt
++#define A__NAME__le arm_instr_cmps__le
++#define A__S
++#define A__CMP
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMP
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmns
++#define A__NAME__eq arm_instr_cmns__eq
++#define A__NAME__ne arm_instr_cmns__ne
++#define A__NAME__cs arm_instr_cmns__cs
++#define A__NAME__cc arm_instr_cmns__cc
++#define A__NAME__mi arm_instr_cmns__mi
++#define A__NAME__pl arm_instr_cmns__pl
++#define A__NAME__vs arm_instr_cmns__vs
++#define A__NAME__vc arm_instr_cmns__vc
++#define A__NAME__hi arm_instr_cmns__hi
++#define A__NAME__ls arm_instr_cmns__ls
++#define A__NAME__ge arm_instr_cmns__ge
++#define A__NAME__lt arm_instr_cmns__lt
++#define A__NAME__gt arm_instr_cmns__gt
++#define A__NAME__le arm_instr_cmns__le
++#define A__S
++#define A__CMN
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMN
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orrs
++#define A__NAME__eq arm_instr_orrs__eq
++#define A__NAME__ne arm_instr_orrs__ne
++#define A__NAME__cs arm_instr_orrs__cs
++#define A__NAME__cc arm_instr_orrs__cc
++#define A__NAME__mi arm_instr_orrs__mi
++#define A__NAME__pl arm_instr_orrs__pl
++#define A__NAME__vs arm_instr_orrs__vs
++#define A__NAME__vc arm_instr_orrs__vc
++#define A__NAME__hi arm_instr_orrs__hi
++#define A__NAME__ls arm_instr_orrs__ls
++#define A__NAME__ge arm_instr_orrs__ge
++#define A__NAME__lt arm_instr_orrs__lt
++#define A__NAME__gt arm_instr_orrs__gt
++#define A__NAME__le arm_instr_orrs__le
++#define A__S
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_movs
++#define A__NAME__eq arm_instr_movs__eq
++#define A__NAME__ne arm_instr_movs__ne
++#define A__NAME__cs arm_instr_movs__cs
++#define A__NAME__cc arm_instr_movs__cc
++#define A__NAME__mi arm_instr_movs__mi
++#define A__NAME__pl arm_instr_movs__pl
++#define A__NAME__vs arm_instr_movs__vs
++#define A__NAME__vc arm_instr_movs__vc
++#define A__NAME__hi arm_instr_movs__hi
++#define A__NAME__ls arm_instr_movs__ls
++#define A__NAME__ge arm_instr_movs__ge
++#define A__NAME__lt arm_instr_movs__lt
++#define A__NAME__gt arm_instr_movs__gt
++#define A__NAME__le arm_instr_movs__le
++#define A__S
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bics
++#define A__NAME__eq arm_instr_bics__eq
++#define A__NAME__ne arm_instr_bics__ne
++#define A__NAME__cs arm_instr_bics__cs
++#define A__NAME__cc arm_instr_bics__cc
++#define A__NAME__mi arm_instr_bics__mi
++#define A__NAME__pl arm_instr_bics__pl
++#define A__NAME__vs arm_instr_bics__vs
++#define A__NAME__vc arm_instr_bics__vc
++#define A__NAME__hi arm_instr_bics__hi
++#define A__NAME__ls arm_instr_bics__ls
++#define A__NAME__ge arm_instr_bics__ge
++#define A__NAME__lt arm_instr_bics__lt
++#define A__NAME__gt arm_instr_bics__gt
++#define A__NAME__le arm_instr_bics__le
++#define A__S
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvns
++#define A__NAME__eq arm_instr_mvns__eq
++#define A__NAME__ne arm_instr_mvns__ne
++#define A__NAME__cs arm_instr_mvns__cs
++#define A__NAME__cc arm_instr_mvns__cc
++#define A__NAME__mi arm_instr_mvns__mi
++#define A__NAME__pl arm_instr_mvns__pl
++#define A__NAME__vs arm_instr_mvns__vs
++#define A__NAME__vc arm_instr_mvns__vc
++#define A__NAME__hi arm_instr_mvns__hi
++#define A__NAME__ls arm_instr_mvns__ls
++#define A__NAME__ge arm_instr_mvns__ge
++#define A__NAME__lt arm_instr_mvns__lt
++#define A__NAME__gt arm_instr_mvns__gt
++#define A__NAME__le arm_instr_mvns__le
++#define A__S
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__S
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_and_pc
++#define A__NAME__eq arm_instr_and_pc__eq
++#define A__NAME__ne arm_instr_and_pc__ne
++#define A__NAME__cs arm_instr_and_pc__cs
++#define A__NAME__cc arm_instr_and_pc__cc
++#define A__NAME__mi arm_instr_and_pc__mi
++#define A__NAME__pl arm_instr_and_pc__pl
++#define A__NAME__vs arm_instr_and_pc__vs
++#define A__NAME__vc arm_instr_and_pc__vc
++#define A__NAME__hi arm_instr_and_pc__hi
++#define A__NAME__ls arm_instr_and_pc__ls
++#define A__NAME__ge arm_instr_and_pc__ge
++#define A__NAME__lt arm_instr_and_pc__lt
++#define A__NAME__gt arm_instr_and_pc__gt
++#define A__NAME__le arm_instr_and_pc__le
++#define A__PC
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eor_pc
++#define A__NAME__eq arm_instr_eor_pc__eq
++#define A__NAME__ne arm_instr_eor_pc__ne
++#define A__NAME__cs arm_instr_eor_pc__cs
++#define A__NAME__cc arm_instr_eor_pc__cc
++#define A__NAME__mi arm_instr_eor_pc__mi
++#define A__NAME__pl arm_instr_eor_pc__pl
++#define A__NAME__vs arm_instr_eor_pc__vs
++#define A__NAME__vc arm_instr_eor_pc__vc
++#define A__NAME__hi arm_instr_eor_pc__hi
++#define A__NAME__ls arm_instr_eor_pc__ls
++#define A__NAME__ge arm_instr_eor_pc__ge
++#define A__NAME__lt arm_instr_eor_pc__lt
++#define A__NAME__gt arm_instr_eor_pc__gt
++#define A__NAME__le arm_instr_eor_pc__le
++#define A__PC
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sub_pc
++#define A__NAME__eq arm_instr_sub_pc__eq
++#define A__NAME__ne arm_instr_sub_pc__ne
++#define A__NAME__cs arm_instr_sub_pc__cs
++#define A__NAME__cc arm_instr_sub_pc__cc
++#define A__NAME__mi arm_instr_sub_pc__mi
++#define A__NAME__pl arm_instr_sub_pc__pl
++#define A__NAME__vs arm_instr_sub_pc__vs
++#define A__NAME__vc arm_instr_sub_pc__vc
++#define A__NAME__hi arm_instr_sub_pc__hi
++#define A__NAME__ls arm_instr_sub_pc__ls
++#define A__NAME__ge arm_instr_sub_pc__ge
++#define A__NAME__lt arm_instr_sub_pc__lt
++#define A__NAME__gt arm_instr_sub_pc__gt
++#define A__NAME__le arm_instr_sub_pc__le
++#define A__PC
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsb_pc
++#define A__NAME__eq arm_instr_rsb_pc__eq
++#define A__NAME__ne arm_instr_rsb_pc__ne
++#define A__NAME__cs arm_instr_rsb_pc__cs
++#define A__NAME__cc arm_instr_rsb_pc__cc
++#define A__NAME__mi arm_instr_rsb_pc__mi
++#define A__NAME__pl arm_instr_rsb_pc__pl
++#define A__NAME__vs arm_instr_rsb_pc__vs
++#define A__NAME__vc arm_instr_rsb_pc__vc
++#define A__NAME__hi arm_instr_rsb_pc__hi
++#define A__NAME__ls arm_instr_rsb_pc__ls
++#define A__NAME__ge arm_instr_rsb_pc__ge
++#define A__NAME__lt arm_instr_rsb_pc__lt
++#define A__NAME__gt arm_instr_rsb_pc__gt
++#define A__NAME__le arm_instr_rsb_pc__le
++#define A__PC
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_add_pc
++#define A__NAME__eq arm_instr_add_pc__eq
++#define A__NAME__ne arm_instr_add_pc__ne
++#define A__NAME__cs arm_instr_add_pc__cs
++#define A__NAME__cc arm_instr_add_pc__cc
++#define A__NAME__mi arm_instr_add_pc__mi
++#define A__NAME__pl arm_instr_add_pc__pl
++#define A__NAME__vs arm_instr_add_pc__vs
++#define A__NAME__vc arm_instr_add_pc__vc
++#define A__NAME__hi arm_instr_add_pc__hi
++#define A__NAME__ls arm_instr_add_pc__ls
++#define A__NAME__ge arm_instr_add_pc__ge
++#define A__NAME__lt arm_instr_add_pc__lt
++#define A__NAME__gt arm_instr_add_pc__gt
++#define A__NAME__le arm_instr_add_pc__le
++#define A__PC
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adc_pc
++#define A__NAME__eq arm_instr_adc_pc__eq
++#define A__NAME__ne arm_instr_adc_pc__ne
++#define A__NAME__cs arm_instr_adc_pc__cs
++#define A__NAME__cc arm_instr_adc_pc__cc
++#define A__NAME__mi arm_instr_adc_pc__mi
++#define A__NAME__pl arm_instr_adc_pc__pl
++#define A__NAME__vs arm_instr_adc_pc__vs
++#define A__NAME__vc arm_instr_adc_pc__vc
++#define A__NAME__hi arm_instr_adc_pc__hi
++#define A__NAME__ls arm_instr_adc_pc__ls
++#define A__NAME__ge arm_instr_adc_pc__ge
++#define A__NAME__lt arm_instr_adc_pc__lt
++#define A__NAME__gt arm_instr_adc_pc__gt
++#define A__NAME__le arm_instr_adc_pc__le
++#define A__PC
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbc_pc
++#define A__NAME__eq arm_instr_sbc_pc__eq
++#define A__NAME__ne arm_instr_sbc_pc__ne
++#define A__NAME__cs arm_instr_sbc_pc__cs
++#define A__NAME__cc arm_instr_sbc_pc__cc
++#define A__NAME__mi arm_instr_sbc_pc__mi
++#define A__NAME__pl arm_instr_sbc_pc__pl
++#define A__NAME__vs arm_instr_sbc_pc__vs
++#define A__NAME__vc arm_instr_sbc_pc__vc
++#define A__NAME__hi arm_instr_sbc_pc__hi
++#define A__NAME__ls arm_instr_sbc_pc__ls
++#define A__NAME__ge arm_instr_sbc_pc__ge
++#define A__NAME__lt arm_instr_sbc_pc__lt
++#define A__NAME__gt arm_instr_sbc_pc__gt
++#define A__NAME__le arm_instr_sbc_pc__le
++#define A__PC
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsc_pc
++#define A__NAME__eq arm_instr_rsc_pc__eq
++#define A__NAME__ne arm_instr_rsc_pc__ne
++#define A__NAME__cs arm_instr_rsc_pc__cs
++#define A__NAME__cc arm_instr_rsc_pc__cc
++#define A__NAME__mi arm_instr_rsc_pc__mi
++#define A__NAME__pl arm_instr_rsc_pc__pl
++#define A__NAME__vs arm_instr_rsc_pc__vs
++#define A__NAME__vc arm_instr_rsc_pc__vc
++#define A__NAME__hi arm_instr_rsc_pc__hi
++#define A__NAME__ls arm_instr_rsc_pc__ls
++#define A__NAME__ge arm_instr_rsc_pc__ge
++#define A__NAME__lt arm_instr_rsc_pc__lt
++#define A__NAME__gt arm_instr_rsc_pc__gt
++#define A__NAME__le arm_instr_rsc_pc__le
++#define A__PC
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orr_pc
++#define A__NAME__eq arm_instr_orr_pc__eq
++#define A__NAME__ne arm_instr_orr_pc__ne
++#define A__NAME__cs arm_instr_orr_pc__cs
++#define A__NAME__cc arm_instr_orr_pc__cc
++#define A__NAME__mi arm_instr_orr_pc__mi
++#define A__NAME__pl arm_instr_orr_pc__pl
++#define A__NAME__vs arm_instr_orr_pc__vs
++#define A__NAME__vc arm_instr_orr_pc__vc
++#define A__NAME__hi arm_instr_orr_pc__hi
++#define A__NAME__ls arm_instr_orr_pc__ls
++#define A__NAME__ge arm_instr_orr_pc__ge
++#define A__NAME__lt arm_instr_orr_pc__lt
++#define A__NAME__gt arm_instr_orr_pc__gt
++#define A__NAME__le arm_instr_orr_pc__le
++#define A__PC
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mov_pc
++#define A__NAME__eq arm_instr_mov_pc__eq
++#define A__NAME__ne arm_instr_mov_pc__ne
++#define A__NAME__cs arm_instr_mov_pc__cs
++#define A__NAME__cc arm_instr_mov_pc__cc
++#define A__NAME__mi arm_instr_mov_pc__mi
++#define A__NAME__pl arm_instr_mov_pc__pl
++#define A__NAME__vs arm_instr_mov_pc__vs
++#define A__NAME__vc arm_instr_mov_pc__vc
++#define A__NAME__hi arm_instr_mov_pc__hi
++#define A__NAME__ls arm_instr_mov_pc__ls
++#define A__NAME__ge arm_instr_mov_pc__ge
++#define A__NAME__lt arm_instr_mov_pc__lt
++#define A__NAME__gt arm_instr_mov_pc__gt
++#define A__NAME__le arm_instr_mov_pc__le
++#define A__PC
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bic_pc
++#define A__NAME__eq arm_instr_bic_pc__eq
++#define A__NAME__ne arm_instr_bic_pc__ne
++#define A__NAME__cs arm_instr_bic_pc__cs
++#define A__NAME__cc arm_instr_bic_pc__cc
++#define A__NAME__mi arm_instr_bic_pc__mi
++#define A__NAME__pl arm_instr_bic_pc__pl
++#define A__NAME__vs arm_instr_bic_pc__vs
++#define A__NAME__vc arm_instr_bic_pc__vc
++#define A__NAME__hi arm_instr_bic_pc__hi
++#define A__NAME__ls arm_instr_bic_pc__ls
++#define A__NAME__ge arm_instr_bic_pc__ge
++#define A__NAME__lt arm_instr_bic_pc__lt
++#define A__NAME__gt arm_instr_bic_pc__gt
++#define A__NAME__le arm_instr_bic_pc__le
++#define A__PC
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvn_pc
++#define A__NAME__eq arm_instr_mvn_pc__eq
++#define A__NAME__ne arm_instr_mvn_pc__ne
++#define A__NAME__cs arm_instr_mvn_pc__cs
++#define A__NAME__cc arm_instr_mvn_pc__cc
++#define A__NAME__mi arm_instr_mvn_pc__mi
++#define A__NAME__pl arm_instr_mvn_pc__pl
++#define A__NAME__vs arm_instr_mvn_pc__vs
++#define A__NAME__vc arm_instr_mvn_pc__vc
++#define A__NAME__hi arm_instr_mvn_pc__hi
++#define A__NAME__ls arm_instr_mvn_pc__ls
++#define A__NAME__ge arm_instr_mvn_pc__ge
++#define A__NAME__lt arm_instr_mvn_pc__lt
++#define A__NAME__gt arm_instr_mvn_pc__gt
++#define A__NAME__le arm_instr_mvn_pc__le
++#define A__PC
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_ands_pc
++#define A__NAME__eq arm_instr_ands_pc__eq
++#define A__NAME__ne arm_instr_ands_pc__ne
++#define A__NAME__cs arm_instr_ands_pc__cs
++#define A__NAME__cc arm_instr_ands_pc__cc
++#define A__NAME__mi arm_instr_ands_pc__mi
++#define A__NAME__pl arm_instr_ands_pc__pl
++#define A__NAME__vs arm_instr_ands_pc__vs
++#define A__NAME__vc arm_instr_ands_pc__vc
++#define A__NAME__hi arm_instr_ands_pc__hi
++#define A__NAME__ls arm_instr_ands_pc__ls
++#define A__NAME__ge arm_instr_ands_pc__ge
++#define A__NAME__lt arm_instr_ands_pc__lt
++#define A__NAME__gt arm_instr_ands_pc__gt
++#define A__NAME__le arm_instr_ands_pc__le
++#define A__S
++#define A__PC
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eors_pc
++#define A__NAME__eq arm_instr_eors_pc__eq
++#define A__NAME__ne arm_instr_eors_pc__ne
++#define A__NAME__cs arm_instr_eors_pc__cs
++#define A__NAME__cc arm_instr_eors_pc__cc
++#define A__NAME__mi arm_instr_eors_pc__mi
++#define A__NAME__pl arm_instr_eors_pc__pl
++#define A__NAME__vs arm_instr_eors_pc__vs
++#define A__NAME__vc arm_instr_eors_pc__vc
++#define A__NAME__hi arm_instr_eors_pc__hi
++#define A__NAME__ls arm_instr_eors_pc__ls
++#define A__NAME__ge arm_instr_eors_pc__ge
++#define A__NAME__lt arm_instr_eors_pc__lt
++#define A__NAME__gt arm_instr_eors_pc__gt
++#define A__NAME__le arm_instr_eors_pc__le
++#define A__S
++#define A__PC
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_subs_pc
++#define A__NAME__eq arm_instr_subs_pc__eq
++#define A__NAME__ne arm_instr_subs_pc__ne
++#define A__NAME__cs arm_instr_subs_pc__cs
++#define A__NAME__cc arm_instr_subs_pc__cc
++#define A__NAME__mi arm_instr_subs_pc__mi
++#define A__NAME__pl arm_instr_subs_pc__pl
++#define A__NAME__vs arm_instr_subs_pc__vs
++#define A__NAME__vc arm_instr_subs_pc__vc
++#define A__NAME__hi arm_instr_subs_pc__hi
++#define A__NAME__ls arm_instr_subs_pc__ls
++#define A__NAME__ge arm_instr_subs_pc__ge
++#define A__NAME__lt arm_instr_subs_pc__lt
++#define A__NAME__gt arm_instr_subs_pc__gt
++#define A__NAME__le arm_instr_subs_pc__le
++#define A__S
++#define A__PC
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsbs_pc
++#define A__NAME__eq arm_instr_rsbs_pc__eq
++#define A__NAME__ne arm_instr_rsbs_pc__ne
++#define A__NAME__cs arm_instr_rsbs_pc__cs
++#define A__NAME__cc arm_instr_rsbs_pc__cc
++#define A__NAME__mi arm_instr_rsbs_pc__mi
++#define A__NAME__pl arm_instr_rsbs_pc__pl
++#define A__NAME__vs arm_instr_rsbs_pc__vs
++#define A__NAME__vc arm_instr_rsbs_pc__vc
++#define A__NAME__hi arm_instr_rsbs_pc__hi
++#define A__NAME__ls arm_instr_rsbs_pc__ls
++#define A__NAME__ge arm_instr_rsbs_pc__ge
++#define A__NAME__lt arm_instr_rsbs_pc__lt
++#define A__NAME__gt arm_instr_rsbs_pc__gt
++#define A__NAME__le arm_instr_rsbs_pc__le
++#define A__S
++#define A__PC
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adds_pc
++#define A__NAME__eq arm_instr_adds_pc__eq
++#define A__NAME__ne arm_instr_adds_pc__ne
++#define A__NAME__cs arm_instr_adds_pc__cs
++#define A__NAME__cc arm_instr_adds_pc__cc
++#define A__NAME__mi arm_instr_adds_pc__mi
++#define A__NAME__pl arm_instr_adds_pc__pl
++#define A__NAME__vs arm_instr_adds_pc__vs
++#define A__NAME__vc arm_instr_adds_pc__vc
++#define A__NAME__hi arm_instr_adds_pc__hi
++#define A__NAME__ls arm_instr_adds_pc__ls
++#define A__NAME__ge arm_instr_adds_pc__ge
++#define A__NAME__lt arm_instr_adds_pc__lt
++#define A__NAME__gt arm_instr_adds_pc__gt
++#define A__NAME__le arm_instr_adds_pc__le
++#define A__S
++#define A__PC
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adcs_pc
++#define A__NAME__eq arm_instr_adcs_pc__eq
++#define A__NAME__ne arm_instr_adcs_pc__ne
++#define A__NAME__cs arm_instr_adcs_pc__cs
++#define A__NAME__cc arm_instr_adcs_pc__cc
++#define A__NAME__mi arm_instr_adcs_pc__mi
++#define A__NAME__pl arm_instr_adcs_pc__pl
++#define A__NAME__vs arm_instr_adcs_pc__vs
++#define A__NAME__vc arm_instr_adcs_pc__vc
++#define A__NAME__hi arm_instr_adcs_pc__hi
++#define A__NAME__ls arm_instr_adcs_pc__ls
++#define A__NAME__ge arm_instr_adcs_pc__ge
++#define A__NAME__lt arm_instr_adcs_pc__lt
++#define A__NAME__gt arm_instr_adcs_pc__gt
++#define A__NAME__le arm_instr_adcs_pc__le
++#define A__S
++#define A__PC
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbcs_pc
++#define A__NAME__eq arm_instr_sbcs_pc__eq
++#define A__NAME__ne arm_instr_sbcs_pc__ne
++#define A__NAME__cs arm_instr_sbcs_pc__cs
++#define A__NAME__cc arm_instr_sbcs_pc__cc
++#define A__NAME__mi arm_instr_sbcs_pc__mi
++#define A__NAME__pl arm_instr_sbcs_pc__pl
++#define A__NAME__vs arm_instr_sbcs_pc__vs
++#define A__NAME__vc arm_instr_sbcs_pc__vc
++#define A__NAME__hi arm_instr_sbcs_pc__hi
++#define A__NAME__ls arm_instr_sbcs_pc__ls
++#define A__NAME__ge arm_instr_sbcs_pc__ge
++#define A__NAME__lt arm_instr_sbcs_pc__lt
++#define A__NAME__gt arm_instr_sbcs_pc__gt
++#define A__NAME__le arm_instr_sbcs_pc__le
++#define A__S
++#define A__PC
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rscs_pc
++#define A__NAME__eq arm_instr_rscs_pc__eq
++#define A__NAME__ne arm_instr_rscs_pc__ne
++#define A__NAME__cs arm_instr_rscs_pc__cs
++#define A__NAME__cc arm_instr_rscs_pc__cc
++#define A__NAME__mi arm_instr_rscs_pc__mi
++#define A__NAME__pl arm_instr_rscs_pc__pl
++#define A__NAME__vs arm_instr_rscs_pc__vs
++#define A__NAME__vc arm_instr_rscs_pc__vc
++#define A__NAME__hi arm_instr_rscs_pc__hi
++#define A__NAME__ls arm_instr_rscs_pc__ls
++#define A__NAME__ge arm_instr_rscs_pc__ge
++#define A__NAME__lt arm_instr_rscs_pc__lt
++#define A__NAME__gt arm_instr_rscs_pc__gt
++#define A__NAME__le arm_instr_rscs_pc__le
++#define A__S
++#define A__PC
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_tsts_pc
++#define A__NAME__eq arm_instr_tsts_pc__eq
++#define A__NAME__ne arm_instr_tsts_pc__ne
++#define A__NAME__cs arm_instr_tsts_pc__cs
++#define A__NAME__cc arm_instr_tsts_pc__cc
++#define A__NAME__mi arm_instr_tsts_pc__mi
++#define A__NAME__pl arm_instr_tsts_pc__pl
++#define A__NAME__vs arm_instr_tsts_pc__vs
++#define A__NAME__vc arm_instr_tsts_pc__vc
++#define A__NAME__hi arm_instr_tsts_pc__hi
++#define A__NAME__ls arm_instr_tsts_pc__ls
++#define A__NAME__ge arm_instr_tsts_pc__ge
++#define A__NAME__lt arm_instr_tsts_pc__lt
++#define A__NAME__gt arm_instr_tsts_pc__gt
++#define A__NAME__le arm_instr_tsts_pc__le
++#define A__S
++#define A__PC
++#define A__TST
++#include "cpu_arm_instr_dpi.c"
++#undef A__TST
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_teqs_pc
++#define A__NAME__eq arm_instr_teqs_pc__eq
++#define A__NAME__ne arm_instr_teqs_pc__ne
++#define A__NAME__cs arm_instr_teqs_pc__cs
++#define A__NAME__cc arm_instr_teqs_pc__cc
++#define A__NAME__mi arm_instr_teqs_pc__mi
++#define A__NAME__pl arm_instr_teqs_pc__pl
++#define A__NAME__vs arm_instr_teqs_pc__vs
++#define A__NAME__vc arm_instr_teqs_pc__vc
++#define A__NAME__hi arm_instr_teqs_pc__hi
++#define A__NAME__ls arm_instr_teqs_pc__ls
++#define A__NAME__ge arm_instr_teqs_pc__ge
++#define A__NAME__lt arm_instr_teqs_pc__lt
++#define A__NAME__gt arm_instr_teqs_pc__gt
++#define A__NAME__le arm_instr_teqs_pc__le
++#define A__S
++#define A__PC
++#define A__TEQ
++#include "cpu_arm_instr_dpi.c"
++#undef A__TEQ
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmps_pc
++#define A__NAME__eq arm_instr_cmps_pc__eq
++#define A__NAME__ne arm_instr_cmps_pc__ne
++#define A__NAME__cs arm_instr_cmps_pc__cs
++#define A__NAME__cc arm_instr_cmps_pc__cc
++#define A__NAME__mi arm_instr_cmps_pc__mi
++#define A__NAME__pl arm_instr_cmps_pc__pl
++#define A__NAME__vs arm_instr_cmps_pc__vs
++#define A__NAME__vc arm_instr_cmps_pc__vc
++#define A__NAME__hi arm_instr_cmps_pc__hi
++#define A__NAME__ls arm_instr_cmps_pc__ls
++#define A__NAME__ge arm_instr_cmps_pc__ge
++#define A__NAME__lt arm_instr_cmps_pc__lt
++#define A__NAME__gt arm_instr_cmps_pc__gt
++#define A__NAME__le arm_instr_cmps_pc__le
++#define A__S
++#define A__PC
++#define A__CMP
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMP
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmns_pc
++#define A__NAME__eq arm_instr_cmns_pc__eq
++#define A__NAME__ne arm_instr_cmns_pc__ne
++#define A__NAME__cs arm_instr_cmns_pc__cs
++#define A__NAME__cc arm_instr_cmns_pc__cc
++#define A__NAME__mi arm_instr_cmns_pc__mi
++#define A__NAME__pl arm_instr_cmns_pc__pl
++#define A__NAME__vs arm_instr_cmns_pc__vs
++#define A__NAME__vc arm_instr_cmns_pc__vc
++#define A__NAME__hi arm_instr_cmns_pc__hi
++#define A__NAME__ls arm_instr_cmns_pc__ls
++#define A__NAME__ge arm_instr_cmns_pc__ge
++#define A__NAME__lt arm_instr_cmns_pc__lt
++#define A__NAME__gt arm_instr_cmns_pc__gt
++#define A__NAME__le arm_instr_cmns_pc__le
++#define A__S
++#define A__PC
++#define A__CMN
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMN
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orrs_pc
++#define A__NAME__eq arm_instr_orrs_pc__eq
++#define A__NAME__ne arm_instr_orrs_pc__ne
++#define A__NAME__cs arm_instr_orrs_pc__cs
++#define A__NAME__cc arm_instr_orrs_pc__cc
++#define A__NAME__mi arm_instr_orrs_pc__mi
++#define A__NAME__pl arm_instr_orrs_pc__pl
++#define A__NAME__vs arm_instr_orrs_pc__vs
++#define A__NAME__vc arm_instr_orrs_pc__vc
++#define A__NAME__hi arm_instr_orrs_pc__hi
++#define A__NAME__ls arm_instr_orrs_pc__ls
++#define A__NAME__ge arm_instr_orrs_pc__ge
++#define A__NAME__lt arm_instr_orrs_pc__lt
++#define A__NAME__gt arm_instr_orrs_pc__gt
++#define A__NAME__le arm_instr_orrs_pc__le
++#define A__S
++#define A__PC
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_movs_pc
++#define A__NAME__eq arm_instr_movs_pc__eq
++#define A__NAME__ne arm_instr_movs_pc__ne
++#define A__NAME__cs arm_instr_movs_pc__cs
++#define A__NAME__cc arm_instr_movs_pc__cc
++#define A__NAME__mi arm_instr_movs_pc__mi
++#define A__NAME__pl arm_instr_movs_pc__pl
++#define A__NAME__vs arm_instr_movs_pc__vs
++#define A__NAME__vc arm_instr_movs_pc__vc
++#define A__NAME__hi arm_instr_movs_pc__hi
++#define A__NAME__ls arm_instr_movs_pc__ls
++#define A__NAME__ge arm_instr_movs_pc__ge
++#define A__NAME__lt arm_instr_movs_pc__lt
++#define A__NAME__gt arm_instr_movs_pc__gt
++#define A__NAME__le arm_instr_movs_pc__le
++#define A__S
++#define A__PC
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bics_pc
++#define A__NAME__eq arm_instr_bics_pc__eq
++#define A__NAME__ne arm_instr_bics_pc__ne
++#define A__NAME__cs arm_instr_bics_pc__cs
++#define A__NAME__cc arm_instr_bics_pc__cc
++#define A__NAME__mi arm_instr_bics_pc__mi
++#define A__NAME__pl arm_instr_bics_pc__pl
++#define A__NAME__vs arm_instr_bics_pc__vs
++#define A__NAME__vc arm_instr_bics_pc__vc
++#define A__NAME__hi arm_instr_bics_pc__hi
++#define A__NAME__ls arm_instr_bics_pc__ls
++#define A__NAME__ge arm_instr_bics_pc__ge
++#define A__NAME__lt arm_instr_bics_pc__lt
++#define A__NAME__gt arm_instr_bics_pc__gt
++#define A__NAME__le arm_instr_bics_pc__le
++#define A__S
++#define A__PC
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvns_pc
++#define A__NAME__eq arm_instr_mvns_pc__eq
++#define A__NAME__ne arm_instr_mvns_pc__ne
++#define A__NAME__cs arm_instr_mvns_pc__cs
++#define A__NAME__cc arm_instr_mvns_pc__cc
++#define A__NAME__mi arm_instr_mvns_pc__mi
++#define A__NAME__pl arm_instr_mvns_pc__pl
++#define A__NAME__vs arm_instr_mvns_pc__vs
++#define A__NAME__vc arm_instr_mvns_pc__vc
++#define A__NAME__hi arm_instr_mvns_pc__hi
++#define A__NAME__ls arm_instr_mvns_pc__ls
++#define A__NAME__ge arm_instr_mvns_pc__ge
++#define A__NAME__lt arm_instr_mvns_pc__lt
++#define A__NAME__gt arm_instr_mvns_pc__gt
++#define A__NAME__le arm_instr_mvns_pc__le
++#define A__S
++#define A__PC
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__S
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_and_reg
++#define A__NAME__eq arm_instr_and_reg__eq
++#define A__NAME__ne arm_instr_and_reg__ne
++#define A__NAME__cs arm_instr_and_reg__cs
++#define A__NAME__cc arm_instr_and_reg__cc
++#define A__NAME__mi arm_instr_and_reg__mi
++#define A__NAME__pl arm_instr_and_reg__pl
++#define A__NAME__vs arm_instr_and_reg__vs
++#define A__NAME__vc arm_instr_and_reg__vc
++#define A__NAME__hi arm_instr_and_reg__hi
++#define A__NAME__ls arm_instr_and_reg__ls
++#define A__NAME__ge arm_instr_and_reg__ge
++#define A__NAME__lt arm_instr_and_reg__lt
++#define A__NAME__gt arm_instr_and_reg__gt
++#define A__NAME__le arm_instr_and_reg__le
++#define A__REG
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eor_reg
++#define A__NAME__eq arm_instr_eor_reg__eq
++#define A__NAME__ne arm_instr_eor_reg__ne
++#define A__NAME__cs arm_instr_eor_reg__cs
++#define A__NAME__cc arm_instr_eor_reg__cc
++#define A__NAME__mi arm_instr_eor_reg__mi
++#define A__NAME__pl arm_instr_eor_reg__pl
++#define A__NAME__vs arm_instr_eor_reg__vs
++#define A__NAME__vc arm_instr_eor_reg__vc
++#define A__NAME__hi arm_instr_eor_reg__hi
++#define A__NAME__ls arm_instr_eor_reg__ls
++#define A__NAME__ge arm_instr_eor_reg__ge
++#define A__NAME__lt arm_instr_eor_reg__lt
++#define A__NAME__gt arm_instr_eor_reg__gt
++#define A__NAME__le arm_instr_eor_reg__le
++#define A__REG
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sub_reg
++#define A__NAME__eq arm_instr_sub_reg__eq
++#define A__NAME__ne arm_instr_sub_reg__ne
++#define A__NAME__cs arm_instr_sub_reg__cs
++#define A__NAME__cc arm_instr_sub_reg__cc
++#define A__NAME__mi arm_instr_sub_reg__mi
++#define A__NAME__pl arm_instr_sub_reg__pl
++#define A__NAME__vs arm_instr_sub_reg__vs
++#define A__NAME__vc arm_instr_sub_reg__vc
++#define A__NAME__hi arm_instr_sub_reg__hi
++#define A__NAME__ls arm_instr_sub_reg__ls
++#define A__NAME__ge arm_instr_sub_reg__ge
++#define A__NAME__lt arm_instr_sub_reg__lt
++#define A__NAME__gt arm_instr_sub_reg__gt
++#define A__NAME__le arm_instr_sub_reg__le
++#define A__REG
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsb_reg
++#define A__NAME__eq arm_instr_rsb_reg__eq
++#define A__NAME__ne arm_instr_rsb_reg__ne
++#define A__NAME__cs arm_instr_rsb_reg__cs
++#define A__NAME__cc arm_instr_rsb_reg__cc
++#define A__NAME__mi arm_instr_rsb_reg__mi
++#define A__NAME__pl arm_instr_rsb_reg__pl
++#define A__NAME__vs arm_instr_rsb_reg__vs
++#define A__NAME__vc arm_instr_rsb_reg__vc
++#define A__NAME__hi arm_instr_rsb_reg__hi
++#define A__NAME__ls arm_instr_rsb_reg__ls
++#define A__NAME__ge arm_instr_rsb_reg__ge
++#define A__NAME__lt arm_instr_rsb_reg__lt
++#define A__NAME__gt arm_instr_rsb_reg__gt
++#define A__NAME__le arm_instr_rsb_reg__le
++#define A__REG
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_add_reg
++#define A__NAME__eq arm_instr_add_reg__eq
++#define A__NAME__ne arm_instr_add_reg__ne
++#define A__NAME__cs arm_instr_add_reg__cs
++#define A__NAME__cc arm_instr_add_reg__cc
++#define A__NAME__mi arm_instr_add_reg__mi
++#define A__NAME__pl arm_instr_add_reg__pl
++#define A__NAME__vs arm_instr_add_reg__vs
++#define A__NAME__vc arm_instr_add_reg__vc
++#define A__NAME__hi arm_instr_add_reg__hi
++#define A__NAME__ls arm_instr_add_reg__ls
++#define A__NAME__ge arm_instr_add_reg__ge
++#define A__NAME__lt arm_instr_add_reg__lt
++#define A__NAME__gt arm_instr_add_reg__gt
++#define A__NAME__le arm_instr_add_reg__le
++#define A__REG
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adc_reg
++#define A__NAME__eq arm_instr_adc_reg__eq
++#define A__NAME__ne arm_instr_adc_reg__ne
++#define A__NAME__cs arm_instr_adc_reg__cs
++#define A__NAME__cc arm_instr_adc_reg__cc
++#define A__NAME__mi arm_instr_adc_reg__mi
++#define A__NAME__pl arm_instr_adc_reg__pl
++#define A__NAME__vs arm_instr_adc_reg__vs
++#define A__NAME__vc arm_instr_adc_reg__vc
++#define A__NAME__hi arm_instr_adc_reg__hi
++#define A__NAME__ls arm_instr_adc_reg__ls
++#define A__NAME__ge arm_instr_adc_reg__ge
++#define A__NAME__lt arm_instr_adc_reg__lt
++#define A__NAME__gt arm_instr_adc_reg__gt
++#define A__NAME__le arm_instr_adc_reg__le
++#define A__REG
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbc_reg
++#define A__NAME__eq arm_instr_sbc_reg__eq
++#define A__NAME__ne arm_instr_sbc_reg__ne
++#define A__NAME__cs arm_instr_sbc_reg__cs
++#define A__NAME__cc arm_instr_sbc_reg__cc
++#define A__NAME__mi arm_instr_sbc_reg__mi
++#define A__NAME__pl arm_instr_sbc_reg__pl
++#define A__NAME__vs arm_instr_sbc_reg__vs
++#define A__NAME__vc arm_instr_sbc_reg__vc
++#define A__NAME__hi arm_instr_sbc_reg__hi
++#define A__NAME__ls arm_instr_sbc_reg__ls
++#define A__NAME__ge arm_instr_sbc_reg__ge
++#define A__NAME__lt arm_instr_sbc_reg__lt
++#define A__NAME__gt arm_instr_sbc_reg__gt
++#define A__NAME__le arm_instr_sbc_reg__le
++#define A__REG
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsc_reg
++#define A__NAME__eq arm_instr_rsc_reg__eq
++#define A__NAME__ne arm_instr_rsc_reg__ne
++#define A__NAME__cs arm_instr_rsc_reg__cs
++#define A__NAME__cc arm_instr_rsc_reg__cc
++#define A__NAME__mi arm_instr_rsc_reg__mi
++#define A__NAME__pl arm_instr_rsc_reg__pl
++#define A__NAME__vs arm_instr_rsc_reg__vs
++#define A__NAME__vc arm_instr_rsc_reg__vc
++#define A__NAME__hi arm_instr_rsc_reg__hi
++#define A__NAME__ls arm_instr_rsc_reg__ls
++#define A__NAME__ge arm_instr_rsc_reg__ge
++#define A__NAME__lt arm_instr_rsc_reg__lt
++#define A__NAME__gt arm_instr_rsc_reg__gt
++#define A__NAME__le arm_instr_rsc_reg__le
++#define A__REG
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orr_reg
++#define A__NAME__eq arm_instr_orr_reg__eq
++#define A__NAME__ne arm_instr_orr_reg__ne
++#define A__NAME__cs arm_instr_orr_reg__cs
++#define A__NAME__cc arm_instr_orr_reg__cc
++#define A__NAME__mi arm_instr_orr_reg__mi
++#define A__NAME__pl arm_instr_orr_reg__pl
++#define A__NAME__vs arm_instr_orr_reg__vs
++#define A__NAME__vc arm_instr_orr_reg__vc
++#define A__NAME__hi arm_instr_orr_reg__hi
++#define A__NAME__ls arm_instr_orr_reg__ls
++#define A__NAME__ge arm_instr_orr_reg__ge
++#define A__NAME__lt arm_instr_orr_reg__lt
++#define A__NAME__gt arm_instr_orr_reg__gt
++#define A__NAME__le arm_instr_orr_reg__le
++#define A__REG
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mov_reg
++#define A__NAME__eq arm_instr_mov_reg__eq
++#define A__NAME__ne arm_instr_mov_reg__ne
++#define A__NAME__cs arm_instr_mov_reg__cs
++#define A__NAME__cc arm_instr_mov_reg__cc
++#define A__NAME__mi arm_instr_mov_reg__mi
++#define A__NAME__pl arm_instr_mov_reg__pl
++#define A__NAME__vs arm_instr_mov_reg__vs
++#define A__NAME__vc arm_instr_mov_reg__vc
++#define A__NAME__hi arm_instr_mov_reg__hi
++#define A__NAME__ls arm_instr_mov_reg__ls
++#define A__NAME__ge arm_instr_mov_reg__ge
++#define A__NAME__lt arm_instr_mov_reg__lt
++#define A__NAME__gt arm_instr_mov_reg__gt
++#define A__NAME__le arm_instr_mov_reg__le
++#define A__REG
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bic_reg
++#define A__NAME__eq arm_instr_bic_reg__eq
++#define A__NAME__ne arm_instr_bic_reg__ne
++#define A__NAME__cs arm_instr_bic_reg__cs
++#define A__NAME__cc arm_instr_bic_reg__cc
++#define A__NAME__mi arm_instr_bic_reg__mi
++#define A__NAME__pl arm_instr_bic_reg__pl
++#define A__NAME__vs arm_instr_bic_reg__vs
++#define A__NAME__vc arm_instr_bic_reg__vc
++#define A__NAME__hi arm_instr_bic_reg__hi
++#define A__NAME__ls arm_instr_bic_reg__ls
++#define A__NAME__ge arm_instr_bic_reg__ge
++#define A__NAME__lt arm_instr_bic_reg__lt
++#define A__NAME__gt arm_instr_bic_reg__gt
++#define A__NAME__le arm_instr_bic_reg__le
++#define A__REG
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvn_reg
++#define A__NAME__eq arm_instr_mvn_reg__eq
++#define A__NAME__ne arm_instr_mvn_reg__ne
++#define A__NAME__cs arm_instr_mvn_reg__cs
++#define A__NAME__cc arm_instr_mvn_reg__cc
++#define A__NAME__mi arm_instr_mvn_reg__mi
++#define A__NAME__pl arm_instr_mvn_reg__pl
++#define A__NAME__vs arm_instr_mvn_reg__vs
++#define A__NAME__vc arm_instr_mvn_reg__vc
++#define A__NAME__hi arm_instr_mvn_reg__hi
++#define A__NAME__ls arm_instr_mvn_reg__ls
++#define A__NAME__ge arm_instr_mvn_reg__ge
++#define A__NAME__lt arm_instr_mvn_reg__lt
++#define A__NAME__gt arm_instr_mvn_reg__gt
++#define A__NAME__le arm_instr_mvn_reg__le
++#define A__REG
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_ands_reg
++#define A__NAME__eq arm_instr_ands_reg__eq
++#define A__NAME__ne arm_instr_ands_reg__ne
++#define A__NAME__cs arm_instr_ands_reg__cs
++#define A__NAME__cc arm_instr_ands_reg__cc
++#define A__NAME__mi arm_instr_ands_reg__mi
++#define A__NAME__pl arm_instr_ands_reg__pl
++#define A__NAME__vs arm_instr_ands_reg__vs
++#define A__NAME__vc arm_instr_ands_reg__vc
++#define A__NAME__hi arm_instr_ands_reg__hi
++#define A__NAME__ls arm_instr_ands_reg__ls
++#define A__NAME__ge arm_instr_ands_reg__ge
++#define A__NAME__lt arm_instr_ands_reg__lt
++#define A__NAME__gt arm_instr_ands_reg__gt
++#define A__NAME__le arm_instr_ands_reg__le
++#define A__S
++#define A__REG
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eors_reg
++#define A__NAME__eq arm_instr_eors_reg__eq
++#define A__NAME__ne arm_instr_eors_reg__ne
++#define A__NAME__cs arm_instr_eors_reg__cs
++#define A__NAME__cc arm_instr_eors_reg__cc
++#define A__NAME__mi arm_instr_eors_reg__mi
++#define A__NAME__pl arm_instr_eors_reg__pl
++#define A__NAME__vs arm_instr_eors_reg__vs
++#define A__NAME__vc arm_instr_eors_reg__vc
++#define A__NAME__hi arm_instr_eors_reg__hi
++#define A__NAME__ls arm_instr_eors_reg__ls
++#define A__NAME__ge arm_instr_eors_reg__ge
++#define A__NAME__lt arm_instr_eors_reg__lt
++#define A__NAME__gt arm_instr_eors_reg__gt
++#define A__NAME__le arm_instr_eors_reg__le
++#define A__S
++#define A__REG
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_subs_reg
++#define A__NAME__eq arm_instr_subs_reg__eq
++#define A__NAME__ne arm_instr_subs_reg__ne
++#define A__NAME__cs arm_instr_subs_reg__cs
++#define A__NAME__cc arm_instr_subs_reg__cc
++#define A__NAME__mi arm_instr_subs_reg__mi
++#define A__NAME__pl arm_instr_subs_reg__pl
++#define A__NAME__vs arm_instr_subs_reg__vs
++#define A__NAME__vc arm_instr_subs_reg__vc
++#define A__NAME__hi arm_instr_subs_reg__hi
++#define A__NAME__ls arm_instr_subs_reg__ls
++#define A__NAME__ge arm_instr_subs_reg__ge
++#define A__NAME__lt arm_instr_subs_reg__lt
++#define A__NAME__gt arm_instr_subs_reg__gt
++#define A__NAME__le arm_instr_subs_reg__le
++#define A__S
++#define A__REG
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsbs_reg
++#define A__NAME__eq arm_instr_rsbs_reg__eq
++#define A__NAME__ne arm_instr_rsbs_reg__ne
++#define A__NAME__cs arm_instr_rsbs_reg__cs
++#define A__NAME__cc arm_instr_rsbs_reg__cc
++#define A__NAME__mi arm_instr_rsbs_reg__mi
++#define A__NAME__pl arm_instr_rsbs_reg__pl
++#define A__NAME__vs arm_instr_rsbs_reg__vs
++#define A__NAME__vc arm_instr_rsbs_reg__vc
++#define A__NAME__hi arm_instr_rsbs_reg__hi
++#define A__NAME__ls arm_instr_rsbs_reg__ls
++#define A__NAME__ge arm_instr_rsbs_reg__ge
++#define A__NAME__lt arm_instr_rsbs_reg__lt
++#define A__NAME__gt arm_instr_rsbs_reg__gt
++#define A__NAME__le arm_instr_rsbs_reg__le
++#define A__S
++#define A__REG
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adds_reg
++#define A__NAME__eq arm_instr_adds_reg__eq
++#define A__NAME__ne arm_instr_adds_reg__ne
++#define A__NAME__cs arm_instr_adds_reg__cs
++#define A__NAME__cc arm_instr_adds_reg__cc
++#define A__NAME__mi arm_instr_adds_reg__mi
++#define A__NAME__pl arm_instr_adds_reg__pl
++#define A__NAME__vs arm_instr_adds_reg__vs
++#define A__NAME__vc arm_instr_adds_reg__vc
++#define A__NAME__hi arm_instr_adds_reg__hi
++#define A__NAME__ls arm_instr_adds_reg__ls
++#define A__NAME__ge arm_instr_adds_reg__ge
++#define A__NAME__lt arm_instr_adds_reg__lt
++#define A__NAME__gt arm_instr_adds_reg__gt
++#define A__NAME__le arm_instr_adds_reg__le
++#define A__S
++#define A__REG
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adcs_reg
++#define A__NAME__eq arm_instr_adcs_reg__eq
++#define A__NAME__ne arm_instr_adcs_reg__ne
++#define A__NAME__cs arm_instr_adcs_reg__cs
++#define A__NAME__cc arm_instr_adcs_reg__cc
++#define A__NAME__mi arm_instr_adcs_reg__mi
++#define A__NAME__pl arm_instr_adcs_reg__pl
++#define A__NAME__vs arm_instr_adcs_reg__vs
++#define A__NAME__vc arm_instr_adcs_reg__vc
++#define A__NAME__hi arm_instr_adcs_reg__hi
++#define A__NAME__ls arm_instr_adcs_reg__ls
++#define A__NAME__ge arm_instr_adcs_reg__ge
++#define A__NAME__lt arm_instr_adcs_reg__lt
++#define A__NAME__gt arm_instr_adcs_reg__gt
++#define A__NAME__le arm_instr_adcs_reg__le
++#define A__S
++#define A__REG
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbcs_reg
++#define A__NAME__eq arm_instr_sbcs_reg__eq
++#define A__NAME__ne arm_instr_sbcs_reg__ne
++#define A__NAME__cs arm_instr_sbcs_reg__cs
++#define A__NAME__cc arm_instr_sbcs_reg__cc
++#define A__NAME__mi arm_instr_sbcs_reg__mi
++#define A__NAME__pl arm_instr_sbcs_reg__pl
++#define A__NAME__vs arm_instr_sbcs_reg__vs
++#define A__NAME__vc arm_instr_sbcs_reg__vc
++#define A__NAME__hi arm_instr_sbcs_reg__hi
++#define A__NAME__ls arm_instr_sbcs_reg__ls
++#define A__NAME__ge arm_instr_sbcs_reg__ge
++#define A__NAME__lt arm_instr_sbcs_reg__lt
++#define A__NAME__gt arm_instr_sbcs_reg__gt
++#define A__NAME__le arm_instr_sbcs_reg__le
++#define A__S
++#define A__REG
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rscs_reg
++#define A__NAME__eq arm_instr_rscs_reg__eq
++#define A__NAME__ne arm_instr_rscs_reg__ne
++#define A__NAME__cs arm_instr_rscs_reg__cs
++#define A__NAME__cc arm_instr_rscs_reg__cc
++#define A__NAME__mi arm_instr_rscs_reg__mi
++#define A__NAME__pl arm_instr_rscs_reg__pl
++#define A__NAME__vs arm_instr_rscs_reg__vs
++#define A__NAME__vc arm_instr_rscs_reg__vc
++#define A__NAME__hi arm_instr_rscs_reg__hi
++#define A__NAME__ls arm_instr_rscs_reg__ls
++#define A__NAME__ge arm_instr_rscs_reg__ge
++#define A__NAME__lt arm_instr_rscs_reg__lt
++#define A__NAME__gt arm_instr_rscs_reg__gt
++#define A__NAME__le arm_instr_rscs_reg__le
++#define A__S
++#define A__REG
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_tsts_reg
++#define A__NAME__eq arm_instr_tsts_reg__eq
++#define A__NAME__ne arm_instr_tsts_reg__ne
++#define A__NAME__cs arm_instr_tsts_reg__cs
++#define A__NAME__cc arm_instr_tsts_reg__cc
++#define A__NAME__mi arm_instr_tsts_reg__mi
++#define A__NAME__pl arm_instr_tsts_reg__pl
++#define A__NAME__vs arm_instr_tsts_reg__vs
++#define A__NAME__vc arm_instr_tsts_reg__vc
++#define A__NAME__hi arm_instr_tsts_reg__hi
++#define A__NAME__ls arm_instr_tsts_reg__ls
++#define A__NAME__ge arm_instr_tsts_reg__ge
++#define A__NAME__lt arm_instr_tsts_reg__lt
++#define A__NAME__gt arm_instr_tsts_reg__gt
++#define A__NAME__le arm_instr_tsts_reg__le
++#define A__S
++#define A__REG
++#define A__TST
++#include "cpu_arm_instr_dpi.c"
++#undef A__TST
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_teqs_reg
++#define A__NAME__eq arm_instr_teqs_reg__eq
++#define A__NAME__ne arm_instr_teqs_reg__ne
++#define A__NAME__cs arm_instr_teqs_reg__cs
++#define A__NAME__cc arm_instr_teqs_reg__cc
++#define A__NAME__mi arm_instr_teqs_reg__mi
++#define A__NAME__pl arm_instr_teqs_reg__pl
++#define A__NAME__vs arm_instr_teqs_reg__vs
++#define A__NAME__vc arm_instr_teqs_reg__vc
++#define A__NAME__hi arm_instr_teqs_reg__hi
++#define A__NAME__ls arm_instr_teqs_reg__ls
++#define A__NAME__ge arm_instr_teqs_reg__ge
++#define A__NAME__lt arm_instr_teqs_reg__lt
++#define A__NAME__gt arm_instr_teqs_reg__gt
++#define A__NAME__le arm_instr_teqs_reg__le
++#define A__S
++#define A__REG
++#define A__TEQ
++#include "cpu_arm_instr_dpi.c"
++#undef A__TEQ
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmps_reg
++#define A__NAME__eq arm_instr_cmps_reg__eq
++#define A__NAME__ne arm_instr_cmps_reg__ne
++#define A__NAME__cs arm_instr_cmps_reg__cs
++#define A__NAME__cc arm_instr_cmps_reg__cc
++#define A__NAME__mi arm_instr_cmps_reg__mi
++#define A__NAME__pl arm_instr_cmps_reg__pl
++#define A__NAME__vs arm_instr_cmps_reg__vs
++#define A__NAME__vc arm_instr_cmps_reg__vc
++#define A__NAME__hi arm_instr_cmps_reg__hi
++#define A__NAME__ls arm_instr_cmps_reg__ls
++#define A__NAME__ge arm_instr_cmps_reg__ge
++#define A__NAME__lt arm_instr_cmps_reg__lt
++#define A__NAME__gt arm_instr_cmps_reg__gt
++#define A__NAME__le arm_instr_cmps_reg__le
++#define A__S
++#define A__REG
++#define A__CMP
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMP
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmns_reg
++#define A__NAME__eq arm_instr_cmns_reg__eq
++#define A__NAME__ne arm_instr_cmns_reg__ne
++#define A__NAME__cs arm_instr_cmns_reg__cs
++#define A__NAME__cc arm_instr_cmns_reg__cc
++#define A__NAME__mi arm_instr_cmns_reg__mi
++#define A__NAME__pl arm_instr_cmns_reg__pl
++#define A__NAME__vs arm_instr_cmns_reg__vs
++#define A__NAME__vc arm_instr_cmns_reg__vc
++#define A__NAME__hi arm_instr_cmns_reg__hi
++#define A__NAME__ls arm_instr_cmns_reg__ls
++#define A__NAME__ge arm_instr_cmns_reg__ge
++#define A__NAME__lt arm_instr_cmns_reg__lt
++#define A__NAME__gt arm_instr_cmns_reg__gt
++#define A__NAME__le arm_instr_cmns_reg__le
++#define A__S
++#define A__REG
++#define A__CMN
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMN
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orrs_reg
++#define A__NAME__eq arm_instr_orrs_reg__eq
++#define A__NAME__ne arm_instr_orrs_reg__ne
++#define A__NAME__cs arm_instr_orrs_reg__cs
++#define A__NAME__cc arm_instr_orrs_reg__cc
++#define A__NAME__mi arm_instr_orrs_reg__mi
++#define A__NAME__pl arm_instr_orrs_reg__pl
++#define A__NAME__vs arm_instr_orrs_reg__vs
++#define A__NAME__vc arm_instr_orrs_reg__vc
++#define A__NAME__hi arm_instr_orrs_reg__hi
++#define A__NAME__ls arm_instr_orrs_reg__ls
++#define A__NAME__ge arm_instr_orrs_reg__ge
++#define A__NAME__lt arm_instr_orrs_reg__lt
++#define A__NAME__gt arm_instr_orrs_reg__gt
++#define A__NAME__le arm_instr_orrs_reg__le
++#define A__S
++#define A__REG
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_movs_reg
++#define A__NAME__eq arm_instr_movs_reg__eq
++#define A__NAME__ne arm_instr_movs_reg__ne
++#define A__NAME__cs arm_instr_movs_reg__cs
++#define A__NAME__cc arm_instr_movs_reg__cc
++#define A__NAME__mi arm_instr_movs_reg__mi
++#define A__NAME__pl arm_instr_movs_reg__pl
++#define A__NAME__vs arm_instr_movs_reg__vs
++#define A__NAME__vc arm_instr_movs_reg__vc
++#define A__NAME__hi arm_instr_movs_reg__hi
++#define A__NAME__ls arm_instr_movs_reg__ls
++#define A__NAME__ge arm_instr_movs_reg__ge
++#define A__NAME__lt arm_instr_movs_reg__lt
++#define A__NAME__gt arm_instr_movs_reg__gt
++#define A__NAME__le arm_instr_movs_reg__le
++#define A__S
++#define A__REG
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bics_reg
++#define A__NAME__eq arm_instr_bics_reg__eq
++#define A__NAME__ne arm_instr_bics_reg__ne
++#define A__NAME__cs arm_instr_bics_reg__cs
++#define A__NAME__cc arm_instr_bics_reg__cc
++#define A__NAME__mi arm_instr_bics_reg__mi
++#define A__NAME__pl arm_instr_bics_reg__pl
++#define A__NAME__vs arm_instr_bics_reg__vs
++#define A__NAME__vc arm_instr_bics_reg__vc
++#define A__NAME__hi arm_instr_bics_reg__hi
++#define A__NAME__ls arm_instr_bics_reg__ls
++#define A__NAME__ge arm_instr_bics_reg__ge
++#define A__NAME__lt arm_instr_bics_reg__lt
++#define A__NAME__gt arm_instr_bics_reg__gt
++#define A__NAME__le arm_instr_bics_reg__le
++#define A__S
++#define A__REG
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvns_reg
++#define A__NAME__eq arm_instr_mvns_reg__eq
++#define A__NAME__ne arm_instr_mvns_reg__ne
++#define A__NAME__cs arm_instr_mvns_reg__cs
++#define A__NAME__cc arm_instr_mvns_reg__cc
++#define A__NAME__mi arm_instr_mvns_reg__mi
++#define A__NAME__pl arm_instr_mvns_reg__pl
++#define A__NAME__vs arm_instr_mvns_reg__vs
++#define A__NAME__vc arm_instr_mvns_reg__vc
++#define A__NAME__hi arm_instr_mvns_reg__hi
++#define A__NAME__ls arm_instr_mvns_reg__ls
++#define A__NAME__ge arm_instr_mvns_reg__ge
++#define A__NAME__lt arm_instr_mvns_reg__lt
++#define A__NAME__gt arm_instr_mvns_reg__gt
++#define A__NAME__le arm_instr_mvns_reg__le
++#define A__S
++#define A__REG
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__S
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_and_pc_reg
++#define A__NAME__eq arm_instr_and_pc_reg__eq
++#define A__NAME__ne arm_instr_and_pc_reg__ne
++#define A__NAME__cs arm_instr_and_pc_reg__cs
++#define A__NAME__cc arm_instr_and_pc_reg__cc
++#define A__NAME__mi arm_instr_and_pc_reg__mi
++#define A__NAME__pl arm_instr_and_pc_reg__pl
++#define A__NAME__vs arm_instr_and_pc_reg__vs
++#define A__NAME__vc arm_instr_and_pc_reg__vc
++#define A__NAME__hi arm_instr_and_pc_reg__hi
++#define A__NAME__ls arm_instr_and_pc_reg__ls
++#define A__NAME__ge arm_instr_and_pc_reg__ge
++#define A__NAME__lt arm_instr_and_pc_reg__lt
++#define A__NAME__gt arm_instr_and_pc_reg__gt
++#define A__NAME__le arm_instr_and_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eor_pc_reg
++#define A__NAME__eq arm_instr_eor_pc_reg__eq
++#define A__NAME__ne arm_instr_eor_pc_reg__ne
++#define A__NAME__cs arm_instr_eor_pc_reg__cs
++#define A__NAME__cc arm_instr_eor_pc_reg__cc
++#define A__NAME__mi arm_instr_eor_pc_reg__mi
++#define A__NAME__pl arm_instr_eor_pc_reg__pl
++#define A__NAME__vs arm_instr_eor_pc_reg__vs
++#define A__NAME__vc arm_instr_eor_pc_reg__vc
++#define A__NAME__hi arm_instr_eor_pc_reg__hi
++#define A__NAME__ls arm_instr_eor_pc_reg__ls
++#define A__NAME__ge arm_instr_eor_pc_reg__ge
++#define A__NAME__lt arm_instr_eor_pc_reg__lt
++#define A__NAME__gt arm_instr_eor_pc_reg__gt
++#define A__NAME__le arm_instr_eor_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sub_pc_reg
++#define A__NAME__eq arm_instr_sub_pc_reg__eq
++#define A__NAME__ne arm_instr_sub_pc_reg__ne
++#define A__NAME__cs arm_instr_sub_pc_reg__cs
++#define A__NAME__cc arm_instr_sub_pc_reg__cc
++#define A__NAME__mi arm_instr_sub_pc_reg__mi
++#define A__NAME__pl arm_instr_sub_pc_reg__pl
++#define A__NAME__vs arm_instr_sub_pc_reg__vs
++#define A__NAME__vc arm_instr_sub_pc_reg__vc
++#define A__NAME__hi arm_instr_sub_pc_reg__hi
++#define A__NAME__ls arm_instr_sub_pc_reg__ls
++#define A__NAME__ge arm_instr_sub_pc_reg__ge
++#define A__NAME__lt arm_instr_sub_pc_reg__lt
++#define A__NAME__gt arm_instr_sub_pc_reg__gt
++#define A__NAME__le arm_instr_sub_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsb_pc_reg
++#define A__NAME__eq arm_instr_rsb_pc_reg__eq
++#define A__NAME__ne arm_instr_rsb_pc_reg__ne
++#define A__NAME__cs arm_instr_rsb_pc_reg__cs
++#define A__NAME__cc arm_instr_rsb_pc_reg__cc
++#define A__NAME__mi arm_instr_rsb_pc_reg__mi
++#define A__NAME__pl arm_instr_rsb_pc_reg__pl
++#define A__NAME__vs arm_instr_rsb_pc_reg__vs
++#define A__NAME__vc arm_instr_rsb_pc_reg__vc
++#define A__NAME__hi arm_instr_rsb_pc_reg__hi
++#define A__NAME__ls arm_instr_rsb_pc_reg__ls
++#define A__NAME__ge arm_instr_rsb_pc_reg__ge
++#define A__NAME__lt arm_instr_rsb_pc_reg__lt
++#define A__NAME__gt arm_instr_rsb_pc_reg__gt
++#define A__NAME__le arm_instr_rsb_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_add_pc_reg
++#define A__NAME__eq arm_instr_add_pc_reg__eq
++#define A__NAME__ne arm_instr_add_pc_reg__ne
++#define A__NAME__cs arm_instr_add_pc_reg__cs
++#define A__NAME__cc arm_instr_add_pc_reg__cc
++#define A__NAME__mi arm_instr_add_pc_reg__mi
++#define A__NAME__pl arm_instr_add_pc_reg__pl
++#define A__NAME__vs arm_instr_add_pc_reg__vs
++#define A__NAME__vc arm_instr_add_pc_reg__vc
++#define A__NAME__hi arm_instr_add_pc_reg__hi
++#define A__NAME__ls arm_instr_add_pc_reg__ls
++#define A__NAME__ge arm_instr_add_pc_reg__ge
++#define A__NAME__lt arm_instr_add_pc_reg__lt
++#define A__NAME__gt arm_instr_add_pc_reg__gt
++#define A__NAME__le arm_instr_add_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adc_pc_reg
++#define A__NAME__eq arm_instr_adc_pc_reg__eq
++#define A__NAME__ne arm_instr_adc_pc_reg__ne
++#define A__NAME__cs arm_instr_adc_pc_reg__cs
++#define A__NAME__cc arm_instr_adc_pc_reg__cc
++#define A__NAME__mi arm_instr_adc_pc_reg__mi
++#define A__NAME__pl arm_instr_adc_pc_reg__pl
++#define A__NAME__vs arm_instr_adc_pc_reg__vs
++#define A__NAME__vc arm_instr_adc_pc_reg__vc
++#define A__NAME__hi arm_instr_adc_pc_reg__hi
++#define A__NAME__ls arm_instr_adc_pc_reg__ls
++#define A__NAME__ge arm_instr_adc_pc_reg__ge
++#define A__NAME__lt arm_instr_adc_pc_reg__lt
++#define A__NAME__gt arm_instr_adc_pc_reg__gt
++#define A__NAME__le arm_instr_adc_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbc_pc_reg
++#define A__NAME__eq arm_instr_sbc_pc_reg__eq
++#define A__NAME__ne arm_instr_sbc_pc_reg__ne
++#define A__NAME__cs arm_instr_sbc_pc_reg__cs
++#define A__NAME__cc arm_instr_sbc_pc_reg__cc
++#define A__NAME__mi arm_instr_sbc_pc_reg__mi
++#define A__NAME__pl arm_instr_sbc_pc_reg__pl
++#define A__NAME__vs arm_instr_sbc_pc_reg__vs
++#define A__NAME__vc arm_instr_sbc_pc_reg__vc
++#define A__NAME__hi arm_instr_sbc_pc_reg__hi
++#define A__NAME__ls arm_instr_sbc_pc_reg__ls
++#define A__NAME__ge arm_instr_sbc_pc_reg__ge
++#define A__NAME__lt arm_instr_sbc_pc_reg__lt
++#define A__NAME__gt arm_instr_sbc_pc_reg__gt
++#define A__NAME__le arm_instr_sbc_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsc_pc_reg
++#define A__NAME__eq arm_instr_rsc_pc_reg__eq
++#define A__NAME__ne arm_instr_rsc_pc_reg__ne
++#define A__NAME__cs arm_instr_rsc_pc_reg__cs
++#define A__NAME__cc arm_instr_rsc_pc_reg__cc
++#define A__NAME__mi arm_instr_rsc_pc_reg__mi
++#define A__NAME__pl arm_instr_rsc_pc_reg__pl
++#define A__NAME__vs arm_instr_rsc_pc_reg__vs
++#define A__NAME__vc arm_instr_rsc_pc_reg__vc
++#define A__NAME__hi arm_instr_rsc_pc_reg__hi
++#define A__NAME__ls arm_instr_rsc_pc_reg__ls
++#define A__NAME__ge arm_instr_rsc_pc_reg__ge
++#define A__NAME__lt arm_instr_rsc_pc_reg__lt
++#define A__NAME__gt arm_instr_rsc_pc_reg__gt
++#define A__NAME__le arm_instr_rsc_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orr_pc_reg
++#define A__NAME__eq arm_instr_orr_pc_reg__eq
++#define A__NAME__ne arm_instr_orr_pc_reg__ne
++#define A__NAME__cs arm_instr_orr_pc_reg__cs
++#define A__NAME__cc arm_instr_orr_pc_reg__cc
++#define A__NAME__mi arm_instr_orr_pc_reg__mi
++#define A__NAME__pl arm_instr_orr_pc_reg__pl
++#define A__NAME__vs arm_instr_orr_pc_reg__vs
++#define A__NAME__vc arm_instr_orr_pc_reg__vc
++#define A__NAME__hi arm_instr_orr_pc_reg__hi
++#define A__NAME__ls arm_instr_orr_pc_reg__ls
++#define A__NAME__ge arm_instr_orr_pc_reg__ge
++#define A__NAME__lt arm_instr_orr_pc_reg__lt
++#define A__NAME__gt arm_instr_orr_pc_reg__gt
++#define A__NAME__le arm_instr_orr_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mov_pc_reg
++#define A__NAME__eq arm_instr_mov_pc_reg__eq
++#define A__NAME__ne arm_instr_mov_pc_reg__ne
++#define A__NAME__cs arm_instr_mov_pc_reg__cs
++#define A__NAME__cc arm_instr_mov_pc_reg__cc
++#define A__NAME__mi arm_instr_mov_pc_reg__mi
++#define A__NAME__pl arm_instr_mov_pc_reg__pl
++#define A__NAME__vs arm_instr_mov_pc_reg__vs
++#define A__NAME__vc arm_instr_mov_pc_reg__vc
++#define A__NAME__hi arm_instr_mov_pc_reg__hi
++#define A__NAME__ls arm_instr_mov_pc_reg__ls
++#define A__NAME__ge arm_instr_mov_pc_reg__ge
++#define A__NAME__lt arm_instr_mov_pc_reg__lt
++#define A__NAME__gt arm_instr_mov_pc_reg__gt
++#define A__NAME__le arm_instr_mov_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bic_pc_reg
++#define A__NAME__eq arm_instr_bic_pc_reg__eq
++#define A__NAME__ne arm_instr_bic_pc_reg__ne
++#define A__NAME__cs arm_instr_bic_pc_reg__cs
++#define A__NAME__cc arm_instr_bic_pc_reg__cc
++#define A__NAME__mi arm_instr_bic_pc_reg__mi
++#define A__NAME__pl arm_instr_bic_pc_reg__pl
++#define A__NAME__vs arm_instr_bic_pc_reg__vs
++#define A__NAME__vc arm_instr_bic_pc_reg__vc
++#define A__NAME__hi arm_instr_bic_pc_reg__hi
++#define A__NAME__ls arm_instr_bic_pc_reg__ls
++#define A__NAME__ge arm_instr_bic_pc_reg__ge
++#define A__NAME__lt arm_instr_bic_pc_reg__lt
++#define A__NAME__gt arm_instr_bic_pc_reg__gt
++#define A__NAME__le arm_instr_bic_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvn_pc_reg
++#define A__NAME__eq arm_instr_mvn_pc_reg__eq
++#define A__NAME__ne arm_instr_mvn_pc_reg__ne
++#define A__NAME__cs arm_instr_mvn_pc_reg__cs
++#define A__NAME__cc arm_instr_mvn_pc_reg__cc
++#define A__NAME__mi arm_instr_mvn_pc_reg__mi
++#define A__NAME__pl arm_instr_mvn_pc_reg__pl
++#define A__NAME__vs arm_instr_mvn_pc_reg__vs
++#define A__NAME__vc arm_instr_mvn_pc_reg__vc
++#define A__NAME__hi arm_instr_mvn_pc_reg__hi
++#define A__NAME__ls arm_instr_mvn_pc_reg__ls
++#define A__NAME__ge arm_instr_mvn_pc_reg__ge
++#define A__NAME__lt arm_instr_mvn_pc_reg__lt
++#define A__NAME__gt arm_instr_mvn_pc_reg__gt
++#define A__NAME__le arm_instr_mvn_pc_reg__le
++#define A__REG
++#define A__PC
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_ands_pc_reg
++#define A__NAME__eq arm_instr_ands_pc_reg__eq
++#define A__NAME__ne arm_instr_ands_pc_reg__ne
++#define A__NAME__cs arm_instr_ands_pc_reg__cs
++#define A__NAME__cc arm_instr_ands_pc_reg__cc
++#define A__NAME__mi arm_instr_ands_pc_reg__mi
++#define A__NAME__pl arm_instr_ands_pc_reg__pl
++#define A__NAME__vs arm_instr_ands_pc_reg__vs
++#define A__NAME__vc arm_instr_ands_pc_reg__vc
++#define A__NAME__hi arm_instr_ands_pc_reg__hi
++#define A__NAME__ls arm_instr_ands_pc_reg__ls
++#define A__NAME__ge arm_instr_ands_pc_reg__ge
++#define A__NAME__lt arm_instr_ands_pc_reg__lt
++#define A__NAME__gt arm_instr_ands_pc_reg__gt
++#define A__NAME__le arm_instr_ands_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eors_pc_reg
++#define A__NAME__eq arm_instr_eors_pc_reg__eq
++#define A__NAME__ne arm_instr_eors_pc_reg__ne
++#define A__NAME__cs arm_instr_eors_pc_reg__cs
++#define A__NAME__cc arm_instr_eors_pc_reg__cc
++#define A__NAME__mi arm_instr_eors_pc_reg__mi
++#define A__NAME__pl arm_instr_eors_pc_reg__pl
++#define A__NAME__vs arm_instr_eors_pc_reg__vs
++#define A__NAME__vc arm_instr_eors_pc_reg__vc
++#define A__NAME__hi arm_instr_eors_pc_reg__hi
++#define A__NAME__ls arm_instr_eors_pc_reg__ls
++#define A__NAME__ge arm_instr_eors_pc_reg__ge
++#define A__NAME__lt arm_instr_eors_pc_reg__lt
++#define A__NAME__gt arm_instr_eors_pc_reg__gt
++#define A__NAME__le arm_instr_eors_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_subs_pc_reg
++#define A__NAME__eq arm_instr_subs_pc_reg__eq
++#define A__NAME__ne arm_instr_subs_pc_reg__ne
++#define A__NAME__cs arm_instr_subs_pc_reg__cs
++#define A__NAME__cc arm_instr_subs_pc_reg__cc
++#define A__NAME__mi arm_instr_subs_pc_reg__mi
++#define A__NAME__pl arm_instr_subs_pc_reg__pl
++#define A__NAME__vs arm_instr_subs_pc_reg__vs
++#define A__NAME__vc arm_instr_subs_pc_reg__vc
++#define A__NAME__hi arm_instr_subs_pc_reg__hi
++#define A__NAME__ls arm_instr_subs_pc_reg__ls
++#define A__NAME__ge arm_instr_subs_pc_reg__ge
++#define A__NAME__lt arm_instr_subs_pc_reg__lt
++#define A__NAME__gt arm_instr_subs_pc_reg__gt
++#define A__NAME__le arm_instr_subs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsbs_pc_reg
++#define A__NAME__eq arm_instr_rsbs_pc_reg__eq
++#define A__NAME__ne arm_instr_rsbs_pc_reg__ne
++#define A__NAME__cs arm_instr_rsbs_pc_reg__cs
++#define A__NAME__cc arm_instr_rsbs_pc_reg__cc
++#define A__NAME__mi arm_instr_rsbs_pc_reg__mi
++#define A__NAME__pl arm_instr_rsbs_pc_reg__pl
++#define A__NAME__vs arm_instr_rsbs_pc_reg__vs
++#define A__NAME__vc arm_instr_rsbs_pc_reg__vc
++#define A__NAME__hi arm_instr_rsbs_pc_reg__hi
++#define A__NAME__ls arm_instr_rsbs_pc_reg__ls
++#define A__NAME__ge arm_instr_rsbs_pc_reg__ge
++#define A__NAME__lt arm_instr_rsbs_pc_reg__lt
++#define A__NAME__gt arm_instr_rsbs_pc_reg__gt
++#define A__NAME__le arm_instr_rsbs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adds_pc_reg
++#define A__NAME__eq arm_instr_adds_pc_reg__eq
++#define A__NAME__ne arm_instr_adds_pc_reg__ne
++#define A__NAME__cs arm_instr_adds_pc_reg__cs
++#define A__NAME__cc arm_instr_adds_pc_reg__cc
++#define A__NAME__mi arm_instr_adds_pc_reg__mi
++#define A__NAME__pl arm_instr_adds_pc_reg__pl
++#define A__NAME__vs arm_instr_adds_pc_reg__vs
++#define A__NAME__vc arm_instr_adds_pc_reg__vc
++#define A__NAME__hi arm_instr_adds_pc_reg__hi
++#define A__NAME__ls arm_instr_adds_pc_reg__ls
++#define A__NAME__ge arm_instr_adds_pc_reg__ge
++#define A__NAME__lt arm_instr_adds_pc_reg__lt
++#define A__NAME__gt arm_instr_adds_pc_reg__gt
++#define A__NAME__le arm_instr_adds_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adcs_pc_reg
++#define A__NAME__eq arm_instr_adcs_pc_reg__eq
++#define A__NAME__ne arm_instr_adcs_pc_reg__ne
++#define A__NAME__cs arm_instr_adcs_pc_reg__cs
++#define A__NAME__cc arm_instr_adcs_pc_reg__cc
++#define A__NAME__mi arm_instr_adcs_pc_reg__mi
++#define A__NAME__pl arm_instr_adcs_pc_reg__pl
++#define A__NAME__vs arm_instr_adcs_pc_reg__vs
++#define A__NAME__vc arm_instr_adcs_pc_reg__vc
++#define A__NAME__hi arm_instr_adcs_pc_reg__hi
++#define A__NAME__ls arm_instr_adcs_pc_reg__ls
++#define A__NAME__ge arm_instr_adcs_pc_reg__ge
++#define A__NAME__lt arm_instr_adcs_pc_reg__lt
++#define A__NAME__gt arm_instr_adcs_pc_reg__gt
++#define A__NAME__le arm_instr_adcs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbcs_pc_reg
++#define A__NAME__eq arm_instr_sbcs_pc_reg__eq
++#define A__NAME__ne arm_instr_sbcs_pc_reg__ne
++#define A__NAME__cs arm_instr_sbcs_pc_reg__cs
++#define A__NAME__cc arm_instr_sbcs_pc_reg__cc
++#define A__NAME__mi arm_instr_sbcs_pc_reg__mi
++#define A__NAME__pl arm_instr_sbcs_pc_reg__pl
++#define A__NAME__vs arm_instr_sbcs_pc_reg__vs
++#define A__NAME__vc arm_instr_sbcs_pc_reg__vc
++#define A__NAME__hi arm_instr_sbcs_pc_reg__hi
++#define A__NAME__ls arm_instr_sbcs_pc_reg__ls
++#define A__NAME__ge arm_instr_sbcs_pc_reg__ge
++#define A__NAME__lt arm_instr_sbcs_pc_reg__lt
++#define A__NAME__gt arm_instr_sbcs_pc_reg__gt
++#define A__NAME__le arm_instr_sbcs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rscs_pc_reg
++#define A__NAME__eq arm_instr_rscs_pc_reg__eq
++#define A__NAME__ne arm_instr_rscs_pc_reg__ne
++#define A__NAME__cs arm_instr_rscs_pc_reg__cs
++#define A__NAME__cc arm_instr_rscs_pc_reg__cc
++#define A__NAME__mi arm_instr_rscs_pc_reg__mi
++#define A__NAME__pl arm_instr_rscs_pc_reg__pl
++#define A__NAME__vs arm_instr_rscs_pc_reg__vs
++#define A__NAME__vc arm_instr_rscs_pc_reg__vc
++#define A__NAME__hi arm_instr_rscs_pc_reg__hi
++#define A__NAME__ls arm_instr_rscs_pc_reg__ls
++#define A__NAME__ge arm_instr_rscs_pc_reg__ge
++#define A__NAME__lt arm_instr_rscs_pc_reg__lt
++#define A__NAME__gt arm_instr_rscs_pc_reg__gt
++#define A__NAME__le arm_instr_rscs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_tsts_pc_reg
++#define A__NAME__eq arm_instr_tsts_pc_reg__eq
++#define A__NAME__ne arm_instr_tsts_pc_reg__ne
++#define A__NAME__cs arm_instr_tsts_pc_reg__cs
++#define A__NAME__cc arm_instr_tsts_pc_reg__cc
++#define A__NAME__mi arm_instr_tsts_pc_reg__mi
++#define A__NAME__pl arm_instr_tsts_pc_reg__pl
++#define A__NAME__vs arm_instr_tsts_pc_reg__vs
++#define A__NAME__vc arm_instr_tsts_pc_reg__vc
++#define A__NAME__hi arm_instr_tsts_pc_reg__hi
++#define A__NAME__ls arm_instr_tsts_pc_reg__ls
++#define A__NAME__ge arm_instr_tsts_pc_reg__ge
++#define A__NAME__lt arm_instr_tsts_pc_reg__lt
++#define A__NAME__gt arm_instr_tsts_pc_reg__gt
++#define A__NAME__le arm_instr_tsts_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__TST
++#include "cpu_arm_instr_dpi.c"
++#undef A__TST
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_teqs_pc_reg
++#define A__NAME__eq arm_instr_teqs_pc_reg__eq
++#define A__NAME__ne arm_instr_teqs_pc_reg__ne
++#define A__NAME__cs arm_instr_teqs_pc_reg__cs
++#define A__NAME__cc arm_instr_teqs_pc_reg__cc
++#define A__NAME__mi arm_instr_teqs_pc_reg__mi
++#define A__NAME__pl arm_instr_teqs_pc_reg__pl
++#define A__NAME__vs arm_instr_teqs_pc_reg__vs
++#define A__NAME__vc arm_instr_teqs_pc_reg__vc
++#define A__NAME__hi arm_instr_teqs_pc_reg__hi
++#define A__NAME__ls arm_instr_teqs_pc_reg__ls
++#define A__NAME__ge arm_instr_teqs_pc_reg__ge
++#define A__NAME__lt arm_instr_teqs_pc_reg__lt
++#define A__NAME__gt arm_instr_teqs_pc_reg__gt
++#define A__NAME__le arm_instr_teqs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__TEQ
++#include "cpu_arm_instr_dpi.c"
++#undef A__TEQ
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmps_pc_reg
++#define A__NAME__eq arm_instr_cmps_pc_reg__eq
++#define A__NAME__ne arm_instr_cmps_pc_reg__ne
++#define A__NAME__cs arm_instr_cmps_pc_reg__cs
++#define A__NAME__cc arm_instr_cmps_pc_reg__cc
++#define A__NAME__mi arm_instr_cmps_pc_reg__mi
++#define A__NAME__pl arm_instr_cmps_pc_reg__pl
++#define A__NAME__vs arm_instr_cmps_pc_reg__vs
++#define A__NAME__vc arm_instr_cmps_pc_reg__vc
++#define A__NAME__hi arm_instr_cmps_pc_reg__hi
++#define A__NAME__ls arm_instr_cmps_pc_reg__ls
++#define A__NAME__ge arm_instr_cmps_pc_reg__ge
++#define A__NAME__lt arm_instr_cmps_pc_reg__lt
++#define A__NAME__gt arm_instr_cmps_pc_reg__gt
++#define A__NAME__le arm_instr_cmps_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__CMP
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMP
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmns_pc_reg
++#define A__NAME__eq arm_instr_cmns_pc_reg__eq
++#define A__NAME__ne arm_instr_cmns_pc_reg__ne
++#define A__NAME__cs arm_instr_cmns_pc_reg__cs
++#define A__NAME__cc arm_instr_cmns_pc_reg__cc
++#define A__NAME__mi arm_instr_cmns_pc_reg__mi
++#define A__NAME__pl arm_instr_cmns_pc_reg__pl
++#define A__NAME__vs arm_instr_cmns_pc_reg__vs
++#define A__NAME__vc arm_instr_cmns_pc_reg__vc
++#define A__NAME__hi arm_instr_cmns_pc_reg__hi
++#define A__NAME__ls arm_instr_cmns_pc_reg__ls
++#define A__NAME__ge arm_instr_cmns_pc_reg__ge
++#define A__NAME__lt arm_instr_cmns_pc_reg__lt
++#define A__NAME__gt arm_instr_cmns_pc_reg__gt
++#define A__NAME__le arm_instr_cmns_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__CMN
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMN
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orrs_pc_reg
++#define A__NAME__eq arm_instr_orrs_pc_reg__eq
++#define A__NAME__ne arm_instr_orrs_pc_reg__ne
++#define A__NAME__cs arm_instr_orrs_pc_reg__cs
++#define A__NAME__cc arm_instr_orrs_pc_reg__cc
++#define A__NAME__mi arm_instr_orrs_pc_reg__mi
++#define A__NAME__pl arm_instr_orrs_pc_reg__pl
++#define A__NAME__vs arm_instr_orrs_pc_reg__vs
++#define A__NAME__vc arm_instr_orrs_pc_reg__vc
++#define A__NAME__hi arm_instr_orrs_pc_reg__hi
++#define A__NAME__ls arm_instr_orrs_pc_reg__ls
++#define A__NAME__ge arm_instr_orrs_pc_reg__ge
++#define A__NAME__lt arm_instr_orrs_pc_reg__lt
++#define A__NAME__gt arm_instr_orrs_pc_reg__gt
++#define A__NAME__le arm_instr_orrs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_movs_pc_reg
++#define A__NAME__eq arm_instr_movs_pc_reg__eq
++#define A__NAME__ne arm_instr_movs_pc_reg__ne
++#define A__NAME__cs arm_instr_movs_pc_reg__cs
++#define A__NAME__cc arm_instr_movs_pc_reg__cc
++#define A__NAME__mi arm_instr_movs_pc_reg__mi
++#define A__NAME__pl arm_instr_movs_pc_reg__pl
++#define A__NAME__vs arm_instr_movs_pc_reg__vs
++#define A__NAME__vc arm_instr_movs_pc_reg__vc
++#define A__NAME__hi arm_instr_movs_pc_reg__hi
++#define A__NAME__ls arm_instr_movs_pc_reg__ls
++#define A__NAME__ge arm_instr_movs_pc_reg__ge
++#define A__NAME__lt arm_instr_movs_pc_reg__lt
++#define A__NAME__gt arm_instr_movs_pc_reg__gt
++#define A__NAME__le arm_instr_movs_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bics_pc_reg
++#define A__NAME__eq arm_instr_bics_pc_reg__eq
++#define A__NAME__ne arm_instr_bics_pc_reg__ne
++#define A__NAME__cs arm_instr_bics_pc_reg__cs
++#define A__NAME__cc arm_instr_bics_pc_reg__cc
++#define A__NAME__mi arm_instr_bics_pc_reg__mi
++#define A__NAME__pl arm_instr_bics_pc_reg__pl
++#define A__NAME__vs arm_instr_bics_pc_reg__vs
++#define A__NAME__vc arm_instr_bics_pc_reg__vc
++#define A__NAME__hi arm_instr_bics_pc_reg__hi
++#define A__NAME__ls arm_instr_bics_pc_reg__ls
++#define A__NAME__ge arm_instr_bics_pc_reg__ge
++#define A__NAME__lt arm_instr_bics_pc_reg__lt
++#define A__NAME__gt arm_instr_bics_pc_reg__gt
++#define A__NAME__le arm_instr_bics_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvns_pc_reg
++#define A__NAME__eq arm_instr_mvns_pc_reg__eq
++#define A__NAME__ne arm_instr_mvns_pc_reg__ne
++#define A__NAME__cs arm_instr_mvns_pc_reg__cs
++#define A__NAME__cc arm_instr_mvns_pc_reg__cc
++#define A__NAME__mi arm_instr_mvns_pc_reg__mi
++#define A__NAME__pl arm_instr_mvns_pc_reg__pl
++#define A__NAME__vs arm_instr_mvns_pc_reg__vs
++#define A__NAME__vc arm_instr_mvns_pc_reg__vc
++#define A__NAME__hi arm_instr_mvns_pc_reg__hi
++#define A__NAME__ls arm_instr_mvns_pc_reg__ls
++#define A__NAME__ge arm_instr_mvns_pc_reg__ge
++#define A__NAME__lt arm_instr_mvns_pc_reg__lt
++#define A__NAME__gt arm_instr_mvns_pc_reg__gt
++#define A__NAME__le arm_instr_mvns_pc_reg__le
++#define A__S
++#define A__REG
++#define A__PC
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__S
++#undef A__REG
++#undef A__PC
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_and_regshort
++#define A__NAME__eq arm_instr_and_regshort__eq
++#define A__NAME__ne arm_instr_and_regshort__ne
++#define A__NAME__cs arm_instr_and_regshort__cs
++#define A__NAME__cc arm_instr_and_regshort__cc
++#define A__NAME__mi arm_instr_and_regshort__mi
++#define A__NAME__pl arm_instr_and_regshort__pl
++#define A__NAME__vs arm_instr_and_regshort__vs
++#define A__NAME__vc arm_instr_and_regshort__vc
++#define A__NAME__hi arm_instr_and_regshort__hi
++#define A__NAME__ls arm_instr_and_regshort__ls
++#define A__NAME__ge arm_instr_and_regshort__ge
++#define A__NAME__lt arm_instr_and_regshort__lt
++#define A__NAME__gt arm_instr_and_regshort__gt
++#define A__NAME__le arm_instr_and_regshort__le
++#define A__REGSHORT
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eor_regshort
++#define A__NAME__eq arm_instr_eor_regshort__eq
++#define A__NAME__ne arm_instr_eor_regshort__ne
++#define A__NAME__cs arm_instr_eor_regshort__cs
++#define A__NAME__cc arm_instr_eor_regshort__cc
++#define A__NAME__mi arm_instr_eor_regshort__mi
++#define A__NAME__pl arm_instr_eor_regshort__pl
++#define A__NAME__vs arm_instr_eor_regshort__vs
++#define A__NAME__vc arm_instr_eor_regshort__vc
++#define A__NAME__hi arm_instr_eor_regshort__hi
++#define A__NAME__ls arm_instr_eor_regshort__ls
++#define A__NAME__ge arm_instr_eor_regshort__ge
++#define A__NAME__lt arm_instr_eor_regshort__lt
++#define A__NAME__gt arm_instr_eor_regshort__gt
++#define A__NAME__le arm_instr_eor_regshort__le
++#define A__REGSHORT
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sub_regshort
++#define A__NAME__eq arm_instr_sub_regshort__eq
++#define A__NAME__ne arm_instr_sub_regshort__ne
++#define A__NAME__cs arm_instr_sub_regshort__cs
++#define A__NAME__cc arm_instr_sub_regshort__cc
++#define A__NAME__mi arm_instr_sub_regshort__mi
++#define A__NAME__pl arm_instr_sub_regshort__pl
++#define A__NAME__vs arm_instr_sub_regshort__vs
++#define A__NAME__vc arm_instr_sub_regshort__vc
++#define A__NAME__hi arm_instr_sub_regshort__hi
++#define A__NAME__ls arm_instr_sub_regshort__ls
++#define A__NAME__ge arm_instr_sub_regshort__ge
++#define A__NAME__lt arm_instr_sub_regshort__lt
++#define A__NAME__gt arm_instr_sub_regshort__gt
++#define A__NAME__le arm_instr_sub_regshort__le
++#define A__REGSHORT
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsb_regshort
++#define A__NAME__eq arm_instr_rsb_regshort__eq
++#define A__NAME__ne arm_instr_rsb_regshort__ne
++#define A__NAME__cs arm_instr_rsb_regshort__cs
++#define A__NAME__cc arm_instr_rsb_regshort__cc
++#define A__NAME__mi arm_instr_rsb_regshort__mi
++#define A__NAME__pl arm_instr_rsb_regshort__pl
++#define A__NAME__vs arm_instr_rsb_regshort__vs
++#define A__NAME__vc arm_instr_rsb_regshort__vc
++#define A__NAME__hi arm_instr_rsb_regshort__hi
++#define A__NAME__ls arm_instr_rsb_regshort__ls
++#define A__NAME__ge arm_instr_rsb_regshort__ge
++#define A__NAME__lt arm_instr_rsb_regshort__lt
++#define A__NAME__gt arm_instr_rsb_regshort__gt
++#define A__NAME__le arm_instr_rsb_regshort__le
++#define A__REGSHORT
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_add_regshort
++#define A__NAME__eq arm_instr_add_regshort__eq
++#define A__NAME__ne arm_instr_add_regshort__ne
++#define A__NAME__cs arm_instr_add_regshort__cs
++#define A__NAME__cc arm_instr_add_regshort__cc
++#define A__NAME__mi arm_instr_add_regshort__mi
++#define A__NAME__pl arm_instr_add_regshort__pl
++#define A__NAME__vs arm_instr_add_regshort__vs
++#define A__NAME__vc arm_instr_add_regshort__vc
++#define A__NAME__hi arm_instr_add_regshort__hi
++#define A__NAME__ls arm_instr_add_regshort__ls
++#define A__NAME__ge arm_instr_add_regshort__ge
++#define A__NAME__lt arm_instr_add_regshort__lt
++#define A__NAME__gt arm_instr_add_regshort__gt
++#define A__NAME__le arm_instr_add_regshort__le
++#define A__REGSHORT
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adc_regshort
++#define A__NAME__eq arm_instr_adc_regshort__eq
++#define A__NAME__ne arm_instr_adc_regshort__ne
++#define A__NAME__cs arm_instr_adc_regshort__cs
++#define A__NAME__cc arm_instr_adc_regshort__cc
++#define A__NAME__mi arm_instr_adc_regshort__mi
++#define A__NAME__pl arm_instr_adc_regshort__pl
++#define A__NAME__vs arm_instr_adc_regshort__vs
++#define A__NAME__vc arm_instr_adc_regshort__vc
++#define A__NAME__hi arm_instr_adc_regshort__hi
++#define A__NAME__ls arm_instr_adc_regshort__ls
++#define A__NAME__ge arm_instr_adc_regshort__ge
++#define A__NAME__lt arm_instr_adc_regshort__lt
++#define A__NAME__gt arm_instr_adc_regshort__gt
++#define A__NAME__le arm_instr_adc_regshort__le
++#define A__REGSHORT
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbc_regshort
++#define A__NAME__eq arm_instr_sbc_regshort__eq
++#define A__NAME__ne arm_instr_sbc_regshort__ne
++#define A__NAME__cs arm_instr_sbc_regshort__cs
++#define A__NAME__cc arm_instr_sbc_regshort__cc
++#define A__NAME__mi arm_instr_sbc_regshort__mi
++#define A__NAME__pl arm_instr_sbc_regshort__pl
++#define A__NAME__vs arm_instr_sbc_regshort__vs
++#define A__NAME__vc arm_instr_sbc_regshort__vc
++#define A__NAME__hi arm_instr_sbc_regshort__hi
++#define A__NAME__ls arm_instr_sbc_regshort__ls
++#define A__NAME__ge arm_instr_sbc_regshort__ge
++#define A__NAME__lt arm_instr_sbc_regshort__lt
++#define A__NAME__gt arm_instr_sbc_regshort__gt
++#define A__NAME__le arm_instr_sbc_regshort__le
++#define A__REGSHORT
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsc_regshort
++#define A__NAME__eq arm_instr_rsc_regshort__eq
++#define A__NAME__ne arm_instr_rsc_regshort__ne
++#define A__NAME__cs arm_instr_rsc_regshort__cs
++#define A__NAME__cc arm_instr_rsc_regshort__cc
++#define A__NAME__mi arm_instr_rsc_regshort__mi
++#define A__NAME__pl arm_instr_rsc_regshort__pl
++#define A__NAME__vs arm_instr_rsc_regshort__vs
++#define A__NAME__vc arm_instr_rsc_regshort__vc
++#define A__NAME__hi arm_instr_rsc_regshort__hi
++#define A__NAME__ls arm_instr_rsc_regshort__ls
++#define A__NAME__ge arm_instr_rsc_regshort__ge
++#define A__NAME__lt arm_instr_rsc_regshort__lt
++#define A__NAME__gt arm_instr_rsc_regshort__gt
++#define A__NAME__le arm_instr_rsc_regshort__le
++#define A__REGSHORT
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orr_regshort
++#define A__NAME__eq arm_instr_orr_regshort__eq
++#define A__NAME__ne arm_instr_orr_regshort__ne
++#define A__NAME__cs arm_instr_orr_regshort__cs
++#define A__NAME__cc arm_instr_orr_regshort__cc
++#define A__NAME__mi arm_instr_orr_regshort__mi
++#define A__NAME__pl arm_instr_orr_regshort__pl
++#define A__NAME__vs arm_instr_orr_regshort__vs
++#define A__NAME__vc arm_instr_orr_regshort__vc
++#define A__NAME__hi arm_instr_orr_regshort__hi
++#define A__NAME__ls arm_instr_orr_regshort__ls
++#define A__NAME__ge arm_instr_orr_regshort__ge
++#define A__NAME__lt arm_instr_orr_regshort__lt
++#define A__NAME__gt arm_instr_orr_regshort__gt
++#define A__NAME__le arm_instr_orr_regshort__le
++#define A__REGSHORT
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mov_regshort
++#define A__NAME__eq arm_instr_mov_regshort__eq
++#define A__NAME__ne arm_instr_mov_regshort__ne
++#define A__NAME__cs arm_instr_mov_regshort__cs
++#define A__NAME__cc arm_instr_mov_regshort__cc
++#define A__NAME__mi arm_instr_mov_regshort__mi
++#define A__NAME__pl arm_instr_mov_regshort__pl
++#define A__NAME__vs arm_instr_mov_regshort__vs
++#define A__NAME__vc arm_instr_mov_regshort__vc
++#define A__NAME__hi arm_instr_mov_regshort__hi
++#define A__NAME__ls arm_instr_mov_regshort__ls
++#define A__NAME__ge arm_instr_mov_regshort__ge
++#define A__NAME__lt arm_instr_mov_regshort__lt
++#define A__NAME__gt arm_instr_mov_regshort__gt
++#define A__NAME__le arm_instr_mov_regshort__le
++#define A__REGSHORT
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bic_regshort
++#define A__NAME__eq arm_instr_bic_regshort__eq
++#define A__NAME__ne arm_instr_bic_regshort__ne
++#define A__NAME__cs arm_instr_bic_regshort__cs
++#define A__NAME__cc arm_instr_bic_regshort__cc
++#define A__NAME__mi arm_instr_bic_regshort__mi
++#define A__NAME__pl arm_instr_bic_regshort__pl
++#define A__NAME__vs arm_instr_bic_regshort__vs
++#define A__NAME__vc arm_instr_bic_regshort__vc
++#define A__NAME__hi arm_instr_bic_regshort__hi
++#define A__NAME__ls arm_instr_bic_regshort__ls
++#define A__NAME__ge arm_instr_bic_regshort__ge
++#define A__NAME__lt arm_instr_bic_regshort__lt
++#define A__NAME__gt arm_instr_bic_regshort__gt
++#define A__NAME__le arm_instr_bic_regshort__le
++#define A__REGSHORT
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvn_regshort
++#define A__NAME__eq arm_instr_mvn_regshort__eq
++#define A__NAME__ne arm_instr_mvn_regshort__ne
++#define A__NAME__cs arm_instr_mvn_regshort__cs
++#define A__NAME__cc arm_instr_mvn_regshort__cc
++#define A__NAME__mi arm_instr_mvn_regshort__mi
++#define A__NAME__pl arm_instr_mvn_regshort__pl
++#define A__NAME__vs arm_instr_mvn_regshort__vs
++#define A__NAME__vc arm_instr_mvn_regshort__vc
++#define A__NAME__hi arm_instr_mvn_regshort__hi
++#define A__NAME__ls arm_instr_mvn_regshort__ls
++#define A__NAME__ge arm_instr_mvn_regshort__ge
++#define A__NAME__lt arm_instr_mvn_regshort__lt
++#define A__NAME__gt arm_instr_mvn_regshort__gt
++#define A__NAME__le arm_instr_mvn_regshort__le
++#define A__REGSHORT
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_ands_regshort
++#define A__NAME__eq arm_instr_ands_regshort__eq
++#define A__NAME__ne arm_instr_ands_regshort__ne
++#define A__NAME__cs arm_instr_ands_regshort__cs
++#define A__NAME__cc arm_instr_ands_regshort__cc
++#define A__NAME__mi arm_instr_ands_regshort__mi
++#define A__NAME__pl arm_instr_ands_regshort__pl
++#define A__NAME__vs arm_instr_ands_regshort__vs
++#define A__NAME__vc arm_instr_ands_regshort__vc
++#define A__NAME__hi arm_instr_ands_regshort__hi
++#define A__NAME__ls arm_instr_ands_regshort__ls
++#define A__NAME__ge arm_instr_ands_regshort__ge
++#define A__NAME__lt arm_instr_ands_regshort__lt
++#define A__NAME__gt arm_instr_ands_regshort__gt
++#define A__NAME__le arm_instr_ands_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__AND
++#include "cpu_arm_instr_dpi.c"
++#undef A__AND
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_eors_regshort
++#define A__NAME__eq arm_instr_eors_regshort__eq
++#define A__NAME__ne arm_instr_eors_regshort__ne
++#define A__NAME__cs arm_instr_eors_regshort__cs
++#define A__NAME__cc arm_instr_eors_regshort__cc
++#define A__NAME__mi arm_instr_eors_regshort__mi
++#define A__NAME__pl arm_instr_eors_regshort__pl
++#define A__NAME__vs arm_instr_eors_regshort__vs
++#define A__NAME__vc arm_instr_eors_regshort__vc
++#define A__NAME__hi arm_instr_eors_regshort__hi
++#define A__NAME__ls arm_instr_eors_regshort__ls
++#define A__NAME__ge arm_instr_eors_regshort__ge
++#define A__NAME__lt arm_instr_eors_regshort__lt
++#define A__NAME__gt arm_instr_eors_regshort__gt
++#define A__NAME__le arm_instr_eors_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__EOR
++#include "cpu_arm_instr_dpi.c"
++#undef A__EOR
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_subs_regshort
++#define A__NAME__eq arm_instr_subs_regshort__eq
++#define A__NAME__ne arm_instr_subs_regshort__ne
++#define A__NAME__cs arm_instr_subs_regshort__cs
++#define A__NAME__cc arm_instr_subs_regshort__cc
++#define A__NAME__mi arm_instr_subs_regshort__mi
++#define A__NAME__pl arm_instr_subs_regshort__pl
++#define A__NAME__vs arm_instr_subs_regshort__vs
++#define A__NAME__vc arm_instr_subs_regshort__vc
++#define A__NAME__hi arm_instr_subs_regshort__hi
++#define A__NAME__ls arm_instr_subs_regshort__ls
++#define A__NAME__ge arm_instr_subs_regshort__ge
++#define A__NAME__lt arm_instr_subs_regshort__lt
++#define A__NAME__gt arm_instr_subs_regshort__gt
++#define A__NAME__le arm_instr_subs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__SUB
++#include "cpu_arm_instr_dpi.c"
++#undef A__SUB
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rsbs_regshort
++#define A__NAME__eq arm_instr_rsbs_regshort__eq
++#define A__NAME__ne arm_instr_rsbs_regshort__ne
++#define A__NAME__cs arm_instr_rsbs_regshort__cs
++#define A__NAME__cc arm_instr_rsbs_regshort__cc
++#define A__NAME__mi arm_instr_rsbs_regshort__mi
++#define A__NAME__pl arm_instr_rsbs_regshort__pl
++#define A__NAME__vs arm_instr_rsbs_regshort__vs
++#define A__NAME__vc arm_instr_rsbs_regshort__vc
++#define A__NAME__hi arm_instr_rsbs_regshort__hi
++#define A__NAME__ls arm_instr_rsbs_regshort__ls
++#define A__NAME__ge arm_instr_rsbs_regshort__ge
++#define A__NAME__lt arm_instr_rsbs_regshort__lt
++#define A__NAME__gt arm_instr_rsbs_regshort__gt
++#define A__NAME__le arm_instr_rsbs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__RSB
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSB
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adds_regshort
++#define A__NAME__eq arm_instr_adds_regshort__eq
++#define A__NAME__ne arm_instr_adds_regshort__ne
++#define A__NAME__cs arm_instr_adds_regshort__cs
++#define A__NAME__cc arm_instr_adds_regshort__cc
++#define A__NAME__mi arm_instr_adds_regshort__mi
++#define A__NAME__pl arm_instr_adds_regshort__pl
++#define A__NAME__vs arm_instr_adds_regshort__vs
++#define A__NAME__vc arm_instr_adds_regshort__vc
++#define A__NAME__hi arm_instr_adds_regshort__hi
++#define A__NAME__ls arm_instr_adds_regshort__ls
++#define A__NAME__ge arm_instr_adds_regshort__ge
++#define A__NAME__lt arm_instr_adds_regshort__lt
++#define A__NAME__gt arm_instr_adds_regshort__gt
++#define A__NAME__le arm_instr_adds_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__ADD
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADD
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_adcs_regshort
++#define A__NAME__eq arm_instr_adcs_regshort__eq
++#define A__NAME__ne arm_instr_adcs_regshort__ne
++#define A__NAME__cs arm_instr_adcs_regshort__cs
++#define A__NAME__cc arm_instr_adcs_regshort__cc
++#define A__NAME__mi arm_instr_adcs_regshort__mi
++#define A__NAME__pl arm_instr_adcs_regshort__pl
++#define A__NAME__vs arm_instr_adcs_regshort__vs
++#define A__NAME__vc arm_instr_adcs_regshort__vc
++#define A__NAME__hi arm_instr_adcs_regshort__hi
++#define A__NAME__ls arm_instr_adcs_regshort__ls
++#define A__NAME__ge arm_instr_adcs_regshort__ge
++#define A__NAME__lt arm_instr_adcs_regshort__lt
++#define A__NAME__gt arm_instr_adcs_regshort__gt
++#define A__NAME__le arm_instr_adcs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__ADC
++#include "cpu_arm_instr_dpi.c"
++#undef A__ADC
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_sbcs_regshort
++#define A__NAME__eq arm_instr_sbcs_regshort__eq
++#define A__NAME__ne arm_instr_sbcs_regshort__ne
++#define A__NAME__cs arm_instr_sbcs_regshort__cs
++#define A__NAME__cc arm_instr_sbcs_regshort__cc
++#define A__NAME__mi arm_instr_sbcs_regshort__mi
++#define A__NAME__pl arm_instr_sbcs_regshort__pl
++#define A__NAME__vs arm_instr_sbcs_regshort__vs
++#define A__NAME__vc arm_instr_sbcs_regshort__vc
++#define A__NAME__hi arm_instr_sbcs_regshort__hi
++#define A__NAME__ls arm_instr_sbcs_regshort__ls
++#define A__NAME__ge arm_instr_sbcs_regshort__ge
++#define A__NAME__lt arm_instr_sbcs_regshort__lt
++#define A__NAME__gt arm_instr_sbcs_regshort__gt
++#define A__NAME__le arm_instr_sbcs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__SBC
++#include "cpu_arm_instr_dpi.c"
++#undef A__SBC
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_rscs_regshort
++#define A__NAME__eq arm_instr_rscs_regshort__eq
++#define A__NAME__ne arm_instr_rscs_regshort__ne
++#define A__NAME__cs arm_instr_rscs_regshort__cs
++#define A__NAME__cc arm_instr_rscs_regshort__cc
++#define A__NAME__mi arm_instr_rscs_regshort__mi
++#define A__NAME__pl arm_instr_rscs_regshort__pl
++#define A__NAME__vs arm_instr_rscs_regshort__vs
++#define A__NAME__vc arm_instr_rscs_regshort__vc
++#define A__NAME__hi arm_instr_rscs_regshort__hi
++#define A__NAME__ls arm_instr_rscs_regshort__ls
++#define A__NAME__ge arm_instr_rscs_regshort__ge
++#define A__NAME__lt arm_instr_rscs_regshort__lt
++#define A__NAME__gt arm_instr_rscs_regshort__gt
++#define A__NAME__le arm_instr_rscs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__RSC
++#include "cpu_arm_instr_dpi.c"
++#undef A__RSC
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_tsts_regshort
++#define A__NAME__eq arm_instr_tsts_regshort__eq
++#define A__NAME__ne arm_instr_tsts_regshort__ne
++#define A__NAME__cs arm_instr_tsts_regshort__cs
++#define A__NAME__cc arm_instr_tsts_regshort__cc
++#define A__NAME__mi arm_instr_tsts_regshort__mi
++#define A__NAME__pl arm_instr_tsts_regshort__pl
++#define A__NAME__vs arm_instr_tsts_regshort__vs
++#define A__NAME__vc arm_instr_tsts_regshort__vc
++#define A__NAME__hi arm_instr_tsts_regshort__hi
++#define A__NAME__ls arm_instr_tsts_regshort__ls
++#define A__NAME__ge arm_instr_tsts_regshort__ge
++#define A__NAME__lt arm_instr_tsts_regshort__lt
++#define A__NAME__gt arm_instr_tsts_regshort__gt
++#define A__NAME__le arm_instr_tsts_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__TST
++#include "cpu_arm_instr_dpi.c"
++#undef A__TST
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_teqs_regshort
++#define A__NAME__eq arm_instr_teqs_regshort__eq
++#define A__NAME__ne arm_instr_teqs_regshort__ne
++#define A__NAME__cs arm_instr_teqs_regshort__cs
++#define A__NAME__cc arm_instr_teqs_regshort__cc
++#define A__NAME__mi arm_instr_teqs_regshort__mi
++#define A__NAME__pl arm_instr_teqs_regshort__pl
++#define A__NAME__vs arm_instr_teqs_regshort__vs
++#define A__NAME__vc arm_instr_teqs_regshort__vc
++#define A__NAME__hi arm_instr_teqs_regshort__hi
++#define A__NAME__ls arm_instr_teqs_regshort__ls
++#define A__NAME__ge arm_instr_teqs_regshort__ge
++#define A__NAME__lt arm_instr_teqs_regshort__lt
++#define A__NAME__gt arm_instr_teqs_regshort__gt
++#define A__NAME__le arm_instr_teqs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__TEQ
++#include "cpu_arm_instr_dpi.c"
++#undef A__TEQ
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmps_regshort
++#define A__NAME__eq arm_instr_cmps_regshort__eq
++#define A__NAME__ne arm_instr_cmps_regshort__ne
++#define A__NAME__cs arm_instr_cmps_regshort__cs
++#define A__NAME__cc arm_instr_cmps_regshort__cc
++#define A__NAME__mi arm_instr_cmps_regshort__mi
++#define A__NAME__pl arm_instr_cmps_regshort__pl
++#define A__NAME__vs arm_instr_cmps_regshort__vs
++#define A__NAME__vc arm_instr_cmps_regshort__vc
++#define A__NAME__hi arm_instr_cmps_regshort__hi
++#define A__NAME__ls arm_instr_cmps_regshort__ls
++#define A__NAME__ge arm_instr_cmps_regshort__ge
++#define A__NAME__lt arm_instr_cmps_regshort__lt
++#define A__NAME__gt arm_instr_cmps_regshort__gt
++#define A__NAME__le arm_instr_cmps_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__CMP
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMP
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_cmns_regshort
++#define A__NAME__eq arm_instr_cmns_regshort__eq
++#define A__NAME__ne arm_instr_cmns_regshort__ne
++#define A__NAME__cs arm_instr_cmns_regshort__cs
++#define A__NAME__cc arm_instr_cmns_regshort__cc
++#define A__NAME__mi arm_instr_cmns_regshort__mi
++#define A__NAME__pl arm_instr_cmns_regshort__pl
++#define A__NAME__vs arm_instr_cmns_regshort__vs
++#define A__NAME__vc arm_instr_cmns_regshort__vc
++#define A__NAME__hi arm_instr_cmns_regshort__hi
++#define A__NAME__ls arm_instr_cmns_regshort__ls
++#define A__NAME__ge arm_instr_cmns_regshort__ge
++#define A__NAME__lt arm_instr_cmns_regshort__lt
++#define A__NAME__gt arm_instr_cmns_regshort__gt
++#define A__NAME__le arm_instr_cmns_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__CMN
++#include "cpu_arm_instr_dpi.c"
++#undef A__CMN
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_orrs_regshort
++#define A__NAME__eq arm_instr_orrs_regshort__eq
++#define A__NAME__ne arm_instr_orrs_regshort__ne
++#define A__NAME__cs arm_instr_orrs_regshort__cs
++#define A__NAME__cc arm_instr_orrs_regshort__cc
++#define A__NAME__mi arm_instr_orrs_regshort__mi
++#define A__NAME__pl arm_instr_orrs_regshort__pl
++#define A__NAME__vs arm_instr_orrs_regshort__vs
++#define A__NAME__vc arm_instr_orrs_regshort__vc
++#define A__NAME__hi arm_instr_orrs_regshort__hi
++#define A__NAME__ls arm_instr_orrs_regshort__ls
++#define A__NAME__ge arm_instr_orrs_regshort__ge
++#define A__NAME__lt arm_instr_orrs_regshort__lt
++#define A__NAME__gt arm_instr_orrs_regshort__gt
++#define A__NAME__le arm_instr_orrs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__ORR
++#include "cpu_arm_instr_dpi.c"
++#undef A__ORR
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_movs_regshort
++#define A__NAME__eq arm_instr_movs_regshort__eq
++#define A__NAME__ne arm_instr_movs_regshort__ne
++#define A__NAME__cs arm_instr_movs_regshort__cs
++#define A__NAME__cc arm_instr_movs_regshort__cc
++#define A__NAME__mi arm_instr_movs_regshort__mi
++#define A__NAME__pl arm_instr_movs_regshort__pl
++#define A__NAME__vs arm_instr_movs_regshort__vs
++#define A__NAME__vc arm_instr_movs_regshort__vc
++#define A__NAME__hi arm_instr_movs_regshort__hi
++#define A__NAME__ls arm_instr_movs_regshort__ls
++#define A__NAME__ge arm_instr_movs_regshort__ge
++#define A__NAME__lt arm_instr_movs_regshort__lt
++#define A__NAME__gt arm_instr_movs_regshort__gt
++#define A__NAME__le arm_instr_movs_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__MOV
++#include "cpu_arm_instr_dpi.c"
++#undef A__MOV
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_bics_regshort
++#define A__NAME__eq arm_instr_bics_regshort__eq
++#define A__NAME__ne arm_instr_bics_regshort__ne
++#define A__NAME__cs arm_instr_bics_regshort__cs
++#define A__NAME__cc arm_instr_bics_regshort__cc
++#define A__NAME__mi arm_instr_bics_regshort__mi
++#define A__NAME__pl arm_instr_bics_regshort__pl
++#define A__NAME__vs arm_instr_bics_regshort__vs
++#define A__NAME__vc arm_instr_bics_regshort__vc
++#define A__NAME__hi arm_instr_bics_regshort__hi
++#define A__NAME__ls arm_instr_bics_regshort__ls
++#define A__NAME__ge arm_instr_bics_regshort__ge
++#define A__NAME__lt arm_instr_bics_regshort__lt
++#define A__NAME__gt arm_instr_bics_regshort__gt
++#define A__NAME__le arm_instr_bics_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__BIC
++#include "cpu_arm_instr_dpi.c"
++#undef A__BIC
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++#define A__NAME arm_instr_mvns_regshort
++#define A__NAME__eq arm_instr_mvns_regshort__eq
++#define A__NAME__ne arm_instr_mvns_regshort__ne
++#define A__NAME__cs arm_instr_mvns_regshort__cs
++#define A__NAME__cc arm_instr_mvns_regshort__cc
++#define A__NAME__mi arm_instr_mvns_regshort__mi
++#define A__NAME__pl arm_instr_mvns_regshort__pl
++#define A__NAME__vs arm_instr_mvns_regshort__vs
++#define A__NAME__vc arm_instr_mvns_regshort__vc
++#define A__NAME__hi arm_instr_mvns_regshort__hi
++#define A__NAME__ls arm_instr_mvns_regshort__ls
++#define A__NAME__ge arm_instr_mvns_regshort__ge
++#define A__NAME__lt arm_instr_mvns_regshort__lt
++#define A__NAME__gt arm_instr_mvns_regshort__gt
++#define A__NAME__le arm_instr_mvns_regshort__le
++#define A__S
++#define A__REGSHORT
++#define A__MVN
++#include "cpu_arm_instr_dpi.c"
++#undef A__MVN
++#undef A__S
++#undef A__REGSHORT
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME
++
++	void (*arm_dpi_instr[2 * 2 * 2 * 16 * 16])(struct cpu *,
++		struct arm_instr_call *) = {
++	arm_instr_and__eq,
++	arm_instr_and__ne,
++	arm_instr_and__cs,
++	arm_instr_and__cc,
++	arm_instr_and__mi,
++	arm_instr_and__pl,
++	arm_instr_and__vs,
++	arm_instr_and__vc,
++	arm_instr_and__hi,
++	arm_instr_and__ls,
++	arm_instr_and__ge,
++	arm_instr_and__lt,
++	arm_instr_and__gt,
++	arm_instr_and__le,
++	arm_instr_and,
++	arm_instr_nop,
++	arm_instr_eor__eq,
++	arm_instr_eor__ne,
++	arm_instr_eor__cs,
++	arm_instr_eor__cc,
++	arm_instr_eor__mi,
++	arm_instr_eor__pl,
++	arm_instr_eor__vs,
++	arm_instr_eor__vc,
++	arm_instr_eor__hi,
++	arm_instr_eor__ls,
++	arm_instr_eor__ge,
++	arm_instr_eor__lt,
++	arm_instr_eor__gt,
++	arm_instr_eor__le,
++	arm_instr_eor,
++	arm_instr_nop,
++	arm_instr_sub__eq,
++	arm_instr_sub__ne,
++	arm_instr_sub__cs,
++	arm_instr_sub__cc,
++	arm_instr_sub__mi,
++	arm_instr_sub__pl,
++	arm_instr_sub__vs,
++	arm_instr_sub__vc,
++	arm_instr_sub__hi,
++	arm_instr_sub__ls,
++	arm_instr_sub__ge,
++	arm_instr_sub__lt,
++	arm_instr_sub__gt,
++	arm_instr_sub__le,
++	arm_instr_sub,
++	arm_instr_nop,
++	arm_instr_rsb__eq,
++	arm_instr_rsb__ne,
++	arm_instr_rsb__cs,
++	arm_instr_rsb__cc,
++	arm_instr_rsb__mi,
++	arm_instr_rsb__pl,
++	arm_instr_rsb__vs,
++	arm_instr_rsb__vc,
++	arm_instr_rsb__hi,
++	arm_instr_rsb__ls,
++	arm_instr_rsb__ge,
++	arm_instr_rsb__lt,
++	arm_instr_rsb__gt,
++	arm_instr_rsb__le,
++	arm_instr_rsb,
++	arm_instr_nop,
++	arm_instr_add__eq,
++	arm_instr_add__ne,
++	arm_instr_add__cs,
++	arm_instr_add__cc,
++	arm_instr_add__mi,
++	arm_instr_add__pl,
++	arm_instr_add__vs,
++	arm_instr_add__vc,
++	arm_instr_add__hi,
++	arm_instr_add__ls,
++	arm_instr_add__ge,
++	arm_instr_add__lt,
++	arm_instr_add__gt,
++	arm_instr_add__le,
++	arm_instr_add,
++	arm_instr_nop,
++	arm_instr_adc__eq,
++	arm_instr_adc__ne,
++	arm_instr_adc__cs,
++	arm_instr_adc__cc,
++	arm_instr_adc__mi,
++	arm_instr_adc__pl,
++	arm_instr_adc__vs,
++	arm_instr_adc__vc,
++	arm_instr_adc__hi,
++	arm_instr_adc__ls,
++	arm_instr_adc__ge,
++	arm_instr_adc__lt,
++	arm_instr_adc__gt,
++	arm_instr_adc__le,
++	arm_instr_adc,
++	arm_instr_nop,
++	arm_instr_sbc__eq,
++	arm_instr_sbc__ne,
++	arm_instr_sbc__cs,
++	arm_instr_sbc__cc,
++	arm_instr_sbc__mi,
++	arm_instr_sbc__pl,
++	arm_instr_sbc__vs,
++	arm_instr_sbc__vc,
++	arm_instr_sbc__hi,
++	arm_instr_sbc__ls,
++	arm_instr_sbc__ge,
++	arm_instr_sbc__lt,
++	arm_instr_sbc__gt,
++	arm_instr_sbc__le,
++	arm_instr_sbc,
++	arm_instr_nop,
++	arm_instr_rsc__eq,
++	arm_instr_rsc__ne,
++	arm_instr_rsc__cs,
++	arm_instr_rsc__cc,
++	arm_instr_rsc__mi,
++	arm_instr_rsc__pl,
++	arm_instr_rsc__vs,
++	arm_instr_rsc__vc,
++	arm_instr_rsc__hi,
++	arm_instr_rsc__ls,
++	arm_instr_rsc__ge,
++	arm_instr_rsc__lt,
++	arm_instr_rsc__gt,
++	arm_instr_rsc__le,
++	arm_instr_rsc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_orr__eq,
++	arm_instr_orr__ne,
++	arm_instr_orr__cs,
++	arm_instr_orr__cc,
++	arm_instr_orr__mi,
++	arm_instr_orr__pl,
++	arm_instr_orr__vs,
++	arm_instr_orr__vc,
++	arm_instr_orr__hi,
++	arm_instr_orr__ls,
++	arm_instr_orr__ge,
++	arm_instr_orr__lt,
++	arm_instr_orr__gt,
++	arm_instr_orr__le,
++	arm_instr_orr,
++	arm_instr_nop,
++	arm_instr_mov__eq,
++	arm_instr_mov__ne,
++	arm_instr_mov__cs,
++	arm_instr_mov__cc,
++	arm_instr_mov__mi,
++	arm_instr_mov__pl,
++	arm_instr_mov__vs,
++	arm_instr_mov__vc,
++	arm_instr_mov__hi,
++	arm_instr_mov__ls,
++	arm_instr_mov__ge,
++	arm_instr_mov__lt,
++	arm_instr_mov__gt,
++	arm_instr_mov__le,
++	arm_instr_mov,
++	arm_instr_nop,
++	arm_instr_bic__eq,
++	arm_instr_bic__ne,
++	arm_instr_bic__cs,
++	arm_instr_bic__cc,
++	arm_instr_bic__mi,
++	arm_instr_bic__pl,
++	arm_instr_bic__vs,
++	arm_instr_bic__vc,
++	arm_instr_bic__hi,
++	arm_instr_bic__ls,
++	arm_instr_bic__ge,
++	arm_instr_bic__lt,
++	arm_instr_bic__gt,
++	arm_instr_bic__le,
++	arm_instr_bic,
++	arm_instr_nop,
++	arm_instr_mvn__eq,
++	arm_instr_mvn__ne,
++	arm_instr_mvn__cs,
++	arm_instr_mvn__cc,
++	arm_instr_mvn__mi,
++	arm_instr_mvn__pl,
++	arm_instr_mvn__vs,
++	arm_instr_mvn__vc,
++	arm_instr_mvn__hi,
++	arm_instr_mvn__ls,
++	arm_instr_mvn__ge,
++	arm_instr_mvn__lt,
++	arm_instr_mvn__gt,
++	arm_instr_mvn__le,
++	arm_instr_mvn,
++	arm_instr_nop,
++	arm_instr_ands__eq,
++	arm_instr_ands__ne,
++	arm_instr_ands__cs,
++	arm_instr_ands__cc,
++	arm_instr_ands__mi,
++	arm_instr_ands__pl,
++	arm_instr_ands__vs,
++	arm_instr_ands__vc,
++	arm_instr_ands__hi,
++	arm_instr_ands__ls,
++	arm_instr_ands__ge,
++	arm_instr_ands__lt,
++	arm_instr_ands__gt,
++	arm_instr_ands__le,
++	arm_instr_ands,
++	arm_instr_nop,
++	arm_instr_eors__eq,
++	arm_instr_eors__ne,
++	arm_instr_eors__cs,
++	arm_instr_eors__cc,
++	arm_instr_eors__mi,
++	arm_instr_eors__pl,
++	arm_instr_eors__vs,
++	arm_instr_eors__vc,
++	arm_instr_eors__hi,
++	arm_instr_eors__ls,
++	arm_instr_eors__ge,
++	arm_instr_eors__lt,
++	arm_instr_eors__gt,
++	arm_instr_eors__le,
++	arm_instr_eors,
++	arm_instr_nop,
++	arm_instr_subs__eq,
++	arm_instr_subs__ne,
++	arm_instr_subs__cs,
++	arm_instr_subs__cc,
++	arm_instr_subs__mi,
++	arm_instr_subs__pl,
++	arm_instr_subs__vs,
++	arm_instr_subs__vc,
++	arm_instr_subs__hi,
++	arm_instr_subs__ls,
++	arm_instr_subs__ge,
++	arm_instr_subs__lt,
++	arm_instr_subs__gt,
++	arm_instr_subs__le,
++	arm_instr_subs,
++	arm_instr_nop,
++	arm_instr_rsbs__eq,
++	arm_instr_rsbs__ne,
++	arm_instr_rsbs__cs,
++	arm_instr_rsbs__cc,
++	arm_instr_rsbs__mi,
++	arm_instr_rsbs__pl,
++	arm_instr_rsbs__vs,
++	arm_instr_rsbs__vc,
++	arm_instr_rsbs__hi,
++	arm_instr_rsbs__ls,
++	arm_instr_rsbs__ge,
++	arm_instr_rsbs__lt,
++	arm_instr_rsbs__gt,
++	arm_instr_rsbs__le,
++	arm_instr_rsbs,
++	arm_instr_nop,
++	arm_instr_adds__eq,
++	arm_instr_adds__ne,
++	arm_instr_adds__cs,
++	arm_instr_adds__cc,
++	arm_instr_adds__mi,
++	arm_instr_adds__pl,
++	arm_instr_adds__vs,
++	arm_instr_adds__vc,
++	arm_instr_adds__hi,
++	arm_instr_adds__ls,
++	arm_instr_adds__ge,
++	arm_instr_adds__lt,
++	arm_instr_adds__gt,
++	arm_instr_adds__le,
++	arm_instr_adds,
++	arm_instr_nop,
++	arm_instr_adcs__eq,
++	arm_instr_adcs__ne,
++	arm_instr_adcs__cs,
++	arm_instr_adcs__cc,
++	arm_instr_adcs__mi,
++	arm_instr_adcs__pl,
++	arm_instr_adcs__vs,
++	arm_instr_adcs__vc,
++	arm_instr_adcs__hi,
++	arm_instr_adcs__ls,
++	arm_instr_adcs__ge,
++	arm_instr_adcs__lt,
++	arm_instr_adcs__gt,
++	arm_instr_adcs__le,
++	arm_instr_adcs,
++	arm_instr_nop,
++	arm_instr_sbcs__eq,
++	arm_instr_sbcs__ne,
++	arm_instr_sbcs__cs,
++	arm_instr_sbcs__cc,
++	arm_instr_sbcs__mi,
++	arm_instr_sbcs__pl,
++	arm_instr_sbcs__vs,
++	arm_instr_sbcs__vc,
++	arm_instr_sbcs__hi,
++	arm_instr_sbcs__ls,
++	arm_instr_sbcs__ge,
++	arm_instr_sbcs__lt,
++	arm_instr_sbcs__gt,
++	arm_instr_sbcs__le,
++	arm_instr_sbcs,
++	arm_instr_nop,
++	arm_instr_rscs__eq,
++	arm_instr_rscs__ne,
++	arm_instr_rscs__cs,
++	arm_instr_rscs__cc,
++	arm_instr_rscs__mi,
++	arm_instr_rscs__pl,
++	arm_instr_rscs__vs,
++	arm_instr_rscs__vc,
++	arm_instr_rscs__hi,
++	arm_instr_rscs__ls,
++	arm_instr_rscs__ge,
++	arm_instr_rscs__lt,
++	arm_instr_rscs__gt,
++	arm_instr_rscs__le,
++	arm_instr_rscs,
++	arm_instr_nop,
++	arm_instr_tsts__eq,
++	arm_instr_tsts__ne,
++	arm_instr_tsts__cs,
++	arm_instr_tsts__cc,
++	arm_instr_tsts__mi,
++	arm_instr_tsts__pl,
++	arm_instr_tsts__vs,
++	arm_instr_tsts__vc,
++	arm_instr_tsts__hi,
++	arm_instr_tsts__ls,
++	arm_instr_tsts__ge,
++	arm_instr_tsts__lt,
++	arm_instr_tsts__gt,
++	arm_instr_tsts__le,
++	arm_instr_tsts,
++	arm_instr_nop,
++	arm_instr_teqs__eq,
++	arm_instr_teqs__ne,
++	arm_instr_teqs__cs,
++	arm_instr_teqs__cc,
++	arm_instr_teqs__mi,
++	arm_instr_teqs__pl,
++	arm_instr_teqs__vs,
++	arm_instr_teqs__vc,
++	arm_instr_teqs__hi,
++	arm_instr_teqs__ls,
++	arm_instr_teqs__ge,
++	arm_instr_teqs__lt,
++	arm_instr_teqs__gt,
++	arm_instr_teqs__le,
++	arm_instr_teqs,
++	arm_instr_nop,
++	arm_instr_cmps__eq,
++	arm_instr_cmps__ne,
++	arm_instr_cmps__cs,
++	arm_instr_cmps__cc,
++	arm_instr_cmps__mi,
++	arm_instr_cmps__pl,
++	arm_instr_cmps__vs,
++	arm_instr_cmps__vc,
++	arm_instr_cmps__hi,
++	arm_instr_cmps__ls,
++	arm_instr_cmps__ge,
++	arm_instr_cmps__lt,
++	arm_instr_cmps__gt,
++	arm_instr_cmps__le,
++	arm_instr_cmps,
++	arm_instr_nop,
++	arm_instr_cmns__eq,
++	arm_instr_cmns__ne,
++	arm_instr_cmns__cs,
++	arm_instr_cmns__cc,
++	arm_instr_cmns__mi,
++	arm_instr_cmns__pl,
++	arm_instr_cmns__vs,
++	arm_instr_cmns__vc,
++	arm_instr_cmns__hi,
++	arm_instr_cmns__ls,
++	arm_instr_cmns__ge,
++	arm_instr_cmns__lt,
++	arm_instr_cmns__gt,
++	arm_instr_cmns__le,
++	arm_instr_cmns,
++	arm_instr_nop,
++	arm_instr_orrs__eq,
++	arm_instr_orrs__ne,
++	arm_instr_orrs__cs,
++	arm_instr_orrs__cc,
++	arm_instr_orrs__mi,
++	arm_instr_orrs__pl,
++	arm_instr_orrs__vs,
++	arm_instr_orrs__vc,
++	arm_instr_orrs__hi,
++	arm_instr_orrs__ls,
++	arm_instr_orrs__ge,
++	arm_instr_orrs__lt,
++	arm_instr_orrs__gt,
++	arm_instr_orrs__le,
++	arm_instr_orrs,
++	arm_instr_nop,
++	arm_instr_movs__eq,
++	arm_instr_movs__ne,
++	arm_instr_movs__cs,
++	arm_instr_movs__cc,
++	arm_instr_movs__mi,
++	arm_instr_movs__pl,
++	arm_instr_movs__vs,
++	arm_instr_movs__vc,
++	arm_instr_movs__hi,
++	arm_instr_movs__ls,
++	arm_instr_movs__ge,
++	arm_instr_movs__lt,
++	arm_instr_movs__gt,
++	arm_instr_movs__le,
++	arm_instr_movs,
++	arm_instr_nop,
++	arm_instr_bics__eq,
++	arm_instr_bics__ne,
++	arm_instr_bics__cs,
++	arm_instr_bics__cc,
++	arm_instr_bics__mi,
++	arm_instr_bics__pl,
++	arm_instr_bics__vs,
++	arm_instr_bics__vc,
++	arm_instr_bics__hi,
++	arm_instr_bics__ls,
++	arm_instr_bics__ge,
++	arm_instr_bics__lt,
++	arm_instr_bics__gt,
++	arm_instr_bics__le,
++	arm_instr_bics,
++	arm_instr_nop,
++	arm_instr_mvns__eq,
++	arm_instr_mvns__ne,
++	arm_instr_mvns__cs,
++	arm_instr_mvns__cc,
++	arm_instr_mvns__mi,
++	arm_instr_mvns__pl,
++	arm_instr_mvns__vs,
++	arm_instr_mvns__vc,
++	arm_instr_mvns__hi,
++	arm_instr_mvns__ls,
++	arm_instr_mvns__ge,
++	arm_instr_mvns__lt,
++	arm_instr_mvns__gt,
++	arm_instr_mvns__le,
++	arm_instr_mvns,
++	arm_instr_nop,
++	arm_instr_and_pc__eq,
++	arm_instr_and_pc__ne,
++	arm_instr_and_pc__cs,
++	arm_instr_and_pc__cc,
++	arm_instr_and_pc__mi,
++	arm_instr_and_pc__pl,
++	arm_instr_and_pc__vs,
++	arm_instr_and_pc__vc,
++	arm_instr_and_pc__hi,
++	arm_instr_and_pc__ls,
++	arm_instr_and_pc__ge,
++	arm_instr_and_pc__lt,
++	arm_instr_and_pc__gt,
++	arm_instr_and_pc__le,
++	arm_instr_and_pc,
++	arm_instr_nop,
++	arm_instr_eor_pc__eq,
++	arm_instr_eor_pc__ne,
++	arm_instr_eor_pc__cs,
++	arm_instr_eor_pc__cc,
++	arm_instr_eor_pc__mi,
++	arm_instr_eor_pc__pl,
++	arm_instr_eor_pc__vs,
++	arm_instr_eor_pc__vc,
++	arm_instr_eor_pc__hi,
++	arm_instr_eor_pc__ls,
++	arm_instr_eor_pc__ge,
++	arm_instr_eor_pc__lt,
++	arm_instr_eor_pc__gt,
++	arm_instr_eor_pc__le,
++	arm_instr_eor_pc,
++	arm_instr_nop,
++	arm_instr_sub_pc__eq,
++	arm_instr_sub_pc__ne,
++	arm_instr_sub_pc__cs,
++	arm_instr_sub_pc__cc,
++	arm_instr_sub_pc__mi,
++	arm_instr_sub_pc__pl,
++	arm_instr_sub_pc__vs,
++	arm_instr_sub_pc__vc,
++	arm_instr_sub_pc__hi,
++	arm_instr_sub_pc__ls,
++	arm_instr_sub_pc__ge,
++	arm_instr_sub_pc__lt,
++	arm_instr_sub_pc__gt,
++	arm_instr_sub_pc__le,
++	arm_instr_sub_pc,
++	arm_instr_nop,
++	arm_instr_rsb_pc__eq,
++	arm_instr_rsb_pc__ne,
++	arm_instr_rsb_pc__cs,
++	arm_instr_rsb_pc__cc,
++	arm_instr_rsb_pc__mi,
++	arm_instr_rsb_pc__pl,
++	arm_instr_rsb_pc__vs,
++	arm_instr_rsb_pc__vc,
++	arm_instr_rsb_pc__hi,
++	arm_instr_rsb_pc__ls,
++	arm_instr_rsb_pc__ge,
++	arm_instr_rsb_pc__lt,
++	arm_instr_rsb_pc__gt,
++	arm_instr_rsb_pc__le,
++	arm_instr_rsb_pc,
++	arm_instr_nop,
++	arm_instr_add_pc__eq,
++	arm_instr_add_pc__ne,
++	arm_instr_add_pc__cs,
++	arm_instr_add_pc__cc,
++	arm_instr_add_pc__mi,
++	arm_instr_add_pc__pl,
++	arm_instr_add_pc__vs,
++	arm_instr_add_pc__vc,
++	arm_instr_add_pc__hi,
++	arm_instr_add_pc__ls,
++	arm_instr_add_pc__ge,
++	arm_instr_add_pc__lt,
++	arm_instr_add_pc__gt,
++	arm_instr_add_pc__le,
++	arm_instr_add_pc,
++	arm_instr_nop,
++	arm_instr_adc_pc__eq,
++	arm_instr_adc_pc__ne,
++	arm_instr_adc_pc__cs,
++	arm_instr_adc_pc__cc,
++	arm_instr_adc_pc__mi,
++	arm_instr_adc_pc__pl,
++	arm_instr_adc_pc__vs,
++	arm_instr_adc_pc__vc,
++	arm_instr_adc_pc__hi,
++	arm_instr_adc_pc__ls,
++	arm_instr_adc_pc__ge,
++	arm_instr_adc_pc__lt,
++	arm_instr_adc_pc__gt,
++	arm_instr_adc_pc__le,
++	arm_instr_adc_pc,
++	arm_instr_nop,
++	arm_instr_sbc_pc__eq,
++	arm_instr_sbc_pc__ne,
++	arm_instr_sbc_pc__cs,
++	arm_instr_sbc_pc__cc,
++	arm_instr_sbc_pc__mi,
++	arm_instr_sbc_pc__pl,
++	arm_instr_sbc_pc__vs,
++	arm_instr_sbc_pc__vc,
++	arm_instr_sbc_pc__hi,
++	arm_instr_sbc_pc__ls,
++	arm_instr_sbc_pc__ge,
++	arm_instr_sbc_pc__lt,
++	arm_instr_sbc_pc__gt,
++	arm_instr_sbc_pc__le,
++	arm_instr_sbc_pc,
++	arm_instr_nop,
++	arm_instr_rsc_pc__eq,
++	arm_instr_rsc_pc__ne,
++	arm_instr_rsc_pc__cs,
++	arm_instr_rsc_pc__cc,
++	arm_instr_rsc_pc__mi,
++	arm_instr_rsc_pc__pl,
++	arm_instr_rsc_pc__vs,
++	arm_instr_rsc_pc__vc,
++	arm_instr_rsc_pc__hi,
++	arm_instr_rsc_pc__ls,
++	arm_instr_rsc_pc__ge,
++	arm_instr_rsc_pc__lt,
++	arm_instr_rsc_pc__gt,
++	arm_instr_rsc_pc__le,
++	arm_instr_rsc_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_orr_pc__eq,
++	arm_instr_orr_pc__ne,
++	arm_instr_orr_pc__cs,
++	arm_instr_orr_pc__cc,
++	arm_instr_orr_pc__mi,
++	arm_instr_orr_pc__pl,
++	arm_instr_orr_pc__vs,
++	arm_instr_orr_pc__vc,
++	arm_instr_orr_pc__hi,
++	arm_instr_orr_pc__ls,
++	arm_instr_orr_pc__ge,
++	arm_instr_orr_pc__lt,
++	arm_instr_orr_pc__gt,
++	arm_instr_orr_pc__le,
++	arm_instr_orr_pc,
++	arm_instr_nop,
++	arm_instr_mov_pc__eq,
++	arm_instr_mov_pc__ne,
++	arm_instr_mov_pc__cs,
++	arm_instr_mov_pc__cc,
++	arm_instr_mov_pc__mi,
++	arm_instr_mov_pc__pl,
++	arm_instr_mov_pc__vs,
++	arm_instr_mov_pc__vc,
++	arm_instr_mov_pc__hi,
++	arm_instr_mov_pc__ls,
++	arm_instr_mov_pc__ge,
++	arm_instr_mov_pc__lt,
++	arm_instr_mov_pc__gt,
++	arm_instr_mov_pc__le,
++	arm_instr_mov_pc,
++	arm_instr_nop,
++	arm_instr_bic_pc__eq,
++	arm_instr_bic_pc__ne,
++	arm_instr_bic_pc__cs,
++	arm_instr_bic_pc__cc,
++	arm_instr_bic_pc__mi,
++	arm_instr_bic_pc__pl,
++	arm_instr_bic_pc__vs,
++	arm_instr_bic_pc__vc,
++	arm_instr_bic_pc__hi,
++	arm_instr_bic_pc__ls,
++	arm_instr_bic_pc__ge,
++	arm_instr_bic_pc__lt,
++	arm_instr_bic_pc__gt,
++	arm_instr_bic_pc__le,
++	arm_instr_bic_pc,
++	arm_instr_nop,
++	arm_instr_mvn_pc__eq,
++	arm_instr_mvn_pc__ne,
++	arm_instr_mvn_pc__cs,
++	arm_instr_mvn_pc__cc,
++	arm_instr_mvn_pc__mi,
++	arm_instr_mvn_pc__pl,
++	arm_instr_mvn_pc__vs,
++	arm_instr_mvn_pc__vc,
++	arm_instr_mvn_pc__hi,
++	arm_instr_mvn_pc__ls,
++	arm_instr_mvn_pc__ge,
++	arm_instr_mvn_pc__lt,
++	arm_instr_mvn_pc__gt,
++	arm_instr_mvn_pc__le,
++	arm_instr_mvn_pc,
++	arm_instr_nop,
++	arm_instr_ands_pc__eq,
++	arm_instr_ands_pc__ne,
++	arm_instr_ands_pc__cs,
++	arm_instr_ands_pc__cc,
++	arm_instr_ands_pc__mi,
++	arm_instr_ands_pc__pl,
++	arm_instr_ands_pc__vs,
++	arm_instr_ands_pc__vc,
++	arm_instr_ands_pc__hi,
++	arm_instr_ands_pc__ls,
++	arm_instr_ands_pc__ge,
++	arm_instr_ands_pc__lt,
++	arm_instr_ands_pc__gt,
++	arm_instr_ands_pc__le,
++	arm_instr_ands_pc,
++	arm_instr_nop,
++	arm_instr_eors_pc__eq,
++	arm_instr_eors_pc__ne,
++	arm_instr_eors_pc__cs,
++	arm_instr_eors_pc__cc,
++	arm_instr_eors_pc__mi,
++	arm_instr_eors_pc__pl,
++	arm_instr_eors_pc__vs,
++	arm_instr_eors_pc__vc,
++	arm_instr_eors_pc__hi,
++	arm_instr_eors_pc__ls,
++	arm_instr_eors_pc__ge,
++	arm_instr_eors_pc__lt,
++	arm_instr_eors_pc__gt,
++	arm_instr_eors_pc__le,
++	arm_instr_eors_pc,
++	arm_instr_nop,
++	arm_instr_subs_pc__eq,
++	arm_instr_subs_pc__ne,
++	arm_instr_subs_pc__cs,
++	arm_instr_subs_pc__cc,
++	arm_instr_subs_pc__mi,
++	arm_instr_subs_pc__pl,
++	arm_instr_subs_pc__vs,
++	arm_instr_subs_pc__vc,
++	arm_instr_subs_pc__hi,
++	arm_instr_subs_pc__ls,
++	arm_instr_subs_pc__ge,
++	arm_instr_subs_pc__lt,
++	arm_instr_subs_pc__gt,
++	arm_instr_subs_pc__le,
++	arm_instr_subs_pc,
++	arm_instr_nop,
++	arm_instr_rsbs_pc__eq,
++	arm_instr_rsbs_pc__ne,
++	arm_instr_rsbs_pc__cs,
++	arm_instr_rsbs_pc__cc,
++	arm_instr_rsbs_pc__mi,
++	arm_instr_rsbs_pc__pl,
++	arm_instr_rsbs_pc__vs,
++	arm_instr_rsbs_pc__vc,
++	arm_instr_rsbs_pc__hi,
++	arm_instr_rsbs_pc__ls,
++	arm_instr_rsbs_pc__ge,
++	arm_instr_rsbs_pc__lt,
++	arm_instr_rsbs_pc__gt,
++	arm_instr_rsbs_pc__le,
++	arm_instr_rsbs_pc,
++	arm_instr_nop,
++	arm_instr_adds_pc__eq,
++	arm_instr_adds_pc__ne,
++	arm_instr_adds_pc__cs,
++	arm_instr_adds_pc__cc,
++	arm_instr_adds_pc__mi,
++	arm_instr_adds_pc__pl,
++	arm_instr_adds_pc__vs,
++	arm_instr_adds_pc__vc,
++	arm_instr_adds_pc__hi,
++	arm_instr_adds_pc__ls,
++	arm_instr_adds_pc__ge,
++	arm_instr_adds_pc__lt,
++	arm_instr_adds_pc__gt,
++	arm_instr_adds_pc__le,
++	arm_instr_adds_pc,
++	arm_instr_nop,
++	arm_instr_adcs_pc__eq,
++	arm_instr_adcs_pc__ne,
++	arm_instr_adcs_pc__cs,
++	arm_instr_adcs_pc__cc,
++	arm_instr_adcs_pc__mi,
++	arm_instr_adcs_pc__pl,
++	arm_instr_adcs_pc__vs,
++	arm_instr_adcs_pc__vc,
++	arm_instr_adcs_pc__hi,
++	arm_instr_adcs_pc__ls,
++	arm_instr_adcs_pc__ge,
++	arm_instr_adcs_pc__lt,
++	arm_instr_adcs_pc__gt,
++	arm_instr_adcs_pc__le,
++	arm_instr_adcs_pc,
++	arm_instr_nop,
++	arm_instr_sbcs_pc__eq,
++	arm_instr_sbcs_pc__ne,
++	arm_instr_sbcs_pc__cs,
++	arm_instr_sbcs_pc__cc,
++	arm_instr_sbcs_pc__mi,
++	arm_instr_sbcs_pc__pl,
++	arm_instr_sbcs_pc__vs,
++	arm_instr_sbcs_pc__vc,
++	arm_instr_sbcs_pc__hi,
++	arm_instr_sbcs_pc__ls,
++	arm_instr_sbcs_pc__ge,
++	arm_instr_sbcs_pc__lt,
++	arm_instr_sbcs_pc__gt,
++	arm_instr_sbcs_pc__le,
++	arm_instr_sbcs_pc,
++	arm_instr_nop,
++	arm_instr_rscs_pc__eq,
++	arm_instr_rscs_pc__ne,
++	arm_instr_rscs_pc__cs,
++	arm_instr_rscs_pc__cc,
++	arm_instr_rscs_pc__mi,
++	arm_instr_rscs_pc__pl,
++	arm_instr_rscs_pc__vs,
++	arm_instr_rscs_pc__vc,
++	arm_instr_rscs_pc__hi,
++	arm_instr_rscs_pc__ls,
++	arm_instr_rscs_pc__ge,
++	arm_instr_rscs_pc__lt,
++	arm_instr_rscs_pc__gt,
++	arm_instr_rscs_pc__le,
++	arm_instr_rscs_pc,
++	arm_instr_nop,
++	arm_instr_tsts_pc__eq,
++	arm_instr_tsts_pc__ne,
++	arm_instr_tsts_pc__cs,
++	arm_instr_tsts_pc__cc,
++	arm_instr_tsts_pc__mi,
++	arm_instr_tsts_pc__pl,
++	arm_instr_tsts_pc__vs,
++	arm_instr_tsts_pc__vc,
++	arm_instr_tsts_pc__hi,
++	arm_instr_tsts_pc__ls,
++	arm_instr_tsts_pc__ge,
++	arm_instr_tsts_pc__lt,
++	arm_instr_tsts_pc__gt,
++	arm_instr_tsts_pc__le,
++	arm_instr_tsts_pc,
++	arm_instr_nop,
++	arm_instr_teqs_pc__eq,
++	arm_instr_teqs_pc__ne,
++	arm_instr_teqs_pc__cs,
++	arm_instr_teqs_pc__cc,
++	arm_instr_teqs_pc__mi,
++	arm_instr_teqs_pc__pl,
++	arm_instr_teqs_pc__vs,
++	arm_instr_teqs_pc__vc,
++	arm_instr_teqs_pc__hi,
++	arm_instr_teqs_pc__ls,
++	arm_instr_teqs_pc__ge,
++	arm_instr_teqs_pc__lt,
++	arm_instr_teqs_pc__gt,
++	arm_instr_teqs_pc__le,
++	arm_instr_teqs_pc,
++	arm_instr_nop,
++	arm_instr_cmps_pc__eq,
++	arm_instr_cmps_pc__ne,
++	arm_instr_cmps_pc__cs,
++	arm_instr_cmps_pc__cc,
++	arm_instr_cmps_pc__mi,
++	arm_instr_cmps_pc__pl,
++	arm_instr_cmps_pc__vs,
++	arm_instr_cmps_pc__vc,
++	arm_instr_cmps_pc__hi,
++	arm_instr_cmps_pc__ls,
++	arm_instr_cmps_pc__ge,
++	arm_instr_cmps_pc__lt,
++	arm_instr_cmps_pc__gt,
++	arm_instr_cmps_pc__le,
++	arm_instr_cmps_pc,
++	arm_instr_nop,
++	arm_instr_cmns_pc__eq,
++	arm_instr_cmns_pc__ne,
++	arm_instr_cmns_pc__cs,
++	arm_instr_cmns_pc__cc,
++	arm_instr_cmns_pc__mi,
++	arm_instr_cmns_pc__pl,
++	arm_instr_cmns_pc__vs,
++	arm_instr_cmns_pc__vc,
++	arm_instr_cmns_pc__hi,
++	arm_instr_cmns_pc__ls,
++	arm_instr_cmns_pc__ge,
++	arm_instr_cmns_pc__lt,
++	arm_instr_cmns_pc__gt,
++	arm_instr_cmns_pc__le,
++	arm_instr_cmns_pc,
++	arm_instr_nop,
++	arm_instr_orrs_pc__eq,
++	arm_instr_orrs_pc__ne,
++	arm_instr_orrs_pc__cs,
++	arm_instr_orrs_pc__cc,
++	arm_instr_orrs_pc__mi,
++	arm_instr_orrs_pc__pl,
++	arm_instr_orrs_pc__vs,
++	arm_instr_orrs_pc__vc,
++	arm_instr_orrs_pc__hi,
++	arm_instr_orrs_pc__ls,
++	arm_instr_orrs_pc__ge,
++	arm_instr_orrs_pc__lt,
++	arm_instr_orrs_pc__gt,
++	arm_instr_orrs_pc__le,
++	arm_instr_orrs_pc,
++	arm_instr_nop,
++	arm_instr_movs_pc__eq,
++	arm_instr_movs_pc__ne,
++	arm_instr_movs_pc__cs,
++	arm_instr_movs_pc__cc,
++	arm_instr_movs_pc__mi,
++	arm_instr_movs_pc__pl,
++	arm_instr_movs_pc__vs,
++	arm_instr_movs_pc__vc,
++	arm_instr_movs_pc__hi,
++	arm_instr_movs_pc__ls,
++	arm_instr_movs_pc__ge,
++	arm_instr_movs_pc__lt,
++	arm_instr_movs_pc__gt,
++	arm_instr_movs_pc__le,
++	arm_instr_movs_pc,
++	arm_instr_nop,
++	arm_instr_bics_pc__eq,
++	arm_instr_bics_pc__ne,
++	arm_instr_bics_pc__cs,
++	arm_instr_bics_pc__cc,
++	arm_instr_bics_pc__mi,
++	arm_instr_bics_pc__pl,
++	arm_instr_bics_pc__vs,
++	arm_instr_bics_pc__vc,
++	arm_instr_bics_pc__hi,
++	arm_instr_bics_pc__ls,
++	arm_instr_bics_pc__ge,
++	arm_instr_bics_pc__lt,
++	arm_instr_bics_pc__gt,
++	arm_instr_bics_pc__le,
++	arm_instr_bics_pc,
++	arm_instr_nop,
++	arm_instr_mvns_pc__eq,
++	arm_instr_mvns_pc__ne,
++	arm_instr_mvns_pc__cs,
++	arm_instr_mvns_pc__cc,
++	arm_instr_mvns_pc__mi,
++	arm_instr_mvns_pc__pl,
++	arm_instr_mvns_pc__vs,
++	arm_instr_mvns_pc__vc,
++	arm_instr_mvns_pc__hi,
++	arm_instr_mvns_pc__ls,
++	arm_instr_mvns_pc__ge,
++	arm_instr_mvns_pc__lt,
++	arm_instr_mvns_pc__gt,
++	arm_instr_mvns_pc__le,
++	arm_instr_mvns_pc,
++	arm_instr_nop,
++	arm_instr_and_reg__eq,
++	arm_instr_and_reg__ne,
++	arm_instr_and_reg__cs,
++	arm_instr_and_reg__cc,
++	arm_instr_and_reg__mi,
++	arm_instr_and_reg__pl,
++	arm_instr_and_reg__vs,
++	arm_instr_and_reg__vc,
++	arm_instr_and_reg__hi,
++	arm_instr_and_reg__ls,
++	arm_instr_and_reg__ge,
++	arm_instr_and_reg__lt,
++	arm_instr_and_reg__gt,
++	arm_instr_and_reg__le,
++	arm_instr_and_reg,
++	arm_instr_nop,
++	arm_instr_eor_reg__eq,
++	arm_instr_eor_reg__ne,
++	arm_instr_eor_reg__cs,
++	arm_instr_eor_reg__cc,
++	arm_instr_eor_reg__mi,
++	arm_instr_eor_reg__pl,
++	arm_instr_eor_reg__vs,
++	arm_instr_eor_reg__vc,
++	arm_instr_eor_reg__hi,
++	arm_instr_eor_reg__ls,
++	arm_instr_eor_reg__ge,
++	arm_instr_eor_reg__lt,
++	arm_instr_eor_reg__gt,
++	arm_instr_eor_reg__le,
++	arm_instr_eor_reg,
++	arm_instr_nop,
++	arm_instr_sub_reg__eq,
++	arm_instr_sub_reg__ne,
++	arm_instr_sub_reg__cs,
++	arm_instr_sub_reg__cc,
++	arm_instr_sub_reg__mi,
++	arm_instr_sub_reg__pl,
++	arm_instr_sub_reg__vs,
++	arm_instr_sub_reg__vc,
++	arm_instr_sub_reg__hi,
++	arm_instr_sub_reg__ls,
++	arm_instr_sub_reg__ge,
++	arm_instr_sub_reg__lt,
++	arm_instr_sub_reg__gt,
++	arm_instr_sub_reg__le,
++	arm_instr_sub_reg,
++	arm_instr_nop,
++	arm_instr_rsb_reg__eq,
++	arm_instr_rsb_reg__ne,
++	arm_instr_rsb_reg__cs,
++	arm_instr_rsb_reg__cc,
++	arm_instr_rsb_reg__mi,
++	arm_instr_rsb_reg__pl,
++	arm_instr_rsb_reg__vs,
++	arm_instr_rsb_reg__vc,
++	arm_instr_rsb_reg__hi,
++	arm_instr_rsb_reg__ls,
++	arm_instr_rsb_reg__ge,
++	arm_instr_rsb_reg__lt,
++	arm_instr_rsb_reg__gt,
++	arm_instr_rsb_reg__le,
++	arm_instr_rsb_reg,
++	arm_instr_nop,
++	arm_instr_add_reg__eq,
++	arm_instr_add_reg__ne,
++	arm_instr_add_reg__cs,
++	arm_instr_add_reg__cc,
++	arm_instr_add_reg__mi,
++	arm_instr_add_reg__pl,
++	arm_instr_add_reg__vs,
++	arm_instr_add_reg__vc,
++	arm_instr_add_reg__hi,
++	arm_instr_add_reg__ls,
++	arm_instr_add_reg__ge,
++	arm_instr_add_reg__lt,
++	arm_instr_add_reg__gt,
++	arm_instr_add_reg__le,
++	arm_instr_add_reg,
++	arm_instr_nop,
++	arm_instr_adc_reg__eq,
++	arm_instr_adc_reg__ne,
++	arm_instr_adc_reg__cs,
++	arm_instr_adc_reg__cc,
++	arm_instr_adc_reg__mi,
++	arm_instr_adc_reg__pl,
++	arm_instr_adc_reg__vs,
++	arm_instr_adc_reg__vc,
++	arm_instr_adc_reg__hi,
++	arm_instr_adc_reg__ls,
++	arm_instr_adc_reg__ge,
++	arm_instr_adc_reg__lt,
++	arm_instr_adc_reg__gt,
++	arm_instr_adc_reg__le,
++	arm_instr_adc_reg,
++	arm_instr_nop,
++	arm_instr_sbc_reg__eq,
++	arm_instr_sbc_reg__ne,
++	arm_instr_sbc_reg__cs,
++	arm_instr_sbc_reg__cc,
++	arm_instr_sbc_reg__mi,
++	arm_instr_sbc_reg__pl,
++	arm_instr_sbc_reg__vs,
++	arm_instr_sbc_reg__vc,
++	arm_instr_sbc_reg__hi,
++	arm_instr_sbc_reg__ls,
++	arm_instr_sbc_reg__ge,
++	arm_instr_sbc_reg__lt,
++	arm_instr_sbc_reg__gt,
++	arm_instr_sbc_reg__le,
++	arm_instr_sbc_reg,
++	arm_instr_nop,
++	arm_instr_rsc_reg__eq,
++	arm_instr_rsc_reg__ne,
++	arm_instr_rsc_reg__cs,
++	arm_instr_rsc_reg__cc,
++	arm_instr_rsc_reg__mi,
++	arm_instr_rsc_reg__pl,
++	arm_instr_rsc_reg__vs,
++	arm_instr_rsc_reg__vc,
++	arm_instr_rsc_reg__hi,
++	arm_instr_rsc_reg__ls,
++	arm_instr_rsc_reg__ge,
++	arm_instr_rsc_reg__lt,
++	arm_instr_rsc_reg__gt,
++	arm_instr_rsc_reg__le,
++	arm_instr_rsc_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_orr_reg__eq,
++	arm_instr_orr_reg__ne,
++	arm_instr_orr_reg__cs,
++	arm_instr_orr_reg__cc,
++	arm_instr_orr_reg__mi,
++	arm_instr_orr_reg__pl,
++	arm_instr_orr_reg__vs,
++	arm_instr_orr_reg__vc,
++	arm_instr_orr_reg__hi,
++	arm_instr_orr_reg__ls,
++	arm_instr_orr_reg__ge,
++	arm_instr_orr_reg__lt,
++	arm_instr_orr_reg__gt,
++	arm_instr_orr_reg__le,
++	arm_instr_orr_reg,
++	arm_instr_nop,
++	arm_instr_mov_reg__eq,
++	arm_instr_mov_reg__ne,
++	arm_instr_mov_reg__cs,
++	arm_instr_mov_reg__cc,
++	arm_instr_mov_reg__mi,
++	arm_instr_mov_reg__pl,
++	arm_instr_mov_reg__vs,
++	arm_instr_mov_reg__vc,
++	arm_instr_mov_reg__hi,
++	arm_instr_mov_reg__ls,
++	arm_instr_mov_reg__ge,
++	arm_instr_mov_reg__lt,
++	arm_instr_mov_reg__gt,
++	arm_instr_mov_reg__le,
++	arm_instr_mov_reg,
++	arm_instr_nop,
++	arm_instr_bic_reg__eq,
++	arm_instr_bic_reg__ne,
++	arm_instr_bic_reg__cs,
++	arm_instr_bic_reg__cc,
++	arm_instr_bic_reg__mi,
++	arm_instr_bic_reg__pl,
++	arm_instr_bic_reg__vs,
++	arm_instr_bic_reg__vc,
++	arm_instr_bic_reg__hi,
++	arm_instr_bic_reg__ls,
++	arm_instr_bic_reg__ge,
++	arm_instr_bic_reg__lt,
++	arm_instr_bic_reg__gt,
++	arm_instr_bic_reg__le,
++	arm_instr_bic_reg,
++	arm_instr_nop,
++	arm_instr_mvn_reg__eq,
++	arm_instr_mvn_reg__ne,
++	arm_instr_mvn_reg__cs,
++	arm_instr_mvn_reg__cc,
++	arm_instr_mvn_reg__mi,
++	arm_instr_mvn_reg__pl,
++	arm_instr_mvn_reg__vs,
++	arm_instr_mvn_reg__vc,
++	arm_instr_mvn_reg__hi,
++	arm_instr_mvn_reg__ls,
++	arm_instr_mvn_reg__ge,
++	arm_instr_mvn_reg__lt,
++	arm_instr_mvn_reg__gt,
++	arm_instr_mvn_reg__le,
++	arm_instr_mvn_reg,
++	arm_instr_nop,
++	arm_instr_ands_reg__eq,
++	arm_instr_ands_reg__ne,
++	arm_instr_ands_reg__cs,
++	arm_instr_ands_reg__cc,
++	arm_instr_ands_reg__mi,
++	arm_instr_ands_reg__pl,
++	arm_instr_ands_reg__vs,
++	arm_instr_ands_reg__vc,
++	arm_instr_ands_reg__hi,
++	arm_instr_ands_reg__ls,
++	arm_instr_ands_reg__ge,
++	arm_instr_ands_reg__lt,
++	arm_instr_ands_reg__gt,
++	arm_instr_ands_reg__le,
++	arm_instr_ands_reg,
++	arm_instr_nop,
++	arm_instr_eors_reg__eq,
++	arm_instr_eors_reg__ne,
++	arm_instr_eors_reg__cs,
++	arm_instr_eors_reg__cc,
++	arm_instr_eors_reg__mi,
++	arm_instr_eors_reg__pl,
++	arm_instr_eors_reg__vs,
++	arm_instr_eors_reg__vc,
++	arm_instr_eors_reg__hi,
++	arm_instr_eors_reg__ls,
++	arm_instr_eors_reg__ge,
++	arm_instr_eors_reg__lt,
++	arm_instr_eors_reg__gt,
++	arm_instr_eors_reg__le,
++	arm_instr_eors_reg,
++	arm_instr_nop,
++	arm_instr_subs_reg__eq,
++	arm_instr_subs_reg__ne,
++	arm_instr_subs_reg__cs,
++	arm_instr_subs_reg__cc,
++	arm_instr_subs_reg__mi,
++	arm_instr_subs_reg__pl,
++	arm_instr_subs_reg__vs,
++	arm_instr_subs_reg__vc,
++	arm_instr_subs_reg__hi,
++	arm_instr_subs_reg__ls,
++	arm_instr_subs_reg__ge,
++	arm_instr_subs_reg__lt,
++	arm_instr_subs_reg__gt,
++	arm_instr_subs_reg__le,
++	arm_instr_subs_reg,
++	arm_instr_nop,
++	arm_instr_rsbs_reg__eq,
++	arm_instr_rsbs_reg__ne,
++	arm_instr_rsbs_reg__cs,
++	arm_instr_rsbs_reg__cc,
++	arm_instr_rsbs_reg__mi,
++	arm_instr_rsbs_reg__pl,
++	arm_instr_rsbs_reg__vs,
++	arm_instr_rsbs_reg__vc,
++	arm_instr_rsbs_reg__hi,
++	arm_instr_rsbs_reg__ls,
++	arm_instr_rsbs_reg__ge,
++	arm_instr_rsbs_reg__lt,
++	arm_instr_rsbs_reg__gt,
++	arm_instr_rsbs_reg__le,
++	arm_instr_rsbs_reg,
++	arm_instr_nop,
++	arm_instr_adds_reg__eq,
++	arm_instr_adds_reg__ne,
++	arm_instr_adds_reg__cs,
++	arm_instr_adds_reg__cc,
++	arm_instr_adds_reg__mi,
++	arm_instr_adds_reg__pl,
++	arm_instr_adds_reg__vs,
++	arm_instr_adds_reg__vc,
++	arm_instr_adds_reg__hi,
++	arm_instr_adds_reg__ls,
++	arm_instr_adds_reg__ge,
++	arm_instr_adds_reg__lt,
++	arm_instr_adds_reg__gt,
++	arm_instr_adds_reg__le,
++	arm_instr_adds_reg,
++	arm_instr_nop,
++	arm_instr_adcs_reg__eq,
++	arm_instr_adcs_reg__ne,
++	arm_instr_adcs_reg__cs,
++	arm_instr_adcs_reg__cc,
++	arm_instr_adcs_reg__mi,
++	arm_instr_adcs_reg__pl,
++	arm_instr_adcs_reg__vs,
++	arm_instr_adcs_reg__vc,
++	arm_instr_adcs_reg__hi,
++	arm_instr_adcs_reg__ls,
++	arm_instr_adcs_reg__ge,
++	arm_instr_adcs_reg__lt,
++	arm_instr_adcs_reg__gt,
++	arm_instr_adcs_reg__le,
++	arm_instr_adcs_reg,
++	arm_instr_nop,
++	arm_instr_sbcs_reg__eq,
++	arm_instr_sbcs_reg__ne,
++	arm_instr_sbcs_reg__cs,
++	arm_instr_sbcs_reg__cc,
++	arm_instr_sbcs_reg__mi,
++	arm_instr_sbcs_reg__pl,
++	arm_instr_sbcs_reg__vs,
++	arm_instr_sbcs_reg__vc,
++	arm_instr_sbcs_reg__hi,
++	arm_instr_sbcs_reg__ls,
++	arm_instr_sbcs_reg__ge,
++	arm_instr_sbcs_reg__lt,
++	arm_instr_sbcs_reg__gt,
++	arm_instr_sbcs_reg__le,
++	arm_instr_sbcs_reg,
++	arm_instr_nop,
++	arm_instr_rscs_reg__eq,
++	arm_instr_rscs_reg__ne,
++	arm_instr_rscs_reg__cs,
++	arm_instr_rscs_reg__cc,
++	arm_instr_rscs_reg__mi,
++	arm_instr_rscs_reg__pl,
++	arm_instr_rscs_reg__vs,
++	arm_instr_rscs_reg__vc,
++	arm_instr_rscs_reg__hi,
++	arm_instr_rscs_reg__ls,
++	arm_instr_rscs_reg__ge,
++	arm_instr_rscs_reg__lt,
++	arm_instr_rscs_reg__gt,
++	arm_instr_rscs_reg__le,
++	arm_instr_rscs_reg,
++	arm_instr_nop,
++	arm_instr_tsts_reg__eq,
++	arm_instr_tsts_reg__ne,
++	arm_instr_tsts_reg__cs,
++	arm_instr_tsts_reg__cc,
++	arm_instr_tsts_reg__mi,
++	arm_instr_tsts_reg__pl,
++	arm_instr_tsts_reg__vs,
++	arm_instr_tsts_reg__vc,
++	arm_instr_tsts_reg__hi,
++	arm_instr_tsts_reg__ls,
++	arm_instr_tsts_reg__ge,
++	arm_instr_tsts_reg__lt,
++	arm_instr_tsts_reg__gt,
++	arm_instr_tsts_reg__le,
++	arm_instr_tsts_reg,
++	arm_instr_nop,
++	arm_instr_teqs_reg__eq,
++	arm_instr_teqs_reg__ne,
++	arm_instr_teqs_reg__cs,
++	arm_instr_teqs_reg__cc,
++	arm_instr_teqs_reg__mi,
++	arm_instr_teqs_reg__pl,
++	arm_instr_teqs_reg__vs,
++	arm_instr_teqs_reg__vc,
++	arm_instr_teqs_reg__hi,
++	arm_instr_teqs_reg__ls,
++	arm_instr_teqs_reg__ge,
++	arm_instr_teqs_reg__lt,
++	arm_instr_teqs_reg__gt,
++	arm_instr_teqs_reg__le,
++	arm_instr_teqs_reg,
++	arm_instr_nop,
++	arm_instr_cmps_reg__eq,
++	arm_instr_cmps_reg__ne,
++	arm_instr_cmps_reg__cs,
++	arm_instr_cmps_reg__cc,
++	arm_instr_cmps_reg__mi,
++	arm_instr_cmps_reg__pl,
++	arm_instr_cmps_reg__vs,
++	arm_instr_cmps_reg__vc,
++	arm_instr_cmps_reg__hi,
++	arm_instr_cmps_reg__ls,
++	arm_instr_cmps_reg__ge,
++	arm_instr_cmps_reg__lt,
++	arm_instr_cmps_reg__gt,
++	arm_instr_cmps_reg__le,
++	arm_instr_cmps_reg,
++	arm_instr_nop,
++	arm_instr_cmns_reg__eq,
++	arm_instr_cmns_reg__ne,
++	arm_instr_cmns_reg__cs,
++	arm_instr_cmns_reg__cc,
++	arm_instr_cmns_reg__mi,
++	arm_instr_cmns_reg__pl,
++	arm_instr_cmns_reg__vs,
++	arm_instr_cmns_reg__vc,
++	arm_instr_cmns_reg__hi,
++	arm_instr_cmns_reg__ls,
++	arm_instr_cmns_reg__ge,
++	arm_instr_cmns_reg__lt,
++	arm_instr_cmns_reg__gt,
++	arm_instr_cmns_reg__le,
++	arm_instr_cmns_reg,
++	arm_instr_nop,
++	arm_instr_orrs_reg__eq,
++	arm_instr_orrs_reg__ne,
++	arm_instr_orrs_reg__cs,
++	arm_instr_orrs_reg__cc,
++	arm_instr_orrs_reg__mi,
++	arm_instr_orrs_reg__pl,
++	arm_instr_orrs_reg__vs,
++	arm_instr_orrs_reg__vc,
++	arm_instr_orrs_reg__hi,
++	arm_instr_orrs_reg__ls,
++	arm_instr_orrs_reg__ge,
++	arm_instr_orrs_reg__lt,
++	arm_instr_orrs_reg__gt,
++	arm_instr_orrs_reg__le,
++	arm_instr_orrs_reg,
++	arm_instr_nop,
++	arm_instr_movs_reg__eq,
++	arm_instr_movs_reg__ne,
++	arm_instr_movs_reg__cs,
++	arm_instr_movs_reg__cc,
++	arm_instr_movs_reg__mi,
++	arm_instr_movs_reg__pl,
++	arm_instr_movs_reg__vs,
++	arm_instr_movs_reg__vc,
++	arm_instr_movs_reg__hi,
++	arm_instr_movs_reg__ls,
++	arm_instr_movs_reg__ge,
++	arm_instr_movs_reg__lt,
++	arm_instr_movs_reg__gt,
++	arm_instr_movs_reg__le,
++	arm_instr_movs_reg,
++	arm_instr_nop,
++	arm_instr_bics_reg__eq,
++	arm_instr_bics_reg__ne,
++	arm_instr_bics_reg__cs,
++	arm_instr_bics_reg__cc,
++	arm_instr_bics_reg__mi,
++	arm_instr_bics_reg__pl,
++	arm_instr_bics_reg__vs,
++	arm_instr_bics_reg__vc,
++	arm_instr_bics_reg__hi,
++	arm_instr_bics_reg__ls,
++	arm_instr_bics_reg__ge,
++	arm_instr_bics_reg__lt,
++	arm_instr_bics_reg__gt,
++	arm_instr_bics_reg__le,
++	arm_instr_bics_reg,
++	arm_instr_nop,
++	arm_instr_mvns_reg__eq,
++	arm_instr_mvns_reg__ne,
++	arm_instr_mvns_reg__cs,
++	arm_instr_mvns_reg__cc,
++	arm_instr_mvns_reg__mi,
++	arm_instr_mvns_reg__pl,
++	arm_instr_mvns_reg__vs,
++	arm_instr_mvns_reg__vc,
++	arm_instr_mvns_reg__hi,
++	arm_instr_mvns_reg__ls,
++	arm_instr_mvns_reg__ge,
++	arm_instr_mvns_reg__lt,
++	arm_instr_mvns_reg__gt,
++	arm_instr_mvns_reg__le,
++	arm_instr_mvns_reg,
++	arm_instr_nop,
++	arm_instr_and_pc_reg__eq,
++	arm_instr_and_pc_reg__ne,
++	arm_instr_and_pc_reg__cs,
++	arm_instr_and_pc_reg__cc,
++	arm_instr_and_pc_reg__mi,
++	arm_instr_and_pc_reg__pl,
++	arm_instr_and_pc_reg__vs,
++	arm_instr_and_pc_reg__vc,
++	arm_instr_and_pc_reg__hi,
++	arm_instr_and_pc_reg__ls,
++	arm_instr_and_pc_reg__ge,
++	arm_instr_and_pc_reg__lt,
++	arm_instr_and_pc_reg__gt,
++	arm_instr_and_pc_reg__le,
++	arm_instr_and_pc_reg,
++	arm_instr_nop,
++	arm_instr_eor_pc_reg__eq,
++	arm_instr_eor_pc_reg__ne,
++	arm_instr_eor_pc_reg__cs,
++	arm_instr_eor_pc_reg__cc,
++	arm_instr_eor_pc_reg__mi,
++	arm_instr_eor_pc_reg__pl,
++	arm_instr_eor_pc_reg__vs,
++	arm_instr_eor_pc_reg__vc,
++	arm_instr_eor_pc_reg__hi,
++	arm_instr_eor_pc_reg__ls,
++	arm_instr_eor_pc_reg__ge,
++	arm_instr_eor_pc_reg__lt,
++	arm_instr_eor_pc_reg__gt,
++	arm_instr_eor_pc_reg__le,
++	arm_instr_eor_pc_reg,
++	arm_instr_nop,
++	arm_instr_sub_pc_reg__eq,
++	arm_instr_sub_pc_reg__ne,
++	arm_instr_sub_pc_reg__cs,
++	arm_instr_sub_pc_reg__cc,
++	arm_instr_sub_pc_reg__mi,
++	arm_instr_sub_pc_reg__pl,
++	arm_instr_sub_pc_reg__vs,
++	arm_instr_sub_pc_reg__vc,
++	arm_instr_sub_pc_reg__hi,
++	arm_instr_sub_pc_reg__ls,
++	arm_instr_sub_pc_reg__ge,
++	arm_instr_sub_pc_reg__lt,
++	arm_instr_sub_pc_reg__gt,
++	arm_instr_sub_pc_reg__le,
++	arm_instr_sub_pc_reg,
++	arm_instr_nop,
++	arm_instr_rsb_pc_reg__eq,
++	arm_instr_rsb_pc_reg__ne,
++	arm_instr_rsb_pc_reg__cs,
++	arm_instr_rsb_pc_reg__cc,
++	arm_instr_rsb_pc_reg__mi,
++	arm_instr_rsb_pc_reg__pl,
++	arm_instr_rsb_pc_reg__vs,
++	arm_instr_rsb_pc_reg__vc,
++	arm_instr_rsb_pc_reg__hi,
++	arm_instr_rsb_pc_reg__ls,
++	arm_instr_rsb_pc_reg__ge,
++	arm_instr_rsb_pc_reg__lt,
++	arm_instr_rsb_pc_reg__gt,
++	arm_instr_rsb_pc_reg__le,
++	arm_instr_rsb_pc_reg,
++	arm_instr_nop,
++	arm_instr_add_pc_reg__eq,
++	arm_instr_add_pc_reg__ne,
++	arm_instr_add_pc_reg__cs,
++	arm_instr_add_pc_reg__cc,
++	arm_instr_add_pc_reg__mi,
++	arm_instr_add_pc_reg__pl,
++	arm_instr_add_pc_reg__vs,
++	arm_instr_add_pc_reg__vc,
++	arm_instr_add_pc_reg__hi,
++	arm_instr_add_pc_reg__ls,
++	arm_instr_add_pc_reg__ge,
++	arm_instr_add_pc_reg__lt,
++	arm_instr_add_pc_reg__gt,
++	arm_instr_add_pc_reg__le,
++	arm_instr_add_pc_reg,
++	arm_instr_nop,
++	arm_instr_adc_pc_reg__eq,
++	arm_instr_adc_pc_reg__ne,
++	arm_instr_adc_pc_reg__cs,
++	arm_instr_adc_pc_reg__cc,
++	arm_instr_adc_pc_reg__mi,
++	arm_instr_adc_pc_reg__pl,
++	arm_instr_adc_pc_reg__vs,
++	arm_instr_adc_pc_reg__vc,
++	arm_instr_adc_pc_reg__hi,
++	arm_instr_adc_pc_reg__ls,
++	arm_instr_adc_pc_reg__ge,
++	arm_instr_adc_pc_reg__lt,
++	arm_instr_adc_pc_reg__gt,
++	arm_instr_adc_pc_reg__le,
++	arm_instr_adc_pc_reg,
++	arm_instr_nop,
++	arm_instr_sbc_pc_reg__eq,
++	arm_instr_sbc_pc_reg__ne,
++	arm_instr_sbc_pc_reg__cs,
++	arm_instr_sbc_pc_reg__cc,
++	arm_instr_sbc_pc_reg__mi,
++	arm_instr_sbc_pc_reg__pl,
++	arm_instr_sbc_pc_reg__vs,
++	arm_instr_sbc_pc_reg__vc,
++	arm_instr_sbc_pc_reg__hi,
++	arm_instr_sbc_pc_reg__ls,
++	arm_instr_sbc_pc_reg__ge,
++	arm_instr_sbc_pc_reg__lt,
++	arm_instr_sbc_pc_reg__gt,
++	arm_instr_sbc_pc_reg__le,
++	arm_instr_sbc_pc_reg,
++	arm_instr_nop,
++	arm_instr_rsc_pc_reg__eq,
++	arm_instr_rsc_pc_reg__ne,
++	arm_instr_rsc_pc_reg__cs,
++	arm_instr_rsc_pc_reg__cc,
++	arm_instr_rsc_pc_reg__mi,
++	arm_instr_rsc_pc_reg__pl,
++	arm_instr_rsc_pc_reg__vs,
++	arm_instr_rsc_pc_reg__vc,
++	arm_instr_rsc_pc_reg__hi,
++	arm_instr_rsc_pc_reg__ls,
++	arm_instr_rsc_pc_reg__ge,
++	arm_instr_rsc_pc_reg__lt,
++	arm_instr_rsc_pc_reg__gt,
++	arm_instr_rsc_pc_reg__le,
++	arm_instr_rsc_pc_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_orr_pc_reg__eq,
++	arm_instr_orr_pc_reg__ne,
++	arm_instr_orr_pc_reg__cs,
++	arm_instr_orr_pc_reg__cc,
++	arm_instr_orr_pc_reg__mi,
++	arm_instr_orr_pc_reg__pl,
++	arm_instr_orr_pc_reg__vs,
++	arm_instr_orr_pc_reg__vc,
++	arm_instr_orr_pc_reg__hi,
++	arm_instr_orr_pc_reg__ls,
++	arm_instr_orr_pc_reg__ge,
++	arm_instr_orr_pc_reg__lt,
++	arm_instr_orr_pc_reg__gt,
++	arm_instr_orr_pc_reg__le,
++	arm_instr_orr_pc_reg,
++	arm_instr_nop,
++	arm_instr_mov_pc_reg__eq,
++	arm_instr_mov_pc_reg__ne,
++	arm_instr_mov_pc_reg__cs,
++	arm_instr_mov_pc_reg__cc,
++	arm_instr_mov_pc_reg__mi,
++	arm_instr_mov_pc_reg__pl,
++	arm_instr_mov_pc_reg__vs,
++	arm_instr_mov_pc_reg__vc,
++	arm_instr_mov_pc_reg__hi,
++	arm_instr_mov_pc_reg__ls,
++	arm_instr_mov_pc_reg__ge,
++	arm_instr_mov_pc_reg__lt,
++	arm_instr_mov_pc_reg__gt,
++	arm_instr_mov_pc_reg__le,
++	arm_instr_mov_pc_reg,
++	arm_instr_nop,
++	arm_instr_bic_pc_reg__eq,
++	arm_instr_bic_pc_reg__ne,
++	arm_instr_bic_pc_reg__cs,
++	arm_instr_bic_pc_reg__cc,
++	arm_instr_bic_pc_reg__mi,
++	arm_instr_bic_pc_reg__pl,
++	arm_instr_bic_pc_reg__vs,
++	arm_instr_bic_pc_reg__vc,
++	arm_instr_bic_pc_reg__hi,
++	arm_instr_bic_pc_reg__ls,
++	arm_instr_bic_pc_reg__ge,
++	arm_instr_bic_pc_reg__lt,
++	arm_instr_bic_pc_reg__gt,
++	arm_instr_bic_pc_reg__le,
++	arm_instr_bic_pc_reg,
++	arm_instr_nop,
++	arm_instr_mvn_pc_reg__eq,
++	arm_instr_mvn_pc_reg__ne,
++	arm_instr_mvn_pc_reg__cs,
++	arm_instr_mvn_pc_reg__cc,
++	arm_instr_mvn_pc_reg__mi,
++	arm_instr_mvn_pc_reg__pl,
++	arm_instr_mvn_pc_reg__vs,
++	arm_instr_mvn_pc_reg__vc,
++	arm_instr_mvn_pc_reg__hi,
++	arm_instr_mvn_pc_reg__ls,
++	arm_instr_mvn_pc_reg__ge,
++	arm_instr_mvn_pc_reg__lt,
++	arm_instr_mvn_pc_reg__gt,
++	arm_instr_mvn_pc_reg__le,
++	arm_instr_mvn_pc_reg,
++	arm_instr_nop,
++	arm_instr_ands_pc_reg__eq,
++	arm_instr_ands_pc_reg__ne,
++	arm_instr_ands_pc_reg__cs,
++	arm_instr_ands_pc_reg__cc,
++	arm_instr_ands_pc_reg__mi,
++	arm_instr_ands_pc_reg__pl,
++	arm_instr_ands_pc_reg__vs,
++	arm_instr_ands_pc_reg__vc,
++	arm_instr_ands_pc_reg__hi,
++	arm_instr_ands_pc_reg__ls,
++	arm_instr_ands_pc_reg__ge,
++	arm_instr_ands_pc_reg__lt,
++	arm_instr_ands_pc_reg__gt,
++	arm_instr_ands_pc_reg__le,
++	arm_instr_ands_pc_reg,
++	arm_instr_nop,
++	arm_instr_eors_pc_reg__eq,
++	arm_instr_eors_pc_reg__ne,
++	arm_instr_eors_pc_reg__cs,
++	arm_instr_eors_pc_reg__cc,
++	arm_instr_eors_pc_reg__mi,
++	arm_instr_eors_pc_reg__pl,
++	arm_instr_eors_pc_reg__vs,
++	arm_instr_eors_pc_reg__vc,
++	arm_instr_eors_pc_reg__hi,
++	arm_instr_eors_pc_reg__ls,
++	arm_instr_eors_pc_reg__ge,
++	arm_instr_eors_pc_reg__lt,
++	arm_instr_eors_pc_reg__gt,
++	arm_instr_eors_pc_reg__le,
++	arm_instr_eors_pc_reg,
++	arm_instr_nop,
++	arm_instr_subs_pc_reg__eq,
++	arm_instr_subs_pc_reg__ne,
++	arm_instr_subs_pc_reg__cs,
++	arm_instr_subs_pc_reg__cc,
++	arm_instr_subs_pc_reg__mi,
++	arm_instr_subs_pc_reg__pl,
++	arm_instr_subs_pc_reg__vs,
++	arm_instr_subs_pc_reg__vc,
++	arm_instr_subs_pc_reg__hi,
++	arm_instr_subs_pc_reg__ls,
++	arm_instr_subs_pc_reg__ge,
++	arm_instr_subs_pc_reg__lt,
++	arm_instr_subs_pc_reg__gt,
++	arm_instr_subs_pc_reg__le,
++	arm_instr_subs_pc_reg,
++	arm_instr_nop,
++	arm_instr_rsbs_pc_reg__eq,
++	arm_instr_rsbs_pc_reg__ne,
++	arm_instr_rsbs_pc_reg__cs,
++	arm_instr_rsbs_pc_reg__cc,
++	arm_instr_rsbs_pc_reg__mi,
++	arm_instr_rsbs_pc_reg__pl,
++	arm_instr_rsbs_pc_reg__vs,
++	arm_instr_rsbs_pc_reg__vc,
++	arm_instr_rsbs_pc_reg__hi,
++	arm_instr_rsbs_pc_reg__ls,
++	arm_instr_rsbs_pc_reg__ge,
++	arm_instr_rsbs_pc_reg__lt,
++	arm_instr_rsbs_pc_reg__gt,
++	arm_instr_rsbs_pc_reg__le,
++	arm_instr_rsbs_pc_reg,
++	arm_instr_nop,
++	arm_instr_adds_pc_reg__eq,
++	arm_instr_adds_pc_reg__ne,
++	arm_instr_adds_pc_reg__cs,
++	arm_instr_adds_pc_reg__cc,
++	arm_instr_adds_pc_reg__mi,
++	arm_instr_adds_pc_reg__pl,
++	arm_instr_adds_pc_reg__vs,
++	arm_instr_adds_pc_reg__vc,
++	arm_instr_adds_pc_reg__hi,
++	arm_instr_adds_pc_reg__ls,
++	arm_instr_adds_pc_reg__ge,
++	arm_instr_adds_pc_reg__lt,
++	arm_instr_adds_pc_reg__gt,
++	arm_instr_adds_pc_reg__le,
++	arm_instr_adds_pc_reg,
++	arm_instr_nop,
++	arm_instr_adcs_pc_reg__eq,
++	arm_instr_adcs_pc_reg__ne,
++	arm_instr_adcs_pc_reg__cs,
++	arm_instr_adcs_pc_reg__cc,
++	arm_instr_adcs_pc_reg__mi,
++	arm_instr_adcs_pc_reg__pl,
++	arm_instr_adcs_pc_reg__vs,
++	arm_instr_adcs_pc_reg__vc,
++	arm_instr_adcs_pc_reg__hi,
++	arm_instr_adcs_pc_reg__ls,
++	arm_instr_adcs_pc_reg__ge,
++	arm_instr_adcs_pc_reg__lt,
++	arm_instr_adcs_pc_reg__gt,
++	arm_instr_adcs_pc_reg__le,
++	arm_instr_adcs_pc_reg,
++	arm_instr_nop,
++	arm_instr_sbcs_pc_reg__eq,
++	arm_instr_sbcs_pc_reg__ne,
++	arm_instr_sbcs_pc_reg__cs,
++	arm_instr_sbcs_pc_reg__cc,
++	arm_instr_sbcs_pc_reg__mi,
++	arm_instr_sbcs_pc_reg__pl,
++	arm_instr_sbcs_pc_reg__vs,
++	arm_instr_sbcs_pc_reg__vc,
++	arm_instr_sbcs_pc_reg__hi,
++	arm_instr_sbcs_pc_reg__ls,
++	arm_instr_sbcs_pc_reg__ge,
++	arm_instr_sbcs_pc_reg__lt,
++	arm_instr_sbcs_pc_reg__gt,
++	arm_instr_sbcs_pc_reg__le,
++	arm_instr_sbcs_pc_reg,
++	arm_instr_nop,
++	arm_instr_rscs_pc_reg__eq,
++	arm_instr_rscs_pc_reg__ne,
++	arm_instr_rscs_pc_reg__cs,
++	arm_instr_rscs_pc_reg__cc,
++	arm_instr_rscs_pc_reg__mi,
++	arm_instr_rscs_pc_reg__pl,
++	arm_instr_rscs_pc_reg__vs,
++	arm_instr_rscs_pc_reg__vc,
++	arm_instr_rscs_pc_reg__hi,
++	arm_instr_rscs_pc_reg__ls,
++	arm_instr_rscs_pc_reg__ge,
++	arm_instr_rscs_pc_reg__lt,
++	arm_instr_rscs_pc_reg__gt,
++	arm_instr_rscs_pc_reg__le,
++	arm_instr_rscs_pc_reg,
++	arm_instr_nop,
++	arm_instr_tsts_pc_reg__eq,
++	arm_instr_tsts_pc_reg__ne,
++	arm_instr_tsts_pc_reg__cs,
++	arm_instr_tsts_pc_reg__cc,
++	arm_instr_tsts_pc_reg__mi,
++	arm_instr_tsts_pc_reg__pl,
++	arm_instr_tsts_pc_reg__vs,
++	arm_instr_tsts_pc_reg__vc,
++	arm_instr_tsts_pc_reg__hi,
++	arm_instr_tsts_pc_reg__ls,
++	arm_instr_tsts_pc_reg__ge,
++	arm_instr_tsts_pc_reg__lt,
++	arm_instr_tsts_pc_reg__gt,
++	arm_instr_tsts_pc_reg__le,
++	arm_instr_tsts_pc_reg,
++	arm_instr_nop,
++	arm_instr_teqs_pc_reg__eq,
++	arm_instr_teqs_pc_reg__ne,
++	arm_instr_teqs_pc_reg__cs,
++	arm_instr_teqs_pc_reg__cc,
++	arm_instr_teqs_pc_reg__mi,
++	arm_instr_teqs_pc_reg__pl,
++	arm_instr_teqs_pc_reg__vs,
++	arm_instr_teqs_pc_reg__vc,
++	arm_instr_teqs_pc_reg__hi,
++	arm_instr_teqs_pc_reg__ls,
++	arm_instr_teqs_pc_reg__ge,
++	arm_instr_teqs_pc_reg__lt,
++	arm_instr_teqs_pc_reg__gt,
++	arm_instr_teqs_pc_reg__le,
++	arm_instr_teqs_pc_reg,
++	arm_instr_nop,
++	arm_instr_cmps_pc_reg__eq,
++	arm_instr_cmps_pc_reg__ne,
++	arm_instr_cmps_pc_reg__cs,
++	arm_instr_cmps_pc_reg__cc,
++	arm_instr_cmps_pc_reg__mi,
++	arm_instr_cmps_pc_reg__pl,
++	arm_instr_cmps_pc_reg__vs,
++	arm_instr_cmps_pc_reg__vc,
++	arm_instr_cmps_pc_reg__hi,
++	arm_instr_cmps_pc_reg__ls,
++	arm_instr_cmps_pc_reg__ge,
++	arm_instr_cmps_pc_reg__lt,
++	arm_instr_cmps_pc_reg__gt,
++	arm_instr_cmps_pc_reg__le,
++	arm_instr_cmps_pc_reg,
++	arm_instr_nop,
++	arm_instr_cmns_pc_reg__eq,
++	arm_instr_cmns_pc_reg__ne,
++	arm_instr_cmns_pc_reg__cs,
++	arm_instr_cmns_pc_reg__cc,
++	arm_instr_cmns_pc_reg__mi,
++	arm_instr_cmns_pc_reg__pl,
++	arm_instr_cmns_pc_reg__vs,
++	arm_instr_cmns_pc_reg__vc,
++	arm_instr_cmns_pc_reg__hi,
++	arm_instr_cmns_pc_reg__ls,
++	arm_instr_cmns_pc_reg__ge,
++	arm_instr_cmns_pc_reg__lt,
++	arm_instr_cmns_pc_reg__gt,
++	arm_instr_cmns_pc_reg__le,
++	arm_instr_cmns_pc_reg,
++	arm_instr_nop,
++	arm_instr_orrs_pc_reg__eq,
++	arm_instr_orrs_pc_reg__ne,
++	arm_instr_orrs_pc_reg__cs,
++	arm_instr_orrs_pc_reg__cc,
++	arm_instr_orrs_pc_reg__mi,
++	arm_instr_orrs_pc_reg__pl,
++	arm_instr_orrs_pc_reg__vs,
++	arm_instr_orrs_pc_reg__vc,
++	arm_instr_orrs_pc_reg__hi,
++	arm_instr_orrs_pc_reg__ls,
++	arm_instr_orrs_pc_reg__ge,
++	arm_instr_orrs_pc_reg__lt,
++	arm_instr_orrs_pc_reg__gt,
++	arm_instr_orrs_pc_reg__le,
++	arm_instr_orrs_pc_reg,
++	arm_instr_nop,
++	arm_instr_movs_pc_reg__eq,
++	arm_instr_movs_pc_reg__ne,
++	arm_instr_movs_pc_reg__cs,
++	arm_instr_movs_pc_reg__cc,
++	arm_instr_movs_pc_reg__mi,
++	arm_instr_movs_pc_reg__pl,
++	arm_instr_movs_pc_reg__vs,
++	arm_instr_movs_pc_reg__vc,
++	arm_instr_movs_pc_reg__hi,
++	arm_instr_movs_pc_reg__ls,
++	arm_instr_movs_pc_reg__ge,
++	arm_instr_movs_pc_reg__lt,
++	arm_instr_movs_pc_reg__gt,
++	arm_instr_movs_pc_reg__le,
++	arm_instr_movs_pc_reg,
++	arm_instr_nop,
++	arm_instr_bics_pc_reg__eq,
++	arm_instr_bics_pc_reg__ne,
++	arm_instr_bics_pc_reg__cs,
++	arm_instr_bics_pc_reg__cc,
++	arm_instr_bics_pc_reg__mi,
++	arm_instr_bics_pc_reg__pl,
++	arm_instr_bics_pc_reg__vs,
++	arm_instr_bics_pc_reg__vc,
++	arm_instr_bics_pc_reg__hi,
++	arm_instr_bics_pc_reg__ls,
++	arm_instr_bics_pc_reg__ge,
++	arm_instr_bics_pc_reg__lt,
++	arm_instr_bics_pc_reg__gt,
++	arm_instr_bics_pc_reg__le,
++	arm_instr_bics_pc_reg,
++	arm_instr_nop,
++	arm_instr_mvns_pc_reg__eq,
++	arm_instr_mvns_pc_reg__ne,
++	arm_instr_mvns_pc_reg__cs,
++	arm_instr_mvns_pc_reg__cc,
++	arm_instr_mvns_pc_reg__mi,
++	arm_instr_mvns_pc_reg__pl,
++	arm_instr_mvns_pc_reg__vs,
++	arm_instr_mvns_pc_reg__vc,
++	arm_instr_mvns_pc_reg__hi,
++	arm_instr_mvns_pc_reg__ls,
++	arm_instr_mvns_pc_reg__ge,
++	arm_instr_mvns_pc_reg__lt,
++	arm_instr_mvns_pc_reg__gt,
++	arm_instr_mvns_pc_reg__le,
++	arm_instr_mvns_pc_reg,
++	arm_instr_nop
++};
++
++
++	void (*arm_dpi_instr_regshort[2 * 16 * 16])(struct cpu *,
++		struct arm_instr_call *) = {
++	arm_instr_and_regshort__eq,
++	arm_instr_and_regshort__ne,
++	arm_instr_and_regshort__cs,
++	arm_instr_and_regshort__cc,
++	arm_instr_and_regshort__mi,
++	arm_instr_and_regshort__pl,
++	arm_instr_and_regshort__vs,
++	arm_instr_and_regshort__vc,
++	arm_instr_and_regshort__hi,
++	arm_instr_and_regshort__ls,
++	arm_instr_and_regshort__ge,
++	arm_instr_and_regshort__lt,
++	arm_instr_and_regshort__gt,
++	arm_instr_and_regshort__le,
++	arm_instr_and_regshort,
++	arm_instr_nop,
++	arm_instr_eor_regshort__eq,
++	arm_instr_eor_regshort__ne,
++	arm_instr_eor_regshort__cs,
++	arm_instr_eor_regshort__cc,
++	arm_instr_eor_regshort__mi,
++	arm_instr_eor_regshort__pl,
++	arm_instr_eor_regshort__vs,
++	arm_instr_eor_regshort__vc,
++	arm_instr_eor_regshort__hi,
++	arm_instr_eor_regshort__ls,
++	arm_instr_eor_regshort__ge,
++	arm_instr_eor_regshort__lt,
++	arm_instr_eor_regshort__gt,
++	arm_instr_eor_regshort__le,
++	arm_instr_eor_regshort,
++	arm_instr_nop,
++	arm_instr_sub_regshort__eq,
++	arm_instr_sub_regshort__ne,
++	arm_instr_sub_regshort__cs,
++	arm_instr_sub_regshort__cc,
++	arm_instr_sub_regshort__mi,
++	arm_instr_sub_regshort__pl,
++	arm_instr_sub_regshort__vs,
++	arm_instr_sub_regshort__vc,
++	arm_instr_sub_regshort__hi,
++	arm_instr_sub_regshort__ls,
++	arm_instr_sub_regshort__ge,
++	arm_instr_sub_regshort__lt,
++	arm_instr_sub_regshort__gt,
++	arm_instr_sub_regshort__le,
++	arm_instr_sub_regshort,
++	arm_instr_nop,
++	arm_instr_rsb_regshort__eq,
++	arm_instr_rsb_regshort__ne,
++	arm_instr_rsb_regshort__cs,
++	arm_instr_rsb_regshort__cc,
++	arm_instr_rsb_regshort__mi,
++	arm_instr_rsb_regshort__pl,
++	arm_instr_rsb_regshort__vs,
++	arm_instr_rsb_regshort__vc,
++	arm_instr_rsb_regshort__hi,
++	arm_instr_rsb_regshort__ls,
++	arm_instr_rsb_regshort__ge,
++	arm_instr_rsb_regshort__lt,
++	arm_instr_rsb_regshort__gt,
++	arm_instr_rsb_regshort__le,
++	arm_instr_rsb_regshort,
++	arm_instr_nop,
++	arm_instr_add_regshort__eq,
++	arm_instr_add_regshort__ne,
++	arm_instr_add_regshort__cs,
++	arm_instr_add_regshort__cc,
++	arm_instr_add_regshort__mi,
++	arm_instr_add_regshort__pl,
++	arm_instr_add_regshort__vs,
++	arm_instr_add_regshort__vc,
++	arm_instr_add_regshort__hi,
++	arm_instr_add_regshort__ls,
++	arm_instr_add_regshort__ge,
++	arm_instr_add_regshort__lt,
++	arm_instr_add_regshort__gt,
++	arm_instr_add_regshort__le,
++	arm_instr_add_regshort,
++	arm_instr_nop,
++	arm_instr_adc_regshort__eq,
++	arm_instr_adc_regshort__ne,
++	arm_instr_adc_regshort__cs,
++	arm_instr_adc_regshort__cc,
++	arm_instr_adc_regshort__mi,
++	arm_instr_adc_regshort__pl,
++	arm_instr_adc_regshort__vs,
++	arm_instr_adc_regshort__vc,
++	arm_instr_adc_regshort__hi,
++	arm_instr_adc_regshort__ls,
++	arm_instr_adc_regshort__ge,
++	arm_instr_adc_regshort__lt,
++	arm_instr_adc_regshort__gt,
++	arm_instr_adc_regshort__le,
++	arm_instr_adc_regshort,
++	arm_instr_nop,
++	arm_instr_sbc_regshort__eq,
++	arm_instr_sbc_regshort__ne,
++	arm_instr_sbc_regshort__cs,
++	arm_instr_sbc_regshort__cc,
++	arm_instr_sbc_regshort__mi,
++	arm_instr_sbc_regshort__pl,
++	arm_instr_sbc_regshort__vs,
++	arm_instr_sbc_regshort__vc,
++	arm_instr_sbc_regshort__hi,
++	arm_instr_sbc_regshort__ls,
++	arm_instr_sbc_regshort__ge,
++	arm_instr_sbc_regshort__lt,
++	arm_instr_sbc_regshort__gt,
++	arm_instr_sbc_regshort__le,
++	arm_instr_sbc_regshort,
++	arm_instr_nop,
++	arm_instr_rsc_regshort__eq,
++	arm_instr_rsc_regshort__ne,
++	arm_instr_rsc_regshort__cs,
++	arm_instr_rsc_regshort__cc,
++	arm_instr_rsc_regshort__mi,
++	arm_instr_rsc_regshort__pl,
++	arm_instr_rsc_regshort__vs,
++	arm_instr_rsc_regshort__vc,
++	arm_instr_rsc_regshort__hi,
++	arm_instr_rsc_regshort__ls,
++	arm_instr_rsc_regshort__ge,
++	arm_instr_rsc_regshort__lt,
++	arm_instr_rsc_regshort__gt,
++	arm_instr_rsc_regshort__le,
++	arm_instr_rsc_regshort,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_orr_regshort__eq,
++	arm_instr_orr_regshort__ne,
++	arm_instr_orr_regshort__cs,
++	arm_instr_orr_regshort__cc,
++	arm_instr_orr_regshort__mi,
++	arm_instr_orr_regshort__pl,
++	arm_instr_orr_regshort__vs,
++	arm_instr_orr_regshort__vc,
++	arm_instr_orr_regshort__hi,
++	arm_instr_orr_regshort__ls,
++	arm_instr_orr_regshort__ge,
++	arm_instr_orr_regshort__lt,
++	arm_instr_orr_regshort__gt,
++	arm_instr_orr_regshort__le,
++	arm_instr_orr_regshort,
++	arm_instr_nop,
++	arm_instr_mov_regshort__eq,
++	arm_instr_mov_regshort__ne,
++	arm_instr_mov_regshort__cs,
++	arm_instr_mov_regshort__cc,
++	arm_instr_mov_regshort__mi,
++	arm_instr_mov_regshort__pl,
++	arm_instr_mov_regshort__vs,
++	arm_instr_mov_regshort__vc,
++	arm_instr_mov_regshort__hi,
++	arm_instr_mov_regshort__ls,
++	arm_instr_mov_regshort__ge,
++	arm_instr_mov_regshort__lt,
++	arm_instr_mov_regshort__gt,
++	arm_instr_mov_regshort__le,
++	arm_instr_mov_regshort,
++	arm_instr_nop,
++	arm_instr_bic_regshort__eq,
++	arm_instr_bic_regshort__ne,
++	arm_instr_bic_regshort__cs,
++	arm_instr_bic_regshort__cc,
++	arm_instr_bic_regshort__mi,
++	arm_instr_bic_regshort__pl,
++	arm_instr_bic_regshort__vs,
++	arm_instr_bic_regshort__vc,
++	arm_instr_bic_regshort__hi,
++	arm_instr_bic_regshort__ls,
++	arm_instr_bic_regshort__ge,
++	arm_instr_bic_regshort__lt,
++	arm_instr_bic_regshort__gt,
++	arm_instr_bic_regshort__le,
++	arm_instr_bic_regshort,
++	arm_instr_nop,
++	arm_instr_mvn_regshort__eq,
++	arm_instr_mvn_regshort__ne,
++	arm_instr_mvn_regshort__cs,
++	arm_instr_mvn_regshort__cc,
++	arm_instr_mvn_regshort__mi,
++	arm_instr_mvn_regshort__pl,
++	arm_instr_mvn_regshort__vs,
++	arm_instr_mvn_regshort__vc,
++	arm_instr_mvn_regshort__hi,
++	arm_instr_mvn_regshort__ls,
++	arm_instr_mvn_regshort__ge,
++	arm_instr_mvn_regshort__lt,
++	arm_instr_mvn_regshort__gt,
++	arm_instr_mvn_regshort__le,
++	arm_instr_mvn_regshort,
++	arm_instr_nop,
++	arm_instr_ands_regshort__eq,
++	arm_instr_ands_regshort__ne,
++	arm_instr_ands_regshort__cs,
++	arm_instr_ands_regshort__cc,
++	arm_instr_ands_regshort__mi,
++	arm_instr_ands_regshort__pl,
++	arm_instr_ands_regshort__vs,
++	arm_instr_ands_regshort__vc,
++	arm_instr_ands_regshort__hi,
++	arm_instr_ands_regshort__ls,
++	arm_instr_ands_regshort__ge,
++	arm_instr_ands_regshort__lt,
++	arm_instr_ands_regshort__gt,
++	arm_instr_ands_regshort__le,
++	arm_instr_ands_regshort,
++	arm_instr_nop,
++	arm_instr_eors_regshort__eq,
++	arm_instr_eors_regshort__ne,
++	arm_instr_eors_regshort__cs,
++	arm_instr_eors_regshort__cc,
++	arm_instr_eors_regshort__mi,
++	arm_instr_eors_regshort__pl,
++	arm_instr_eors_regshort__vs,
++	arm_instr_eors_regshort__vc,
++	arm_instr_eors_regshort__hi,
++	arm_instr_eors_regshort__ls,
++	arm_instr_eors_regshort__ge,
++	arm_instr_eors_regshort__lt,
++	arm_instr_eors_regshort__gt,
++	arm_instr_eors_regshort__le,
++	arm_instr_eors_regshort,
++	arm_instr_nop,
++	arm_instr_subs_regshort__eq,
++	arm_instr_subs_regshort__ne,
++	arm_instr_subs_regshort__cs,
++	arm_instr_subs_regshort__cc,
++	arm_instr_subs_regshort__mi,
++	arm_instr_subs_regshort__pl,
++	arm_instr_subs_regshort__vs,
++	arm_instr_subs_regshort__vc,
++	arm_instr_subs_regshort__hi,
++	arm_instr_subs_regshort__ls,
++	arm_instr_subs_regshort__ge,
++	arm_instr_subs_regshort__lt,
++	arm_instr_subs_regshort__gt,
++	arm_instr_subs_regshort__le,
++	arm_instr_subs_regshort,
++	arm_instr_nop,
++	arm_instr_rsbs_regshort__eq,
++	arm_instr_rsbs_regshort__ne,
++	arm_instr_rsbs_regshort__cs,
++	arm_instr_rsbs_regshort__cc,
++	arm_instr_rsbs_regshort__mi,
++	arm_instr_rsbs_regshort__pl,
++	arm_instr_rsbs_regshort__vs,
++	arm_instr_rsbs_regshort__vc,
++	arm_instr_rsbs_regshort__hi,
++	arm_instr_rsbs_regshort__ls,
++	arm_instr_rsbs_regshort__ge,
++	arm_instr_rsbs_regshort__lt,
++	arm_instr_rsbs_regshort__gt,
++	arm_instr_rsbs_regshort__le,
++	arm_instr_rsbs_regshort,
++	arm_instr_nop,
++	arm_instr_adds_regshort__eq,
++	arm_instr_adds_regshort__ne,
++	arm_instr_adds_regshort__cs,
++	arm_instr_adds_regshort__cc,
++	arm_instr_adds_regshort__mi,
++	arm_instr_adds_regshort__pl,
++	arm_instr_adds_regshort__vs,
++	arm_instr_adds_regshort__vc,
++	arm_instr_adds_regshort__hi,
++	arm_instr_adds_regshort__ls,
++	arm_instr_adds_regshort__ge,
++	arm_instr_adds_regshort__lt,
++	arm_instr_adds_regshort__gt,
++	arm_instr_adds_regshort__le,
++	arm_instr_adds_regshort,
++	arm_instr_nop,
++	arm_instr_adcs_regshort__eq,
++	arm_instr_adcs_regshort__ne,
++	arm_instr_adcs_regshort__cs,
++	arm_instr_adcs_regshort__cc,
++	arm_instr_adcs_regshort__mi,
++	arm_instr_adcs_regshort__pl,
++	arm_instr_adcs_regshort__vs,
++	arm_instr_adcs_regshort__vc,
++	arm_instr_adcs_regshort__hi,
++	arm_instr_adcs_regshort__ls,
++	arm_instr_adcs_regshort__ge,
++	arm_instr_adcs_regshort__lt,
++	arm_instr_adcs_regshort__gt,
++	arm_instr_adcs_regshort__le,
++	arm_instr_adcs_regshort,
++	arm_instr_nop,
++	arm_instr_sbcs_regshort__eq,
++	arm_instr_sbcs_regshort__ne,
++	arm_instr_sbcs_regshort__cs,
++	arm_instr_sbcs_regshort__cc,
++	arm_instr_sbcs_regshort__mi,
++	arm_instr_sbcs_regshort__pl,
++	arm_instr_sbcs_regshort__vs,
++	arm_instr_sbcs_regshort__vc,
++	arm_instr_sbcs_regshort__hi,
++	arm_instr_sbcs_regshort__ls,
++	arm_instr_sbcs_regshort__ge,
++	arm_instr_sbcs_regshort__lt,
++	arm_instr_sbcs_regshort__gt,
++	arm_instr_sbcs_regshort__le,
++	arm_instr_sbcs_regshort,
++	arm_instr_nop,
++	arm_instr_rscs_regshort__eq,
++	arm_instr_rscs_regshort__ne,
++	arm_instr_rscs_regshort__cs,
++	arm_instr_rscs_regshort__cc,
++	arm_instr_rscs_regshort__mi,
++	arm_instr_rscs_regshort__pl,
++	arm_instr_rscs_regshort__vs,
++	arm_instr_rscs_regshort__vc,
++	arm_instr_rscs_regshort__hi,
++	arm_instr_rscs_regshort__ls,
++	arm_instr_rscs_regshort__ge,
++	arm_instr_rscs_regshort__lt,
++	arm_instr_rscs_regshort__gt,
++	arm_instr_rscs_regshort__le,
++	arm_instr_rscs_regshort,
++	arm_instr_nop,
++	arm_instr_tsts_regshort__eq,
++	arm_instr_tsts_regshort__ne,
++	arm_instr_tsts_regshort__cs,
++	arm_instr_tsts_regshort__cc,
++	arm_instr_tsts_regshort__mi,
++	arm_instr_tsts_regshort__pl,
++	arm_instr_tsts_regshort__vs,
++	arm_instr_tsts_regshort__vc,
++	arm_instr_tsts_regshort__hi,
++	arm_instr_tsts_regshort__ls,
++	arm_instr_tsts_regshort__ge,
++	arm_instr_tsts_regshort__lt,
++	arm_instr_tsts_regshort__gt,
++	arm_instr_tsts_regshort__le,
++	arm_instr_tsts_regshort,
++	arm_instr_nop,
++	arm_instr_teqs_regshort__eq,
++	arm_instr_teqs_regshort__ne,
++	arm_instr_teqs_regshort__cs,
++	arm_instr_teqs_regshort__cc,
++	arm_instr_teqs_regshort__mi,
++	arm_instr_teqs_regshort__pl,
++	arm_instr_teqs_regshort__vs,
++	arm_instr_teqs_regshort__vc,
++	arm_instr_teqs_regshort__hi,
++	arm_instr_teqs_regshort__ls,
++	arm_instr_teqs_regshort__ge,
++	arm_instr_teqs_regshort__lt,
++	arm_instr_teqs_regshort__gt,
++	arm_instr_teqs_regshort__le,
++	arm_instr_teqs_regshort,
++	arm_instr_nop,
++	arm_instr_cmps_regshort__eq,
++	arm_instr_cmps_regshort__ne,
++	arm_instr_cmps_regshort__cs,
++	arm_instr_cmps_regshort__cc,
++	arm_instr_cmps_regshort__mi,
++	arm_instr_cmps_regshort__pl,
++	arm_instr_cmps_regshort__vs,
++	arm_instr_cmps_regshort__vc,
++	arm_instr_cmps_regshort__hi,
++	arm_instr_cmps_regshort__ls,
++	arm_instr_cmps_regshort__ge,
++	arm_instr_cmps_regshort__lt,
++	arm_instr_cmps_regshort__gt,
++	arm_instr_cmps_regshort__le,
++	arm_instr_cmps_regshort,
++	arm_instr_nop,
++	arm_instr_cmns_regshort__eq,
++	arm_instr_cmns_regshort__ne,
++	arm_instr_cmns_regshort__cs,
++	arm_instr_cmns_regshort__cc,
++	arm_instr_cmns_regshort__mi,
++	arm_instr_cmns_regshort__pl,
++	arm_instr_cmns_regshort__vs,
++	arm_instr_cmns_regshort__vc,
++	arm_instr_cmns_regshort__hi,
++	arm_instr_cmns_regshort__ls,
++	arm_instr_cmns_regshort__ge,
++	arm_instr_cmns_regshort__lt,
++	arm_instr_cmns_regshort__gt,
++	arm_instr_cmns_regshort__le,
++	arm_instr_cmns_regshort,
++	arm_instr_nop,
++	arm_instr_orrs_regshort__eq,
++	arm_instr_orrs_regshort__ne,
++	arm_instr_orrs_regshort__cs,
++	arm_instr_orrs_regshort__cc,
++	arm_instr_orrs_regshort__mi,
++	arm_instr_orrs_regshort__pl,
++	arm_instr_orrs_regshort__vs,
++	arm_instr_orrs_regshort__vc,
++	arm_instr_orrs_regshort__hi,
++	arm_instr_orrs_regshort__ls,
++	arm_instr_orrs_regshort__ge,
++	arm_instr_orrs_regshort__lt,
++	arm_instr_orrs_regshort__gt,
++	arm_instr_orrs_regshort__le,
++	arm_instr_orrs_regshort,
++	arm_instr_nop,
++	arm_instr_movs_regshort__eq,
++	arm_instr_movs_regshort__ne,
++	arm_instr_movs_regshort__cs,
++	arm_instr_movs_regshort__cc,
++	arm_instr_movs_regshort__mi,
++	arm_instr_movs_regshort__pl,
++	arm_instr_movs_regshort__vs,
++	arm_instr_movs_regshort__vc,
++	arm_instr_movs_regshort__hi,
++	arm_instr_movs_regshort__ls,
++	arm_instr_movs_regshort__ge,
++	arm_instr_movs_regshort__lt,
++	arm_instr_movs_regshort__gt,
++	arm_instr_movs_regshort__le,
++	arm_instr_movs_regshort,
++	arm_instr_nop,
++	arm_instr_bics_regshort__eq,
++	arm_instr_bics_regshort__ne,
++	arm_instr_bics_regshort__cs,
++	arm_instr_bics_regshort__cc,
++	arm_instr_bics_regshort__mi,
++	arm_instr_bics_regshort__pl,
++	arm_instr_bics_regshort__vs,
++	arm_instr_bics_regshort__vc,
++	arm_instr_bics_regshort__hi,
++	arm_instr_bics_regshort__ls,
++	arm_instr_bics_regshort__ge,
++	arm_instr_bics_regshort__lt,
++	arm_instr_bics_regshort__gt,
++	arm_instr_bics_regshort__le,
++	arm_instr_bics_regshort,
++	arm_instr_nop,
++	arm_instr_mvns_regshort__eq,
++	arm_instr_mvns_regshort__ne,
++	arm_instr_mvns_regshort__cs,
++	arm_instr_mvns_regshort__cc,
++	arm_instr_mvns_regshort__mi,
++	arm_instr_mvns_regshort__pl,
++	arm_instr_mvns_regshort__vs,
++	arm_instr_mvns_regshort__vc,
++	arm_instr_mvns_regshort__hi,
++	arm_instr_mvns_regshort__ls,
++	arm_instr_mvns_regshort__ge,
++	arm_instr_mvns_regshort__lt,
++	arm_instr_mvns_regshort__gt,
++	arm_instr_mvns_regshort__le,
++	arm_instr_mvns_regshort,
++	arm_instr_nop
++};
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_head.c gxemul-0.7.0/src/cpus/tmp_arm_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_head.c	2022-10-18 16:37:22.077739400 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES ARM_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH arm
++#define DYNTRANS_ARM
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N ARM_L2N
++#define DYNTRANS_L3N ARM_L3N
++#if !defined(ARM_L2N) || !defined(ARM_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE arm_l2_64_table
++#define DYNTRANS_L3_64_TABLE arm_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC arm_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE ARM_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT ARM_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE arm_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY arm_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR ARM_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY ARM_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE arm_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE arm_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC arm_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS arm_combine_instructions
++#define DISASSEMBLE arm_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_arm_instr.c */
++#define instr(n) arm_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) arm32_instr_ ## n
++
++#endif
++
++
++#define X(n) void arm_instr_ ## n(struct cpu *cpu, \
++ struct arm_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.arm.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct arm_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore.c	2022-10-18 16:37:22.078740600 +0000
+@@ -0,0 +1,10020 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++void arm_instr_store_w0_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++
++	void (*arm_load_store_instr[1024])(struct cpu *,
++		struct arm_instr_call *) = {
++	arm_instr_store_w0_word_u0_p0_imm__eq,
++	arm_instr_store_w0_word_u0_p0_imm__ne,
++	arm_instr_store_w0_word_u0_p0_imm__cs,
++	arm_instr_store_w0_word_u0_p0_imm__cc,
++	arm_instr_store_w0_word_u0_p0_imm__mi,
++	arm_instr_store_w0_word_u0_p0_imm__pl,
++	arm_instr_store_w0_word_u0_p0_imm__vs,
++	arm_instr_store_w0_word_u0_p0_imm__vc,
++	arm_instr_store_w0_word_u0_p0_imm__hi,
++	arm_instr_store_w0_word_u0_p0_imm__ls,
++	arm_instr_store_w0_word_u0_p0_imm__ge,
++	arm_instr_store_w0_word_u0_p0_imm__lt,
++	arm_instr_store_w0_word_u0_p0_imm__gt,
++	arm_instr_store_w0_word_u0_p0_imm__le,
++	arm_instr_store_w0_word_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p0_imm__eq,
++	arm_instr_load_w0_word_u0_p0_imm__ne,
++	arm_instr_load_w0_word_u0_p0_imm__cs,
++	arm_instr_load_w0_word_u0_p0_imm__cc,
++	arm_instr_load_w0_word_u0_p0_imm__mi,
++	arm_instr_load_w0_word_u0_p0_imm__pl,
++	arm_instr_load_w0_word_u0_p0_imm__vs,
++	arm_instr_load_w0_word_u0_p0_imm__vc,
++	arm_instr_load_w0_word_u0_p0_imm__hi,
++	arm_instr_load_w0_word_u0_p0_imm__ls,
++	arm_instr_load_w0_word_u0_p0_imm__ge,
++	arm_instr_load_w0_word_u0_p0_imm__lt,
++	arm_instr_load_w0_word_u0_p0_imm__gt,
++	arm_instr_load_w0_word_u0_p0_imm__le,
++	arm_instr_load_w0_word_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p0_imm__eq,
++	arm_instr_store_w1_word_u0_p0_imm__ne,
++	arm_instr_store_w1_word_u0_p0_imm__cs,
++	arm_instr_store_w1_word_u0_p0_imm__cc,
++	arm_instr_store_w1_word_u0_p0_imm__mi,
++	arm_instr_store_w1_word_u0_p0_imm__pl,
++	arm_instr_store_w1_word_u0_p0_imm__vs,
++	arm_instr_store_w1_word_u0_p0_imm__vc,
++	arm_instr_store_w1_word_u0_p0_imm__hi,
++	arm_instr_store_w1_word_u0_p0_imm__ls,
++	arm_instr_store_w1_word_u0_p0_imm__ge,
++	arm_instr_store_w1_word_u0_p0_imm__lt,
++	arm_instr_store_w1_word_u0_p0_imm__gt,
++	arm_instr_store_w1_word_u0_p0_imm__le,
++	arm_instr_store_w1_word_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p0_imm__eq,
++	arm_instr_load_w1_word_u0_p0_imm__ne,
++	arm_instr_load_w1_word_u0_p0_imm__cs,
++	arm_instr_load_w1_word_u0_p0_imm__cc,
++	arm_instr_load_w1_word_u0_p0_imm__mi,
++	arm_instr_load_w1_word_u0_p0_imm__pl,
++	arm_instr_load_w1_word_u0_p0_imm__vs,
++	arm_instr_load_w1_word_u0_p0_imm__vc,
++	arm_instr_load_w1_word_u0_p0_imm__hi,
++	arm_instr_load_w1_word_u0_p0_imm__ls,
++	arm_instr_load_w1_word_u0_p0_imm__ge,
++	arm_instr_load_w1_word_u0_p0_imm__lt,
++	arm_instr_load_w1_word_u0_p0_imm__gt,
++	arm_instr_load_w1_word_u0_p0_imm__le,
++	arm_instr_load_w1_word_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p0_imm__eq,
++	arm_instr_store_w0_byte_u0_p0_imm__ne,
++	arm_instr_store_w0_byte_u0_p0_imm__cs,
++	arm_instr_store_w0_byte_u0_p0_imm__cc,
++	arm_instr_store_w0_byte_u0_p0_imm__mi,
++	arm_instr_store_w0_byte_u0_p0_imm__pl,
++	arm_instr_store_w0_byte_u0_p0_imm__vs,
++	arm_instr_store_w0_byte_u0_p0_imm__vc,
++	arm_instr_store_w0_byte_u0_p0_imm__hi,
++	arm_instr_store_w0_byte_u0_p0_imm__ls,
++	arm_instr_store_w0_byte_u0_p0_imm__ge,
++	arm_instr_store_w0_byte_u0_p0_imm__lt,
++	arm_instr_store_w0_byte_u0_p0_imm__gt,
++	arm_instr_store_w0_byte_u0_p0_imm__le,
++	arm_instr_store_w0_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p0_imm__eq,
++	arm_instr_load_w0_byte_u0_p0_imm__ne,
++	arm_instr_load_w0_byte_u0_p0_imm__cs,
++	arm_instr_load_w0_byte_u0_p0_imm__cc,
++	arm_instr_load_w0_byte_u0_p0_imm__mi,
++	arm_instr_load_w0_byte_u0_p0_imm__pl,
++	arm_instr_load_w0_byte_u0_p0_imm__vs,
++	arm_instr_load_w0_byte_u0_p0_imm__vc,
++	arm_instr_load_w0_byte_u0_p0_imm__hi,
++	arm_instr_load_w0_byte_u0_p0_imm__ls,
++	arm_instr_load_w0_byte_u0_p0_imm__ge,
++	arm_instr_load_w0_byte_u0_p0_imm__lt,
++	arm_instr_load_w0_byte_u0_p0_imm__gt,
++	arm_instr_load_w0_byte_u0_p0_imm__le,
++	arm_instr_load_w0_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p0_imm__eq,
++	arm_instr_store_w1_byte_u0_p0_imm__ne,
++	arm_instr_store_w1_byte_u0_p0_imm__cs,
++	arm_instr_store_w1_byte_u0_p0_imm__cc,
++	arm_instr_store_w1_byte_u0_p0_imm__mi,
++	arm_instr_store_w1_byte_u0_p0_imm__pl,
++	arm_instr_store_w1_byte_u0_p0_imm__vs,
++	arm_instr_store_w1_byte_u0_p0_imm__vc,
++	arm_instr_store_w1_byte_u0_p0_imm__hi,
++	arm_instr_store_w1_byte_u0_p0_imm__ls,
++	arm_instr_store_w1_byte_u0_p0_imm__ge,
++	arm_instr_store_w1_byte_u0_p0_imm__lt,
++	arm_instr_store_w1_byte_u0_p0_imm__gt,
++	arm_instr_store_w1_byte_u0_p0_imm__le,
++	arm_instr_store_w1_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p0_imm__eq,
++	arm_instr_load_w1_byte_u0_p0_imm__ne,
++	arm_instr_load_w1_byte_u0_p0_imm__cs,
++	arm_instr_load_w1_byte_u0_p0_imm__cc,
++	arm_instr_load_w1_byte_u0_p0_imm__mi,
++	arm_instr_load_w1_byte_u0_p0_imm__pl,
++	arm_instr_load_w1_byte_u0_p0_imm__vs,
++	arm_instr_load_w1_byte_u0_p0_imm__vc,
++	arm_instr_load_w1_byte_u0_p0_imm__hi,
++	arm_instr_load_w1_byte_u0_p0_imm__ls,
++	arm_instr_load_w1_byte_u0_p0_imm__ge,
++	arm_instr_load_w1_byte_u0_p0_imm__lt,
++	arm_instr_load_w1_byte_u0_p0_imm__gt,
++	arm_instr_load_w1_byte_u0_p0_imm__le,
++	arm_instr_load_w1_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p0_imm__eq,
++	arm_instr_store_w0_word_u1_p0_imm__ne,
++	arm_instr_store_w0_word_u1_p0_imm__cs,
++	arm_instr_store_w0_word_u1_p0_imm__cc,
++	arm_instr_store_w0_word_u1_p0_imm__mi,
++	arm_instr_store_w0_word_u1_p0_imm__pl,
++	arm_instr_store_w0_word_u1_p0_imm__vs,
++	arm_instr_store_w0_word_u1_p0_imm__vc,
++	arm_instr_store_w0_word_u1_p0_imm__hi,
++	arm_instr_store_w0_word_u1_p0_imm__ls,
++	arm_instr_store_w0_word_u1_p0_imm__ge,
++	arm_instr_store_w0_word_u1_p0_imm__lt,
++	arm_instr_store_w0_word_u1_p0_imm__gt,
++	arm_instr_store_w0_word_u1_p0_imm__le,
++	arm_instr_store_w0_word_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p0_imm__eq,
++	arm_instr_load_w0_word_u1_p0_imm__ne,
++	arm_instr_load_w0_word_u1_p0_imm__cs,
++	arm_instr_load_w0_word_u1_p0_imm__cc,
++	arm_instr_load_w0_word_u1_p0_imm__mi,
++	arm_instr_load_w0_word_u1_p0_imm__pl,
++	arm_instr_load_w0_word_u1_p0_imm__vs,
++	arm_instr_load_w0_word_u1_p0_imm__vc,
++	arm_instr_load_w0_word_u1_p0_imm__hi,
++	arm_instr_load_w0_word_u1_p0_imm__ls,
++	arm_instr_load_w0_word_u1_p0_imm__ge,
++	arm_instr_load_w0_word_u1_p0_imm__lt,
++	arm_instr_load_w0_word_u1_p0_imm__gt,
++	arm_instr_load_w0_word_u1_p0_imm__le,
++	arm_instr_load_w0_word_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p0_imm__eq,
++	arm_instr_store_w1_word_u1_p0_imm__ne,
++	arm_instr_store_w1_word_u1_p0_imm__cs,
++	arm_instr_store_w1_word_u1_p0_imm__cc,
++	arm_instr_store_w1_word_u1_p0_imm__mi,
++	arm_instr_store_w1_word_u1_p0_imm__pl,
++	arm_instr_store_w1_word_u1_p0_imm__vs,
++	arm_instr_store_w1_word_u1_p0_imm__vc,
++	arm_instr_store_w1_word_u1_p0_imm__hi,
++	arm_instr_store_w1_word_u1_p0_imm__ls,
++	arm_instr_store_w1_word_u1_p0_imm__ge,
++	arm_instr_store_w1_word_u1_p0_imm__lt,
++	arm_instr_store_w1_word_u1_p0_imm__gt,
++	arm_instr_store_w1_word_u1_p0_imm__le,
++	arm_instr_store_w1_word_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p0_imm__eq,
++	arm_instr_load_w1_word_u1_p0_imm__ne,
++	arm_instr_load_w1_word_u1_p0_imm__cs,
++	arm_instr_load_w1_word_u1_p0_imm__cc,
++	arm_instr_load_w1_word_u1_p0_imm__mi,
++	arm_instr_load_w1_word_u1_p0_imm__pl,
++	arm_instr_load_w1_word_u1_p0_imm__vs,
++	arm_instr_load_w1_word_u1_p0_imm__vc,
++	arm_instr_load_w1_word_u1_p0_imm__hi,
++	arm_instr_load_w1_word_u1_p0_imm__ls,
++	arm_instr_load_w1_word_u1_p0_imm__ge,
++	arm_instr_load_w1_word_u1_p0_imm__lt,
++	arm_instr_load_w1_word_u1_p0_imm__gt,
++	arm_instr_load_w1_word_u1_p0_imm__le,
++	arm_instr_load_w1_word_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p0_imm__eq,
++	arm_instr_store_w0_byte_u1_p0_imm__ne,
++	arm_instr_store_w0_byte_u1_p0_imm__cs,
++	arm_instr_store_w0_byte_u1_p0_imm__cc,
++	arm_instr_store_w0_byte_u1_p0_imm__mi,
++	arm_instr_store_w0_byte_u1_p0_imm__pl,
++	arm_instr_store_w0_byte_u1_p0_imm__vs,
++	arm_instr_store_w0_byte_u1_p0_imm__vc,
++	arm_instr_store_w0_byte_u1_p0_imm__hi,
++	arm_instr_store_w0_byte_u1_p0_imm__ls,
++	arm_instr_store_w0_byte_u1_p0_imm__ge,
++	arm_instr_store_w0_byte_u1_p0_imm__lt,
++	arm_instr_store_w0_byte_u1_p0_imm__gt,
++	arm_instr_store_w0_byte_u1_p0_imm__le,
++	arm_instr_store_w0_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p0_imm__eq,
++	arm_instr_load_w0_byte_u1_p0_imm__ne,
++	arm_instr_load_w0_byte_u1_p0_imm__cs,
++	arm_instr_load_w0_byte_u1_p0_imm__cc,
++	arm_instr_load_w0_byte_u1_p0_imm__mi,
++	arm_instr_load_w0_byte_u1_p0_imm__pl,
++	arm_instr_load_w0_byte_u1_p0_imm__vs,
++	arm_instr_load_w0_byte_u1_p0_imm__vc,
++	arm_instr_load_w0_byte_u1_p0_imm__hi,
++	arm_instr_load_w0_byte_u1_p0_imm__ls,
++	arm_instr_load_w0_byte_u1_p0_imm__ge,
++	arm_instr_load_w0_byte_u1_p0_imm__lt,
++	arm_instr_load_w0_byte_u1_p0_imm__gt,
++	arm_instr_load_w0_byte_u1_p0_imm__le,
++	arm_instr_load_w0_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p0_imm__eq,
++	arm_instr_store_w1_byte_u1_p0_imm__ne,
++	arm_instr_store_w1_byte_u1_p0_imm__cs,
++	arm_instr_store_w1_byte_u1_p0_imm__cc,
++	arm_instr_store_w1_byte_u1_p0_imm__mi,
++	arm_instr_store_w1_byte_u1_p0_imm__pl,
++	arm_instr_store_w1_byte_u1_p0_imm__vs,
++	arm_instr_store_w1_byte_u1_p0_imm__vc,
++	arm_instr_store_w1_byte_u1_p0_imm__hi,
++	arm_instr_store_w1_byte_u1_p0_imm__ls,
++	arm_instr_store_w1_byte_u1_p0_imm__ge,
++	arm_instr_store_w1_byte_u1_p0_imm__lt,
++	arm_instr_store_w1_byte_u1_p0_imm__gt,
++	arm_instr_store_w1_byte_u1_p0_imm__le,
++	arm_instr_store_w1_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p0_imm__eq,
++	arm_instr_load_w1_byte_u1_p0_imm__ne,
++	arm_instr_load_w1_byte_u1_p0_imm__cs,
++	arm_instr_load_w1_byte_u1_p0_imm__cc,
++	arm_instr_load_w1_byte_u1_p0_imm__mi,
++	arm_instr_load_w1_byte_u1_p0_imm__pl,
++	arm_instr_load_w1_byte_u1_p0_imm__vs,
++	arm_instr_load_w1_byte_u1_p0_imm__vc,
++	arm_instr_load_w1_byte_u1_p0_imm__hi,
++	arm_instr_load_w1_byte_u1_p0_imm__ls,
++	arm_instr_load_w1_byte_u1_p0_imm__ge,
++	arm_instr_load_w1_byte_u1_p0_imm__lt,
++	arm_instr_load_w1_byte_u1_p0_imm__gt,
++	arm_instr_load_w1_byte_u1_p0_imm__le,
++	arm_instr_load_w1_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u0_p1_imm__eq,
++	arm_instr_store_w0_word_u0_p1_imm__ne,
++	arm_instr_store_w0_word_u0_p1_imm__cs,
++	arm_instr_store_w0_word_u0_p1_imm__cc,
++	arm_instr_store_w0_word_u0_p1_imm__mi,
++	arm_instr_store_w0_word_u0_p1_imm__pl,
++	arm_instr_store_w0_word_u0_p1_imm__vs,
++	arm_instr_store_w0_word_u0_p1_imm__vc,
++	arm_instr_store_w0_word_u0_p1_imm__hi,
++	arm_instr_store_w0_word_u0_p1_imm__ls,
++	arm_instr_store_w0_word_u0_p1_imm__ge,
++	arm_instr_store_w0_word_u0_p1_imm__lt,
++	arm_instr_store_w0_word_u0_p1_imm__gt,
++	arm_instr_store_w0_word_u0_p1_imm__le,
++	arm_instr_store_w0_word_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p1_imm__eq,
++	arm_instr_load_w0_word_u0_p1_imm__ne,
++	arm_instr_load_w0_word_u0_p1_imm__cs,
++	arm_instr_load_w0_word_u0_p1_imm__cc,
++	arm_instr_load_w0_word_u0_p1_imm__mi,
++	arm_instr_load_w0_word_u0_p1_imm__pl,
++	arm_instr_load_w0_word_u0_p1_imm__vs,
++	arm_instr_load_w0_word_u0_p1_imm__vc,
++	arm_instr_load_w0_word_u0_p1_imm__hi,
++	arm_instr_load_w0_word_u0_p1_imm__ls,
++	arm_instr_load_w0_word_u0_p1_imm__ge,
++	arm_instr_load_w0_word_u0_p1_imm__lt,
++	arm_instr_load_w0_word_u0_p1_imm__gt,
++	arm_instr_load_w0_word_u0_p1_imm__le,
++	arm_instr_load_w0_word_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p1_imm__eq,
++	arm_instr_store_w1_word_u0_p1_imm__ne,
++	arm_instr_store_w1_word_u0_p1_imm__cs,
++	arm_instr_store_w1_word_u0_p1_imm__cc,
++	arm_instr_store_w1_word_u0_p1_imm__mi,
++	arm_instr_store_w1_word_u0_p1_imm__pl,
++	arm_instr_store_w1_word_u0_p1_imm__vs,
++	arm_instr_store_w1_word_u0_p1_imm__vc,
++	arm_instr_store_w1_word_u0_p1_imm__hi,
++	arm_instr_store_w1_word_u0_p1_imm__ls,
++	arm_instr_store_w1_word_u0_p1_imm__ge,
++	arm_instr_store_w1_word_u0_p1_imm__lt,
++	arm_instr_store_w1_word_u0_p1_imm__gt,
++	arm_instr_store_w1_word_u0_p1_imm__le,
++	arm_instr_store_w1_word_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p1_imm__eq,
++	arm_instr_load_w1_word_u0_p1_imm__ne,
++	arm_instr_load_w1_word_u0_p1_imm__cs,
++	arm_instr_load_w1_word_u0_p1_imm__cc,
++	arm_instr_load_w1_word_u0_p1_imm__mi,
++	arm_instr_load_w1_word_u0_p1_imm__pl,
++	arm_instr_load_w1_word_u0_p1_imm__vs,
++	arm_instr_load_w1_word_u0_p1_imm__vc,
++	arm_instr_load_w1_word_u0_p1_imm__hi,
++	arm_instr_load_w1_word_u0_p1_imm__ls,
++	arm_instr_load_w1_word_u0_p1_imm__ge,
++	arm_instr_load_w1_word_u0_p1_imm__lt,
++	arm_instr_load_w1_word_u0_p1_imm__gt,
++	arm_instr_load_w1_word_u0_p1_imm__le,
++	arm_instr_load_w1_word_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p1_imm__eq,
++	arm_instr_store_w0_byte_u0_p1_imm__ne,
++	arm_instr_store_w0_byte_u0_p1_imm__cs,
++	arm_instr_store_w0_byte_u0_p1_imm__cc,
++	arm_instr_store_w0_byte_u0_p1_imm__mi,
++	arm_instr_store_w0_byte_u0_p1_imm__pl,
++	arm_instr_store_w0_byte_u0_p1_imm__vs,
++	arm_instr_store_w0_byte_u0_p1_imm__vc,
++	arm_instr_store_w0_byte_u0_p1_imm__hi,
++	arm_instr_store_w0_byte_u0_p1_imm__ls,
++	arm_instr_store_w0_byte_u0_p1_imm__ge,
++	arm_instr_store_w0_byte_u0_p1_imm__lt,
++	arm_instr_store_w0_byte_u0_p1_imm__gt,
++	arm_instr_store_w0_byte_u0_p1_imm__le,
++	arm_instr_store_w0_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p1_imm__eq,
++	arm_instr_load_w0_byte_u0_p1_imm__ne,
++	arm_instr_load_w0_byte_u0_p1_imm__cs,
++	arm_instr_load_w0_byte_u0_p1_imm__cc,
++	arm_instr_load_w0_byte_u0_p1_imm__mi,
++	arm_instr_load_w0_byte_u0_p1_imm__pl,
++	arm_instr_load_w0_byte_u0_p1_imm__vs,
++	arm_instr_load_w0_byte_u0_p1_imm__vc,
++	arm_instr_load_w0_byte_u0_p1_imm__hi,
++	arm_instr_load_w0_byte_u0_p1_imm__ls,
++	arm_instr_load_w0_byte_u0_p1_imm__ge,
++	arm_instr_load_w0_byte_u0_p1_imm__lt,
++	arm_instr_load_w0_byte_u0_p1_imm__gt,
++	arm_instr_load_w0_byte_u0_p1_imm__le,
++	arm_instr_load_w0_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p1_imm__eq,
++	arm_instr_store_w1_byte_u0_p1_imm__ne,
++	arm_instr_store_w1_byte_u0_p1_imm__cs,
++	arm_instr_store_w1_byte_u0_p1_imm__cc,
++	arm_instr_store_w1_byte_u0_p1_imm__mi,
++	arm_instr_store_w1_byte_u0_p1_imm__pl,
++	arm_instr_store_w1_byte_u0_p1_imm__vs,
++	arm_instr_store_w1_byte_u0_p1_imm__vc,
++	arm_instr_store_w1_byte_u0_p1_imm__hi,
++	arm_instr_store_w1_byte_u0_p1_imm__ls,
++	arm_instr_store_w1_byte_u0_p1_imm__ge,
++	arm_instr_store_w1_byte_u0_p1_imm__lt,
++	arm_instr_store_w1_byte_u0_p1_imm__gt,
++	arm_instr_store_w1_byte_u0_p1_imm__le,
++	arm_instr_store_w1_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p1_imm__eq,
++	arm_instr_load_w1_byte_u0_p1_imm__ne,
++	arm_instr_load_w1_byte_u0_p1_imm__cs,
++	arm_instr_load_w1_byte_u0_p1_imm__cc,
++	arm_instr_load_w1_byte_u0_p1_imm__mi,
++	arm_instr_load_w1_byte_u0_p1_imm__pl,
++	arm_instr_load_w1_byte_u0_p1_imm__vs,
++	arm_instr_load_w1_byte_u0_p1_imm__vc,
++	arm_instr_load_w1_byte_u0_p1_imm__hi,
++	arm_instr_load_w1_byte_u0_p1_imm__ls,
++	arm_instr_load_w1_byte_u0_p1_imm__ge,
++	arm_instr_load_w1_byte_u0_p1_imm__lt,
++	arm_instr_load_w1_byte_u0_p1_imm__gt,
++	arm_instr_load_w1_byte_u0_p1_imm__le,
++	arm_instr_load_w1_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p1_imm__eq,
++	arm_instr_store_w0_word_u1_p1_imm__ne,
++	arm_instr_store_w0_word_u1_p1_imm__cs,
++	arm_instr_store_w0_word_u1_p1_imm__cc,
++	arm_instr_store_w0_word_u1_p1_imm__mi,
++	arm_instr_store_w0_word_u1_p1_imm__pl,
++	arm_instr_store_w0_word_u1_p1_imm__vs,
++	arm_instr_store_w0_word_u1_p1_imm__vc,
++	arm_instr_store_w0_word_u1_p1_imm__hi,
++	arm_instr_store_w0_word_u1_p1_imm__ls,
++	arm_instr_store_w0_word_u1_p1_imm__ge,
++	arm_instr_store_w0_word_u1_p1_imm__lt,
++	arm_instr_store_w0_word_u1_p1_imm__gt,
++	arm_instr_store_w0_word_u1_p1_imm__le,
++	arm_instr_store_w0_word_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p1_imm__eq,
++	arm_instr_load_w0_word_u1_p1_imm__ne,
++	arm_instr_load_w0_word_u1_p1_imm__cs,
++	arm_instr_load_w0_word_u1_p1_imm__cc,
++	arm_instr_load_w0_word_u1_p1_imm__mi,
++	arm_instr_load_w0_word_u1_p1_imm__pl,
++	arm_instr_load_w0_word_u1_p1_imm__vs,
++	arm_instr_load_w0_word_u1_p1_imm__vc,
++	arm_instr_load_w0_word_u1_p1_imm__hi,
++	arm_instr_load_w0_word_u1_p1_imm__ls,
++	arm_instr_load_w0_word_u1_p1_imm__ge,
++	arm_instr_load_w0_word_u1_p1_imm__lt,
++	arm_instr_load_w0_word_u1_p1_imm__gt,
++	arm_instr_load_w0_word_u1_p1_imm__le,
++	arm_instr_load_w0_word_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p1_imm__eq,
++	arm_instr_store_w1_word_u1_p1_imm__ne,
++	arm_instr_store_w1_word_u1_p1_imm__cs,
++	arm_instr_store_w1_word_u1_p1_imm__cc,
++	arm_instr_store_w1_word_u1_p1_imm__mi,
++	arm_instr_store_w1_word_u1_p1_imm__pl,
++	arm_instr_store_w1_word_u1_p1_imm__vs,
++	arm_instr_store_w1_word_u1_p1_imm__vc,
++	arm_instr_store_w1_word_u1_p1_imm__hi,
++	arm_instr_store_w1_word_u1_p1_imm__ls,
++	arm_instr_store_w1_word_u1_p1_imm__ge,
++	arm_instr_store_w1_word_u1_p1_imm__lt,
++	arm_instr_store_w1_word_u1_p1_imm__gt,
++	arm_instr_store_w1_word_u1_p1_imm__le,
++	arm_instr_store_w1_word_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p1_imm__eq,
++	arm_instr_load_w1_word_u1_p1_imm__ne,
++	arm_instr_load_w1_word_u1_p1_imm__cs,
++	arm_instr_load_w1_word_u1_p1_imm__cc,
++	arm_instr_load_w1_word_u1_p1_imm__mi,
++	arm_instr_load_w1_word_u1_p1_imm__pl,
++	arm_instr_load_w1_word_u1_p1_imm__vs,
++	arm_instr_load_w1_word_u1_p1_imm__vc,
++	arm_instr_load_w1_word_u1_p1_imm__hi,
++	arm_instr_load_w1_word_u1_p1_imm__ls,
++	arm_instr_load_w1_word_u1_p1_imm__ge,
++	arm_instr_load_w1_word_u1_p1_imm__lt,
++	arm_instr_load_w1_word_u1_p1_imm__gt,
++	arm_instr_load_w1_word_u1_p1_imm__le,
++	arm_instr_load_w1_word_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p1_imm__eq,
++	arm_instr_store_w0_byte_u1_p1_imm__ne,
++	arm_instr_store_w0_byte_u1_p1_imm__cs,
++	arm_instr_store_w0_byte_u1_p1_imm__cc,
++	arm_instr_store_w0_byte_u1_p1_imm__mi,
++	arm_instr_store_w0_byte_u1_p1_imm__pl,
++	arm_instr_store_w0_byte_u1_p1_imm__vs,
++	arm_instr_store_w0_byte_u1_p1_imm__vc,
++	arm_instr_store_w0_byte_u1_p1_imm__hi,
++	arm_instr_store_w0_byte_u1_p1_imm__ls,
++	arm_instr_store_w0_byte_u1_p1_imm__ge,
++	arm_instr_store_w0_byte_u1_p1_imm__lt,
++	arm_instr_store_w0_byte_u1_p1_imm__gt,
++	arm_instr_store_w0_byte_u1_p1_imm__le,
++	arm_instr_store_w0_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p1_imm__eq,
++	arm_instr_load_w0_byte_u1_p1_imm__ne,
++	arm_instr_load_w0_byte_u1_p1_imm__cs,
++	arm_instr_load_w0_byte_u1_p1_imm__cc,
++	arm_instr_load_w0_byte_u1_p1_imm__mi,
++	arm_instr_load_w0_byte_u1_p1_imm__pl,
++	arm_instr_load_w0_byte_u1_p1_imm__vs,
++	arm_instr_load_w0_byte_u1_p1_imm__vc,
++	arm_instr_load_w0_byte_u1_p1_imm__hi,
++	arm_instr_load_w0_byte_u1_p1_imm__ls,
++	arm_instr_load_w0_byte_u1_p1_imm__ge,
++	arm_instr_load_w0_byte_u1_p1_imm__lt,
++	arm_instr_load_w0_byte_u1_p1_imm__gt,
++	arm_instr_load_w0_byte_u1_p1_imm__le,
++	arm_instr_load_w0_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p1_imm__eq,
++	arm_instr_store_w1_byte_u1_p1_imm__ne,
++	arm_instr_store_w1_byte_u1_p1_imm__cs,
++	arm_instr_store_w1_byte_u1_p1_imm__cc,
++	arm_instr_store_w1_byte_u1_p1_imm__mi,
++	arm_instr_store_w1_byte_u1_p1_imm__pl,
++	arm_instr_store_w1_byte_u1_p1_imm__vs,
++	arm_instr_store_w1_byte_u1_p1_imm__vc,
++	arm_instr_store_w1_byte_u1_p1_imm__hi,
++	arm_instr_store_w1_byte_u1_p1_imm__ls,
++	arm_instr_store_w1_byte_u1_p1_imm__ge,
++	arm_instr_store_w1_byte_u1_p1_imm__lt,
++	arm_instr_store_w1_byte_u1_p1_imm__gt,
++	arm_instr_store_w1_byte_u1_p1_imm__le,
++	arm_instr_store_w1_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p1_imm__eq,
++	arm_instr_load_w1_byte_u1_p1_imm__ne,
++	arm_instr_load_w1_byte_u1_p1_imm__cs,
++	arm_instr_load_w1_byte_u1_p1_imm__cc,
++	arm_instr_load_w1_byte_u1_p1_imm__mi,
++	arm_instr_load_w1_byte_u1_p1_imm__pl,
++	arm_instr_load_w1_byte_u1_p1_imm__vs,
++	arm_instr_load_w1_byte_u1_p1_imm__vc,
++	arm_instr_load_w1_byte_u1_p1_imm__hi,
++	arm_instr_load_w1_byte_u1_p1_imm__ls,
++	arm_instr_load_w1_byte_u1_p1_imm__ge,
++	arm_instr_load_w1_byte_u1_p1_imm__lt,
++	arm_instr_load_w1_byte_u1_p1_imm__gt,
++	arm_instr_load_w1_byte_u1_p1_imm__le,
++	arm_instr_load_w1_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u0_p0_reg__eq,
++	arm_instr_store_w0_word_u0_p0_reg__ne,
++	arm_instr_store_w0_word_u0_p0_reg__cs,
++	arm_instr_store_w0_word_u0_p0_reg__cc,
++	arm_instr_store_w0_word_u0_p0_reg__mi,
++	arm_instr_store_w0_word_u0_p0_reg__pl,
++	arm_instr_store_w0_word_u0_p0_reg__vs,
++	arm_instr_store_w0_word_u0_p0_reg__vc,
++	arm_instr_store_w0_word_u0_p0_reg__hi,
++	arm_instr_store_w0_word_u0_p0_reg__ls,
++	arm_instr_store_w0_word_u0_p0_reg__ge,
++	arm_instr_store_w0_word_u0_p0_reg__lt,
++	arm_instr_store_w0_word_u0_p0_reg__gt,
++	arm_instr_store_w0_word_u0_p0_reg__le,
++	arm_instr_store_w0_word_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p0_reg__eq,
++	arm_instr_load_w0_word_u0_p0_reg__ne,
++	arm_instr_load_w0_word_u0_p0_reg__cs,
++	arm_instr_load_w0_word_u0_p0_reg__cc,
++	arm_instr_load_w0_word_u0_p0_reg__mi,
++	arm_instr_load_w0_word_u0_p0_reg__pl,
++	arm_instr_load_w0_word_u0_p0_reg__vs,
++	arm_instr_load_w0_word_u0_p0_reg__vc,
++	arm_instr_load_w0_word_u0_p0_reg__hi,
++	arm_instr_load_w0_word_u0_p0_reg__ls,
++	arm_instr_load_w0_word_u0_p0_reg__ge,
++	arm_instr_load_w0_word_u0_p0_reg__lt,
++	arm_instr_load_w0_word_u0_p0_reg__gt,
++	arm_instr_load_w0_word_u0_p0_reg__le,
++	arm_instr_load_w0_word_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p0_reg__eq,
++	arm_instr_store_w1_word_u0_p0_reg__ne,
++	arm_instr_store_w1_word_u0_p0_reg__cs,
++	arm_instr_store_w1_word_u0_p0_reg__cc,
++	arm_instr_store_w1_word_u0_p0_reg__mi,
++	arm_instr_store_w1_word_u0_p0_reg__pl,
++	arm_instr_store_w1_word_u0_p0_reg__vs,
++	arm_instr_store_w1_word_u0_p0_reg__vc,
++	arm_instr_store_w1_word_u0_p0_reg__hi,
++	arm_instr_store_w1_word_u0_p0_reg__ls,
++	arm_instr_store_w1_word_u0_p0_reg__ge,
++	arm_instr_store_w1_word_u0_p0_reg__lt,
++	arm_instr_store_w1_word_u0_p0_reg__gt,
++	arm_instr_store_w1_word_u0_p0_reg__le,
++	arm_instr_store_w1_word_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p0_reg__eq,
++	arm_instr_load_w1_word_u0_p0_reg__ne,
++	arm_instr_load_w1_word_u0_p0_reg__cs,
++	arm_instr_load_w1_word_u0_p0_reg__cc,
++	arm_instr_load_w1_word_u0_p0_reg__mi,
++	arm_instr_load_w1_word_u0_p0_reg__pl,
++	arm_instr_load_w1_word_u0_p0_reg__vs,
++	arm_instr_load_w1_word_u0_p0_reg__vc,
++	arm_instr_load_w1_word_u0_p0_reg__hi,
++	arm_instr_load_w1_word_u0_p0_reg__ls,
++	arm_instr_load_w1_word_u0_p0_reg__ge,
++	arm_instr_load_w1_word_u0_p0_reg__lt,
++	arm_instr_load_w1_word_u0_p0_reg__gt,
++	arm_instr_load_w1_word_u0_p0_reg__le,
++	arm_instr_load_w1_word_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p0_reg__eq,
++	arm_instr_store_w0_byte_u0_p0_reg__ne,
++	arm_instr_store_w0_byte_u0_p0_reg__cs,
++	arm_instr_store_w0_byte_u0_p0_reg__cc,
++	arm_instr_store_w0_byte_u0_p0_reg__mi,
++	arm_instr_store_w0_byte_u0_p0_reg__pl,
++	arm_instr_store_w0_byte_u0_p0_reg__vs,
++	arm_instr_store_w0_byte_u0_p0_reg__vc,
++	arm_instr_store_w0_byte_u0_p0_reg__hi,
++	arm_instr_store_w0_byte_u0_p0_reg__ls,
++	arm_instr_store_w0_byte_u0_p0_reg__ge,
++	arm_instr_store_w0_byte_u0_p0_reg__lt,
++	arm_instr_store_w0_byte_u0_p0_reg__gt,
++	arm_instr_store_w0_byte_u0_p0_reg__le,
++	arm_instr_store_w0_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p0_reg__eq,
++	arm_instr_load_w0_byte_u0_p0_reg__ne,
++	arm_instr_load_w0_byte_u0_p0_reg__cs,
++	arm_instr_load_w0_byte_u0_p0_reg__cc,
++	arm_instr_load_w0_byte_u0_p0_reg__mi,
++	arm_instr_load_w0_byte_u0_p0_reg__pl,
++	arm_instr_load_w0_byte_u0_p0_reg__vs,
++	arm_instr_load_w0_byte_u0_p0_reg__vc,
++	arm_instr_load_w0_byte_u0_p0_reg__hi,
++	arm_instr_load_w0_byte_u0_p0_reg__ls,
++	arm_instr_load_w0_byte_u0_p0_reg__ge,
++	arm_instr_load_w0_byte_u0_p0_reg__lt,
++	arm_instr_load_w0_byte_u0_p0_reg__gt,
++	arm_instr_load_w0_byte_u0_p0_reg__le,
++	arm_instr_load_w0_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p0_reg__eq,
++	arm_instr_store_w1_byte_u0_p0_reg__ne,
++	arm_instr_store_w1_byte_u0_p0_reg__cs,
++	arm_instr_store_w1_byte_u0_p0_reg__cc,
++	arm_instr_store_w1_byte_u0_p0_reg__mi,
++	arm_instr_store_w1_byte_u0_p0_reg__pl,
++	arm_instr_store_w1_byte_u0_p0_reg__vs,
++	arm_instr_store_w1_byte_u0_p0_reg__vc,
++	arm_instr_store_w1_byte_u0_p0_reg__hi,
++	arm_instr_store_w1_byte_u0_p0_reg__ls,
++	arm_instr_store_w1_byte_u0_p0_reg__ge,
++	arm_instr_store_w1_byte_u0_p0_reg__lt,
++	arm_instr_store_w1_byte_u0_p0_reg__gt,
++	arm_instr_store_w1_byte_u0_p0_reg__le,
++	arm_instr_store_w1_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p0_reg__eq,
++	arm_instr_load_w1_byte_u0_p0_reg__ne,
++	arm_instr_load_w1_byte_u0_p0_reg__cs,
++	arm_instr_load_w1_byte_u0_p0_reg__cc,
++	arm_instr_load_w1_byte_u0_p0_reg__mi,
++	arm_instr_load_w1_byte_u0_p0_reg__pl,
++	arm_instr_load_w1_byte_u0_p0_reg__vs,
++	arm_instr_load_w1_byte_u0_p0_reg__vc,
++	arm_instr_load_w1_byte_u0_p0_reg__hi,
++	arm_instr_load_w1_byte_u0_p0_reg__ls,
++	arm_instr_load_w1_byte_u0_p0_reg__ge,
++	arm_instr_load_w1_byte_u0_p0_reg__lt,
++	arm_instr_load_w1_byte_u0_p0_reg__gt,
++	arm_instr_load_w1_byte_u0_p0_reg__le,
++	arm_instr_load_w1_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p0_reg__eq,
++	arm_instr_store_w0_word_u1_p0_reg__ne,
++	arm_instr_store_w0_word_u1_p0_reg__cs,
++	arm_instr_store_w0_word_u1_p0_reg__cc,
++	arm_instr_store_w0_word_u1_p0_reg__mi,
++	arm_instr_store_w0_word_u1_p0_reg__pl,
++	arm_instr_store_w0_word_u1_p0_reg__vs,
++	arm_instr_store_w0_word_u1_p0_reg__vc,
++	arm_instr_store_w0_word_u1_p0_reg__hi,
++	arm_instr_store_w0_word_u1_p0_reg__ls,
++	arm_instr_store_w0_word_u1_p0_reg__ge,
++	arm_instr_store_w0_word_u1_p0_reg__lt,
++	arm_instr_store_w0_word_u1_p0_reg__gt,
++	arm_instr_store_w0_word_u1_p0_reg__le,
++	arm_instr_store_w0_word_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p0_reg__eq,
++	arm_instr_load_w0_word_u1_p0_reg__ne,
++	arm_instr_load_w0_word_u1_p0_reg__cs,
++	arm_instr_load_w0_word_u1_p0_reg__cc,
++	arm_instr_load_w0_word_u1_p0_reg__mi,
++	arm_instr_load_w0_word_u1_p0_reg__pl,
++	arm_instr_load_w0_word_u1_p0_reg__vs,
++	arm_instr_load_w0_word_u1_p0_reg__vc,
++	arm_instr_load_w0_word_u1_p0_reg__hi,
++	arm_instr_load_w0_word_u1_p0_reg__ls,
++	arm_instr_load_w0_word_u1_p0_reg__ge,
++	arm_instr_load_w0_word_u1_p0_reg__lt,
++	arm_instr_load_w0_word_u1_p0_reg__gt,
++	arm_instr_load_w0_word_u1_p0_reg__le,
++	arm_instr_load_w0_word_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p0_reg__eq,
++	arm_instr_store_w1_word_u1_p0_reg__ne,
++	arm_instr_store_w1_word_u1_p0_reg__cs,
++	arm_instr_store_w1_word_u1_p0_reg__cc,
++	arm_instr_store_w1_word_u1_p0_reg__mi,
++	arm_instr_store_w1_word_u1_p0_reg__pl,
++	arm_instr_store_w1_word_u1_p0_reg__vs,
++	arm_instr_store_w1_word_u1_p0_reg__vc,
++	arm_instr_store_w1_word_u1_p0_reg__hi,
++	arm_instr_store_w1_word_u1_p0_reg__ls,
++	arm_instr_store_w1_word_u1_p0_reg__ge,
++	arm_instr_store_w1_word_u1_p0_reg__lt,
++	arm_instr_store_w1_word_u1_p0_reg__gt,
++	arm_instr_store_w1_word_u1_p0_reg__le,
++	arm_instr_store_w1_word_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p0_reg__eq,
++	arm_instr_load_w1_word_u1_p0_reg__ne,
++	arm_instr_load_w1_word_u1_p0_reg__cs,
++	arm_instr_load_w1_word_u1_p0_reg__cc,
++	arm_instr_load_w1_word_u1_p0_reg__mi,
++	arm_instr_load_w1_word_u1_p0_reg__pl,
++	arm_instr_load_w1_word_u1_p0_reg__vs,
++	arm_instr_load_w1_word_u1_p0_reg__vc,
++	arm_instr_load_w1_word_u1_p0_reg__hi,
++	arm_instr_load_w1_word_u1_p0_reg__ls,
++	arm_instr_load_w1_word_u1_p0_reg__ge,
++	arm_instr_load_w1_word_u1_p0_reg__lt,
++	arm_instr_load_w1_word_u1_p0_reg__gt,
++	arm_instr_load_w1_word_u1_p0_reg__le,
++	arm_instr_load_w1_word_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p0_reg__eq,
++	arm_instr_store_w0_byte_u1_p0_reg__ne,
++	arm_instr_store_w0_byte_u1_p0_reg__cs,
++	arm_instr_store_w0_byte_u1_p0_reg__cc,
++	arm_instr_store_w0_byte_u1_p0_reg__mi,
++	arm_instr_store_w0_byte_u1_p0_reg__pl,
++	arm_instr_store_w0_byte_u1_p0_reg__vs,
++	arm_instr_store_w0_byte_u1_p0_reg__vc,
++	arm_instr_store_w0_byte_u1_p0_reg__hi,
++	arm_instr_store_w0_byte_u1_p0_reg__ls,
++	arm_instr_store_w0_byte_u1_p0_reg__ge,
++	arm_instr_store_w0_byte_u1_p0_reg__lt,
++	arm_instr_store_w0_byte_u1_p0_reg__gt,
++	arm_instr_store_w0_byte_u1_p0_reg__le,
++	arm_instr_store_w0_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p0_reg__eq,
++	arm_instr_load_w0_byte_u1_p0_reg__ne,
++	arm_instr_load_w0_byte_u1_p0_reg__cs,
++	arm_instr_load_w0_byte_u1_p0_reg__cc,
++	arm_instr_load_w0_byte_u1_p0_reg__mi,
++	arm_instr_load_w0_byte_u1_p0_reg__pl,
++	arm_instr_load_w0_byte_u1_p0_reg__vs,
++	arm_instr_load_w0_byte_u1_p0_reg__vc,
++	arm_instr_load_w0_byte_u1_p0_reg__hi,
++	arm_instr_load_w0_byte_u1_p0_reg__ls,
++	arm_instr_load_w0_byte_u1_p0_reg__ge,
++	arm_instr_load_w0_byte_u1_p0_reg__lt,
++	arm_instr_load_w0_byte_u1_p0_reg__gt,
++	arm_instr_load_w0_byte_u1_p0_reg__le,
++	arm_instr_load_w0_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p0_reg__eq,
++	arm_instr_store_w1_byte_u1_p0_reg__ne,
++	arm_instr_store_w1_byte_u1_p0_reg__cs,
++	arm_instr_store_w1_byte_u1_p0_reg__cc,
++	arm_instr_store_w1_byte_u1_p0_reg__mi,
++	arm_instr_store_w1_byte_u1_p0_reg__pl,
++	arm_instr_store_w1_byte_u1_p0_reg__vs,
++	arm_instr_store_w1_byte_u1_p0_reg__vc,
++	arm_instr_store_w1_byte_u1_p0_reg__hi,
++	arm_instr_store_w1_byte_u1_p0_reg__ls,
++	arm_instr_store_w1_byte_u1_p0_reg__ge,
++	arm_instr_store_w1_byte_u1_p0_reg__lt,
++	arm_instr_store_w1_byte_u1_p0_reg__gt,
++	arm_instr_store_w1_byte_u1_p0_reg__le,
++	arm_instr_store_w1_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p0_reg__eq,
++	arm_instr_load_w1_byte_u1_p0_reg__ne,
++	arm_instr_load_w1_byte_u1_p0_reg__cs,
++	arm_instr_load_w1_byte_u1_p0_reg__cc,
++	arm_instr_load_w1_byte_u1_p0_reg__mi,
++	arm_instr_load_w1_byte_u1_p0_reg__pl,
++	arm_instr_load_w1_byte_u1_p0_reg__vs,
++	arm_instr_load_w1_byte_u1_p0_reg__vc,
++	arm_instr_load_w1_byte_u1_p0_reg__hi,
++	arm_instr_load_w1_byte_u1_p0_reg__ls,
++	arm_instr_load_w1_byte_u1_p0_reg__ge,
++	arm_instr_load_w1_byte_u1_p0_reg__lt,
++	arm_instr_load_w1_byte_u1_p0_reg__gt,
++	arm_instr_load_w1_byte_u1_p0_reg__le,
++	arm_instr_load_w1_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u0_p1_reg__eq,
++	arm_instr_store_w0_word_u0_p1_reg__ne,
++	arm_instr_store_w0_word_u0_p1_reg__cs,
++	arm_instr_store_w0_word_u0_p1_reg__cc,
++	arm_instr_store_w0_word_u0_p1_reg__mi,
++	arm_instr_store_w0_word_u0_p1_reg__pl,
++	arm_instr_store_w0_word_u0_p1_reg__vs,
++	arm_instr_store_w0_word_u0_p1_reg__vc,
++	arm_instr_store_w0_word_u0_p1_reg__hi,
++	arm_instr_store_w0_word_u0_p1_reg__ls,
++	arm_instr_store_w0_word_u0_p1_reg__ge,
++	arm_instr_store_w0_word_u0_p1_reg__lt,
++	arm_instr_store_w0_word_u0_p1_reg__gt,
++	arm_instr_store_w0_word_u0_p1_reg__le,
++	arm_instr_store_w0_word_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p1_reg__eq,
++	arm_instr_load_w0_word_u0_p1_reg__ne,
++	arm_instr_load_w0_word_u0_p1_reg__cs,
++	arm_instr_load_w0_word_u0_p1_reg__cc,
++	arm_instr_load_w0_word_u0_p1_reg__mi,
++	arm_instr_load_w0_word_u0_p1_reg__pl,
++	arm_instr_load_w0_word_u0_p1_reg__vs,
++	arm_instr_load_w0_word_u0_p1_reg__vc,
++	arm_instr_load_w0_word_u0_p1_reg__hi,
++	arm_instr_load_w0_word_u0_p1_reg__ls,
++	arm_instr_load_w0_word_u0_p1_reg__ge,
++	arm_instr_load_w0_word_u0_p1_reg__lt,
++	arm_instr_load_w0_word_u0_p1_reg__gt,
++	arm_instr_load_w0_word_u0_p1_reg__le,
++	arm_instr_load_w0_word_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p1_reg__eq,
++	arm_instr_store_w1_word_u0_p1_reg__ne,
++	arm_instr_store_w1_word_u0_p1_reg__cs,
++	arm_instr_store_w1_word_u0_p1_reg__cc,
++	arm_instr_store_w1_word_u0_p1_reg__mi,
++	arm_instr_store_w1_word_u0_p1_reg__pl,
++	arm_instr_store_w1_word_u0_p1_reg__vs,
++	arm_instr_store_w1_word_u0_p1_reg__vc,
++	arm_instr_store_w1_word_u0_p1_reg__hi,
++	arm_instr_store_w1_word_u0_p1_reg__ls,
++	arm_instr_store_w1_word_u0_p1_reg__ge,
++	arm_instr_store_w1_word_u0_p1_reg__lt,
++	arm_instr_store_w1_word_u0_p1_reg__gt,
++	arm_instr_store_w1_word_u0_p1_reg__le,
++	arm_instr_store_w1_word_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p1_reg__eq,
++	arm_instr_load_w1_word_u0_p1_reg__ne,
++	arm_instr_load_w1_word_u0_p1_reg__cs,
++	arm_instr_load_w1_word_u0_p1_reg__cc,
++	arm_instr_load_w1_word_u0_p1_reg__mi,
++	arm_instr_load_w1_word_u0_p1_reg__pl,
++	arm_instr_load_w1_word_u0_p1_reg__vs,
++	arm_instr_load_w1_word_u0_p1_reg__vc,
++	arm_instr_load_w1_word_u0_p1_reg__hi,
++	arm_instr_load_w1_word_u0_p1_reg__ls,
++	arm_instr_load_w1_word_u0_p1_reg__ge,
++	arm_instr_load_w1_word_u0_p1_reg__lt,
++	arm_instr_load_w1_word_u0_p1_reg__gt,
++	arm_instr_load_w1_word_u0_p1_reg__le,
++	arm_instr_load_w1_word_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p1_reg__eq,
++	arm_instr_store_w0_byte_u0_p1_reg__ne,
++	arm_instr_store_w0_byte_u0_p1_reg__cs,
++	arm_instr_store_w0_byte_u0_p1_reg__cc,
++	arm_instr_store_w0_byte_u0_p1_reg__mi,
++	arm_instr_store_w0_byte_u0_p1_reg__pl,
++	arm_instr_store_w0_byte_u0_p1_reg__vs,
++	arm_instr_store_w0_byte_u0_p1_reg__vc,
++	arm_instr_store_w0_byte_u0_p1_reg__hi,
++	arm_instr_store_w0_byte_u0_p1_reg__ls,
++	arm_instr_store_w0_byte_u0_p1_reg__ge,
++	arm_instr_store_w0_byte_u0_p1_reg__lt,
++	arm_instr_store_w0_byte_u0_p1_reg__gt,
++	arm_instr_store_w0_byte_u0_p1_reg__le,
++	arm_instr_store_w0_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p1_reg__eq,
++	arm_instr_load_w0_byte_u0_p1_reg__ne,
++	arm_instr_load_w0_byte_u0_p1_reg__cs,
++	arm_instr_load_w0_byte_u0_p1_reg__cc,
++	arm_instr_load_w0_byte_u0_p1_reg__mi,
++	arm_instr_load_w0_byte_u0_p1_reg__pl,
++	arm_instr_load_w0_byte_u0_p1_reg__vs,
++	arm_instr_load_w0_byte_u0_p1_reg__vc,
++	arm_instr_load_w0_byte_u0_p1_reg__hi,
++	arm_instr_load_w0_byte_u0_p1_reg__ls,
++	arm_instr_load_w0_byte_u0_p1_reg__ge,
++	arm_instr_load_w0_byte_u0_p1_reg__lt,
++	arm_instr_load_w0_byte_u0_p1_reg__gt,
++	arm_instr_load_w0_byte_u0_p1_reg__le,
++	arm_instr_load_w0_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p1_reg__eq,
++	arm_instr_store_w1_byte_u0_p1_reg__ne,
++	arm_instr_store_w1_byte_u0_p1_reg__cs,
++	arm_instr_store_w1_byte_u0_p1_reg__cc,
++	arm_instr_store_w1_byte_u0_p1_reg__mi,
++	arm_instr_store_w1_byte_u0_p1_reg__pl,
++	arm_instr_store_w1_byte_u0_p1_reg__vs,
++	arm_instr_store_w1_byte_u0_p1_reg__vc,
++	arm_instr_store_w1_byte_u0_p1_reg__hi,
++	arm_instr_store_w1_byte_u0_p1_reg__ls,
++	arm_instr_store_w1_byte_u0_p1_reg__ge,
++	arm_instr_store_w1_byte_u0_p1_reg__lt,
++	arm_instr_store_w1_byte_u0_p1_reg__gt,
++	arm_instr_store_w1_byte_u0_p1_reg__le,
++	arm_instr_store_w1_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p1_reg__eq,
++	arm_instr_load_w1_byte_u0_p1_reg__ne,
++	arm_instr_load_w1_byte_u0_p1_reg__cs,
++	arm_instr_load_w1_byte_u0_p1_reg__cc,
++	arm_instr_load_w1_byte_u0_p1_reg__mi,
++	arm_instr_load_w1_byte_u0_p1_reg__pl,
++	arm_instr_load_w1_byte_u0_p1_reg__vs,
++	arm_instr_load_w1_byte_u0_p1_reg__vc,
++	arm_instr_load_w1_byte_u0_p1_reg__hi,
++	arm_instr_load_w1_byte_u0_p1_reg__ls,
++	arm_instr_load_w1_byte_u0_p1_reg__ge,
++	arm_instr_load_w1_byte_u0_p1_reg__lt,
++	arm_instr_load_w1_byte_u0_p1_reg__gt,
++	arm_instr_load_w1_byte_u0_p1_reg__le,
++	arm_instr_load_w1_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p1_reg__eq,
++	arm_instr_store_w0_word_u1_p1_reg__ne,
++	arm_instr_store_w0_word_u1_p1_reg__cs,
++	arm_instr_store_w0_word_u1_p1_reg__cc,
++	arm_instr_store_w0_word_u1_p1_reg__mi,
++	arm_instr_store_w0_word_u1_p1_reg__pl,
++	arm_instr_store_w0_word_u1_p1_reg__vs,
++	arm_instr_store_w0_word_u1_p1_reg__vc,
++	arm_instr_store_w0_word_u1_p1_reg__hi,
++	arm_instr_store_w0_word_u1_p1_reg__ls,
++	arm_instr_store_w0_word_u1_p1_reg__ge,
++	arm_instr_store_w0_word_u1_p1_reg__lt,
++	arm_instr_store_w0_word_u1_p1_reg__gt,
++	arm_instr_store_w0_word_u1_p1_reg__le,
++	arm_instr_store_w0_word_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p1_reg__eq,
++	arm_instr_load_w0_word_u1_p1_reg__ne,
++	arm_instr_load_w0_word_u1_p1_reg__cs,
++	arm_instr_load_w0_word_u1_p1_reg__cc,
++	arm_instr_load_w0_word_u1_p1_reg__mi,
++	arm_instr_load_w0_word_u1_p1_reg__pl,
++	arm_instr_load_w0_word_u1_p1_reg__vs,
++	arm_instr_load_w0_word_u1_p1_reg__vc,
++	arm_instr_load_w0_word_u1_p1_reg__hi,
++	arm_instr_load_w0_word_u1_p1_reg__ls,
++	arm_instr_load_w0_word_u1_p1_reg__ge,
++	arm_instr_load_w0_word_u1_p1_reg__lt,
++	arm_instr_load_w0_word_u1_p1_reg__gt,
++	arm_instr_load_w0_word_u1_p1_reg__le,
++	arm_instr_load_w0_word_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p1_reg__eq,
++	arm_instr_store_w1_word_u1_p1_reg__ne,
++	arm_instr_store_w1_word_u1_p1_reg__cs,
++	arm_instr_store_w1_word_u1_p1_reg__cc,
++	arm_instr_store_w1_word_u1_p1_reg__mi,
++	arm_instr_store_w1_word_u1_p1_reg__pl,
++	arm_instr_store_w1_word_u1_p1_reg__vs,
++	arm_instr_store_w1_word_u1_p1_reg__vc,
++	arm_instr_store_w1_word_u1_p1_reg__hi,
++	arm_instr_store_w1_word_u1_p1_reg__ls,
++	arm_instr_store_w1_word_u1_p1_reg__ge,
++	arm_instr_store_w1_word_u1_p1_reg__lt,
++	arm_instr_store_w1_word_u1_p1_reg__gt,
++	arm_instr_store_w1_word_u1_p1_reg__le,
++	arm_instr_store_w1_word_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p1_reg__eq,
++	arm_instr_load_w1_word_u1_p1_reg__ne,
++	arm_instr_load_w1_word_u1_p1_reg__cs,
++	arm_instr_load_w1_word_u1_p1_reg__cc,
++	arm_instr_load_w1_word_u1_p1_reg__mi,
++	arm_instr_load_w1_word_u1_p1_reg__pl,
++	arm_instr_load_w1_word_u1_p1_reg__vs,
++	arm_instr_load_w1_word_u1_p1_reg__vc,
++	arm_instr_load_w1_word_u1_p1_reg__hi,
++	arm_instr_load_w1_word_u1_p1_reg__ls,
++	arm_instr_load_w1_word_u1_p1_reg__ge,
++	arm_instr_load_w1_word_u1_p1_reg__lt,
++	arm_instr_load_w1_word_u1_p1_reg__gt,
++	arm_instr_load_w1_word_u1_p1_reg__le,
++	arm_instr_load_w1_word_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p1_reg__eq,
++	arm_instr_store_w0_byte_u1_p1_reg__ne,
++	arm_instr_store_w0_byte_u1_p1_reg__cs,
++	arm_instr_store_w0_byte_u1_p1_reg__cc,
++	arm_instr_store_w0_byte_u1_p1_reg__mi,
++	arm_instr_store_w0_byte_u1_p1_reg__pl,
++	arm_instr_store_w0_byte_u1_p1_reg__vs,
++	arm_instr_store_w0_byte_u1_p1_reg__vc,
++	arm_instr_store_w0_byte_u1_p1_reg__hi,
++	arm_instr_store_w0_byte_u1_p1_reg__ls,
++	arm_instr_store_w0_byte_u1_p1_reg__ge,
++	arm_instr_store_w0_byte_u1_p1_reg__lt,
++	arm_instr_store_w0_byte_u1_p1_reg__gt,
++	arm_instr_store_w0_byte_u1_p1_reg__le,
++	arm_instr_store_w0_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p1_reg__eq,
++	arm_instr_load_w0_byte_u1_p1_reg__ne,
++	arm_instr_load_w0_byte_u1_p1_reg__cs,
++	arm_instr_load_w0_byte_u1_p1_reg__cc,
++	arm_instr_load_w0_byte_u1_p1_reg__mi,
++	arm_instr_load_w0_byte_u1_p1_reg__pl,
++	arm_instr_load_w0_byte_u1_p1_reg__vs,
++	arm_instr_load_w0_byte_u1_p1_reg__vc,
++	arm_instr_load_w0_byte_u1_p1_reg__hi,
++	arm_instr_load_w0_byte_u1_p1_reg__ls,
++	arm_instr_load_w0_byte_u1_p1_reg__ge,
++	arm_instr_load_w0_byte_u1_p1_reg__lt,
++	arm_instr_load_w0_byte_u1_p1_reg__gt,
++	arm_instr_load_w0_byte_u1_p1_reg__le,
++	arm_instr_load_w0_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p1_reg__eq,
++	arm_instr_store_w1_byte_u1_p1_reg__ne,
++	arm_instr_store_w1_byte_u1_p1_reg__cs,
++	arm_instr_store_w1_byte_u1_p1_reg__cc,
++	arm_instr_store_w1_byte_u1_p1_reg__mi,
++	arm_instr_store_w1_byte_u1_p1_reg__pl,
++	arm_instr_store_w1_byte_u1_p1_reg__vs,
++	arm_instr_store_w1_byte_u1_p1_reg__vc,
++	arm_instr_store_w1_byte_u1_p1_reg__hi,
++	arm_instr_store_w1_byte_u1_p1_reg__ls,
++	arm_instr_store_w1_byte_u1_p1_reg__ge,
++	arm_instr_store_w1_byte_u1_p1_reg__lt,
++	arm_instr_store_w1_byte_u1_p1_reg__gt,
++	arm_instr_store_w1_byte_u1_p1_reg__le,
++	arm_instr_store_w1_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p1_reg__eq,
++	arm_instr_load_w1_byte_u1_p1_reg__ne,
++	arm_instr_load_w1_byte_u1_p1_reg__cs,
++	arm_instr_load_w1_byte_u1_p1_reg__cc,
++	arm_instr_load_w1_byte_u1_p1_reg__mi,
++	arm_instr_load_w1_byte_u1_p1_reg__pl,
++	arm_instr_load_w1_byte_u1_p1_reg__vs,
++	arm_instr_load_w1_byte_u1_p1_reg__vc,
++	arm_instr_load_w1_byte_u1_p1_reg__hi,
++	arm_instr_load_w1_byte_u1_p1_reg__ls,
++	arm_instr_load_w1_byte_u1_p1_reg__ge,
++	arm_instr_load_w1_byte_u1_p1_reg__lt,
++	arm_instr_load_w1_byte_u1_p1_reg__gt,
++	arm_instr_load_w1_byte_u1_p1_reg__le,
++	arm_instr_load_w1_byte_u1_p1_reg,
++	arm_instr_nop
++};
++
++
++	void (*arm_load_store_instr_pc[1024])(struct cpu *,
++		struct arm_instr_call *) = {
++	arm_instr_store_w0_word_u0_p0_imm_pc__eq,
++	arm_instr_store_w0_word_u0_p0_imm_pc__ne,
++	arm_instr_store_w0_word_u0_p0_imm_pc__cs,
++	arm_instr_store_w0_word_u0_p0_imm_pc__cc,
++	arm_instr_store_w0_word_u0_p0_imm_pc__mi,
++	arm_instr_store_w0_word_u0_p0_imm_pc__pl,
++	arm_instr_store_w0_word_u0_p0_imm_pc__vs,
++	arm_instr_store_w0_word_u0_p0_imm_pc__vc,
++	arm_instr_store_w0_word_u0_p0_imm_pc__hi,
++	arm_instr_store_w0_word_u0_p0_imm_pc__ls,
++	arm_instr_store_w0_word_u0_p0_imm_pc__ge,
++	arm_instr_store_w0_word_u0_p0_imm_pc__lt,
++	arm_instr_store_w0_word_u0_p0_imm_pc__gt,
++	arm_instr_store_w0_word_u0_p0_imm_pc__le,
++	arm_instr_store_w0_word_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p0_imm_pc__eq,
++	arm_instr_load_w0_word_u0_p0_imm_pc__ne,
++	arm_instr_load_w0_word_u0_p0_imm_pc__cs,
++	arm_instr_load_w0_word_u0_p0_imm_pc__cc,
++	arm_instr_load_w0_word_u0_p0_imm_pc__mi,
++	arm_instr_load_w0_word_u0_p0_imm_pc__pl,
++	arm_instr_load_w0_word_u0_p0_imm_pc__vs,
++	arm_instr_load_w0_word_u0_p0_imm_pc__vc,
++	arm_instr_load_w0_word_u0_p0_imm_pc__hi,
++	arm_instr_load_w0_word_u0_p0_imm_pc__ls,
++	arm_instr_load_w0_word_u0_p0_imm_pc__ge,
++	arm_instr_load_w0_word_u0_p0_imm_pc__lt,
++	arm_instr_load_w0_word_u0_p0_imm_pc__gt,
++	arm_instr_load_w0_word_u0_p0_imm_pc__le,
++	arm_instr_load_w0_word_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p0_imm_pc__eq,
++	arm_instr_store_w1_word_u0_p0_imm_pc__ne,
++	arm_instr_store_w1_word_u0_p0_imm_pc__cs,
++	arm_instr_store_w1_word_u0_p0_imm_pc__cc,
++	arm_instr_store_w1_word_u0_p0_imm_pc__mi,
++	arm_instr_store_w1_word_u0_p0_imm_pc__pl,
++	arm_instr_store_w1_word_u0_p0_imm_pc__vs,
++	arm_instr_store_w1_word_u0_p0_imm_pc__vc,
++	arm_instr_store_w1_word_u0_p0_imm_pc__hi,
++	arm_instr_store_w1_word_u0_p0_imm_pc__ls,
++	arm_instr_store_w1_word_u0_p0_imm_pc__ge,
++	arm_instr_store_w1_word_u0_p0_imm_pc__lt,
++	arm_instr_store_w1_word_u0_p0_imm_pc__gt,
++	arm_instr_store_w1_word_u0_p0_imm_pc__le,
++	arm_instr_store_w1_word_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p0_imm_pc__eq,
++	arm_instr_load_w1_word_u0_p0_imm_pc__ne,
++	arm_instr_load_w1_word_u0_p0_imm_pc__cs,
++	arm_instr_load_w1_word_u0_p0_imm_pc__cc,
++	arm_instr_load_w1_word_u0_p0_imm_pc__mi,
++	arm_instr_load_w1_word_u0_p0_imm_pc__pl,
++	arm_instr_load_w1_word_u0_p0_imm_pc__vs,
++	arm_instr_load_w1_word_u0_p0_imm_pc__vc,
++	arm_instr_load_w1_word_u0_p0_imm_pc__hi,
++	arm_instr_load_w1_word_u0_p0_imm_pc__ls,
++	arm_instr_load_w1_word_u0_p0_imm_pc__ge,
++	arm_instr_load_w1_word_u0_p0_imm_pc__lt,
++	arm_instr_load_w1_word_u0_p0_imm_pc__gt,
++	arm_instr_load_w1_word_u0_p0_imm_pc__le,
++	arm_instr_load_w1_word_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__eq,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__ne,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__cs,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__cc,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__mi,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__pl,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__vs,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__vc,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__hi,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__ls,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__ge,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__lt,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__gt,
++	arm_instr_store_w0_byte_u0_p0_imm_pc__le,
++	arm_instr_store_w0_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__eq,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__ne,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__cs,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__cc,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__mi,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__pl,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__vs,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__vc,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__hi,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__ls,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__ge,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__lt,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__gt,
++	arm_instr_load_w0_byte_u0_p0_imm_pc__le,
++	arm_instr_load_w0_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__eq,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__ne,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__cs,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__cc,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__mi,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__pl,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__vs,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__vc,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__hi,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__ls,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__ge,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__lt,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__gt,
++	arm_instr_store_w1_byte_u0_p0_imm_pc__le,
++	arm_instr_store_w1_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__eq,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__ne,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__cs,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__cc,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__mi,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__pl,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__vs,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__vc,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__hi,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__ls,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__ge,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__lt,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__gt,
++	arm_instr_load_w1_byte_u0_p0_imm_pc__le,
++	arm_instr_load_w1_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p0_imm_pc__eq,
++	arm_instr_store_w0_word_u1_p0_imm_pc__ne,
++	arm_instr_store_w0_word_u1_p0_imm_pc__cs,
++	arm_instr_store_w0_word_u1_p0_imm_pc__cc,
++	arm_instr_store_w0_word_u1_p0_imm_pc__mi,
++	arm_instr_store_w0_word_u1_p0_imm_pc__pl,
++	arm_instr_store_w0_word_u1_p0_imm_pc__vs,
++	arm_instr_store_w0_word_u1_p0_imm_pc__vc,
++	arm_instr_store_w0_word_u1_p0_imm_pc__hi,
++	arm_instr_store_w0_word_u1_p0_imm_pc__ls,
++	arm_instr_store_w0_word_u1_p0_imm_pc__ge,
++	arm_instr_store_w0_word_u1_p0_imm_pc__lt,
++	arm_instr_store_w0_word_u1_p0_imm_pc__gt,
++	arm_instr_store_w0_word_u1_p0_imm_pc__le,
++	arm_instr_store_w0_word_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p0_imm_pc__eq,
++	arm_instr_load_w0_word_u1_p0_imm_pc__ne,
++	arm_instr_load_w0_word_u1_p0_imm_pc__cs,
++	arm_instr_load_w0_word_u1_p0_imm_pc__cc,
++	arm_instr_load_w0_word_u1_p0_imm_pc__mi,
++	arm_instr_load_w0_word_u1_p0_imm_pc__pl,
++	arm_instr_load_w0_word_u1_p0_imm_pc__vs,
++	arm_instr_load_w0_word_u1_p0_imm_pc__vc,
++	arm_instr_load_w0_word_u1_p0_imm_pc__hi,
++	arm_instr_load_w0_word_u1_p0_imm_pc__ls,
++	arm_instr_load_w0_word_u1_p0_imm_pc__ge,
++	arm_instr_load_w0_word_u1_p0_imm_pc__lt,
++	arm_instr_load_w0_word_u1_p0_imm_pc__gt,
++	arm_instr_load_w0_word_u1_p0_imm_pc__le,
++	arm_instr_load_w0_word_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p0_imm_pc__eq,
++	arm_instr_store_w1_word_u1_p0_imm_pc__ne,
++	arm_instr_store_w1_word_u1_p0_imm_pc__cs,
++	arm_instr_store_w1_word_u1_p0_imm_pc__cc,
++	arm_instr_store_w1_word_u1_p0_imm_pc__mi,
++	arm_instr_store_w1_word_u1_p0_imm_pc__pl,
++	arm_instr_store_w1_word_u1_p0_imm_pc__vs,
++	arm_instr_store_w1_word_u1_p0_imm_pc__vc,
++	arm_instr_store_w1_word_u1_p0_imm_pc__hi,
++	arm_instr_store_w1_word_u1_p0_imm_pc__ls,
++	arm_instr_store_w1_word_u1_p0_imm_pc__ge,
++	arm_instr_store_w1_word_u1_p0_imm_pc__lt,
++	arm_instr_store_w1_word_u1_p0_imm_pc__gt,
++	arm_instr_store_w1_word_u1_p0_imm_pc__le,
++	arm_instr_store_w1_word_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p0_imm_pc__eq,
++	arm_instr_load_w1_word_u1_p0_imm_pc__ne,
++	arm_instr_load_w1_word_u1_p0_imm_pc__cs,
++	arm_instr_load_w1_word_u1_p0_imm_pc__cc,
++	arm_instr_load_w1_word_u1_p0_imm_pc__mi,
++	arm_instr_load_w1_word_u1_p0_imm_pc__pl,
++	arm_instr_load_w1_word_u1_p0_imm_pc__vs,
++	arm_instr_load_w1_word_u1_p0_imm_pc__vc,
++	arm_instr_load_w1_word_u1_p0_imm_pc__hi,
++	arm_instr_load_w1_word_u1_p0_imm_pc__ls,
++	arm_instr_load_w1_word_u1_p0_imm_pc__ge,
++	arm_instr_load_w1_word_u1_p0_imm_pc__lt,
++	arm_instr_load_w1_word_u1_p0_imm_pc__gt,
++	arm_instr_load_w1_word_u1_p0_imm_pc__le,
++	arm_instr_load_w1_word_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__eq,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__ne,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__cs,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__cc,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__mi,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__pl,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__vs,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__vc,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__hi,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__ls,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__ge,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__lt,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__gt,
++	arm_instr_store_w0_byte_u1_p0_imm_pc__le,
++	arm_instr_store_w0_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__eq,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__ne,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__cs,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__cc,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__mi,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__pl,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__vs,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__vc,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__hi,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__ls,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__ge,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__lt,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__gt,
++	arm_instr_load_w0_byte_u1_p0_imm_pc__le,
++	arm_instr_load_w0_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__eq,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__ne,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__cs,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__cc,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__mi,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__pl,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__vs,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__vc,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__hi,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__ls,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__ge,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__lt,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__gt,
++	arm_instr_store_w1_byte_u1_p0_imm_pc__le,
++	arm_instr_store_w1_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__eq,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__ne,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__cs,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__cc,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__mi,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__pl,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__vs,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__vc,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__hi,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__ls,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__ge,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__lt,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__gt,
++	arm_instr_load_w1_byte_u1_p0_imm_pc__le,
++	arm_instr_load_w1_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u0_p1_imm_pc__eq,
++	arm_instr_store_w0_word_u0_p1_imm_pc__ne,
++	arm_instr_store_w0_word_u0_p1_imm_pc__cs,
++	arm_instr_store_w0_word_u0_p1_imm_pc__cc,
++	arm_instr_store_w0_word_u0_p1_imm_pc__mi,
++	arm_instr_store_w0_word_u0_p1_imm_pc__pl,
++	arm_instr_store_w0_word_u0_p1_imm_pc__vs,
++	arm_instr_store_w0_word_u0_p1_imm_pc__vc,
++	arm_instr_store_w0_word_u0_p1_imm_pc__hi,
++	arm_instr_store_w0_word_u0_p1_imm_pc__ls,
++	arm_instr_store_w0_word_u0_p1_imm_pc__ge,
++	arm_instr_store_w0_word_u0_p1_imm_pc__lt,
++	arm_instr_store_w0_word_u0_p1_imm_pc__gt,
++	arm_instr_store_w0_word_u0_p1_imm_pc__le,
++	arm_instr_store_w0_word_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p1_imm_pc__eq,
++	arm_instr_load_w0_word_u0_p1_imm_pc__ne,
++	arm_instr_load_w0_word_u0_p1_imm_pc__cs,
++	arm_instr_load_w0_word_u0_p1_imm_pc__cc,
++	arm_instr_load_w0_word_u0_p1_imm_pc__mi,
++	arm_instr_load_w0_word_u0_p1_imm_pc__pl,
++	arm_instr_load_w0_word_u0_p1_imm_pc__vs,
++	arm_instr_load_w0_word_u0_p1_imm_pc__vc,
++	arm_instr_load_w0_word_u0_p1_imm_pc__hi,
++	arm_instr_load_w0_word_u0_p1_imm_pc__ls,
++	arm_instr_load_w0_word_u0_p1_imm_pc__ge,
++	arm_instr_load_w0_word_u0_p1_imm_pc__lt,
++	arm_instr_load_w0_word_u0_p1_imm_pc__gt,
++	arm_instr_load_w0_word_u0_p1_imm_pc__le,
++	arm_instr_load_w0_word_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p1_imm_pc__eq,
++	arm_instr_store_w1_word_u0_p1_imm_pc__ne,
++	arm_instr_store_w1_word_u0_p1_imm_pc__cs,
++	arm_instr_store_w1_word_u0_p1_imm_pc__cc,
++	arm_instr_store_w1_word_u0_p1_imm_pc__mi,
++	arm_instr_store_w1_word_u0_p1_imm_pc__pl,
++	arm_instr_store_w1_word_u0_p1_imm_pc__vs,
++	arm_instr_store_w1_word_u0_p1_imm_pc__vc,
++	arm_instr_store_w1_word_u0_p1_imm_pc__hi,
++	arm_instr_store_w1_word_u0_p1_imm_pc__ls,
++	arm_instr_store_w1_word_u0_p1_imm_pc__ge,
++	arm_instr_store_w1_word_u0_p1_imm_pc__lt,
++	arm_instr_store_w1_word_u0_p1_imm_pc__gt,
++	arm_instr_store_w1_word_u0_p1_imm_pc__le,
++	arm_instr_store_w1_word_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p1_imm_pc__eq,
++	arm_instr_load_w1_word_u0_p1_imm_pc__ne,
++	arm_instr_load_w1_word_u0_p1_imm_pc__cs,
++	arm_instr_load_w1_word_u0_p1_imm_pc__cc,
++	arm_instr_load_w1_word_u0_p1_imm_pc__mi,
++	arm_instr_load_w1_word_u0_p1_imm_pc__pl,
++	arm_instr_load_w1_word_u0_p1_imm_pc__vs,
++	arm_instr_load_w1_word_u0_p1_imm_pc__vc,
++	arm_instr_load_w1_word_u0_p1_imm_pc__hi,
++	arm_instr_load_w1_word_u0_p1_imm_pc__ls,
++	arm_instr_load_w1_word_u0_p1_imm_pc__ge,
++	arm_instr_load_w1_word_u0_p1_imm_pc__lt,
++	arm_instr_load_w1_word_u0_p1_imm_pc__gt,
++	arm_instr_load_w1_word_u0_p1_imm_pc__le,
++	arm_instr_load_w1_word_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__eq,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__ne,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__cs,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__cc,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__mi,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__pl,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__vs,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__vc,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__hi,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__ls,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__ge,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__lt,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__gt,
++	arm_instr_store_w0_byte_u0_p1_imm_pc__le,
++	arm_instr_store_w0_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__eq,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__ne,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__cs,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__cc,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__mi,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__pl,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__vs,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__vc,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__hi,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__ls,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__ge,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__lt,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__gt,
++	arm_instr_load_w0_byte_u0_p1_imm_pc__le,
++	arm_instr_load_w0_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__eq,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__ne,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__cs,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__cc,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__mi,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__pl,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__vs,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__vc,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__hi,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__ls,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__ge,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__lt,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__gt,
++	arm_instr_store_w1_byte_u0_p1_imm_pc__le,
++	arm_instr_store_w1_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__eq,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__ne,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__cs,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__cc,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__mi,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__pl,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__vs,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__vc,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__hi,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__ls,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__ge,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__lt,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__gt,
++	arm_instr_load_w1_byte_u0_p1_imm_pc__le,
++	arm_instr_load_w1_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p1_imm_pc__eq,
++	arm_instr_store_w0_word_u1_p1_imm_pc__ne,
++	arm_instr_store_w0_word_u1_p1_imm_pc__cs,
++	arm_instr_store_w0_word_u1_p1_imm_pc__cc,
++	arm_instr_store_w0_word_u1_p1_imm_pc__mi,
++	arm_instr_store_w0_word_u1_p1_imm_pc__pl,
++	arm_instr_store_w0_word_u1_p1_imm_pc__vs,
++	arm_instr_store_w0_word_u1_p1_imm_pc__vc,
++	arm_instr_store_w0_word_u1_p1_imm_pc__hi,
++	arm_instr_store_w0_word_u1_p1_imm_pc__ls,
++	arm_instr_store_w0_word_u1_p1_imm_pc__ge,
++	arm_instr_store_w0_word_u1_p1_imm_pc__lt,
++	arm_instr_store_w0_word_u1_p1_imm_pc__gt,
++	arm_instr_store_w0_word_u1_p1_imm_pc__le,
++	arm_instr_store_w0_word_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p1_imm_pc__eq,
++	arm_instr_load_w0_word_u1_p1_imm_pc__ne,
++	arm_instr_load_w0_word_u1_p1_imm_pc__cs,
++	arm_instr_load_w0_word_u1_p1_imm_pc__cc,
++	arm_instr_load_w0_word_u1_p1_imm_pc__mi,
++	arm_instr_load_w0_word_u1_p1_imm_pc__pl,
++	arm_instr_load_w0_word_u1_p1_imm_pc__vs,
++	arm_instr_load_w0_word_u1_p1_imm_pc__vc,
++	arm_instr_load_w0_word_u1_p1_imm_pc__hi,
++	arm_instr_load_w0_word_u1_p1_imm_pc__ls,
++	arm_instr_load_w0_word_u1_p1_imm_pc__ge,
++	arm_instr_load_w0_word_u1_p1_imm_pc__lt,
++	arm_instr_load_w0_word_u1_p1_imm_pc__gt,
++	arm_instr_load_w0_word_u1_p1_imm_pc__le,
++	arm_instr_load_w0_word_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p1_imm_pc__eq,
++	arm_instr_store_w1_word_u1_p1_imm_pc__ne,
++	arm_instr_store_w1_word_u1_p1_imm_pc__cs,
++	arm_instr_store_w1_word_u1_p1_imm_pc__cc,
++	arm_instr_store_w1_word_u1_p1_imm_pc__mi,
++	arm_instr_store_w1_word_u1_p1_imm_pc__pl,
++	arm_instr_store_w1_word_u1_p1_imm_pc__vs,
++	arm_instr_store_w1_word_u1_p1_imm_pc__vc,
++	arm_instr_store_w1_word_u1_p1_imm_pc__hi,
++	arm_instr_store_w1_word_u1_p1_imm_pc__ls,
++	arm_instr_store_w1_word_u1_p1_imm_pc__ge,
++	arm_instr_store_w1_word_u1_p1_imm_pc__lt,
++	arm_instr_store_w1_word_u1_p1_imm_pc__gt,
++	arm_instr_store_w1_word_u1_p1_imm_pc__le,
++	arm_instr_store_w1_word_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p1_imm_pc__eq,
++	arm_instr_load_w1_word_u1_p1_imm_pc__ne,
++	arm_instr_load_w1_word_u1_p1_imm_pc__cs,
++	arm_instr_load_w1_word_u1_p1_imm_pc__cc,
++	arm_instr_load_w1_word_u1_p1_imm_pc__mi,
++	arm_instr_load_w1_word_u1_p1_imm_pc__pl,
++	arm_instr_load_w1_word_u1_p1_imm_pc__vs,
++	arm_instr_load_w1_word_u1_p1_imm_pc__vc,
++	arm_instr_load_w1_word_u1_p1_imm_pc__hi,
++	arm_instr_load_w1_word_u1_p1_imm_pc__ls,
++	arm_instr_load_w1_word_u1_p1_imm_pc__ge,
++	arm_instr_load_w1_word_u1_p1_imm_pc__lt,
++	arm_instr_load_w1_word_u1_p1_imm_pc__gt,
++	arm_instr_load_w1_word_u1_p1_imm_pc__le,
++	arm_instr_load_w1_word_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__eq,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__ne,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__cs,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__cc,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__mi,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__pl,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__vs,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__vc,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__hi,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__ls,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__ge,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__lt,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__gt,
++	arm_instr_store_w0_byte_u1_p1_imm_pc__le,
++	arm_instr_store_w0_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__eq,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__ne,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__cs,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__cc,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__mi,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__pl,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__vs,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__vc,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__hi,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__ls,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__ge,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__lt,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__gt,
++	arm_instr_load_w0_byte_u1_p1_imm_pc__le,
++	arm_instr_load_w0_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__eq,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__ne,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__cs,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__cc,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__mi,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__pl,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__vs,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__vc,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__hi,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__ls,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__ge,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__lt,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__gt,
++	arm_instr_store_w1_byte_u1_p1_imm_pc__le,
++	arm_instr_store_w1_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__eq,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__ne,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__cs,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__cc,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__mi,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__pl,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__vs,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__vc,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__hi,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__ls,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__ge,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__lt,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__gt,
++	arm_instr_load_w1_byte_u1_p1_imm_pc__le,
++	arm_instr_load_w1_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u0_p0_reg_pc__eq,
++	arm_instr_store_w0_word_u0_p0_reg_pc__ne,
++	arm_instr_store_w0_word_u0_p0_reg_pc__cs,
++	arm_instr_store_w0_word_u0_p0_reg_pc__cc,
++	arm_instr_store_w0_word_u0_p0_reg_pc__mi,
++	arm_instr_store_w0_word_u0_p0_reg_pc__pl,
++	arm_instr_store_w0_word_u0_p0_reg_pc__vs,
++	arm_instr_store_w0_word_u0_p0_reg_pc__vc,
++	arm_instr_store_w0_word_u0_p0_reg_pc__hi,
++	arm_instr_store_w0_word_u0_p0_reg_pc__ls,
++	arm_instr_store_w0_word_u0_p0_reg_pc__ge,
++	arm_instr_store_w0_word_u0_p0_reg_pc__lt,
++	arm_instr_store_w0_word_u0_p0_reg_pc__gt,
++	arm_instr_store_w0_word_u0_p0_reg_pc__le,
++	arm_instr_store_w0_word_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p0_reg_pc__eq,
++	arm_instr_load_w0_word_u0_p0_reg_pc__ne,
++	arm_instr_load_w0_word_u0_p0_reg_pc__cs,
++	arm_instr_load_w0_word_u0_p0_reg_pc__cc,
++	arm_instr_load_w0_word_u0_p0_reg_pc__mi,
++	arm_instr_load_w0_word_u0_p0_reg_pc__pl,
++	arm_instr_load_w0_word_u0_p0_reg_pc__vs,
++	arm_instr_load_w0_word_u0_p0_reg_pc__vc,
++	arm_instr_load_w0_word_u0_p0_reg_pc__hi,
++	arm_instr_load_w0_word_u0_p0_reg_pc__ls,
++	arm_instr_load_w0_word_u0_p0_reg_pc__ge,
++	arm_instr_load_w0_word_u0_p0_reg_pc__lt,
++	arm_instr_load_w0_word_u0_p0_reg_pc__gt,
++	arm_instr_load_w0_word_u0_p0_reg_pc__le,
++	arm_instr_load_w0_word_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p0_reg_pc__eq,
++	arm_instr_store_w1_word_u0_p0_reg_pc__ne,
++	arm_instr_store_w1_word_u0_p0_reg_pc__cs,
++	arm_instr_store_w1_word_u0_p0_reg_pc__cc,
++	arm_instr_store_w1_word_u0_p0_reg_pc__mi,
++	arm_instr_store_w1_word_u0_p0_reg_pc__pl,
++	arm_instr_store_w1_word_u0_p0_reg_pc__vs,
++	arm_instr_store_w1_word_u0_p0_reg_pc__vc,
++	arm_instr_store_w1_word_u0_p0_reg_pc__hi,
++	arm_instr_store_w1_word_u0_p0_reg_pc__ls,
++	arm_instr_store_w1_word_u0_p0_reg_pc__ge,
++	arm_instr_store_w1_word_u0_p0_reg_pc__lt,
++	arm_instr_store_w1_word_u0_p0_reg_pc__gt,
++	arm_instr_store_w1_word_u0_p0_reg_pc__le,
++	arm_instr_store_w1_word_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p0_reg_pc__eq,
++	arm_instr_load_w1_word_u0_p0_reg_pc__ne,
++	arm_instr_load_w1_word_u0_p0_reg_pc__cs,
++	arm_instr_load_w1_word_u0_p0_reg_pc__cc,
++	arm_instr_load_w1_word_u0_p0_reg_pc__mi,
++	arm_instr_load_w1_word_u0_p0_reg_pc__pl,
++	arm_instr_load_w1_word_u0_p0_reg_pc__vs,
++	arm_instr_load_w1_word_u0_p0_reg_pc__vc,
++	arm_instr_load_w1_word_u0_p0_reg_pc__hi,
++	arm_instr_load_w1_word_u0_p0_reg_pc__ls,
++	arm_instr_load_w1_word_u0_p0_reg_pc__ge,
++	arm_instr_load_w1_word_u0_p0_reg_pc__lt,
++	arm_instr_load_w1_word_u0_p0_reg_pc__gt,
++	arm_instr_load_w1_word_u0_p0_reg_pc__le,
++	arm_instr_load_w1_word_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__eq,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__ne,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__cs,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__cc,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__mi,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__pl,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__vs,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__vc,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__hi,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__ls,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__ge,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__lt,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__gt,
++	arm_instr_store_w0_byte_u0_p0_reg_pc__le,
++	arm_instr_store_w0_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__eq,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__ne,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__cs,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__cc,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__mi,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__pl,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__vs,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__vc,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__hi,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__ls,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__ge,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__lt,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__gt,
++	arm_instr_load_w0_byte_u0_p0_reg_pc__le,
++	arm_instr_load_w0_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__eq,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__ne,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__cs,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__cc,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__mi,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__pl,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__vs,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__vc,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__hi,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__ls,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__ge,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__lt,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__gt,
++	arm_instr_store_w1_byte_u0_p0_reg_pc__le,
++	arm_instr_store_w1_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__eq,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__ne,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__cs,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__cc,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__mi,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__pl,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__vs,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__vc,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__hi,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__ls,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__ge,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__lt,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__gt,
++	arm_instr_load_w1_byte_u0_p0_reg_pc__le,
++	arm_instr_load_w1_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p0_reg_pc__eq,
++	arm_instr_store_w0_word_u1_p0_reg_pc__ne,
++	arm_instr_store_w0_word_u1_p0_reg_pc__cs,
++	arm_instr_store_w0_word_u1_p0_reg_pc__cc,
++	arm_instr_store_w0_word_u1_p0_reg_pc__mi,
++	arm_instr_store_w0_word_u1_p0_reg_pc__pl,
++	arm_instr_store_w0_word_u1_p0_reg_pc__vs,
++	arm_instr_store_w0_word_u1_p0_reg_pc__vc,
++	arm_instr_store_w0_word_u1_p0_reg_pc__hi,
++	arm_instr_store_w0_word_u1_p0_reg_pc__ls,
++	arm_instr_store_w0_word_u1_p0_reg_pc__ge,
++	arm_instr_store_w0_word_u1_p0_reg_pc__lt,
++	arm_instr_store_w0_word_u1_p0_reg_pc__gt,
++	arm_instr_store_w0_word_u1_p0_reg_pc__le,
++	arm_instr_store_w0_word_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p0_reg_pc__eq,
++	arm_instr_load_w0_word_u1_p0_reg_pc__ne,
++	arm_instr_load_w0_word_u1_p0_reg_pc__cs,
++	arm_instr_load_w0_word_u1_p0_reg_pc__cc,
++	arm_instr_load_w0_word_u1_p0_reg_pc__mi,
++	arm_instr_load_w0_word_u1_p0_reg_pc__pl,
++	arm_instr_load_w0_word_u1_p0_reg_pc__vs,
++	arm_instr_load_w0_word_u1_p0_reg_pc__vc,
++	arm_instr_load_w0_word_u1_p0_reg_pc__hi,
++	arm_instr_load_w0_word_u1_p0_reg_pc__ls,
++	arm_instr_load_w0_word_u1_p0_reg_pc__ge,
++	arm_instr_load_w0_word_u1_p0_reg_pc__lt,
++	arm_instr_load_w0_word_u1_p0_reg_pc__gt,
++	arm_instr_load_w0_word_u1_p0_reg_pc__le,
++	arm_instr_load_w0_word_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p0_reg_pc__eq,
++	arm_instr_store_w1_word_u1_p0_reg_pc__ne,
++	arm_instr_store_w1_word_u1_p0_reg_pc__cs,
++	arm_instr_store_w1_word_u1_p0_reg_pc__cc,
++	arm_instr_store_w1_word_u1_p0_reg_pc__mi,
++	arm_instr_store_w1_word_u1_p0_reg_pc__pl,
++	arm_instr_store_w1_word_u1_p0_reg_pc__vs,
++	arm_instr_store_w1_word_u1_p0_reg_pc__vc,
++	arm_instr_store_w1_word_u1_p0_reg_pc__hi,
++	arm_instr_store_w1_word_u1_p0_reg_pc__ls,
++	arm_instr_store_w1_word_u1_p0_reg_pc__ge,
++	arm_instr_store_w1_word_u1_p0_reg_pc__lt,
++	arm_instr_store_w1_word_u1_p0_reg_pc__gt,
++	arm_instr_store_w1_word_u1_p0_reg_pc__le,
++	arm_instr_store_w1_word_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p0_reg_pc__eq,
++	arm_instr_load_w1_word_u1_p0_reg_pc__ne,
++	arm_instr_load_w1_word_u1_p0_reg_pc__cs,
++	arm_instr_load_w1_word_u1_p0_reg_pc__cc,
++	arm_instr_load_w1_word_u1_p0_reg_pc__mi,
++	arm_instr_load_w1_word_u1_p0_reg_pc__pl,
++	arm_instr_load_w1_word_u1_p0_reg_pc__vs,
++	arm_instr_load_w1_word_u1_p0_reg_pc__vc,
++	arm_instr_load_w1_word_u1_p0_reg_pc__hi,
++	arm_instr_load_w1_word_u1_p0_reg_pc__ls,
++	arm_instr_load_w1_word_u1_p0_reg_pc__ge,
++	arm_instr_load_w1_word_u1_p0_reg_pc__lt,
++	arm_instr_load_w1_word_u1_p0_reg_pc__gt,
++	arm_instr_load_w1_word_u1_p0_reg_pc__le,
++	arm_instr_load_w1_word_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__eq,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__ne,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__cs,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__cc,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__mi,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__pl,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__vs,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__vc,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__hi,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__ls,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__ge,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__lt,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__gt,
++	arm_instr_store_w0_byte_u1_p0_reg_pc__le,
++	arm_instr_store_w0_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__eq,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__ne,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__cs,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__cc,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__mi,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__pl,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__vs,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__vc,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__hi,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__ls,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__ge,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__lt,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__gt,
++	arm_instr_load_w0_byte_u1_p0_reg_pc__le,
++	arm_instr_load_w0_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__eq,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__ne,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__cs,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__cc,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__mi,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__pl,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__vs,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__vc,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__hi,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__ls,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__ge,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__lt,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__gt,
++	arm_instr_store_w1_byte_u1_p0_reg_pc__le,
++	arm_instr_store_w1_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__eq,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__ne,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__cs,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__cc,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__mi,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__pl,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__vs,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__vc,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__hi,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__ls,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__ge,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__lt,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__gt,
++	arm_instr_load_w1_byte_u1_p0_reg_pc__le,
++	arm_instr_load_w1_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u0_p1_reg_pc__eq,
++	arm_instr_store_w0_word_u0_p1_reg_pc__ne,
++	arm_instr_store_w0_word_u0_p1_reg_pc__cs,
++	arm_instr_store_w0_word_u0_p1_reg_pc__cc,
++	arm_instr_store_w0_word_u0_p1_reg_pc__mi,
++	arm_instr_store_w0_word_u0_p1_reg_pc__pl,
++	arm_instr_store_w0_word_u0_p1_reg_pc__vs,
++	arm_instr_store_w0_word_u0_p1_reg_pc__vc,
++	arm_instr_store_w0_word_u0_p1_reg_pc__hi,
++	arm_instr_store_w0_word_u0_p1_reg_pc__ls,
++	arm_instr_store_w0_word_u0_p1_reg_pc__ge,
++	arm_instr_store_w0_word_u0_p1_reg_pc__lt,
++	arm_instr_store_w0_word_u0_p1_reg_pc__gt,
++	arm_instr_store_w0_word_u0_p1_reg_pc__le,
++	arm_instr_store_w0_word_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u0_p1_reg_pc__eq,
++	arm_instr_load_w0_word_u0_p1_reg_pc__ne,
++	arm_instr_load_w0_word_u0_p1_reg_pc__cs,
++	arm_instr_load_w0_word_u0_p1_reg_pc__cc,
++	arm_instr_load_w0_word_u0_p1_reg_pc__mi,
++	arm_instr_load_w0_word_u0_p1_reg_pc__pl,
++	arm_instr_load_w0_word_u0_p1_reg_pc__vs,
++	arm_instr_load_w0_word_u0_p1_reg_pc__vc,
++	arm_instr_load_w0_word_u0_p1_reg_pc__hi,
++	arm_instr_load_w0_word_u0_p1_reg_pc__ls,
++	arm_instr_load_w0_word_u0_p1_reg_pc__ge,
++	arm_instr_load_w0_word_u0_p1_reg_pc__lt,
++	arm_instr_load_w0_word_u0_p1_reg_pc__gt,
++	arm_instr_load_w0_word_u0_p1_reg_pc__le,
++	arm_instr_load_w0_word_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u0_p1_reg_pc__eq,
++	arm_instr_store_w1_word_u0_p1_reg_pc__ne,
++	arm_instr_store_w1_word_u0_p1_reg_pc__cs,
++	arm_instr_store_w1_word_u0_p1_reg_pc__cc,
++	arm_instr_store_w1_word_u0_p1_reg_pc__mi,
++	arm_instr_store_w1_word_u0_p1_reg_pc__pl,
++	arm_instr_store_w1_word_u0_p1_reg_pc__vs,
++	arm_instr_store_w1_word_u0_p1_reg_pc__vc,
++	arm_instr_store_w1_word_u0_p1_reg_pc__hi,
++	arm_instr_store_w1_word_u0_p1_reg_pc__ls,
++	arm_instr_store_w1_word_u0_p1_reg_pc__ge,
++	arm_instr_store_w1_word_u0_p1_reg_pc__lt,
++	arm_instr_store_w1_word_u0_p1_reg_pc__gt,
++	arm_instr_store_w1_word_u0_p1_reg_pc__le,
++	arm_instr_store_w1_word_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u0_p1_reg_pc__eq,
++	arm_instr_load_w1_word_u0_p1_reg_pc__ne,
++	arm_instr_load_w1_word_u0_p1_reg_pc__cs,
++	arm_instr_load_w1_word_u0_p1_reg_pc__cc,
++	arm_instr_load_w1_word_u0_p1_reg_pc__mi,
++	arm_instr_load_w1_word_u0_p1_reg_pc__pl,
++	arm_instr_load_w1_word_u0_p1_reg_pc__vs,
++	arm_instr_load_w1_word_u0_p1_reg_pc__vc,
++	arm_instr_load_w1_word_u0_p1_reg_pc__hi,
++	arm_instr_load_w1_word_u0_p1_reg_pc__ls,
++	arm_instr_load_w1_word_u0_p1_reg_pc__ge,
++	arm_instr_load_w1_word_u0_p1_reg_pc__lt,
++	arm_instr_load_w1_word_u0_p1_reg_pc__gt,
++	arm_instr_load_w1_word_u0_p1_reg_pc__le,
++	arm_instr_load_w1_word_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__eq,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__ne,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__cs,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__cc,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__mi,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__pl,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__vs,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__vc,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__hi,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__ls,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__ge,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__lt,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__gt,
++	arm_instr_store_w0_byte_u0_p1_reg_pc__le,
++	arm_instr_store_w0_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__eq,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__ne,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__cs,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__cc,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__mi,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__pl,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__vs,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__vc,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__hi,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__ls,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__ge,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__lt,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__gt,
++	arm_instr_load_w0_byte_u0_p1_reg_pc__le,
++	arm_instr_load_w0_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__eq,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__ne,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__cs,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__cc,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__mi,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__pl,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__vs,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__vc,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__hi,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__ls,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__ge,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__lt,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__gt,
++	arm_instr_store_w1_byte_u0_p1_reg_pc__le,
++	arm_instr_store_w1_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__eq,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__ne,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__cs,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__cc,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__mi,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__pl,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__vs,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__vc,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__hi,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__ls,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__ge,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__lt,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__gt,
++	arm_instr_load_w1_byte_u0_p1_reg_pc__le,
++	arm_instr_load_w1_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_word_u1_p1_reg_pc__eq,
++	arm_instr_store_w0_word_u1_p1_reg_pc__ne,
++	arm_instr_store_w0_word_u1_p1_reg_pc__cs,
++	arm_instr_store_w0_word_u1_p1_reg_pc__cc,
++	arm_instr_store_w0_word_u1_p1_reg_pc__mi,
++	arm_instr_store_w0_word_u1_p1_reg_pc__pl,
++	arm_instr_store_w0_word_u1_p1_reg_pc__vs,
++	arm_instr_store_w0_word_u1_p1_reg_pc__vc,
++	arm_instr_store_w0_word_u1_p1_reg_pc__hi,
++	arm_instr_store_w0_word_u1_p1_reg_pc__ls,
++	arm_instr_store_w0_word_u1_p1_reg_pc__ge,
++	arm_instr_store_w0_word_u1_p1_reg_pc__lt,
++	arm_instr_store_w0_word_u1_p1_reg_pc__gt,
++	arm_instr_store_w0_word_u1_p1_reg_pc__le,
++	arm_instr_store_w0_word_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_word_u1_p1_reg_pc__eq,
++	arm_instr_load_w0_word_u1_p1_reg_pc__ne,
++	arm_instr_load_w0_word_u1_p1_reg_pc__cs,
++	arm_instr_load_w0_word_u1_p1_reg_pc__cc,
++	arm_instr_load_w0_word_u1_p1_reg_pc__mi,
++	arm_instr_load_w0_word_u1_p1_reg_pc__pl,
++	arm_instr_load_w0_word_u1_p1_reg_pc__vs,
++	arm_instr_load_w0_word_u1_p1_reg_pc__vc,
++	arm_instr_load_w0_word_u1_p1_reg_pc__hi,
++	arm_instr_load_w0_word_u1_p1_reg_pc__ls,
++	arm_instr_load_w0_word_u1_p1_reg_pc__ge,
++	arm_instr_load_w0_word_u1_p1_reg_pc__lt,
++	arm_instr_load_w0_word_u1_p1_reg_pc__gt,
++	arm_instr_load_w0_word_u1_p1_reg_pc__le,
++	arm_instr_load_w0_word_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_word_u1_p1_reg_pc__eq,
++	arm_instr_store_w1_word_u1_p1_reg_pc__ne,
++	arm_instr_store_w1_word_u1_p1_reg_pc__cs,
++	arm_instr_store_w1_word_u1_p1_reg_pc__cc,
++	arm_instr_store_w1_word_u1_p1_reg_pc__mi,
++	arm_instr_store_w1_word_u1_p1_reg_pc__pl,
++	arm_instr_store_w1_word_u1_p1_reg_pc__vs,
++	arm_instr_store_w1_word_u1_p1_reg_pc__vc,
++	arm_instr_store_w1_word_u1_p1_reg_pc__hi,
++	arm_instr_store_w1_word_u1_p1_reg_pc__ls,
++	arm_instr_store_w1_word_u1_p1_reg_pc__ge,
++	arm_instr_store_w1_word_u1_p1_reg_pc__lt,
++	arm_instr_store_w1_word_u1_p1_reg_pc__gt,
++	arm_instr_store_w1_word_u1_p1_reg_pc__le,
++	arm_instr_store_w1_word_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_word_u1_p1_reg_pc__eq,
++	arm_instr_load_w1_word_u1_p1_reg_pc__ne,
++	arm_instr_load_w1_word_u1_p1_reg_pc__cs,
++	arm_instr_load_w1_word_u1_p1_reg_pc__cc,
++	arm_instr_load_w1_word_u1_p1_reg_pc__mi,
++	arm_instr_load_w1_word_u1_p1_reg_pc__pl,
++	arm_instr_load_w1_word_u1_p1_reg_pc__vs,
++	arm_instr_load_w1_word_u1_p1_reg_pc__vc,
++	arm_instr_load_w1_word_u1_p1_reg_pc__hi,
++	arm_instr_load_w1_word_u1_p1_reg_pc__ls,
++	arm_instr_load_w1_word_u1_p1_reg_pc__ge,
++	arm_instr_load_w1_word_u1_p1_reg_pc__lt,
++	arm_instr_load_w1_word_u1_p1_reg_pc__gt,
++	arm_instr_load_w1_word_u1_p1_reg_pc__le,
++	arm_instr_load_w1_word_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__eq,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__ne,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__cs,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__cc,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__mi,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__pl,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__vs,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__vc,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__hi,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__ls,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__ge,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__lt,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__gt,
++	arm_instr_store_w0_byte_u1_p1_reg_pc__le,
++	arm_instr_store_w0_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__eq,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__ne,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__cs,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__cc,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__mi,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__pl,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__vs,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__vc,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__hi,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__ls,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__ge,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__lt,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__gt,
++	arm_instr_load_w0_byte_u1_p1_reg_pc__le,
++	arm_instr_load_w0_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__eq,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__ne,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__cs,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__cc,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__mi,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__pl,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__vs,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__vc,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__hi,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__ls,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__ge,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__lt,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__gt,
++	arm_instr_store_w1_byte_u1_p1_reg_pc__le,
++	arm_instr_store_w1_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__eq,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__ne,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__cs,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__cc,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__mi,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__pl,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__vs,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__vc,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__hi,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__ls,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__ge,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__lt,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__gt,
++	arm_instr_load_w1_byte_u1_p1_reg_pc__le,
++	arm_instr_load_w1_byte_u1_p1_reg_pc,
++	arm_instr_nop
++};
++
++void arm_instr_store_w0_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
++void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
++
++	void (*arm_load_store_instr_3[2048])(struct cpu *,
++		struct arm_instr_call *) = {
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__eq,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__ne,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__cs,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__cc,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__mi,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__pl,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__vs,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__vc,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__hi,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__ls,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__ge,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__lt,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__gt,
++	arm_instr_store_w0_signed_byte_u0_p0_imm__le,
++	arm_instr_store_w0_signed_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__eq,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__ne,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__cs,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__cc,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__mi,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__pl,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__vs,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__vc,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__hi,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__ls,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__ge,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__lt,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__gt,
++	arm_instr_load_w0_signed_byte_u0_p0_imm__le,
++	arm_instr_load_w0_signed_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__eq,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__ne,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__cs,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__cc,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__mi,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__pl,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__vs,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__vc,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__hi,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__ls,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__ge,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__lt,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__gt,
++	arm_instr_store_w1_signed_byte_u0_p0_imm__le,
++	arm_instr_store_w1_signed_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__eq,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__ne,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__cs,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__cc,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__mi,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__pl,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__vs,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__vc,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__hi,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__ls,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__ge,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__lt,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__gt,
++	arm_instr_load_w1_signed_byte_u0_p0_imm__le,
++	arm_instr_load_w1_signed_byte_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__eq,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__ne,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__cs,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__cc,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__mi,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__pl,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__vs,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__vc,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__hi,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__ls,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__ge,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__lt,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__gt,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm__le,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__eq,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__ne,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__cs,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__cc,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__mi,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__pl,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__vs,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__vc,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__hi,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__ls,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__ge,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__lt,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__gt,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm__le,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__eq,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__ne,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__cs,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__cc,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__mi,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__pl,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__vs,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__vc,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__hi,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__ls,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__ge,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__lt,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__gt,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm__le,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__eq,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__ne,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__cs,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__cc,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__mi,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__pl,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__vs,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__vc,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__hi,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__ls,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__ge,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__lt,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__gt,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm__le,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__eq,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__ne,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__cs,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__cc,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__mi,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__pl,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__vs,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__vc,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__hi,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__ls,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__ge,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__lt,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__gt,
++	arm_instr_store_w0_signed_byte_u1_p0_imm__le,
++	arm_instr_store_w0_signed_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__eq,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__ne,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__cs,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__cc,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__mi,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__pl,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__vs,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__vc,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__hi,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__ls,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__ge,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__lt,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__gt,
++	arm_instr_load_w0_signed_byte_u1_p0_imm__le,
++	arm_instr_load_w0_signed_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__eq,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__ne,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__cs,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__cc,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__mi,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__pl,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__vs,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__vc,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__hi,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__ls,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__ge,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__lt,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__gt,
++	arm_instr_store_w1_signed_byte_u1_p0_imm__le,
++	arm_instr_store_w1_signed_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__eq,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__ne,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__cs,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__cc,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__mi,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__pl,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__vs,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__vc,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__hi,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__ls,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__ge,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__lt,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__gt,
++	arm_instr_load_w1_signed_byte_u1_p0_imm__le,
++	arm_instr_load_w1_signed_byte_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__eq,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__ne,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__cs,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__cc,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__mi,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__pl,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__vs,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__vc,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__hi,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__ls,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__ge,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__lt,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__gt,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm__le,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__eq,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__ne,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__cs,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__cc,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__mi,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__pl,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__vs,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__vc,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__hi,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__ls,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__ge,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__lt,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__gt,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm__le,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__eq,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__ne,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__cs,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__cc,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__mi,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__pl,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__vs,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__vc,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__hi,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__ls,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__ge,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__lt,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__gt,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm__le,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__eq,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__ne,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__cs,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__cc,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__mi,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__pl,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__vs,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__vc,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__hi,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__ls,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__ge,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__lt,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__gt,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm__le,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__eq,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__ne,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__cs,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__cc,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__mi,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__pl,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__vs,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__vc,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__hi,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__ls,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__ge,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__lt,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__gt,
++	arm_instr_store_w0_signed_byte_u0_p1_imm__le,
++	arm_instr_store_w0_signed_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__eq,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__ne,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__cs,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__cc,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__mi,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__pl,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__vs,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__vc,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__hi,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__ls,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__ge,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__lt,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__gt,
++	arm_instr_load_w0_signed_byte_u0_p1_imm__le,
++	arm_instr_load_w0_signed_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__eq,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__ne,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__cs,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__cc,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__mi,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__pl,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__vs,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__vc,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__hi,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__ls,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__ge,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__lt,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__gt,
++	arm_instr_store_w1_signed_byte_u0_p1_imm__le,
++	arm_instr_store_w1_signed_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__eq,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__ne,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__cs,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__cc,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__mi,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__pl,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__vs,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__vc,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__hi,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__ls,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__ge,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__lt,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__gt,
++	arm_instr_load_w1_signed_byte_u0_p1_imm__le,
++	arm_instr_load_w1_signed_byte_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__eq,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__ne,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__cs,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__cc,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__mi,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__pl,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__vs,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__vc,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__hi,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__ls,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__ge,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__lt,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__gt,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm__le,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__eq,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__ne,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__cs,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__cc,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__mi,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__pl,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__vs,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__vc,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__hi,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__ls,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__ge,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__lt,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__gt,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm__le,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__eq,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__ne,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__cs,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__cc,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__mi,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__pl,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__vs,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__vc,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__hi,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__ls,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__ge,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__lt,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__gt,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm__le,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__eq,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__ne,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__cs,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__cc,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__mi,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__pl,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__vs,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__vc,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__hi,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__ls,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__ge,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__lt,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__gt,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm__le,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__eq,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__ne,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__cs,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__cc,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__mi,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__pl,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__vs,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__vc,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__hi,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__ls,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__ge,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__lt,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__gt,
++	arm_instr_store_w0_signed_byte_u1_p1_imm__le,
++	arm_instr_store_w0_signed_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__eq,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__ne,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__cs,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__cc,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__mi,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__pl,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__vs,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__vc,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__hi,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__ls,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__ge,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__lt,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__gt,
++	arm_instr_load_w0_signed_byte_u1_p1_imm__le,
++	arm_instr_load_w0_signed_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__eq,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__ne,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__cs,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__cc,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__mi,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__pl,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__vs,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__vc,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__hi,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__ls,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__ge,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__lt,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__gt,
++	arm_instr_store_w1_signed_byte_u1_p1_imm__le,
++	arm_instr_store_w1_signed_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__eq,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__ne,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__cs,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__cc,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__mi,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__pl,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__vs,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__vc,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__hi,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__ls,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__ge,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__lt,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__gt,
++	arm_instr_load_w1_signed_byte_u1_p1_imm__le,
++	arm_instr_load_w1_signed_byte_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__eq,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__ne,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__cs,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__cc,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__mi,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__pl,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__vs,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__vc,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__hi,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__ls,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__ge,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__lt,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__gt,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm__le,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__eq,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__ne,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__cs,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__cc,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__mi,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__pl,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__vs,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__vc,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__hi,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__ls,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__ge,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__lt,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__gt,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm__le,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__eq,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__ne,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__cs,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__cc,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__mi,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__pl,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__vs,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__vc,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__hi,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__ls,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__ge,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__lt,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__gt,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm__le,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__eq,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__ne,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__cs,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__cc,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__mi,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__pl,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__vs,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__vc,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__hi,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__ls,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__ge,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__lt,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__gt,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm__le,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__eq,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__ne,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__cs,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__cc,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__mi,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__pl,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__vs,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__vc,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__hi,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__ls,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__ge,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__lt,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__gt,
++	arm_instr_store_w0_signed_byte_u0_p0_reg__le,
++	arm_instr_store_w0_signed_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__eq,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__ne,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__cs,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__cc,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__mi,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__pl,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__vs,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__vc,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__hi,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__ls,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__ge,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__lt,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__gt,
++	arm_instr_load_w0_signed_byte_u0_p0_reg__le,
++	arm_instr_load_w0_signed_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__eq,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__ne,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__cs,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__cc,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__mi,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__pl,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__vs,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__vc,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__hi,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__ls,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__ge,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__lt,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__gt,
++	arm_instr_store_w1_signed_byte_u0_p0_reg__le,
++	arm_instr_store_w1_signed_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__eq,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__ne,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__cs,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__cc,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__mi,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__pl,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__vs,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__vc,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__hi,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__ls,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__ge,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__lt,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__gt,
++	arm_instr_load_w1_signed_byte_u0_p0_reg__le,
++	arm_instr_load_w1_signed_byte_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__eq,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__ne,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__cs,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__cc,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__mi,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__pl,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__vs,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__vc,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__hi,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__ls,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__ge,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__lt,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__gt,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg__le,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__eq,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__ne,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__cs,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__cc,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__mi,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__pl,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__vs,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__vc,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__hi,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__ls,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__ge,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__lt,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__gt,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg__le,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__eq,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__ne,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__cs,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__cc,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__mi,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__pl,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__vs,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__vc,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__hi,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__ls,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__ge,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__lt,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__gt,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg__le,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__eq,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__ne,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__cs,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__cc,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__mi,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__pl,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__vs,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__vc,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__hi,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__ls,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__ge,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__lt,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__gt,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg__le,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__eq,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__ne,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__cs,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__cc,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__mi,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__pl,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__vs,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__vc,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__hi,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__ls,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__ge,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__lt,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__gt,
++	arm_instr_store_w0_signed_byte_u1_p0_reg__le,
++	arm_instr_store_w0_signed_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__eq,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__ne,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__cs,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__cc,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__mi,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__pl,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__vs,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__vc,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__hi,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__ls,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__ge,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__lt,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__gt,
++	arm_instr_load_w0_signed_byte_u1_p0_reg__le,
++	arm_instr_load_w0_signed_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__eq,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__ne,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__cs,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__cc,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__mi,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__pl,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__vs,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__vc,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__hi,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__ls,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__ge,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__lt,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__gt,
++	arm_instr_store_w1_signed_byte_u1_p0_reg__le,
++	arm_instr_store_w1_signed_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__eq,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__ne,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__cs,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__cc,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__mi,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__pl,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__vs,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__vc,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__hi,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__ls,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__ge,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__lt,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__gt,
++	arm_instr_load_w1_signed_byte_u1_p0_reg__le,
++	arm_instr_load_w1_signed_byte_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__eq,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__ne,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__cs,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__cc,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__mi,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__pl,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__vs,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__vc,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__hi,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__ls,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__ge,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__lt,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__gt,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg__le,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__eq,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__ne,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__cs,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__cc,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__mi,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__pl,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__vs,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__vc,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__hi,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__ls,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__ge,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__lt,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__gt,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg__le,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__eq,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__ne,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__cs,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__cc,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__mi,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__pl,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__vs,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__vc,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__hi,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__ls,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__ge,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__lt,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__gt,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg__le,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__eq,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__ne,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__cs,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__cc,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__mi,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__pl,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__vs,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__vc,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__hi,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__ls,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__ge,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__lt,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__gt,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg__le,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__eq,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__ne,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__cs,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__cc,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__mi,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__pl,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__vs,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__vc,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__hi,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__ls,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__ge,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__lt,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__gt,
++	arm_instr_store_w0_signed_byte_u0_p1_reg__le,
++	arm_instr_store_w0_signed_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__eq,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__ne,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__cs,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__cc,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__mi,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__pl,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__vs,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__vc,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__hi,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__ls,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__ge,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__lt,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__gt,
++	arm_instr_load_w0_signed_byte_u0_p1_reg__le,
++	arm_instr_load_w0_signed_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__eq,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__ne,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__cs,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__cc,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__mi,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__pl,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__vs,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__vc,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__hi,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__ls,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__ge,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__lt,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__gt,
++	arm_instr_store_w1_signed_byte_u0_p1_reg__le,
++	arm_instr_store_w1_signed_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__eq,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__ne,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__cs,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__cc,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__mi,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__pl,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__vs,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__vc,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__hi,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__ls,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__ge,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__lt,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__gt,
++	arm_instr_load_w1_signed_byte_u0_p1_reg__le,
++	arm_instr_load_w1_signed_byte_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__eq,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__ne,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__cs,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__cc,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__mi,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__pl,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__vs,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__vc,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__hi,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__ls,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__ge,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__lt,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__gt,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg__le,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__eq,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__ne,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__cs,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__cc,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__mi,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__pl,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__vs,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__vc,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__hi,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__ls,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__ge,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__lt,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__gt,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg__le,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__eq,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__ne,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__cs,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__cc,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__mi,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__pl,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__vs,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__vc,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__hi,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__ls,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__ge,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__lt,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__gt,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg__le,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__eq,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__ne,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__cs,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__cc,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__mi,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__pl,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__vs,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__vc,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__hi,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__ls,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__ge,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__lt,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__gt,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg__le,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__eq,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__ne,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__cs,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__cc,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__mi,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__pl,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__vs,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__vc,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__hi,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__ls,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__ge,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__lt,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__gt,
++	arm_instr_store_w0_signed_byte_u1_p1_reg__le,
++	arm_instr_store_w0_signed_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__eq,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__ne,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__cs,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__cc,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__mi,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__pl,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__vs,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__vc,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__hi,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__ls,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__ge,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__lt,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__gt,
++	arm_instr_load_w0_signed_byte_u1_p1_reg__le,
++	arm_instr_load_w0_signed_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__eq,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__ne,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__cs,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__cc,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__mi,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__pl,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__vs,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__vc,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__hi,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__ls,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__ge,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__lt,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__gt,
++	arm_instr_store_w1_signed_byte_u1_p1_reg__le,
++	arm_instr_store_w1_signed_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__eq,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__ne,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__cs,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__cc,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__mi,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__pl,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__vs,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__vc,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__hi,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__ls,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__ge,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__lt,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__gt,
++	arm_instr_load_w1_signed_byte_u1_p1_reg__le,
++	arm_instr_load_w1_signed_byte_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__eq,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__ne,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__cs,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__cc,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__mi,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__pl,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__vs,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__vc,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__hi,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__ls,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__ge,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__lt,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__gt,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg__le,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__eq,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__ne,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__cs,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__cc,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__mi,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__pl,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__vs,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__vc,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__hi,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__ls,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__ge,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__lt,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__gt,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg__le,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__eq,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__ne,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__cs,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__cc,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__mi,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__pl,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__vs,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__vc,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__hi,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__ls,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__ge,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__lt,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__gt,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg__le,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__eq,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__ne,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__cs,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__cc,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__mi,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__pl,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__vs,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__vc,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__hi,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__ls,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__ge,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__lt,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__gt,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg__le,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg,
++	arm_instr_nop
++};
++
++
++	void (*arm_load_store_instr_3_pc[2048])(struct cpu *,
++		struct arm_instr_call *) = {
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le,
++	arm_instr_store_w0_signed_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le,
++	arm_instr_load_w0_signed_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__eq,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ne,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cs,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cc,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__mi,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__pl,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vs,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vc,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__hi,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ls,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ge,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__lt,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__gt,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__le,
++	arm_instr_store_w1_signed_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__eq,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ne,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cs,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cc,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__mi,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__pl,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vs,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vc,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__hi,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ls,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ge,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__lt,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__gt,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__le,
++	arm_instr_load_w1_signed_byte_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le,
++	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le,
++	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__eq,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ne,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cs,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cc,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__mi,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__pl,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vs,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vc,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__hi,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ls,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ge,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__lt,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__gt,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__le,
++	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__eq,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ne,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cs,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cc,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__mi,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__pl,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vs,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vc,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__hi,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ls,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ge,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__lt,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__gt,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__le,
++	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le,
++	arm_instr_store_w0_signed_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le,
++	arm_instr_load_w0_signed_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__eq,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ne,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cs,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cc,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__mi,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__pl,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vs,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vc,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__hi,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ls,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ge,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__lt,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__gt,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__le,
++	arm_instr_store_w1_signed_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__eq,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ne,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cs,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cc,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__mi,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__pl,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vs,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vc,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__hi,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ls,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ge,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__lt,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__gt,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__le,
++	arm_instr_load_w1_signed_byte_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le,
++	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le,
++	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__eq,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ne,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cs,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cc,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__mi,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__pl,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vs,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vc,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__hi,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ls,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ge,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__lt,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__gt,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__le,
++	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__eq,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ne,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cs,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cc,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__mi,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__pl,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vs,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vc,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__hi,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ls,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ge,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__lt,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__gt,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__le,
++	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__eq,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ne,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cs,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cc,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__mi,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__pl,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vs,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vc,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__hi,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ls,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ge,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__lt,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__gt,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__le,
++	arm_instr_store_w0_signed_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__eq,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ne,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cs,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cc,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__mi,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__pl,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vs,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vc,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__hi,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ls,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ge,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__lt,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__gt,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__le,
++	arm_instr_load_w0_signed_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le,
++	arm_instr_store_w1_signed_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le,
++	arm_instr_load_w1_signed_byte_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__eq,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ne,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cs,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cc,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__mi,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__pl,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vs,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vc,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__hi,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ls,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ge,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__lt,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__gt,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__le,
++	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__eq,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ne,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cs,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cc,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__mi,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__pl,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vs,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vc,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__hi,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ls,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ge,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__lt,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__gt,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__le,
++	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le,
++	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le,
++	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__eq,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ne,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cs,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cc,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__mi,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__pl,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vs,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vc,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__hi,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ls,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ge,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__lt,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__gt,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__le,
++	arm_instr_store_w0_signed_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__eq,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ne,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cs,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cc,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__mi,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__pl,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vs,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vc,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__hi,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ls,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ge,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__lt,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__gt,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__le,
++	arm_instr_load_w0_signed_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le,
++	arm_instr_store_w1_signed_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le,
++	arm_instr_load_w1_signed_byte_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__eq,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ne,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cs,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cc,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__mi,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__pl,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vs,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vc,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__hi,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ls,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ge,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__lt,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__gt,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__le,
++	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__eq,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ne,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cs,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cc,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__mi,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__pl,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vs,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vc,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__hi,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ls,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ge,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__lt,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__gt,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__le,
++	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le,
++	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le,
++	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le,
++	arm_instr_store_w0_signed_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le,
++	arm_instr_load_w0_signed_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__eq,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ne,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cs,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cc,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__mi,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__pl,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vs,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vc,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__hi,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ls,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ge,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__lt,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__gt,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__le,
++	arm_instr_store_w1_signed_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__eq,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ne,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cs,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cc,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__mi,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__pl,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vs,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vc,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__hi,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ls,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ge,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__lt,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__gt,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__le,
++	arm_instr_load_w1_signed_byte_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le,
++	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le,
++	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__eq,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ne,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cs,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cc,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__mi,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__pl,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vs,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vc,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__hi,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ls,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ge,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__lt,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__gt,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__le,
++	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__eq,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ne,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cs,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cc,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__mi,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__pl,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vs,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vc,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__hi,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ls,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ge,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__lt,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__gt,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__le,
++	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le,
++	arm_instr_store_w0_signed_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le,
++	arm_instr_load_w0_signed_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__eq,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ne,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cs,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cc,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__mi,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__pl,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vs,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vc,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__hi,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ls,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ge,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__lt,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__gt,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__le,
++	arm_instr_store_w1_signed_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__eq,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ne,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cs,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cc,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__mi,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__pl,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vs,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vc,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__hi,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ls,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ge,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__lt,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__gt,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__le,
++	arm_instr_load_w1_signed_byte_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le,
++	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le,
++	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__eq,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ne,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cs,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cc,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__mi,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__pl,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vs,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vc,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__hi,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ls,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ge,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__lt,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__gt,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__le,
++	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__eq,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ne,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cs,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cc,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__mi,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__pl,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vs,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vc,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__hi,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ls,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ge,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__lt,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__gt,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__le,
++	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__eq,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ne,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cs,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cc,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__mi,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__pl,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vs,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vc,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__hi,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ls,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ge,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__lt,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__gt,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__le,
++	arm_instr_store_w0_signed_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__eq,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ne,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cs,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cc,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__mi,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__pl,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vs,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vc,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__hi,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ls,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ge,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__lt,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__gt,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__le,
++	arm_instr_load_w0_signed_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le,
++	arm_instr_store_w1_signed_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le,
++	arm_instr_load_w1_signed_byte_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__eq,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ne,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cs,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cc,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__mi,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__pl,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vs,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vc,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__hi,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ls,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ge,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__lt,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__gt,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__le,
++	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__eq,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ne,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cs,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cc,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__mi,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__pl,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vs,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vc,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__hi,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ls,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ge,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__lt,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__gt,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__le,
++	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le,
++	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le,
++	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__eq,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ne,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cs,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cc,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__mi,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__pl,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vs,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vc,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__hi,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ls,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ge,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__lt,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__gt,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__le,
++	arm_instr_store_w0_signed_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__eq,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ne,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cs,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cc,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__mi,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__pl,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vs,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vc,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__hi,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ls,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ge,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__lt,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__gt,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__le,
++	arm_instr_load_w0_signed_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_invalid,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le,
++	arm_instr_store_w1_signed_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le,
++	arm_instr_load_w1_signed_byte_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__eq,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ne,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__mi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__pl,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vs,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vc,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__hi,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ls,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ge,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__lt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__gt,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__le,
++	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__eq,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ne,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__mi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__pl,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vs,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vc,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__hi,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ls,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ge,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__lt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__gt,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__le,
++	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__eq,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ne,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cs,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cc,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__mi,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__pl,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vs,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vc,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__hi,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ls,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ge,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__lt,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__gt,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__le,
++	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__eq,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ne,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cs,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cc,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__mi,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__pl,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vs,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vc,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__hi,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ls,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ge,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__lt,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__gt,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__le,
++	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le,
++	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le,
++	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le,
++	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc,
++	arm_instr_nop,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le,
++	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc,
++	arm_instr_nop
++};
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w0.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w0.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w0.c	2022-10-18 16:37:22.078740600 +0000
+@@ -0,0 +1,1364 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w0_word_u0_p0_imm__general
++#define A__NAME arm_instr_store_w0_word_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w0_word_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_word_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_word_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_word_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_word_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_word_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_word_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_word_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_word_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_word_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_word_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_word_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_word_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_word_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_word_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u0_p0_imm_pc__le
++#include "cpu_arm_instr_loadstore.c"
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u0_p0_imm__general
++#define A__NAME arm_instr_load_w0_word_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w0_word_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_word_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_word_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_word_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_word_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_word_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_word_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_word_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_word_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_word_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_word_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_word_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_word_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_word_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_word_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u0_p0_imm_pc__le
++#define A__L
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u0_p0_imm__general
++#define A__NAME arm_instr_store_w0_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w0_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p0_imm_pc__le
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u0_p0_imm__general
++#define A__NAME arm_instr_load_w0_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w0_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p0_imm_pc__le
++#define A__L
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_word_u0_p0_reg__general
++#define A__NAME arm_instr_store_w0_word_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w0_word_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_word_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_word_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_word_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_word_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_word_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_word_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_word_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_word_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_word_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_word_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_word_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_word_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_word_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_word_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u0_p0_reg_pc__le
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u0_p0_reg__general
++#define A__NAME arm_instr_load_w0_word_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w0_word_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_word_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_word_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_word_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_word_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_word_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_word_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_word_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_word_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_word_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_word_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_word_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_word_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_word_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_word_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u0_p0_reg_pc__le
++#define A__L
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u0_p0_reg__general
++#define A__NAME arm_instr_store_w0_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w0_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p0_reg_pc__le
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u0_p0_reg__general
++#define A__NAME arm_instr_load_w0_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w0_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p0_reg_pc__le
++#define A__L
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p0_imm__general
++#define A__NAME arm_instr_store_w0_signed_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p0_imm__general
++#define A__NAME arm_instr_load_w0_signed_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le
++#define A__L
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p0_reg__general
++#define A__NAME arm_instr_store_w0_signed_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p0_reg__general
++#define A__NAME arm_instr_load_w0_signed_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le
++#define A__L
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w1.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w1.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w1.c	2022-10-18 16:37:22.079740900 +0000
+@@ -0,0 +1,1404 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w1_word_u0_p0_imm__general
++#define A__NAME arm_instr_store_w1_word_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w1_word_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_word_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_word_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_word_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_word_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_word_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_word_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_word_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_word_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_word_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_word_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_word_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_word_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_word_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_word_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u0_p0_imm_pc__le
++#define A__W
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u0_p0_imm__general
++#define A__NAME arm_instr_load_w1_word_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w1_word_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_word_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_word_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_word_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_word_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_word_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_word_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_word_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_word_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_word_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_word_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_word_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_word_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_word_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_word_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u0_p0_imm_pc__le
++#define A__L
++#define A__W
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u0_p0_imm__general
++#define A__NAME arm_instr_store_w1_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w1_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p0_imm_pc__le
++#define A__W
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u0_p0_imm__general
++#define A__NAME arm_instr_load_w1_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w1_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p0_imm_pc__le
++#define A__L
++#define A__W
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_word_u0_p0_reg__general
++#define A__NAME arm_instr_store_w1_word_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w1_word_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_word_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_word_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_word_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_word_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_word_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_word_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_word_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_word_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_word_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_word_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_word_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_word_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_word_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_word_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u0_p0_reg_pc__le
++#define A__W
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u0_p0_reg__general
++#define A__NAME arm_instr_load_w1_word_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w1_word_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_word_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_word_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_word_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_word_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_word_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_word_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_word_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_word_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_word_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_word_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_word_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_word_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_word_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_word_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u0_p0_reg_pc__le
++#define A__L
++#define A__W
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u0_p0_reg__general
++#define A__NAME arm_instr_store_w1_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w1_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p0_reg_pc__le
++#define A__W
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u0_p0_reg__general
++#define A__NAME arm_instr_load_w1_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w1_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p0_reg_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p0_imm__general
++#define A__NAME arm_instr_store_w1_signed_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p0_imm__general
++#define A__NAME arm_instr_load_w1_signed_byte_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__le
++#define A__W
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__le
++#define A__L
++#define A__W
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p0_imm__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u0_p0_imm
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p0_reg__general
++#define A__NAME arm_instr_store_w1_signed_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p0_reg__general
++#define A__NAME arm_instr_load_w1_signed_byte_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__le
++#define A__W
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p0_reg__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u0_p0_reg
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w0.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w0.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w0.c	2022-10-18 16:37:22.080741800 +0000
+@@ -0,0 +1,1404 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w0_word_u1_p0_imm__general
++#define A__NAME arm_instr_store_w0_word_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w0_word_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_word_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_word_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_word_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_word_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_word_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_word_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_word_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_word_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_word_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_word_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_word_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_word_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_word_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_word_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u1_p0_imm_pc__le
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u1_p0_imm__general
++#define A__NAME arm_instr_load_w0_word_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w0_word_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_word_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_word_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_word_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_word_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_word_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_word_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_word_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_word_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_word_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_word_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_word_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_word_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_word_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_word_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u1_p0_imm_pc__le
++#define A__L
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u1_p0_imm__general
++#define A__NAME arm_instr_store_w0_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w0_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p0_imm_pc__le
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u1_p0_imm__general
++#define A__NAME arm_instr_load_w0_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w0_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p0_imm_pc__le
++#define A__L
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_word_u1_p0_reg__general
++#define A__NAME arm_instr_store_w0_word_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w0_word_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_word_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_word_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_word_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_word_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_word_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_word_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_word_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_word_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_word_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_word_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_word_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_word_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_word_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_word_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u1_p0_reg_pc__le
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u1_p0_reg__general
++#define A__NAME arm_instr_load_w0_word_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w0_word_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_word_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_word_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_word_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_word_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_word_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_word_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_word_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_word_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_word_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_word_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_word_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_word_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_word_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_word_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u1_p0_reg_pc__le
++#define A__L
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u1_p0_reg__general
++#define A__NAME arm_instr_store_w0_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w0_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p0_reg_pc__le
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u1_p0_reg__general
++#define A__NAME arm_instr_load_w0_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w0_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p0_reg_pc__le
++#define A__L
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p0_imm__general
++#define A__NAME arm_instr_store_w0_signed_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p0_imm__general
++#define A__NAME arm_instr_load_w0_signed_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le
++#define A__L
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p0_reg__general
++#define A__NAME arm_instr_store_w0_signed_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p0_reg__general
++#define A__NAME arm_instr_load_w0_signed_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le
++#define A__L
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w1.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w1.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w1.c	2022-10-18 16:37:22.080741800 +0000
+@@ -0,0 +1,1444 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w1_word_u1_p0_imm__general
++#define A__NAME arm_instr_store_w1_word_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w1_word_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_word_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_word_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_word_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_word_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_word_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_word_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_word_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_word_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_word_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_word_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_word_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_word_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_word_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_word_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u1_p0_imm_pc__le
++#define A__W
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u1_p0_imm__general
++#define A__NAME arm_instr_load_w1_word_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w1_word_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_word_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_word_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_word_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_word_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_word_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_word_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_word_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_word_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_word_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_word_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_word_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_word_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_word_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_word_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u1_p0_imm_pc__le
++#define A__L
++#define A__W
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u1_p0_imm__general
++#define A__NAME arm_instr_store_w1_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w1_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p0_imm_pc__le
++#define A__W
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u1_p0_imm__general
++#define A__NAME arm_instr_load_w1_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w1_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p0_imm_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_word_u1_p0_reg__general
++#define A__NAME arm_instr_store_w1_word_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w1_word_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_word_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_word_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_word_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_word_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_word_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_word_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_word_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_word_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_word_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_word_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_word_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_word_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_word_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_word_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u1_p0_reg_pc__le
++#define A__W
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u1_p0_reg__general
++#define A__NAME arm_instr_load_w1_word_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w1_word_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_word_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_word_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_word_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_word_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_word_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_word_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_word_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_word_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_word_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_word_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_word_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_word_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_word_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_word_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u1_p0_reg_pc__le
++#define A__L
++#define A__W
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u1_p0_reg__general
++#define A__NAME arm_instr_store_w1_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w1_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p0_reg_pc__le
++#define A__W
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u1_p0_reg__general
++#define A__NAME arm_instr_load_w1_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w1_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p0_reg_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p0_imm__general
++#define A__NAME arm_instr_store_w1_signed_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p0_imm__general
++#define A__NAME arm_instr_load_w1_signed_byte_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__le
++#define A__W
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p0_imm__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u1_p0_imm
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p0_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p0_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p0_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p0_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p0_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p0_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p0_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p0_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p0_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p0_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p0_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p0_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p0_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p0_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p0_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p0_reg__general
++#define A__NAME arm_instr_store_w1_signed_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p0_reg__general
++#define A__NAME arm_instr_load_w1_signed_byte_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__le
++#define A__W
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p0_reg__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u1_p0_reg
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p0_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p0_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p0_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p0_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p0_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p0_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p0_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p0_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p0_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p0_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p0_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p0_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p0_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p0_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p0_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w0.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w0.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w0.c	2022-10-18 16:37:22.081742900 +0000
+@@ -0,0 +1,1404 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w0_word_u0_p1_imm__general
++#define A__NAME arm_instr_store_w0_word_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w0_word_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_word_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_word_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_word_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_word_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_word_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_word_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_word_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_word_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_word_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_word_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_word_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_word_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_word_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_word_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u0_p1_imm_pc__le
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u0_p1_imm__general
++#define A__NAME arm_instr_load_w0_word_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w0_word_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_word_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_word_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_word_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_word_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_word_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_word_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_word_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_word_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_word_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_word_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_word_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_word_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_word_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_word_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u0_p1_imm_pc__le
++#define A__L
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u0_p1_imm__general
++#define A__NAME arm_instr_store_w0_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w0_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p1_imm_pc__le
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u0_p1_imm__general
++#define A__NAME arm_instr_load_w0_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w0_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p1_imm_pc__le
++#define A__L
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_word_u0_p1_reg__general
++#define A__NAME arm_instr_store_w0_word_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w0_word_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_word_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_word_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_word_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_word_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_word_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_word_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_word_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_word_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_word_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_word_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_word_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_word_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_word_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_word_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u0_p1_reg_pc__le
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u0_p1_reg__general
++#define A__NAME arm_instr_load_w0_word_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w0_word_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_word_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_word_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_word_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_word_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_word_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_word_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_word_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_word_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_word_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_word_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_word_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_word_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_word_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_word_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u0_p1_reg_pc__le
++#define A__L
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u0_p1_reg__general
++#define A__NAME arm_instr_store_w0_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w0_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p1_reg_pc__le
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u0_p1_reg__general
++#define A__NAME arm_instr_load_w0_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w0_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p1_reg_pc__le
++#define A__L
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p1_imm__general
++#define A__NAME arm_instr_store_w0_signed_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p1_imm__general
++#define A__NAME arm_instr_load_w0_signed_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__le
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__le
++#define A__L
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p1_reg__general
++#define A__NAME arm_instr_store_w0_signed_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p1_reg__general
++#define A__NAME arm_instr_load_w0_signed_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__le
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__le
++#define A__L
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w1.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w1.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w1.c	2022-10-18 16:37:22.082743600 +0000
+@@ -0,0 +1,1444 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w1_word_u0_p1_imm__general
++#define A__NAME arm_instr_store_w1_word_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w1_word_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_word_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_word_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_word_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_word_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_word_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_word_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_word_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_word_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_word_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_word_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_word_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_word_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_word_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_word_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u0_p1_imm_pc__le
++#define A__W
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u0_p1_imm__general
++#define A__NAME arm_instr_load_w1_word_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w1_word_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_word_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_word_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_word_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_word_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_word_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_word_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_word_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_word_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_word_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_word_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_word_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_word_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_word_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_word_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u0_p1_imm_pc__le
++#define A__L
++#define A__W
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u0_p1_imm__general
++#define A__NAME arm_instr_store_w1_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w1_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p1_imm_pc__le
++#define A__W
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u0_p1_imm__general
++#define A__NAME arm_instr_load_w1_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w1_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p1_imm_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_word_u0_p1_reg__general
++#define A__NAME arm_instr_store_w1_word_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w1_word_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_word_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_word_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_word_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_word_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_word_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_word_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_word_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_word_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_word_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_word_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_word_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_word_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_word_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_word_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u0_p1_reg_pc__le
++#define A__W
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u0_p1_reg__general
++#define A__NAME arm_instr_load_w1_word_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w1_word_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_word_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_word_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_word_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_word_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_word_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_word_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_word_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_word_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_word_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_word_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_word_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_word_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_word_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_word_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u0_p1_reg_pc__le
++#define A__L
++#define A__W
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u0_p1_reg__general
++#define A__NAME arm_instr_store_w1_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w1_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p1_reg_pc__le
++#define A__W
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u0_p1_reg__general
++#define A__NAME arm_instr_load_w1_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w1_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p1_reg_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p1_imm__general
++#define A__NAME arm_instr_store_w1_signed_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p1_imm__general
++#define A__NAME arm_instr_load_w1_signed_byte_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le
++#define A__W
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p1_imm__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u0_p1_imm
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p1_reg__general
++#define A__NAME arm_instr_store_w1_signed_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p1_reg__general
++#define A__NAME arm_instr_load_w1_signed_byte_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le
++#define A__W
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p1_reg__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u0_p1_reg
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w0.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w0.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w0.c	2022-10-18 16:37:22.082743600 +0000
+@@ -0,0 +1,1444 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w0_word_u1_p1_imm__general
++#define A__NAME arm_instr_store_w0_word_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w0_word_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_word_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_word_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_word_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_word_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_word_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_word_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_word_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_word_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_word_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_word_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_word_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_word_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_word_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_word_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u1_p1_imm_pc__le
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u1_p1_imm__general
++#define A__NAME arm_instr_load_w0_word_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w0_word_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_word_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_word_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_word_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_word_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_word_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_word_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_word_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_word_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_word_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_word_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_word_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_word_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_word_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_word_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u1_p1_imm_pc__le
++#define A__L
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u1_p1_imm__general
++#define A__NAME arm_instr_store_w0_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w0_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p1_imm_pc__le
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u1_p1_imm__general
++#define A__NAME arm_instr_load_w0_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w0_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p1_imm_pc__le
++#define A__L
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_word_u1_p1_reg__general
++#define A__NAME arm_instr_store_w0_word_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w0_word_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_word_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_word_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_word_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_word_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_word_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_word_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_word_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_word_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_word_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_word_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_word_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_word_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_word_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_word_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_word_u1_p1_reg_pc__le
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_word_u1_p1_reg__general
++#define A__NAME arm_instr_load_w0_word_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w0_word_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_word_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_word_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_word_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_word_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_word_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_word_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_word_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_word_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_word_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_word_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_word_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_word_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_word_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_word_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_word_u1_p1_reg_pc__le
++#define A__L
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_byte_u1_p1_reg__general
++#define A__NAME arm_instr_store_w0_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w0_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p1_reg_pc__le
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_byte_u1_p1_reg__general
++#define A__NAME arm_instr_load_w0_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w0_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p1_reg_pc__le
++#define A__L
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p1_imm__general
++#define A__NAME arm_instr_store_w0_signed_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p1_imm__general
++#define A__NAME arm_instr_load_w0_signed_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__le
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__le
++#define A__L
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p1_reg__general
++#define A__NAME arm_instr_store_w0_signed_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p1_reg__general
++#define A__NAME arm_instr_load_w0_signed_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__le
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__le
++#define A__L
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_store_w0_signed_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_load_w0_signed_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w1.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w1.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w1.c	2022-10-18 16:37:22.083744800 +0000
+@@ -0,0 +1,1484 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "machine.h"
++#include "memory.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#define reg(x) (*((uint32_t *)(x)))
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
++extern void arm_pc_to_pointers(struct cpu *);
++#define A__NAME__general arm_instr_store_w1_word_u1_p1_imm__general
++#define A__NAME arm_instr_store_w1_word_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w1_word_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_word_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_word_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_word_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_word_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_word_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_word_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_word_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_word_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_word_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_word_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_word_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_word_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_word_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_word_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_imm_pc__le
++#define A__W
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u1_p1_imm__general
++#define A__NAME arm_instr_load_w1_word_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w1_word_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_word_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_word_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_word_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_word_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_word_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_word_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_word_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_word_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_word_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_word_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_word_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_word_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_word_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_word_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_imm_pc__le
++#define A__L
++#define A__W
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u1_p1_imm__general
++#define A__NAME arm_instr_store_w1_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w1_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_imm_pc__le
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u1_p1_imm__general
++#define A__NAME arm_instr_load_w1_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w1_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_imm_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_word_u1_p1_reg__general
++#define A__NAME arm_instr_store_w1_word_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w1_word_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_word_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_word_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_word_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_word_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_word_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_word_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_word_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_word_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_word_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_word_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_word_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_word_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_word_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_word_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_reg_pc__le
++#define A__W
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_word_u1_p1_reg__general
++#define A__NAME arm_instr_load_w1_word_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w1_word_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_word_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_word_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_word_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_word_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_word_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_word_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_word_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_word_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_word_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_word_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_word_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_word_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_word_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_word_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_reg_pc__le
++#define A__L
++#define A__W
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_byte_u1_p1_reg__general
++#define A__NAME arm_instr_store_w1_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w1_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_reg_pc__le
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_byte_u1_p1_reg__general
++#define A__NAME arm_instr_load_w1_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w1_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_reg_pc__le
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_imm__general
++#define A__NAME arm_instr_store_w1_signed_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_imm__general
++#define A__NAME arm_instr_load_w1_signed_byte_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_imm__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_imm
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_imm__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_imm__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_imm__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_imm__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_imm__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_imm__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_imm__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_imm__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_imm__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_imm__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_imm__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_imm__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_imm__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_imm__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_imm_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_reg__general
++#define A__NAME arm_instr_store_w1_signed_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_reg__general
++#define A__NAME arm_instr_load_w1_signed_byte_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__B
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__B
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
++#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_reg__general
++#define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_reg
++#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_reg__eq
++#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_reg__ne
++#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_reg__cs
++#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_reg__cc
++#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_reg__mi
++#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_reg__pl
++#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_reg__vs
++#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_reg__vc
++#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_reg__hi
++#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_reg__ls
++#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_reg__ge
++#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_reg__lt
++#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_reg__gt
++#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_reg__le
++#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_reg_pc
++#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq
++#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne
++#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs
++#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc
++#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi
++#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl
++#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs
++#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc
++#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi
++#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls
++#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge
++#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt
++#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt
++#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le
++#define A__SIGNED
++#define A__L
++#define A__W
++#define A__H
++#define A__U
++#define A__P
++#define A__REG
++#include "cpu_arm_instr_loadstore.c"
++#undef A__SIGNED
++#undef A__L
++#undef A__W
++#undef A__H
++#undef A__U
++#undef A__P
++#undef A__REG
++#undef A__NAME__eq
++#undef A__NAME__ne
++#undef A__NAME__cs
++#undef A__NAME__cc
++#undef A__NAME__mi
++#undef A__NAME__pl
++#undef A__NAME__vs
++#undef A__NAME__vc
++#undef A__NAME__hi
++#undef A__NAME__ls
++#undef A__NAME__ge
++#undef A__NAME__lt
++#undef A__NAME__gt
++#undef A__NAME__le
++#undef A__NAME_PC__eq
++#undef A__NAME_PC__ne
++#undef A__NAME_PC__cs
++#undef A__NAME_PC__cc
++#undef A__NAME_PC__mi
++#undef A__NAME_PC__pl
++#undef A__NAME_PC__vs
++#undef A__NAME_PC__vc
++#undef A__NAME_PC__hi
++#undef A__NAME_PC__ls
++#undef A__NAME_PC__ge
++#undef A__NAME_PC__lt
++#undef A__NAME_PC__gt
++#undef A__NAME_PC__le
++#undef A__NAME__general
++#undef A__NAME_PC
++#undef A__NAME
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_multi.c gxemul-0.7.0/src/cpus/tmp_arm_multi.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_multi.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_multi.c	2022-10-18 16:37:22.084745600 +0000
+@@ -0,0 +1,9575 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#include "quick_pc_to_pointers.h"
++#include "arm_tmphead_1.h"
++
++#define instr(x) arm_instr_ ## x
++extern void arm_pc_to_pointers(struct cpu *);
++extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_bdt_load(struct cpu *, struct arm_instr_call *);
++extern void arm_instr_bdt_store(struct cpu *, struct arm_instr_call *);
++
++
++
++void arm_instr_multi_0x092ddff0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x28 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-10] = cpu->cd.arm.r[4];
++		p[-9] = cpu->cd.arm.r[5];
++		p[-8] = cpu->cd.arm.r[6];
++		p[-7] = cpu->cd.arm.r[7];
++		p[-6] = cpu->cd.arm.r[8];
++		p[-5] = cpu->cd.arm.r[9];
++		p[-4] = cpu->cd.arm.r[10];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 44;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092ddff0)
++
++void arm_instr_multi_0x091baff0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x24 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-9];
++		cpu->cd.arm.r[5] = p[-8];
++		cpu->cd.arm.r[6] = p[-7];
++		cpu->cd.arm.r[7] = p[-6];
++		cpu->cd.arm.r[8] = p[-5];
++		cpu->cd.arm.r[9] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091baff0)
++
++void arm_instr_multi_0x08110003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[-1];
++		cpu->cd.arm.r[1] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08110003)
++
++void arm_instr_multi_0x092dd8f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-7] = cpu->cd.arm.r[4];
++		p[-6] = cpu->cd.arm.r[5];
++		p[-5] = cpu->cd.arm.r[6];
++		p[-4] = cpu->cd.arm.r[7];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 32;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dd8f0)
++
++void arm_instr_multi_0x091ba8f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-6];
++		cpu->cd.arm.r[5] = p[-5];
++		cpu->cd.arm.r[6] = p[-4];
++		cpu->cd.arm.r[7] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091ba8f0)
++
++void arm_instr_multi_0x092d4000(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 4;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d4000)
++
++void arm_instr_multi_0x08bd8000(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->pc = p[0];
++		cpu->cd.arm.r[13] += 4;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd8000)
++
++void arm_instr_multi_0x08ac000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[2];
++		p[1] = cpu->cd.arm.r[3];
++		cpu->cd.arm.r[12] += 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08ac000c)
++
++void arm_instr_multi_0x092dd830(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x14 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-5] = cpu->cd.arm.r[4];
++		p[-4] = cpu->cd.arm.r[5];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 24;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dd830)
++
++void arm_instr_multi_0x092dddf0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x24 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-9] = cpu->cd.arm.r[4];
++		p[-8] = cpu->cd.arm.r[5];
++		p[-7] = cpu->cd.arm.r[6];
++		p[-6] = cpu->cd.arm.r[7];
++		p[-5] = cpu->cd.arm.r[8];
++		p[-4] = cpu->cd.arm.r[10];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 40;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dddf0)
++
++void arm_instr_multi_0x092dd9f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x20 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-8] = cpu->cd.arm.r[4];
++		p[-7] = cpu->cd.arm.r[5];
++		p[-6] = cpu->cd.arm.r[6];
++		p[-5] = cpu->cd.arm.r[7];
++		p[-4] = cpu->cd.arm.r[8];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 36;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dd9f0)
++
++void arm_instr_multi_0x091badf0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x20 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-8];
++		cpu->cd.arm.r[5] = p[-7];
++		cpu->cd.arm.r[6] = p[-6];
++		cpu->cd.arm.r[7] = p[-5];
++		cpu->cd.arm.r[8] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091badf0)
++
++void arm_instr_multi_0x091ba830(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x10 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-4];
++		cpu->cd.arm.r[5] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091ba830)
++
++void arm_instr_multi_0x091ba9f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-7];
++		cpu->cd.arm.r[5] = p[-6];
++		cpu->cd.arm.r[6] = p[-5];
++		cpu->cd.arm.r[7] = p[-4];
++		cpu->cd.arm.r[8] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091ba9f0)
++
++void arm_instr_multi_0x08930003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08930003)
++
++void arm_instr_multi_0x09040003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[0];
++		p[0] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09040003)
++
++void arm_instr_multi_0x08b051f8(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++		cpu->cd.arm.r[5] = p[2];
++		cpu->cd.arm.r[6] = p[3];
++		cpu->cd.arm.r[7] = p[4];
++		cpu->cd.arm.r[8] = p[5];
++		cpu->cd.arm.r[12] = p[6];
++		cpu->cd.arm.r[14] = p[7];
++		cpu->cd.arm.r[0] += 32;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b051f8)
++
++void arm_instr_multi_0x08a151f8(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++		p[2] = cpu->cd.arm.r[5];
++		p[3] = cpu->cd.arm.r[6];
++		p[4] = cpu->cd.arm.r[7];
++		p[5] = cpu->cd.arm.r[8];
++		p[6] = cpu->cd.arm.r[12];
++		p[7] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[1] += 32;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a151f8)
++
++void arm_instr_multi_0x092dd810(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x10 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-4] = cpu->cd.arm.r[4];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 20;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dd810)
++
++void arm_instr_multi_0x091ba810(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091ba810)
++
++void arm_instr_multi_0x08930006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08930006)
++
++void arm_instr_multi_0x092d4010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[4];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d4010)
++
++void arm_instr_multi_0x092dd800(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dd800)
++
++void arm_instr_multi_0x08830006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08830006)
++
++void arm_instr_multi_0x08920018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08920018)
++
++void arm_instr_multi_0x08a051f8(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++		p[2] = cpu->cd.arm.r[5];
++		p[3] = cpu->cd.arm.r[6];
++		p[4] = cpu->cd.arm.r[7];
++		p[5] = cpu->cd.arm.r[8];
++		p[6] = cpu->cd.arm.r[12];
++		p[7] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[0] += 32;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a051f8)
++
++void arm_instr_multi_0x08820018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08820018)
++
++void arm_instr_multi_0x08bd8010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->pc = p[1];
++		cpu->cd.arm.r[13] += 8;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd8010)
++
++void arm_instr_multi_0x08a05018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++		p[2] = cpu->cd.arm.r[12];
++		p[3] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[0] += 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a05018)
++
++void arm_instr_multi_0x08b15018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++		cpu->cd.arm.r[12] = p[2];
++		cpu->cd.arm.r[14] = p[3];
++		cpu->cd.arm.r[1] += 16;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b15018)
++
++void arm_instr_multi_0x092dd870(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-6] = cpu->cd.arm.r[4];
++		p[-5] = cpu->cd.arm.r[5];
++		p[-4] = cpu->cd.arm.r[6];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 28;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092dd870)
++
++void arm_instr_multi_0x091ba870(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x14 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-5];
++		cpu->cd.arm.r[5] = p[-4];
++		cpu->cd.arm.r[6] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091ba870)
++
++void arm_instr_multi_0x092d41f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x14 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-5] = cpu->cd.arm.r[4];
++		p[-4] = cpu->cd.arm.r[5];
++		p[-3] = cpu->cd.arm.r[6];
++		p[-2] = cpu->cd.arm.r[7];
++		p[-1] = cpu->cd.arm.r[8];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 24;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d41f0)
++
++void arm_instr_multi_0x08bd81f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[8] = p[4];
++		cpu->pc = p[5];
++		cpu->cd.arm.r[13] += 24;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd81f0)
++
++void arm_instr_multi_0x08971040(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[6] = p[0];
++		cpu->cd.arm.r[12] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08971040)
++
++void arm_instr_multi_0x08040006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[1];
++		p[0] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08040006)
++
++void arm_instr_multi_0x08130018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-1];
++		cpu->cd.arm.r[4] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08130018)
++
++void arm_instr_multi_0x091ba800(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091ba800)
++
++void arm_instr_multi_0x088d1fff(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfcc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++		p[2] = cpu->cd.arm.r[2];
++		p[3] = cpu->cd.arm.r[3];
++		p[4] = cpu->cd.arm.r[4];
++		p[5] = cpu->cd.arm.r[5];
++		p[6] = cpu->cd.arm.r[6];
++		p[7] = cpu->cd.arm.r[7];
++		p[8] = cpu->cd.arm.r[8];
++		p[9] = cpu->cd.arm.r[9];
++		p[10] = cpu->cd.arm.r[10];
++		p[11] = cpu->cd.arm.r[11];
++		p[12] = cpu->cd.arm.r[12];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d1fff)
++
++void arm_instr_multi_0x091b6800(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b6800)
++
++void arm_instr_multi_0x08950006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08950006)
++
++void arm_instr_multi_0x0911000f(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[-3];
++		cpu->cd.arm.r[1] = p[-2];
++		cpu->cd.arm.r[2] = p[-1];
++		cpu->cd.arm.r[3] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0911000f)
++
++void arm_instr_multi_0x090d000f(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-3] = cpu->cd.arm.r[0];
++		p[-2] = cpu->cd.arm.r[1];
++		p[-1] = cpu->cd.arm.r[2];
++		p[0] = cpu->cd.arm.r[3];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x090d000f)
++
++void arm_instr_multi_0x08850006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08850006)
++
++void arm_instr_multi_0x092d4070(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-3] = cpu->cd.arm.r[4];
++		p[-2] = cpu->cd.arm.r[5];
++		p[-1] = cpu->cd.arm.r[6];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d4070)
++
++void arm_instr_multi_0x08bd8070(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->pc = p[3];
++		cpu->cd.arm.r[13] += 16;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd8070)
++
++void arm_instr_multi_0x08900006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08900006)
++
++void arm_instr_multi_0x08800006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08800006)
++
++void arm_instr_multi_0x089e0018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089e0018)
++
++void arm_instr_multi_0x08870006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08870006)
++
++void arm_instr_multi_0x088e0018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088e0018)
++
++void arm_instr_multi_0x08b00fc0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[6] = p[0];
++		cpu->cd.arm.r[7] = p[1];
++		cpu->cd.arm.r[8] = p[2];
++		cpu->cd.arm.r[9] = p[3];
++		cpu->cd.arm.r[10] = p[4];
++		cpu->cd.arm.r[11] = p[5];
++		cpu->cd.arm.r[0] += 24;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b00fc0)
++
++void arm_instr_multi_0x08b000c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[6] = p[0];
++		cpu->cd.arm.r[7] = p[1];
++		cpu->cd.arm.r[0] += 8;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b000c0)
++
++void arm_instr_multi_0x08970006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08970006)
++
++void arm_instr_multi_0x08930060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[0];
++		cpu->cd.arm.r[6] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08930060)
++
++void arm_instr_multi_0x091b6ff0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x24 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-9];
++		cpu->cd.arm.r[5] = p[-8];
++		cpu->cd.arm.r[6] = p[-7];
++		cpu->cd.arm.r[7] = p[-6];
++		cpu->cd.arm.r[8] = p[-5];
++		cpu->cd.arm.r[9] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b6ff0)
++
++void arm_instr_multi_0x092d4030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-2] = cpu->cd.arm.r[4];
++		p[-1] = cpu->cd.arm.r[5];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 12;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d4030)
++
++void arm_instr_multi_0x08bd8030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->pc = p[2];
++		cpu->cd.arm.r[13] += 12;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd8030)
++
++void arm_instr_multi_0x091b6830(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x10 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-4];
++		cpu->cd.arm.r[5] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b6830)
++
++void arm_instr_multi_0x092ddc30(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-6] = cpu->cd.arm.r[4];
++		p[-5] = cpu->cd.arm.r[5];
++		p[-4] = cpu->cd.arm.r[10];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 28;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092ddc30)
++
++void arm_instr_multi_0x091bac30(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x14 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-5];
++		cpu->cd.arm.r[5] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091bac30)
++
++void arm_instr_multi_0x092d4001(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[0];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d4001)
++
++void arm_instr_multi_0x08bd8001(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->pc = p[1];
++		cpu->cd.arm.r[13] += 8;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd8001)
++
++void arm_instr_multi_0x09205018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-3] = cpu->cd.arm.r[3];
++		p[-2] = cpu->cd.arm.r[4];
++		p[-1] = cpu->cd.arm.r[12];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[0] -= 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09205018)
++
++void arm_instr_multi_0x09315018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-3];
++		cpu->cd.arm.r[4] = p[-2];
++		cpu->cd.arm.r[12] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++		cpu->cd.arm.r[1] -= 16;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09315018)
++
++void arm_instr_multi_0x092ddbf0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x24 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-9] = cpu->cd.arm.r[4];
++		p[-8] = cpu->cd.arm.r[5];
++		p[-7] = cpu->cd.arm.r[6];
++		p[-6] = cpu->cd.arm.r[7];
++		p[-5] = cpu->cd.arm.r[8];
++		p[-4] = cpu->cd.arm.r[9];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 40;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092ddbf0)
++
++void arm_instr_multi_0x091babf0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x20 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-8];
++		cpu->cd.arm.r[5] = p[-7];
++		cpu->cd.arm.r[6] = p[-6];
++		cpu->cd.arm.r[7] = p[-5];
++		cpu->cd.arm.r[8] = p[-4];
++		cpu->cd.arm.r[9] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091babf0)
++
++void arm_instr_multi_0x091bac70(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-6];
++		cpu->cd.arm.r[5] = p[-5];
++		cpu->cd.arm.r[6] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091bac70)
++
++void arm_instr_multi_0x092ddc70(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-7] = cpu->cd.arm.r[4];
++		p[-6] = cpu->cd.arm.r[5];
++		p[-5] = cpu->cd.arm.r[6];
++		p[-4] = cpu->cd.arm.r[10];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 32;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092ddc70)
++
++void arm_instr_multi_0x080c0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[4];
++		p[0] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x080c0030)
++
++void arm_instr_multi_0x092ddcf0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x20 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-8] = cpu->cd.arm.r[4];
++		p[-7] = cpu->cd.arm.r[5];
++		p[-6] = cpu->cd.arm.r[6];
++		p[-5] = cpu->cd.arm.r[7];
++		p[-4] = cpu->cd.arm.r[10];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 36;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092ddcf0)
++
++void arm_instr_multi_0x091bacf0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-7];
++		cpu->cd.arm.r[5] = p[-6];
++		cpu->cd.arm.r[6] = p[-5];
++		cpu->cd.arm.r[7] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091bacf0)
++
++void arm_instr_multi_0x0892000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0892000c)
++
++void arm_instr_multi_0x08930180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[7] = p[0];
++		cpu->cd.arm.r[8] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08930180)
++
++void arm_instr_multi_0x08150003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[-1];
++		cpu->cd.arm.r[1] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08150003)
++
++void arm_instr_multi_0x08020003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[0];
++		p[0] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08020003)
++
++void arm_instr_multi_0x08920006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08920006)
++
++void arm_instr_multi_0x0817000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[-1];
++		cpu->cd.arm.r[3] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0817000c)
++
++void arm_instr_multi_0x09870018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09870018)
++
++void arm_instr_multi_0x099c0180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[7] = p[0];
++		cpu->cd.arm.r[8] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x099c0180)
++
++void arm_instr_multi_0x091b69f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-7];
++		cpu->cd.arm.r[5] = p[-6];
++		cpu->cd.arm.r[6] = p[-5];
++		cpu->cd.arm.r[7] = p[-4];
++		cpu->cd.arm.r[8] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b69f0)
++
++void arm_instr_multi_0x08950003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08950003)
++
++void arm_instr_multi_0x088c0060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[5];
++		p[1] = cpu->cd.arm.r[6];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088c0060)
++
++void arm_instr_multi_0x0891000e(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++		cpu->cd.arm.r[3] = p[2];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0891000e)
++
++void arm_instr_multi_0x08bd0400(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[10] = p[0];
++		cpu->cd.arm.r[13] += 4;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd0400)
++
++void arm_instr_multi_0x092d0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[4];
++		p[0] = cpu->cd.arm.r[5];
++		cpu->cd.arm.r[13] -= 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d0030)
++
++void arm_instr_multi_0x08bd0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[13] += 8;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd0030)
++
++void arm_instr_multi_0x08810018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08810018)
++
++void arm_instr_multi_0x08880018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08880018)
++
++void arm_instr_multi_0x08820003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08820003)
++
++void arm_instr_multi_0x08980060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[0];
++		cpu->cd.arm.r[6] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08980060)
++
++void arm_instr_multi_0x08bd0010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[13] += 4;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd0010)
++
++void arm_instr_multi_0x092d0010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		cpu->cd.arm.r[13] -= 4;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d0010)
++
++void arm_instr_multi_0x08bd4010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[14] = p[1];
++		cpu->cd.arm.r[13] += 8;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd4010)
++
++void arm_instr_multi_0x08100009(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[-1];
++		cpu->cd.arm.r[3] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08100009)
++
++void arm_instr_multi_0x08910003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08910003)
++
++void arm_instr_multi_0x08830030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08830030)
++
++void arm_instr_multi_0x08980018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08980018)
++
++void arm_instr_multi_0x08930018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08930018)
++
++void arm_instr_multi_0x08880006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08880006)
++
++void arm_instr_multi_0x088c0018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088c0018)
++
++void arm_instr_multi_0x08910006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08910006)
++
++void arm_instr_multi_0x08940003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08940003)
++
++void arm_instr_multi_0x08850003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08850003)
++
++void arm_instr_multi_0x08890006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08890006)
++
++void arm_instr_multi_0x092d40f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x10 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-4] = cpu->cd.arm.r[4];
++		p[-3] = cpu->cd.arm.r[5];
++		p[-2] = cpu->cd.arm.r[6];
++		p[-1] = cpu->cd.arm.r[7];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 20;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d40f0)
++
++void arm_instr_multi_0x08840003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08840003)
++
++void arm_instr_multi_0x08820030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08820030)
++
++void arm_instr_multi_0x09160060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[-1];
++		cpu->cd.arm.r[6] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09160060)
++
++void arm_instr_multi_0x08930600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[9] = p[0];
++		cpu->cd.arm.r[10] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08930600)
++
++void arm_instr_multi_0x092d0ff0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-7] = cpu->cd.arm.r[4];
++		p[-6] = cpu->cd.arm.r[5];
++		p[-5] = cpu->cd.arm.r[6];
++		p[-4] = cpu->cd.arm.r[7];
++		p[-3] = cpu->cd.arm.r[8];
++		p[-2] = cpu->cd.arm.r[9];
++		p[-1] = cpu->cd.arm.r[10];
++		p[0] = cpu->cd.arm.r[11];
++		cpu->cd.arm.r[13] -= 32;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d0ff0)
++
++void arm_instr_multi_0x08bd0ff0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[8] = p[4];
++		cpu->cd.arm.r[9] = p[5];
++		cpu->cd.arm.r[10] = p[6];
++		cpu->cd.arm.r[11] = p[7];
++		cpu->cd.arm.r[13] += 32;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd0ff0)
++
++void arm_instr_multi_0x089e000a(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089e000a)
++
++void arm_instr_multi_0x09930006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09930006)
++
++void arm_instr_multi_0x080c0003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[0];
++		p[0] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x080c0003)
++
++void arm_instr_multi_0x0804000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[2];
++		p[0] = cpu->cd.arm.r[3];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x0804000c)
++
++void arm_instr_multi_0x08830060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[5];
++		p[1] = cpu->cd.arm.r[6];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08830060)
++
++void arm_instr_multi_0x08130003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[-1];
++		cpu->cd.arm.r[1] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08130003)
++
++void arm_instr_multi_0x09830006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09830006)
++
++void arm_instr_multi_0x08b00300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[8] = p[0];
++		cpu->cd.arm.r[9] = p[1];
++		cpu->cd.arm.r[0] += 8;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b00300)
++
++void arm_instr_multi_0x088e1002(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[12];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088e1002)
++
++void arm_instr_multi_0x0894000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0894000c)
++
++void arm_instr_multi_0x0885000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[2];
++		p[1] = cpu->cd.arm.r[3];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x0885000c)
++
++void arm_instr_multi_0x08840600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[9];
++		p[1] = cpu->cd.arm.r[10];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08840600)
++
++void arm_instr_multi_0x091b6df0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x20 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-8];
++		cpu->cd.arm.r[5] = p[-7];
++		cpu->cd.arm.r[6] = p[-6];
++		cpu->cd.arm.r[7] = p[-5];
++		cpu->cd.arm.r[8] = p[-4];
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b6df0)
++
++void arm_instr_multi_0x088c0006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088c0006)
++
++void arm_instr_multi_0x092d47f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x1c && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-7] = cpu->cd.arm.r[4];
++		p[-6] = cpu->cd.arm.r[5];
++		p[-5] = cpu->cd.arm.r[6];
++		p[-4] = cpu->cd.arm.r[7];
++		p[-3] = cpu->cd.arm.r[8];
++		p[-2] = cpu->cd.arm.r[9];
++		p[-1] = cpu->cd.arm.r[10];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 32;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d47f0)
++
++void arm_instr_multi_0x08bd87f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[8] = p[4];
++		cpu->cd.arm.r[9] = p[5];
++		cpu->cd.arm.r[10] = p[6];
++		cpu->pc = p[7];
++		cpu->cd.arm.r[13] += 32;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd87f0)
++
++void arm_instr_multi_0x08800018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08800018)
++
++void arm_instr_multi_0x099b0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x099b0030)
++
++void arm_instr_multi_0x08a100c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[6];
++		p[1] = cpu->cd.arm.r[7];
++		cpu->cd.arm.r[1] += 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a100c0)
++
++void arm_instr_multi_0x089c0006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089c0006)
++
++void arm_instr_multi_0x099b0180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[7] = p[0];
++		cpu->cd.arm.r[8] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x099b0180)
++
++void arm_instr_multi_0x08910030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08910030)
++
++void arm_instr_multi_0x09150018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-1];
++		cpu->cd.arm.r[4] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09150018)
++
++void arm_instr_multi_0x091a0600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[10];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[9] = p[-1];
++		cpu->cd.arm.r[10] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091a0600)
++
++void arm_instr_multi_0x090a0300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[10];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[8];
++		p[0] = cpu->cd.arm.r[9];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x090a0300)
++
++void arm_instr_multi_0x08bd40f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfec && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[14] = p[4];
++		cpu->cd.arm.r[13] += 20;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd40f0)
++
++void arm_instr_multi_0x089c0300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[8] = p[0];
++		cpu->cd.arm.r[9] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089c0300)
++
++void arm_instr_multi_0x09150006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[-1];
++		cpu->cd.arm.r[2] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09150006)
++
++void arm_instr_multi_0x08a10300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[8];
++		p[1] = cpu->cd.arm.r[9];
++		cpu->cd.arm.r[1] += 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a10300)
++
++void arm_instr_multi_0x08a01008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[12];
++		cpu->cd.arm.r[0] += 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a01008)
++
++void arm_instr_multi_0x08b11008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[12] = p[1];
++		cpu->cd.arm.r[1] += 8;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b11008)
++
++void arm_instr_multi_0x08bd80f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfec && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->pc = p[4];
++		cpu->cd.arm.r[13] += 20;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd80f0)
++
++void arm_instr_multi_0x08a05008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[12];
++		p[2] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[0] += 12;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a05008)
++
++void arm_instr_multi_0x08b15008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[12] = p[1];
++		cpu->cd.arm.r[14] = p[2];
++		cpu->cd.arm.r[1] += 12;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08b15008)
++
++void arm_instr_multi_0x08900018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08900018)
++
++void arm_instr_multi_0x092ddc00(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	uint32_t tmp_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
++	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
++	    << ARM_INSTR_ALIGNMENT_SHIFT)))
++	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x10 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-4] = cpu->cd.arm.r[10];
++		p[-3] = cpu->cd.arm.r[11];
++		p[-2] = cpu->cd.arm.r[12];
++		p[-1] = cpu->cd.arm.r[14];
++		p[0] = tmp_pc;
++		cpu->cd.arm.r[13] -= 20;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092ddc00)
++
++void arm_instr_multi_0x088c0003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088c0003)
++
++void arm_instr_multi_0x08830600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[9];
++		p[1] = cpu->cd.arm.r[10];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08830600)
++
++void arm_instr_multi_0x08920003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08920003)
++
++void arm_instr_multi_0x088d1100(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[8];
++		p[1] = cpu->cd.arm.r[12];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d1100)
++
++void arm_instr_multi_0x09900120(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[0];
++		cpu->cd.arm.r[8] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09900120)
++
++void arm_instr_multi_0x091bac00(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[10] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->pc = p[0];
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091bac00)
++
++void arm_instr_multi_0x092d45f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-6] = cpu->cd.arm.r[4];
++		p[-5] = cpu->cd.arm.r[5];
++		p[-4] = cpu->cd.arm.r[6];
++		p[-3] = cpu->cd.arm.r[7];
++		p[-2] = cpu->cd.arm.r[8];
++		p[-1] = cpu->cd.arm.r[10];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 28;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d45f0)
++
++void arm_instr_multi_0x08bd85f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[8] = p[4];
++		cpu->cd.arm.r[10] = p[5];
++		cpu->pc = p[6];
++		cpu->cd.arm.r[13] += 28;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd85f0)
++
++void arm_instr_multi_0x09940018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09940018)
++
++void arm_instr_multi_0x09850014(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[2];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09850014)
++
++void arm_instr_multi_0x08860006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08860006)
++
++void arm_instr_multi_0x09120006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[-1];
++		cpu->cd.arm.r[2] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09120006)
++
++void arm_instr_multi_0x089c0018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089c0018)
++
++void arm_instr_multi_0x091b6870(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x14 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-5];
++		cpu->cd.arm.r[5] = p[-4];
++		cpu->cd.arm.r[6] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b6870)
++
++void arm_instr_multi_0x08950030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08950030)
++
++void arm_instr_multi_0x09900018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09900018)
++
++void arm_instr_multi_0x098d0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x098d0030)
++
++void arm_instr_multi_0x088d0088(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[7];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d0088)
++
++void arm_instr_multi_0x08900060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[0];
++		cpu->cd.arm.r[6] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08900060)
++
++void arm_instr_multi_0x08900003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08900003)
++
++void arm_instr_multi_0x08990018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08990018)
++
++void arm_instr_multi_0x08810600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[9];
++		p[1] = cpu->cd.arm.r[10];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08810600)
++
++void arm_instr_multi_0x092d0c1f(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-6] = cpu->cd.arm.r[0];
++		p[-5] = cpu->cd.arm.r[1];
++		p[-4] = cpu->cd.arm.r[2];
++		p[-3] = cpu->cd.arm.r[3];
++		p[-2] = cpu->cd.arm.r[4];
++		p[-1] = cpu->cd.arm.r[10];
++		p[0] = cpu->cd.arm.r[11];
++		cpu->cd.arm.r[13] -= 28;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d0c1f)
++
++void arm_instr_multi_0x08bd4c1f(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++		cpu->cd.arm.r[2] = p[2];
++		cpu->cd.arm.r[3] = p[3];
++		cpu->cd.arm.r[4] = p[4];
++		cpu->cd.arm.r[10] = p[5];
++		cpu->cd.arm.r[11] = p[6];
++		cpu->cd.arm.r[14] = p[7];
++		cpu->cd.arm.r[13] += 32;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd4c1f)
++
++void arm_instr_multi_0x088d1010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[12];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d1010)
++
++void arm_instr_multi_0x09311008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-1];
++		cpu->cd.arm.r[12] = p[0];
++		cpu->cd.arm.r[1] -= 8;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09311008)
++
++void arm_instr_multi_0x09201008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[3];
++		p[0] = cpu->cd.arm.r[12];
++		cpu->cd.arm.r[0] -= 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09201008)
++
++void arm_instr_multi_0x08a10f00(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[8];
++		p[1] = cpu->cd.arm.r[9];
++		p[2] = cpu->cd.arm.r[10];
++		p[3] = cpu->cd.arm.r[11];
++		cpu->cd.arm.r[1] += 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a10f00)
++
++void arm_instr_multi_0x08931008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[12] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08931008)
++
++void arm_instr_multi_0x098b0003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x098b0003)
++
++void arm_instr_multi_0x08820180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[7];
++		p[1] = cpu->cd.arm.r[8];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08820180)
++
++void arm_instr_multi_0x08830300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[8];
++		p[1] = cpu->cd.arm.r[9];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08830300)
++
++void arm_instr_multi_0x08800030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08800030)
++
++void arm_instr_multi_0x09315008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-2];
++		cpu->cd.arm.r[12] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++		cpu->cd.arm.r[1] -= 12;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09315008)
++
++void arm_instr_multi_0x09205008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-2] = cpu->cd.arm.r[3];
++		p[-1] = cpu->cd.arm.r[12];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[0] -= 12;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09205008)
++
++void arm_instr_multi_0x08970300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[8] = p[0];
++		cpu->cd.arm.r[9] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08970300)
++
++void arm_instr_multi_0x08970030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08970030)
++
++void arm_instr_multi_0x08920030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08920030)
++
++void arm_instr_multi_0x08970600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[9] = p[0];
++		cpu->cd.arm.r[10] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08970600)
++
++void arm_instr_multi_0x08160060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[-1];
++		cpu->cd.arm.r[6] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08160060)
++
++void arm_instr_multi_0x08807ff0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfd4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++		p[2] = cpu->cd.arm.r[6];
++		p[3] = cpu->cd.arm.r[7];
++		p[4] = cpu->cd.arm.r[8];
++		p[5] = cpu->cd.arm.r[9];
++		p[6] = cpu->cd.arm.r[10];
++		p[7] = cpu->cd.arm.r[11];
++		p[8] = cpu->cd.arm.r[12];
++		p[9] = cpu->cd.arm.r[13];
++		p[10] = cpu->cd.arm.r[14];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08807ff0)
++
++void arm_instr_multi_0x092d0070(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-2] = cpu->cd.arm.r[4];
++		p[-1] = cpu->cd.arm.r[5];
++		p[0] = cpu->cd.arm.r[6];
++		cpu->cd.arm.r[13] -= 12;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d0070)
++
++void arm_instr_multi_0x08bd0070(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[13] += 12;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd0070)
++
++void arm_instr_multi_0x08800180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[7];
++		p[1] = cpu->cd.arm.r[8];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08800180)
++
++void arm_instr_multi_0x088e000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[2];
++		p[1] = cpu->cd.arm.r[3];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088e000c)
++
++void arm_instr_multi_0x088d0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d0030)
++
++void arm_instr_multi_0x08830003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08830003)
++
++void arm_instr_multi_0x089e0030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089e0030)
++
++void arm_instr_multi_0x091b6810(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b6810)
++
++void arm_instr_multi_0x08970180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[7];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[7] = p[0];
++		cpu->cd.arm.r[8] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08970180)
++
++void arm_instr_multi_0x0896000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0896000c)
++
++void arm_instr_multi_0x089200c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[6] = p[0];
++		cpu->cd.arm.r[7] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089200c0)
++
++void arm_instr_multi_0x088e00c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[6];
++		p[1] = cpu->cd.arm.r[7];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088e00c0)
++
++void arm_instr_multi_0x08940012(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08940012)
++
++void arm_instr_multi_0x089100c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[6] = p[0];
++		cpu->cd.arm.r[7] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089100c0)
++
++void arm_instr_multi_0x0813000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[-1];
++		cpu->cd.arm.r[3] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0813000c)
++
++void arm_instr_multi_0x089c000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089c000c)
++
++void arm_instr_multi_0x09920003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09920003)
++
++void arm_instr_multi_0x08950060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[0];
++		cpu->cd.arm.r[6] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08950060)
++
++void arm_instr_multi_0x09860006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09860006)
++
++void arm_instr_multi_0x088d4010(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[14];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d4010)
++
++void arm_instr_multi_0x09160006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[-1];
++		cpu->cd.arm.r[2] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09160006)
++
++void arm_instr_multi_0x08990600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[9] = p[0];
++		cpu->cd.arm.r[10] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08990600)
++
++void arm_instr_multi_0x08980006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08980006)
++
++void arm_instr_multi_0x091c0006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[-1];
++		cpu->cd.arm.r[2] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091c0006)
++
++void arm_instr_multi_0x080c0600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[9];
++		p[0] = cpu->cd.arm.r[10];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x080c0600)
++
++void arm_instr_multi_0x0894000a(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0894000a)
++
++void arm_instr_multi_0x09311038(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-3];
++		cpu->cd.arm.r[4] = p[-2];
++		cpu->cd.arm.r[5] = p[-1];
++		cpu->cd.arm.r[12] = p[0];
++		cpu->cd.arm.r[1] -= 16;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09311038)
++
++void arm_instr_multi_0x09205030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-3] = cpu->cd.arm.r[4];
++		p[-2] = cpu->cd.arm.r[5];
++		p[-1] = cpu->cd.arm.r[12];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[0] -= 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09205030)
++
++void arm_instr_multi_0x08850018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[5];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08850018)
++
++void arm_instr_multi_0x09190300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[8] = p[-1];
++		cpu->cd.arm.r[9] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09190300)
++
++void arm_instr_multi_0x088d0180(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[7];
++		p[1] = cpu->cd.arm.r[8];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d0180)
++
++void arm_instr_multi_0x08980003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08980003)
++
++void arm_instr_multi_0x098d000e(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++		p[2] = cpu->cd.arm.r[3];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x098d000e)
++
++void arm_instr_multi_0x098c0006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[1];
++		p[1] = cpu->cd.arm.r[2];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x098c0006)
++
++void arm_instr_multi_0x09010018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[3];
++		p[0] = cpu->cd.arm.r[4];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09010018)
++
++void arm_instr_multi_0x09860030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x09860030)
++
++void arm_instr_multi_0x092d4400(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-1] = cpu->cd.arm.r[10];
++		p[0] = cpu->cd.arm.r[14];
++		cpu->cd.arm.r[13] -= 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d4400)
++
++void arm_instr_multi_0x08bd8400(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[10] = p[0];
++		cpu->pc = p[1];
++		cpu->cd.arm.r[13] += 8;
++		quick_pc_to_pointers(cpu);
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd8400)
++
++void arm_instr_multi_0x089e0060(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[5] = p[0];
++		cpu->cd.arm.r[6] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089e0060)
++
++void arm_instr_multi_0x088c00c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[3];
++		p[1] = cpu->cd.arm.r[6];
++		p[2] = cpu->cd.arm.r[7];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088c00c8)
++
++void arm_instr_multi_0x0893000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[2] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x0893000c)
++
++void arm_instr_multi_0x09110003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[1];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[-1];
++		cpu->cd.arm.r[1] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09110003)
++
++void arm_instr_multi_0x08ac000f(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++		p[2] = cpu->cd.arm.r[2];
++		p[3] = cpu->cd.arm.r[3];
++		cpu->cd.arm.r[12] += 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08ac000f)
++
++void arm_instr_multi_0x08be000f(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[14];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++		cpu->cd.arm.r[2] = p[2];
++		cpu->cd.arm.r[3] = p[3];
++		cpu->cd.arm.r[14] += 16;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08be000f)
++
++void arm_instr_multi_0x08940018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[4] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08940018)
++
++void arm_instr_multi_0x091b68f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[11];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x18 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[-6];
++		cpu->cd.arm.r[5] = p[-5];
++		cpu->cd.arm.r[6] = p[-4];
++		cpu->cd.arm.r[7] = p[-3];
++		cpu->cd.arm.r[11] = p[-2];
++		cpu->cd.arm.r[13] = p[-1];
++		cpu->cd.arm.r[14] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x091b68f0)
++
++void arm_instr_multi_0x09140018(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	addr -= 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0x4 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[-1];
++		cpu->cd.arm.r[4] = p[0];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09140018)
++
++void arm_instr_multi_0x08940009(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[4];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[3] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08940009)
++
++void arm_instr_multi_0x08bd41f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xfe8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[8] = p[4];
++		cpu->cd.arm.r[14] = p[5];
++		cpu->cd.arm.r[13] += 24;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd41f0)
++
++void arm_instr_multi_0x08a20600(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[9];
++		p[1] = cpu->cd.arm.r[10];
++		cpu->cd.arm.r[2] += 8;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08a20600)
++
++void arm_instr_multi_0x08990003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08990003)
++
++void arm_instr_multi_0x09904008(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[0];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[3] = p[0];
++		cpu->cd.arm.r[14] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x09904008)
++
++void arm_instr_multi_0x098c0003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[0];
++		p[1] = cpu->cd.arm.r[1];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x098c0003)
++
++void arm_instr_multi_0x088900c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[6];
++		p[1] = cpu->cd.arm.r[7];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088900c0)
++
++void arm_instr_multi_0x088200c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[2];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[6];
++		p[1] = cpu->cd.arm.r[7];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088200c0)
++
++void arm_instr_multi_0x088300c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[6];
++		p[1] = cpu->cd.arm.r[7];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088300c0)
++
++void arm_instr_multi_0x089300c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[3];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[6] = p[0];
++		cpu->cd.arm.r[7] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089300c0)
++
++void arm_instr_multi_0x092d00f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	addr -= 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr >= 0xc && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[-3] = cpu->cd.arm.r[4];
++		p[-2] = cpu->cd.arm.r[5];
++		p[-1] = cpu->cd.arm.r[6];
++		p[0] = cpu->cd.arm.r[7];
++		cpu->cd.arm.r[13] -= 16;
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x092d00f0)
++
++void arm_instr_multi_0x08bd00f0(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff0 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++		cpu->cd.arm.r[6] = p[2];
++		cpu->cd.arm.r[7] = p[3];
++		cpu->cd.arm.r[13] += 16;
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08bd00f0)
++
++void arm_instr_multi_0x08960030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[6];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[4] = p[0];
++		cpu->cd.arm.r[5] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08960030)
++
++void arm_instr_multi_0x08980300(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[8];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[8] = p[0];
++		cpu->cd.arm.r[9] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08980300)
++
++void arm_instr_multi_0x089c5000(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[12];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[12] = p[0];
++		cpu->cd.arm.r[14] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x089c5000)
++
++void arm_instr_multi_0x088d1020(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[13];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[5];
++		p[1] = cpu->cd.arm.r[12];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x088d1020)
++
++void arm_instr_multi_0x08990006(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[1] = p[0];
++		cpu->cd.arm.r[2] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x08990006)
++
++void arm_instr_multi_0x08890030(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[4];
++		p[1] = cpu->cd.arm.r[5];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x08890030)
++
++void arm_instr_multi_0x099a0003(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[10];
++	addr += 4;
++	page = cpu->cd.arm.host_load[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		cpu->cd.arm.r[0] = p[0];
++		cpu->cd.arm.r[1] = p[1];
++	} else
++		instr(bdt_load)(cpu, ic);
++}
++Y(multi_0x099a0003)
++
++void arm_instr_multi_0x0989000c(struct cpu *cpu, struct arm_instr_call *ic) {
++	unsigned char *page;
++	uint32_t addr = cpu->cd.arm.r[9];
++	addr += 4;
++	page = cpu->cd.arm.host_store[addr >> 12];
++	addr &= 0xffc;
++	if (addr <= 0xff8 && page != NULL) {
++		uint32_t *p = (uint32_t *) (page + addr);
++		p[0] = cpu->cd.arm.r[2];
++		p[1] = cpu->cd.arm.r[3];
++	} else
++		instr(bdt_store)(cpu, ic);
++}
++Y(multi_0x0989000c)
++
++uint32_t multi_opcode_0[4] = {
++	0x08020003,
++	0x09201008,
++	0x09205008,
++0 };
++
++uint32_t multi_opcode_1[1] = {
++0 };
++
++uint32_t multi_opcode_2[3] = {
++	0x09205018,
++	0x09205030,
++0 };
++
++uint32_t multi_opcode_3[1] = {
++0 };
++
++uint32_t multi_opcode_4[1] = {
++0 };
++
++uint32_t multi_opcode_5[1] = {
++0 };
++
++uint32_t multi_opcode_6[1] = {
++0 };
++
++uint32_t multi_opcode_7[1] = {
++0 };
++
++uint32_t multi_opcode_8[2] = {
++	0x090a0300,
++0 };
++
++uint32_t multi_opcode_9[1] = {
++0 };
++
++uint32_t multi_opcode_10[1] = {
++0 };
++
++uint32_t multi_opcode_11[1] = {
++0 };
++
++uint32_t multi_opcode_12[1] = {
++0 };
++
++uint32_t multi_opcode_13[1] = {
++0 };
++
++uint32_t multi_opcode_14[1] = {
++0 };
++
++uint32_t multi_opcode_15[1] = {
++0 };
++
++uint32_t multi_opcode_16[1] = {
++0 };
++
++uint32_t multi_opcode_17[1] = {
++0 };
++
++uint32_t multi_opcode_18[2] = {
++	0x09010018,
++0 };
++
++uint32_t multi_opcode_19[1] = {
++0 };
++
++uint32_t multi_opcode_20[1] = {
++0 };
++
++uint32_t multi_opcode_21[1] = {
++0 };
++
++uint32_t multi_opcode_22[1] = {
++0 };
++
++uint32_t multi_opcode_23[1] = {
++0 };
++
++uint32_t multi_opcode_24[1] = {
++0 };
++
++uint32_t multi_opcode_25[1] = {
++0 };
++
++uint32_t multi_opcode_26[1] = {
++0 };
++
++uint32_t multi_opcode_27[1] = {
++0 };
++
++uint32_t multi_opcode_28[1] = {
++0 };
++
++uint32_t multi_opcode_29[1] = {
++0 };
++
++uint32_t multi_opcode_30[1] = {
++0 };
++
++uint32_t multi_opcode_31[1] = {
++0 };
++
++uint32_t multi_opcode_32[4] = {
++	0x09040003,
++	0x080c0003,
++	0x080c0600,
++0 };
++
++uint32_t multi_opcode_33[3] = {
++	0x08040006,
++	0x0804000c,
++0 };
++
++uint32_t multi_opcode_34[2] = {
++	0x080c0030,
++0 };
++
++uint32_t multi_opcode_35[1] = {
++0 };
++
++uint32_t multi_opcode_36[1] = {
++0 };
++
++uint32_t multi_opcode_37[1] = {
++0 };
++
++uint32_t multi_opcode_38[1] = {
++0 };
++
++uint32_t multi_opcode_39[1] = {
++0 };
++
++uint32_t multi_opcode_40[1] = {
++0 };
++
++uint32_t multi_opcode_41[1] = {
++0 };
++
++uint32_t multi_opcode_42[1] = {
++0 };
++
++uint32_t multi_opcode_43[1] = {
++0 };
++
++uint32_t multi_opcode_44[1] = {
++0 };
++
++uint32_t multi_opcode_45[1] = {
++0 };
++
++uint32_t multi_opcode_46[1] = {
++0 };
++
++uint32_t multi_opcode_47[1] = {
++0 };
++
++uint32_t multi_opcode_48[6] = {
++	0x092d4000,
++	0x092dd800,
++	0x092d4001,
++	0x092ddc00,
++	0x092d4400,
++0 };
++
++uint32_t multi_opcode_49[2] = {
++	0x090d000f,
++0 };
++
++uint32_t multi_opcode_50[8] = {
++	0x092dd830,
++	0x092dd810,
++	0x092d4010,
++	0x092d4030,
++	0x092ddc30,
++	0x092d0030,
++	0x092d0010,
++0 };
++
++uint32_t multi_opcode_51[2] = {
++	0x092d0c1f,
++0 };
++
++uint32_t multi_opcode_52[1] = {
++0 };
++
++uint32_t multi_opcode_53[1] = {
++0 };
++
++uint32_t multi_opcode_54[9] = {
++	0x092dd8f0,
++	0x092dd870,
++	0x092d4070,
++	0x092ddc70,
++	0x092ddcf0,
++	0x092d40f0,
++	0x092d0070,
++	0x092d00f0,
++0 };
++
++uint32_t multi_opcode_55[1] = {
++0 };
++
++uint32_t multi_opcode_56[1] = {
++0 };
++
++uint32_t multi_opcode_57[1] = {
++0 };
++
++uint32_t multi_opcode_58[1] = {
++0 };
++
++uint32_t multi_opcode_59[1] = {
++0 };
++
++uint32_t multi_opcode_60[1] = {
++0 };
++
++uint32_t multi_opcode_61[1] = {
++0 };
++
++uint32_t multi_opcode_62[9] = {
++	0x092ddff0,
++	0x092dddf0,
++	0x092dd9f0,
++	0x092d41f0,
++	0x092ddbf0,
++	0x092d0ff0,
++	0x092d47f0,
++	0x092d45f0,
++0 };
++
++uint32_t multi_opcode_63[1] = {
++0 };
++
++uint32_t multi_opcode_64[3] = {
++	0x08100009,
++	0x091a0600,
++0 };
++
++uint32_t multi_opcode_65[2] = {
++	0x09120006,
++0 };
++
++uint32_t multi_opcode_66[1] = {
++0 };
++
++uint32_t multi_opcode_67[1] = {
++0 };
++
++uint32_t multi_opcode_68[1] = {
++0 };
++
++uint32_t multi_opcode_69[1] = {
++0 };
++
++uint32_t multi_opcode_70[1] = {
++0 };
++
++uint32_t multi_opcode_71[1] = {
++0 };
++
++uint32_t multi_opcode_72[1] = {
++0 };
++
++uint32_t multi_opcode_73[1] = {
++0 };
++
++uint32_t multi_opcode_74[1] = {
++0 };
++
++uint32_t multi_opcode_75[1] = {
++0 };
++
++uint32_t multi_opcode_76[1] = {
++0 };
++
++uint32_t multi_opcode_77[1] = {
++0 };
++
++uint32_t multi_opcode_78[1] = {
++0 };
++
++uint32_t multi_opcode_79[1] = {
++0 };
++
++uint32_t multi_opcode_80[9] = {
++	0x08110003,
++	0x091ba800,
++	0x091b6800,
++	0x08130003,
++	0x091bac00,
++	0x09311008,
++	0x09315008,
++	0x09110003,
++0 };
++
++uint32_t multi_opcode_81[3] = {
++	0x0911000f,
++	0x0813000c,
++0 };
++
++uint32_t multi_opcode_82[9] = {
++	0x091ba830,
++	0x091ba810,
++	0x08130018,
++	0x091b6830,
++	0x091bac30,
++	0x09315018,
++	0x091b6810,
++	0x09311038,
++0 };
++
++uint32_t multi_opcode_83[1] = {
++0 };
++
++uint32_t multi_opcode_84[1] = {
++0 };
++
++uint32_t multi_opcode_85[1] = {
++0 };
++
++uint32_t multi_opcode_86[7] = {
++	0x091ba8f0,
++	0x091ba870,
++	0x091bac70,
++	0x091bacf0,
++	0x091b6870,
++	0x091b68f0,
++0 };
++
++uint32_t multi_opcode_87[1] = {
++0 };
++
++uint32_t multi_opcode_88[2] = {
++	0x09190300,
++0 };
++
++uint32_t multi_opcode_89[1] = {
++0 };
++
++uint32_t multi_opcode_90[1] = {
++0 };
++
++uint32_t multi_opcode_91[1] = {
++0 };
++
++uint32_t multi_opcode_92[1] = {
++0 };
++
++uint32_t multi_opcode_93[1] = {
++0 };
++
++uint32_t multi_opcode_94[8] = {
++	0x091baff0,
++	0x091badf0,
++	0x091ba9f0,
++	0x091b6ff0,
++	0x091babf0,
++	0x091b69f0,
++	0x091b6df0,
++0 };
++
++uint32_t multi_opcode_95[1] = {
++0 };
++
++uint32_t multi_opcode_96[1] = {
++0 };
++
++uint32_t multi_opcode_97[3] = {
++	0x09160006,
++	0x091c0006,
++0 };
++
++uint32_t multi_opcode_98[2] = {
++	0x09140018,
++0 };
++
++uint32_t multi_opcode_99[1] = {
++0 };
++
++uint32_t multi_opcode_100[3] = {
++	0x09160060,
++	0x08160060,
++0 };
++
++uint32_t multi_opcode_101[1] = {
++0 };
++
++uint32_t multi_opcode_102[1] = {
++0 };
++
++uint32_t multi_opcode_103[1] = {
++0 };
++
++uint32_t multi_opcode_104[1] = {
++0 };
++
++uint32_t multi_opcode_105[1] = {
++0 };
++
++uint32_t multi_opcode_106[1] = {
++0 };
++
++uint32_t multi_opcode_107[1] = {
++0 };
++
++uint32_t multi_opcode_108[1] = {
++0 };
++
++uint32_t multi_opcode_109[1] = {
++0 };
++
++uint32_t multi_opcode_110[1] = {
++0 };
++
++uint32_t multi_opcode_111[1] = {
++0 };
++
++uint32_t multi_opcode_112[2] = {
++	0x08150003,
++0 };
++
++uint32_t multi_opcode_113[3] = {
++	0x0817000c,
++	0x09150006,
++0 };
++
++uint32_t multi_opcode_114[2] = {
++	0x09150018,
++0 };
++
++uint32_t multi_opcode_115[1] = {
++0 };
++
++uint32_t multi_opcode_116[1] = {
++0 };
++
++uint32_t multi_opcode_117[1] = {
++0 };
++
++uint32_t multi_opcode_118[1] = {
++0 };
++
++uint32_t multi_opcode_119[1] = {
++0 };
++
++uint32_t multi_opcode_120[1] = {
++0 };
++
++uint32_t multi_opcode_121[1] = {
++0 };
++
++uint32_t multi_opcode_122[1] = {
++0 };
++
++uint32_t multi_opcode_123[1] = {
++0 };
++
++uint32_t multi_opcode_124[1] = {
++0 };
++
++uint32_t multi_opcode_125[1] = {
++0 };
++
++uint32_t multi_opcode_126[1] = {
++0 };
++
++uint32_t multi_opcode_127[1] = {
++0 };
++
++uint32_t multi_opcode_128[5] = {
++	0x08820003,
++	0x08a01008,
++	0x08a05008,
++	0x08a20600,
++0 };
++
++uint32_t multi_opcode_129[3] = {
++	0x08800006,
++	0x08880006,
++0 };
++
++uint32_t multi_opcode_130[7] = {
++	0x08820018,
++	0x08a05018,
++	0x08880018,
++	0x08820030,
++	0x08800018,
++	0x08800030,
++0 };
++
++uint32_t multi_opcode_131[1] = {
++0 };
++
++uint32_t multi_opcode_132[2] = {
++	0x088200c0,
++0 };
++
++uint32_t multi_opcode_133[1] = {
++0 };
++
++uint32_t multi_opcode_134[1] = {
++0 };
++
++uint32_t multi_opcode_135[1] = {
++0 };
++
++uint32_t multi_opcode_136[3] = {
++	0x08820180,
++	0x08800180,
++0 };
++
++uint32_t multi_opcode_137[1] = {
++0 };
++
++uint32_t multi_opcode_138[1] = {
++0 };
++
++uint32_t multi_opcode_139[1] = {
++0 };
++
++uint32_t multi_opcode_140[1] = {
++0 };
++
++uint32_t multi_opcode_141[1] = {
++0 };
++
++uint32_t multi_opcode_142[3] = {
++	0x08a051f8,
++	0x08807ff0,
++0 };
++
++uint32_t multi_opcode_143[1] = {
++0 };
++
++uint32_t multi_opcode_144[5] = {
++	0x08830600,
++	0x08810600,
++	0x098b0003,
++	0x08830003,
++0 };
++
++uint32_t multi_opcode_145[5] = {
++	0x08830006,
++	0x08890006,
++	0x09830006,
++	0x0989000c,
++0 };
++
++uint32_t multi_opcode_146[4] = {
++	0x08810018,
++	0x08830030,
++	0x08890030,
++0 };
++
++uint32_t multi_opcode_147[1] = {
++0 };
++
++uint32_t multi_opcode_148[5] = {
++	0x08830060,
++	0x08a100c0,
++	0x088900c0,
++	0x088300c0,
++0 };
++
++uint32_t multi_opcode_149[1] = {
++0 };
++
++uint32_t multi_opcode_150[1] = {
++0 };
++
++uint32_t multi_opcode_151[1] = {
++0 };
++
++uint32_t multi_opcode_152[4] = {
++	0x08a10300,
++	0x08a10f00,
++	0x08830300,
++0 };
++
++uint32_t multi_opcode_153[1] = {
++0 };
++
++uint32_t multi_opcode_154[1] = {
++0 };
++
++uint32_t multi_opcode_155[1] = {
++0 };
++
++uint32_t multi_opcode_156[1] = {
++0 };
++
++uint32_t multi_opcode_157[1] = {
++0 };
++
++uint32_t multi_opcode_158[2] = {
++	0x08a151f8,
++0 };
++
++uint32_t multi_opcode_159[1] = {
++0 };
++
++uint32_t multi_opcode_160[6] = {
++	0x08840003,
++	0x088e1002,
++	0x08840600,
++	0x088c0003,
++	0x098c0003,
++0 };
++
++uint32_t multi_opcode_161[8] = {
++	0x08ac000c,
++	0x088c0006,
++	0x08860006,
++	0x088e000c,
++	0x09860006,
++	0x098c0006,
++	0x08ac000f,
++0 };
++
++uint32_t multi_opcode_162[4] = {
++	0x088e0018,
++	0x088c0018,
++	0x09860030,
++0 };
++
++uint32_t multi_opcode_163[1] = {
++0 };
++
++uint32_t multi_opcode_164[4] = {
++	0x088c0060,
++	0x088e00c0,
++	0x088c00c8,
++0 };
++
++uint32_t multi_opcode_165[1] = {
++0 };
++
++uint32_t multi_opcode_166[1] = {
++0 };
++
++uint32_t multi_opcode_167[1] = {
++0 };
++
++uint32_t multi_opcode_168[1] = {
++0 };
++
++uint32_t multi_opcode_169[1] = {
++0 };
++
++uint32_t multi_opcode_170[1] = {
++0 };
++
++uint32_t multi_opcode_171[1] = {
++0 };
++
++uint32_t multi_opcode_172[1] = {
++0 };
++
++uint32_t multi_opcode_173[1] = {
++0 };
++
++uint32_t multi_opcode_174[1] = {
++0 };
++
++uint32_t multi_opcode_175[1] = {
++0 };
++
++uint32_t multi_opcode_176[4] = {
++	0x08850003,
++	0x088d0088,
++	0x088d1020,
++0 };
++
++uint32_t multi_opcode_177[5] = {
++	0x08850006,
++	0x08870006,
++	0x0885000c,
++	0x098d000e,
++0 };
++
++uint32_t multi_opcode_178[7] = {
++	0x09870018,
++	0x098d0030,
++	0x088d1010,
++	0x088d0030,
++	0x088d4010,
++	0x08850018,
++0 };
++
++uint32_t multi_opcode_179[2] = {
++	0x09850014,
++0 };
++
++uint32_t multi_opcode_180[1] = {
++0 };
++
++uint32_t multi_opcode_181[1] = {
++0 };
++
++uint32_t multi_opcode_182[1] = {
++0 };
++
++uint32_t multi_opcode_183[1] = {
++0 };
++
++uint32_t multi_opcode_184[3] = {
++	0x088d1100,
++	0x088d0180,
++0 };
++
++uint32_t multi_opcode_185[1] = {
++0 };
++
++uint32_t multi_opcode_186[1] = {
++0 };
++
++uint32_t multi_opcode_187[1] = {
++0 };
++
++uint32_t multi_opcode_188[1] = {
++0 };
++
++uint32_t multi_opcode_189[1] = {
++0 };
++
++uint32_t multi_opcode_190[1] = {
++0 };
++
++uint32_t multi_opcode_191[2] = {
++	0x088d1fff,
++0 };
++
++uint32_t multi_opcode_192[7] = {
++	0x08920003,
++	0x08900003,
++	0x09920003,
++	0x08980003,
++	0x09904008,
++	0x099a0003,
++0 };
++
++uint32_t multi_opcode_193[5] = {
++	0x08900006,
++	0x0892000c,
++	0x08920006,
++	0x08980006,
++0 };
++
++uint32_t multi_opcode_194[6] = {
++	0x08920018,
++	0x08980018,
++	0x08900018,
++	0x09900018,
++	0x08920030,
++0 };
++
++uint32_t multi_opcode_195[1] = {
++0 };
++
++uint32_t multi_opcode_196[5] = {
++	0x08b000c0,
++	0x08980060,
++	0x08900060,
++	0x089200c0,
++0 };
++
++uint32_t multi_opcode_197[1] = {
++0 };
++
++uint32_t multi_opcode_198[1] = {
++0 };
++
++uint32_t multi_opcode_199[1] = {
++0 };
++
++uint32_t multi_opcode_200[4] = {
++	0x08b00300,
++	0x09900120,
++	0x08980300,
++0 };
++
++uint32_t multi_opcode_201[1] = {
++0 };
++
++uint32_t multi_opcode_202[1] = {
++0 };
++
++uint32_t multi_opcode_203[1] = {
++0 };
++
++uint32_t multi_opcode_204[2] = {
++	0x08b00fc0,
++0 };
++
++uint32_t multi_opcode_205[1] = {
++0 };
++
++uint32_t multi_opcode_206[2] = {
++	0x08b051f8,
++0 };
++
++uint32_t multi_opcode_207[1] = {
++0 };
++
++uint32_t multi_opcode_208[9] = {
++	0x08930003,
++	0x08910003,
++	0x08930600,
++	0x08b11008,
++	0x08b15008,
++	0x08931008,
++	0x08990600,
++	0x08990003,
++0 };
++
++uint32_t multi_opcode_209[7] = {
++	0x08930006,
++	0x0891000e,
++	0x08910006,
++	0x09930006,
++	0x0893000c,
++	0x08990006,
++0 };
++
++uint32_t multi_opcode_210[6] = {
++	0x08b15018,
++	0x08930018,
++	0x099b0030,
++	0x08910030,
++	0x08990018,
++0 };
++
++uint32_t multi_opcode_211[1] = {
++0 };
++
++uint32_t multi_opcode_212[4] = {
++	0x08930060,
++	0x089100c0,
++	0x089300c0,
++0 };
++
++uint32_t multi_opcode_213[1] = {
++0 };
++
++uint32_t multi_opcode_214[1] = {
++0 };
++
++uint32_t multi_opcode_215[1] = {
++0 };
++
++uint32_t multi_opcode_216[3] = {
++	0x08930180,
++	0x099b0180,
++0 };
++
++uint32_t multi_opcode_217[1] = {
++0 };
++
++uint32_t multi_opcode_218[1] = {
++0 };
++
++uint32_t multi_opcode_219[1] = {
++0 };
++
++uint32_t multi_opcode_220[1] = {
++0 };
++
++uint32_t multi_opcode_221[1] = {
++0 };
++
++uint32_t multi_opcode_222[1] = {
++0 };
++
++uint32_t multi_opcode_223[1] = {
++0 };
++
++uint32_t multi_opcode_224[6] = {
++	0x08940003,
++	0x089e000a,
++	0x0894000a,
++	0x08940009,
++	0x089c5000,
++0 };
++
++uint32_t multi_opcode_225[6] = {
++	0x0894000c,
++	0x089c0006,
++	0x0896000c,
++	0x089c000c,
++	0x08be000f,
++0 };
++
++uint32_t multi_opcode_226[8] = {
++	0x089e0018,
++	0x09940018,
++	0x089c0018,
++	0x089e0030,
++	0x08940012,
++	0x08940018,
++	0x08960030,
++0 };
++
++uint32_t multi_opcode_227[1] = {
++0 };
++
++uint32_t multi_opcode_228[2] = {
++	0x089e0060,
++0 };
++
++uint32_t multi_opcode_229[1] = {
++0 };
++
++uint32_t multi_opcode_230[1] = {
++0 };
++
++uint32_t multi_opcode_231[1] = {
++0 };
++
++uint32_t multi_opcode_232[3] = {
++	0x099c0180,
++	0x089c0300,
++0 };
++
++uint32_t multi_opcode_233[1] = {
++0 };
++
++uint32_t multi_opcode_234[1] = {
++0 };
++
++uint32_t multi_opcode_235[1] = {
++0 };
++
++uint32_t multi_opcode_236[1] = {
++0 };
++
++uint32_t multi_opcode_237[1] = {
++0 };
++
++uint32_t multi_opcode_238[1] = {
++0 };
++
++uint32_t multi_opcode_239[1] = {
++0 };
++
++uint32_t multi_opcode_240[7] = {
++	0x08bd8000,
++	0x08bd8001,
++	0x08950003,
++	0x08bd0400,
++	0x08970600,
++	0x08bd8400,
++0 };
++
++uint32_t multi_opcode_241[3] = {
++	0x08950006,
++	0x08970006,
++0 };
++
++uint32_t multi_opcode_242[8] = {
++	0x08bd8010,
++	0x08bd8030,
++	0x08bd0030,
++	0x08bd0010,
++	0x08bd4010,
++	0x08950030,
++	0x08970030,
++0 };
++
++uint32_t multi_opcode_243[2] = {
++	0x08bd4c1f,
++0 };
++
++uint32_t multi_opcode_244[3] = {
++	0x08971040,
++	0x08950060,
++0 };
++
++uint32_t multi_opcode_245[1] = {
++0 };
++
++uint32_t multi_opcode_246[6] = {
++	0x08bd8070,
++	0x08bd40f0,
++	0x08bd80f0,
++	0x08bd0070,
++	0x08bd00f0,
++0 };
++
++uint32_t multi_opcode_247[1] = {
++0 };
++
++uint32_t multi_opcode_248[3] = {
++	0x08970300,
++	0x08970180,
++0 };
++
++uint32_t multi_opcode_249[1] = {
++0 };
++
++uint32_t multi_opcode_250[1] = {
++0 };
++
++uint32_t multi_opcode_251[1] = {
++0 };
++
++uint32_t multi_opcode_252[1] = {
++0 };
++
++uint32_t multi_opcode_253[1] = {
++0 };
++
++uint32_t multi_opcode_254[6] = {
++	0x08bd81f0,
++	0x08bd0ff0,
++	0x08bd87f0,
++	0x08bd85f0,
++	0x08bd41f0,
++0 };
++
++uint32_t multi_opcode_255[1] = {
++0 };
++void (*multi_opcode_f_0[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08020003__eq,
++	arm_instr_multi_0x08020003__ne,
++	arm_instr_multi_0x08020003__cs,
++	arm_instr_multi_0x08020003__cc,
++	arm_instr_multi_0x08020003__mi,
++	arm_instr_multi_0x08020003__pl,
++	arm_instr_multi_0x08020003__vs,
++	arm_instr_multi_0x08020003__vc,
++	arm_instr_multi_0x08020003__hi,
++	arm_instr_multi_0x08020003__ls,
++	arm_instr_multi_0x08020003__ge,
++	arm_instr_multi_0x08020003__lt,
++	arm_instr_multi_0x08020003__gt,
++	arm_instr_multi_0x08020003__le,
++	arm_instr_multi_0x08020003,
++	arm_instr_nop,
++	arm_instr_multi_0x09201008__eq,
++	arm_instr_multi_0x09201008__ne,
++	arm_instr_multi_0x09201008__cs,
++	arm_instr_multi_0x09201008__cc,
++	arm_instr_multi_0x09201008__mi,
++	arm_instr_multi_0x09201008__pl,
++	arm_instr_multi_0x09201008__vs,
++	arm_instr_multi_0x09201008__vc,
++	arm_instr_multi_0x09201008__hi,
++	arm_instr_multi_0x09201008__ls,
++	arm_instr_multi_0x09201008__ge,
++	arm_instr_multi_0x09201008__lt,
++	arm_instr_multi_0x09201008__gt,
++	arm_instr_multi_0x09201008__le,
++	arm_instr_multi_0x09201008,
++	arm_instr_nop,
++	arm_instr_multi_0x09205008__eq,
++	arm_instr_multi_0x09205008__ne,
++	arm_instr_multi_0x09205008__cs,
++	arm_instr_multi_0x09205008__cc,
++	arm_instr_multi_0x09205008__mi,
++	arm_instr_multi_0x09205008__pl,
++	arm_instr_multi_0x09205008__vs,
++	arm_instr_multi_0x09205008__vc,
++	arm_instr_multi_0x09205008__hi,
++	arm_instr_multi_0x09205008__ls,
++	arm_instr_multi_0x09205008__ge,
++	arm_instr_multi_0x09205008__lt,
++	arm_instr_multi_0x09205008__gt,
++	arm_instr_multi_0x09205008__le,
++	arm_instr_multi_0x09205008,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_2[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09205018__eq,
++	arm_instr_multi_0x09205018__ne,
++	arm_instr_multi_0x09205018__cs,
++	arm_instr_multi_0x09205018__cc,
++	arm_instr_multi_0x09205018__mi,
++	arm_instr_multi_0x09205018__pl,
++	arm_instr_multi_0x09205018__vs,
++	arm_instr_multi_0x09205018__vc,
++	arm_instr_multi_0x09205018__hi,
++	arm_instr_multi_0x09205018__ls,
++	arm_instr_multi_0x09205018__ge,
++	arm_instr_multi_0x09205018__lt,
++	arm_instr_multi_0x09205018__gt,
++	arm_instr_multi_0x09205018__le,
++	arm_instr_multi_0x09205018,
++	arm_instr_nop,
++	arm_instr_multi_0x09205030__eq,
++	arm_instr_multi_0x09205030__ne,
++	arm_instr_multi_0x09205030__cs,
++	arm_instr_multi_0x09205030__cc,
++	arm_instr_multi_0x09205030__mi,
++	arm_instr_multi_0x09205030__pl,
++	arm_instr_multi_0x09205030__vs,
++	arm_instr_multi_0x09205030__vc,
++	arm_instr_multi_0x09205030__hi,
++	arm_instr_multi_0x09205030__ls,
++	arm_instr_multi_0x09205030__ge,
++	arm_instr_multi_0x09205030__lt,
++	arm_instr_multi_0x09205030__gt,
++	arm_instr_multi_0x09205030__le,
++	arm_instr_multi_0x09205030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_8[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x090a0300__eq,
++	arm_instr_multi_0x090a0300__ne,
++	arm_instr_multi_0x090a0300__cs,
++	arm_instr_multi_0x090a0300__cc,
++	arm_instr_multi_0x090a0300__mi,
++	arm_instr_multi_0x090a0300__pl,
++	arm_instr_multi_0x090a0300__vs,
++	arm_instr_multi_0x090a0300__vc,
++	arm_instr_multi_0x090a0300__hi,
++	arm_instr_multi_0x090a0300__ls,
++	arm_instr_multi_0x090a0300__ge,
++	arm_instr_multi_0x090a0300__lt,
++	arm_instr_multi_0x090a0300__gt,
++	arm_instr_multi_0x090a0300__le,
++	arm_instr_multi_0x090a0300,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_18[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09010018__eq,
++	arm_instr_multi_0x09010018__ne,
++	arm_instr_multi_0x09010018__cs,
++	arm_instr_multi_0x09010018__cc,
++	arm_instr_multi_0x09010018__mi,
++	arm_instr_multi_0x09010018__pl,
++	arm_instr_multi_0x09010018__vs,
++	arm_instr_multi_0x09010018__vc,
++	arm_instr_multi_0x09010018__hi,
++	arm_instr_multi_0x09010018__ls,
++	arm_instr_multi_0x09010018__ge,
++	arm_instr_multi_0x09010018__lt,
++	arm_instr_multi_0x09010018__gt,
++	arm_instr_multi_0x09010018__le,
++	arm_instr_multi_0x09010018,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_32[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09040003__eq,
++	arm_instr_multi_0x09040003__ne,
++	arm_instr_multi_0x09040003__cs,
++	arm_instr_multi_0x09040003__cc,
++	arm_instr_multi_0x09040003__mi,
++	arm_instr_multi_0x09040003__pl,
++	arm_instr_multi_0x09040003__vs,
++	arm_instr_multi_0x09040003__vc,
++	arm_instr_multi_0x09040003__hi,
++	arm_instr_multi_0x09040003__ls,
++	arm_instr_multi_0x09040003__ge,
++	arm_instr_multi_0x09040003__lt,
++	arm_instr_multi_0x09040003__gt,
++	arm_instr_multi_0x09040003__le,
++	arm_instr_multi_0x09040003,
++	arm_instr_nop,
++	arm_instr_multi_0x080c0003__eq,
++	arm_instr_multi_0x080c0003__ne,
++	arm_instr_multi_0x080c0003__cs,
++	arm_instr_multi_0x080c0003__cc,
++	arm_instr_multi_0x080c0003__mi,
++	arm_instr_multi_0x080c0003__pl,
++	arm_instr_multi_0x080c0003__vs,
++	arm_instr_multi_0x080c0003__vc,
++	arm_instr_multi_0x080c0003__hi,
++	arm_instr_multi_0x080c0003__ls,
++	arm_instr_multi_0x080c0003__ge,
++	arm_instr_multi_0x080c0003__lt,
++	arm_instr_multi_0x080c0003__gt,
++	arm_instr_multi_0x080c0003__le,
++	arm_instr_multi_0x080c0003,
++	arm_instr_nop,
++	arm_instr_multi_0x080c0600__eq,
++	arm_instr_multi_0x080c0600__ne,
++	arm_instr_multi_0x080c0600__cs,
++	arm_instr_multi_0x080c0600__cc,
++	arm_instr_multi_0x080c0600__mi,
++	arm_instr_multi_0x080c0600__pl,
++	arm_instr_multi_0x080c0600__vs,
++	arm_instr_multi_0x080c0600__vc,
++	arm_instr_multi_0x080c0600__hi,
++	arm_instr_multi_0x080c0600__ls,
++	arm_instr_multi_0x080c0600__ge,
++	arm_instr_multi_0x080c0600__lt,
++	arm_instr_multi_0x080c0600__gt,
++	arm_instr_multi_0x080c0600__le,
++	arm_instr_multi_0x080c0600,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_33[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08040006__eq,
++	arm_instr_multi_0x08040006__ne,
++	arm_instr_multi_0x08040006__cs,
++	arm_instr_multi_0x08040006__cc,
++	arm_instr_multi_0x08040006__mi,
++	arm_instr_multi_0x08040006__pl,
++	arm_instr_multi_0x08040006__vs,
++	arm_instr_multi_0x08040006__vc,
++	arm_instr_multi_0x08040006__hi,
++	arm_instr_multi_0x08040006__ls,
++	arm_instr_multi_0x08040006__ge,
++	arm_instr_multi_0x08040006__lt,
++	arm_instr_multi_0x08040006__gt,
++	arm_instr_multi_0x08040006__le,
++	arm_instr_multi_0x08040006,
++	arm_instr_nop,
++	arm_instr_multi_0x0804000c__eq,
++	arm_instr_multi_0x0804000c__ne,
++	arm_instr_multi_0x0804000c__cs,
++	arm_instr_multi_0x0804000c__cc,
++	arm_instr_multi_0x0804000c__mi,
++	arm_instr_multi_0x0804000c__pl,
++	arm_instr_multi_0x0804000c__vs,
++	arm_instr_multi_0x0804000c__vc,
++	arm_instr_multi_0x0804000c__hi,
++	arm_instr_multi_0x0804000c__ls,
++	arm_instr_multi_0x0804000c__ge,
++	arm_instr_multi_0x0804000c__lt,
++	arm_instr_multi_0x0804000c__gt,
++	arm_instr_multi_0x0804000c__le,
++	arm_instr_multi_0x0804000c,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_34[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x080c0030__eq,
++	arm_instr_multi_0x080c0030__ne,
++	arm_instr_multi_0x080c0030__cs,
++	arm_instr_multi_0x080c0030__cc,
++	arm_instr_multi_0x080c0030__mi,
++	arm_instr_multi_0x080c0030__pl,
++	arm_instr_multi_0x080c0030__vs,
++	arm_instr_multi_0x080c0030__vc,
++	arm_instr_multi_0x080c0030__hi,
++	arm_instr_multi_0x080c0030__ls,
++	arm_instr_multi_0x080c0030__ge,
++	arm_instr_multi_0x080c0030__lt,
++	arm_instr_multi_0x080c0030__gt,
++	arm_instr_multi_0x080c0030__le,
++	arm_instr_multi_0x080c0030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_48[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x092d4000__eq,
++	arm_instr_multi_0x092d4000__ne,
++	arm_instr_multi_0x092d4000__cs,
++	arm_instr_multi_0x092d4000__cc,
++	arm_instr_multi_0x092d4000__mi,
++	arm_instr_multi_0x092d4000__pl,
++	arm_instr_multi_0x092d4000__vs,
++	arm_instr_multi_0x092d4000__vc,
++	arm_instr_multi_0x092d4000__hi,
++	arm_instr_multi_0x092d4000__ls,
++	arm_instr_multi_0x092d4000__ge,
++	arm_instr_multi_0x092d4000__lt,
++	arm_instr_multi_0x092d4000__gt,
++	arm_instr_multi_0x092d4000__le,
++	arm_instr_multi_0x092d4000,
++	arm_instr_nop,
++	arm_instr_multi_0x092dd800__eq,
++	arm_instr_multi_0x092dd800__ne,
++	arm_instr_multi_0x092dd800__cs,
++	arm_instr_multi_0x092dd800__cc,
++	arm_instr_multi_0x092dd800__mi,
++	arm_instr_multi_0x092dd800__pl,
++	arm_instr_multi_0x092dd800__vs,
++	arm_instr_multi_0x092dd800__vc,
++	arm_instr_multi_0x092dd800__hi,
++	arm_instr_multi_0x092dd800__ls,
++	arm_instr_multi_0x092dd800__ge,
++	arm_instr_multi_0x092dd800__lt,
++	arm_instr_multi_0x092dd800__gt,
++	arm_instr_multi_0x092dd800__le,
++	arm_instr_multi_0x092dd800,
++	arm_instr_nop,
++	arm_instr_multi_0x092d4001__eq,
++	arm_instr_multi_0x092d4001__ne,
++	arm_instr_multi_0x092d4001__cs,
++	arm_instr_multi_0x092d4001__cc,
++	arm_instr_multi_0x092d4001__mi,
++	arm_instr_multi_0x092d4001__pl,
++	arm_instr_multi_0x092d4001__vs,
++	arm_instr_multi_0x092d4001__vc,
++	arm_instr_multi_0x092d4001__hi,
++	arm_instr_multi_0x092d4001__ls,
++	arm_instr_multi_0x092d4001__ge,
++	arm_instr_multi_0x092d4001__lt,
++	arm_instr_multi_0x092d4001__gt,
++	arm_instr_multi_0x092d4001__le,
++	arm_instr_multi_0x092d4001,
++	arm_instr_nop,
++	arm_instr_multi_0x092ddc00__eq,
++	arm_instr_multi_0x092ddc00__ne,
++	arm_instr_multi_0x092ddc00__cs,
++	arm_instr_multi_0x092ddc00__cc,
++	arm_instr_multi_0x092ddc00__mi,
++	arm_instr_multi_0x092ddc00__pl,
++	arm_instr_multi_0x092ddc00__vs,
++	arm_instr_multi_0x092ddc00__vc,
++	arm_instr_multi_0x092ddc00__hi,
++	arm_instr_multi_0x092ddc00__ls,
++	arm_instr_multi_0x092ddc00__ge,
++	arm_instr_multi_0x092ddc00__lt,
++	arm_instr_multi_0x092ddc00__gt,
++	arm_instr_multi_0x092ddc00__le,
++	arm_instr_multi_0x092ddc00,
++	arm_instr_nop,
++	arm_instr_multi_0x092d4400__eq,
++	arm_instr_multi_0x092d4400__ne,
++	arm_instr_multi_0x092d4400__cs,
++	arm_instr_multi_0x092d4400__cc,
++	arm_instr_multi_0x092d4400__mi,
++	arm_instr_multi_0x092d4400__pl,
++	arm_instr_multi_0x092d4400__vs,
++	arm_instr_multi_0x092d4400__vc,
++	arm_instr_multi_0x092d4400__hi,
++	arm_instr_multi_0x092d4400__ls,
++	arm_instr_multi_0x092d4400__ge,
++	arm_instr_multi_0x092d4400__lt,
++	arm_instr_multi_0x092d4400__gt,
++	arm_instr_multi_0x092d4400__le,
++	arm_instr_multi_0x092d4400,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_49[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x090d000f__eq,
++	arm_instr_multi_0x090d000f__ne,
++	arm_instr_multi_0x090d000f__cs,
++	arm_instr_multi_0x090d000f__cc,
++	arm_instr_multi_0x090d000f__mi,
++	arm_instr_multi_0x090d000f__pl,
++	arm_instr_multi_0x090d000f__vs,
++	arm_instr_multi_0x090d000f__vc,
++	arm_instr_multi_0x090d000f__hi,
++	arm_instr_multi_0x090d000f__ls,
++	arm_instr_multi_0x090d000f__ge,
++	arm_instr_multi_0x090d000f__lt,
++	arm_instr_multi_0x090d000f__gt,
++	arm_instr_multi_0x090d000f__le,
++	arm_instr_multi_0x090d000f,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_50[112])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x092dd830__eq,
++	arm_instr_multi_0x092dd830__ne,
++	arm_instr_multi_0x092dd830__cs,
++	arm_instr_multi_0x092dd830__cc,
++	arm_instr_multi_0x092dd830__mi,
++	arm_instr_multi_0x092dd830__pl,
++	arm_instr_multi_0x092dd830__vs,
++	arm_instr_multi_0x092dd830__vc,
++	arm_instr_multi_0x092dd830__hi,
++	arm_instr_multi_0x092dd830__ls,
++	arm_instr_multi_0x092dd830__ge,
++	arm_instr_multi_0x092dd830__lt,
++	arm_instr_multi_0x092dd830__gt,
++	arm_instr_multi_0x092dd830__le,
++	arm_instr_multi_0x092dd830,
++	arm_instr_nop,
++	arm_instr_multi_0x092dd810__eq,
++	arm_instr_multi_0x092dd810__ne,
++	arm_instr_multi_0x092dd810__cs,
++	arm_instr_multi_0x092dd810__cc,
++	arm_instr_multi_0x092dd810__mi,
++	arm_instr_multi_0x092dd810__pl,
++	arm_instr_multi_0x092dd810__vs,
++	arm_instr_multi_0x092dd810__vc,
++	arm_instr_multi_0x092dd810__hi,
++	arm_instr_multi_0x092dd810__ls,
++	arm_instr_multi_0x092dd810__ge,
++	arm_instr_multi_0x092dd810__lt,
++	arm_instr_multi_0x092dd810__gt,
++	arm_instr_multi_0x092dd810__le,
++	arm_instr_multi_0x092dd810,
++	arm_instr_nop,
++	arm_instr_multi_0x092d4010__eq,
++	arm_instr_multi_0x092d4010__ne,
++	arm_instr_multi_0x092d4010__cs,
++	arm_instr_multi_0x092d4010__cc,
++	arm_instr_multi_0x092d4010__mi,
++	arm_instr_multi_0x092d4010__pl,
++	arm_instr_multi_0x092d4010__vs,
++	arm_instr_multi_0x092d4010__vc,
++	arm_instr_multi_0x092d4010__hi,
++	arm_instr_multi_0x092d4010__ls,
++	arm_instr_multi_0x092d4010__ge,
++	arm_instr_multi_0x092d4010__lt,
++	arm_instr_multi_0x092d4010__gt,
++	arm_instr_multi_0x092d4010__le,
++	arm_instr_multi_0x092d4010,
++	arm_instr_nop,
++	arm_instr_multi_0x092d4030__eq,
++	arm_instr_multi_0x092d4030__ne,
++	arm_instr_multi_0x092d4030__cs,
++	arm_instr_multi_0x092d4030__cc,
++	arm_instr_multi_0x092d4030__mi,
++	arm_instr_multi_0x092d4030__pl,
++	arm_instr_multi_0x092d4030__vs,
++	arm_instr_multi_0x092d4030__vc,
++	arm_instr_multi_0x092d4030__hi,
++	arm_instr_multi_0x092d4030__ls,
++	arm_instr_multi_0x092d4030__ge,
++	arm_instr_multi_0x092d4030__lt,
++	arm_instr_multi_0x092d4030__gt,
++	arm_instr_multi_0x092d4030__le,
++	arm_instr_multi_0x092d4030,
++	arm_instr_nop,
++	arm_instr_multi_0x092ddc30__eq,
++	arm_instr_multi_0x092ddc30__ne,
++	arm_instr_multi_0x092ddc30__cs,
++	arm_instr_multi_0x092ddc30__cc,
++	arm_instr_multi_0x092ddc30__mi,
++	arm_instr_multi_0x092ddc30__pl,
++	arm_instr_multi_0x092ddc30__vs,
++	arm_instr_multi_0x092ddc30__vc,
++	arm_instr_multi_0x092ddc30__hi,
++	arm_instr_multi_0x092ddc30__ls,
++	arm_instr_multi_0x092ddc30__ge,
++	arm_instr_multi_0x092ddc30__lt,
++	arm_instr_multi_0x092ddc30__gt,
++	arm_instr_multi_0x092ddc30__le,
++	arm_instr_multi_0x092ddc30,
++	arm_instr_nop,
++	arm_instr_multi_0x092d0030__eq,
++	arm_instr_multi_0x092d0030__ne,
++	arm_instr_multi_0x092d0030__cs,
++	arm_instr_multi_0x092d0030__cc,
++	arm_instr_multi_0x092d0030__mi,
++	arm_instr_multi_0x092d0030__pl,
++	arm_instr_multi_0x092d0030__vs,
++	arm_instr_multi_0x092d0030__vc,
++	arm_instr_multi_0x092d0030__hi,
++	arm_instr_multi_0x092d0030__ls,
++	arm_instr_multi_0x092d0030__ge,
++	arm_instr_multi_0x092d0030__lt,
++	arm_instr_multi_0x092d0030__gt,
++	arm_instr_multi_0x092d0030__le,
++	arm_instr_multi_0x092d0030,
++	arm_instr_nop,
++	arm_instr_multi_0x092d0010__eq,
++	arm_instr_multi_0x092d0010__ne,
++	arm_instr_multi_0x092d0010__cs,
++	arm_instr_multi_0x092d0010__cc,
++	arm_instr_multi_0x092d0010__mi,
++	arm_instr_multi_0x092d0010__pl,
++	arm_instr_multi_0x092d0010__vs,
++	arm_instr_multi_0x092d0010__vc,
++	arm_instr_multi_0x092d0010__hi,
++	arm_instr_multi_0x092d0010__ls,
++	arm_instr_multi_0x092d0010__ge,
++	arm_instr_multi_0x092d0010__lt,
++	arm_instr_multi_0x092d0010__gt,
++	arm_instr_multi_0x092d0010__le,
++	arm_instr_multi_0x092d0010,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_51[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x092d0c1f__eq,
++	arm_instr_multi_0x092d0c1f__ne,
++	arm_instr_multi_0x092d0c1f__cs,
++	arm_instr_multi_0x092d0c1f__cc,
++	arm_instr_multi_0x092d0c1f__mi,
++	arm_instr_multi_0x092d0c1f__pl,
++	arm_instr_multi_0x092d0c1f__vs,
++	arm_instr_multi_0x092d0c1f__vc,
++	arm_instr_multi_0x092d0c1f__hi,
++	arm_instr_multi_0x092d0c1f__ls,
++	arm_instr_multi_0x092d0c1f__ge,
++	arm_instr_multi_0x092d0c1f__lt,
++	arm_instr_multi_0x092d0c1f__gt,
++	arm_instr_multi_0x092d0c1f__le,
++	arm_instr_multi_0x092d0c1f,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_54[128])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x092dd8f0__eq,
++	arm_instr_multi_0x092dd8f0__ne,
++	arm_instr_multi_0x092dd8f0__cs,
++	arm_instr_multi_0x092dd8f0__cc,
++	arm_instr_multi_0x092dd8f0__mi,
++	arm_instr_multi_0x092dd8f0__pl,
++	arm_instr_multi_0x092dd8f0__vs,
++	arm_instr_multi_0x092dd8f0__vc,
++	arm_instr_multi_0x092dd8f0__hi,
++	arm_instr_multi_0x092dd8f0__ls,
++	arm_instr_multi_0x092dd8f0__ge,
++	arm_instr_multi_0x092dd8f0__lt,
++	arm_instr_multi_0x092dd8f0__gt,
++	arm_instr_multi_0x092dd8f0__le,
++	arm_instr_multi_0x092dd8f0,
++	arm_instr_nop,
++	arm_instr_multi_0x092dd870__eq,
++	arm_instr_multi_0x092dd870__ne,
++	arm_instr_multi_0x092dd870__cs,
++	arm_instr_multi_0x092dd870__cc,
++	arm_instr_multi_0x092dd870__mi,
++	arm_instr_multi_0x092dd870__pl,
++	arm_instr_multi_0x092dd870__vs,
++	arm_instr_multi_0x092dd870__vc,
++	arm_instr_multi_0x092dd870__hi,
++	arm_instr_multi_0x092dd870__ls,
++	arm_instr_multi_0x092dd870__ge,
++	arm_instr_multi_0x092dd870__lt,
++	arm_instr_multi_0x092dd870__gt,
++	arm_instr_multi_0x092dd870__le,
++	arm_instr_multi_0x092dd870,
++	arm_instr_nop,
++	arm_instr_multi_0x092d4070__eq,
++	arm_instr_multi_0x092d4070__ne,
++	arm_instr_multi_0x092d4070__cs,
++	arm_instr_multi_0x092d4070__cc,
++	arm_instr_multi_0x092d4070__mi,
++	arm_instr_multi_0x092d4070__pl,
++	arm_instr_multi_0x092d4070__vs,
++	arm_instr_multi_0x092d4070__vc,
++	arm_instr_multi_0x092d4070__hi,
++	arm_instr_multi_0x092d4070__ls,
++	arm_instr_multi_0x092d4070__ge,
++	arm_instr_multi_0x092d4070__lt,
++	arm_instr_multi_0x092d4070__gt,
++	arm_instr_multi_0x092d4070__le,
++	arm_instr_multi_0x092d4070,
++	arm_instr_nop,
++	arm_instr_multi_0x092ddc70__eq,
++	arm_instr_multi_0x092ddc70__ne,
++	arm_instr_multi_0x092ddc70__cs,
++	arm_instr_multi_0x092ddc70__cc,
++	arm_instr_multi_0x092ddc70__mi,
++	arm_instr_multi_0x092ddc70__pl,
++	arm_instr_multi_0x092ddc70__vs,
++	arm_instr_multi_0x092ddc70__vc,
++	arm_instr_multi_0x092ddc70__hi,
++	arm_instr_multi_0x092ddc70__ls,
++	arm_instr_multi_0x092ddc70__ge,
++	arm_instr_multi_0x092ddc70__lt,
++	arm_instr_multi_0x092ddc70__gt,
++	arm_instr_multi_0x092ddc70__le,
++	arm_instr_multi_0x092ddc70,
++	arm_instr_nop,
++	arm_instr_multi_0x092ddcf0__eq,
++	arm_instr_multi_0x092ddcf0__ne,
++	arm_instr_multi_0x092ddcf0__cs,
++	arm_instr_multi_0x092ddcf0__cc,
++	arm_instr_multi_0x092ddcf0__mi,
++	arm_instr_multi_0x092ddcf0__pl,
++	arm_instr_multi_0x092ddcf0__vs,
++	arm_instr_multi_0x092ddcf0__vc,
++	arm_instr_multi_0x092ddcf0__hi,
++	arm_instr_multi_0x092ddcf0__ls,
++	arm_instr_multi_0x092ddcf0__ge,
++	arm_instr_multi_0x092ddcf0__lt,
++	arm_instr_multi_0x092ddcf0__gt,
++	arm_instr_multi_0x092ddcf0__le,
++	arm_instr_multi_0x092ddcf0,
++	arm_instr_nop,
++	arm_instr_multi_0x092d40f0__eq,
++	arm_instr_multi_0x092d40f0__ne,
++	arm_instr_multi_0x092d40f0__cs,
++	arm_instr_multi_0x092d40f0__cc,
++	arm_instr_multi_0x092d40f0__mi,
++	arm_instr_multi_0x092d40f0__pl,
++	arm_instr_multi_0x092d40f0__vs,
++	arm_instr_multi_0x092d40f0__vc,
++	arm_instr_multi_0x092d40f0__hi,
++	arm_instr_multi_0x092d40f0__ls,
++	arm_instr_multi_0x092d40f0__ge,
++	arm_instr_multi_0x092d40f0__lt,
++	arm_instr_multi_0x092d40f0__gt,
++	arm_instr_multi_0x092d40f0__le,
++	arm_instr_multi_0x092d40f0,
++	arm_instr_nop,
++	arm_instr_multi_0x092d0070__eq,
++	arm_instr_multi_0x092d0070__ne,
++	arm_instr_multi_0x092d0070__cs,
++	arm_instr_multi_0x092d0070__cc,
++	arm_instr_multi_0x092d0070__mi,
++	arm_instr_multi_0x092d0070__pl,
++	arm_instr_multi_0x092d0070__vs,
++	arm_instr_multi_0x092d0070__vc,
++	arm_instr_multi_0x092d0070__hi,
++	arm_instr_multi_0x092d0070__ls,
++	arm_instr_multi_0x092d0070__ge,
++	arm_instr_multi_0x092d0070__lt,
++	arm_instr_multi_0x092d0070__gt,
++	arm_instr_multi_0x092d0070__le,
++	arm_instr_multi_0x092d0070,
++	arm_instr_nop,
++	arm_instr_multi_0x092d00f0__eq,
++	arm_instr_multi_0x092d00f0__ne,
++	arm_instr_multi_0x092d00f0__cs,
++	arm_instr_multi_0x092d00f0__cc,
++	arm_instr_multi_0x092d00f0__mi,
++	arm_instr_multi_0x092d00f0__pl,
++	arm_instr_multi_0x092d00f0__vs,
++	arm_instr_multi_0x092d00f0__vc,
++	arm_instr_multi_0x092d00f0__hi,
++	arm_instr_multi_0x092d00f0__ls,
++	arm_instr_multi_0x092d00f0__ge,
++	arm_instr_multi_0x092d00f0__lt,
++	arm_instr_multi_0x092d00f0__gt,
++	arm_instr_multi_0x092d00f0__le,
++	arm_instr_multi_0x092d00f0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_62[128])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x092ddff0__eq,
++	arm_instr_multi_0x092ddff0__ne,
++	arm_instr_multi_0x092ddff0__cs,
++	arm_instr_multi_0x092ddff0__cc,
++	arm_instr_multi_0x092ddff0__mi,
++	arm_instr_multi_0x092ddff0__pl,
++	arm_instr_multi_0x092ddff0__vs,
++	arm_instr_multi_0x092ddff0__vc,
++	arm_instr_multi_0x092ddff0__hi,
++	arm_instr_multi_0x092ddff0__ls,
++	arm_instr_multi_0x092ddff0__ge,
++	arm_instr_multi_0x092ddff0__lt,
++	arm_instr_multi_0x092ddff0__gt,
++	arm_instr_multi_0x092ddff0__le,
++	arm_instr_multi_0x092ddff0,
++	arm_instr_nop,
++	arm_instr_multi_0x092dddf0__eq,
++	arm_instr_multi_0x092dddf0__ne,
++	arm_instr_multi_0x092dddf0__cs,
++	arm_instr_multi_0x092dddf0__cc,
++	arm_instr_multi_0x092dddf0__mi,
++	arm_instr_multi_0x092dddf0__pl,
++	arm_instr_multi_0x092dddf0__vs,
++	arm_instr_multi_0x092dddf0__vc,
++	arm_instr_multi_0x092dddf0__hi,
++	arm_instr_multi_0x092dddf0__ls,
++	arm_instr_multi_0x092dddf0__ge,
++	arm_instr_multi_0x092dddf0__lt,
++	arm_instr_multi_0x092dddf0__gt,
++	arm_instr_multi_0x092dddf0__le,
++	arm_instr_multi_0x092dddf0,
++	arm_instr_nop,
++	arm_instr_multi_0x092dd9f0__eq,
++	arm_instr_multi_0x092dd9f0__ne,
++	arm_instr_multi_0x092dd9f0__cs,
++	arm_instr_multi_0x092dd9f0__cc,
++	arm_instr_multi_0x092dd9f0__mi,
++	arm_instr_multi_0x092dd9f0__pl,
++	arm_instr_multi_0x092dd9f0__vs,
++	arm_instr_multi_0x092dd9f0__vc,
++	arm_instr_multi_0x092dd9f0__hi,
++	arm_instr_multi_0x092dd9f0__ls,
++	arm_instr_multi_0x092dd9f0__ge,
++	arm_instr_multi_0x092dd9f0__lt,
++	arm_instr_multi_0x092dd9f0__gt,
++	arm_instr_multi_0x092dd9f0__le,
++	arm_instr_multi_0x092dd9f0,
++	arm_instr_nop,
++	arm_instr_multi_0x092d41f0__eq,
++	arm_instr_multi_0x092d41f0__ne,
++	arm_instr_multi_0x092d41f0__cs,
++	arm_instr_multi_0x092d41f0__cc,
++	arm_instr_multi_0x092d41f0__mi,
++	arm_instr_multi_0x092d41f0__pl,
++	arm_instr_multi_0x092d41f0__vs,
++	arm_instr_multi_0x092d41f0__vc,
++	arm_instr_multi_0x092d41f0__hi,
++	arm_instr_multi_0x092d41f0__ls,
++	arm_instr_multi_0x092d41f0__ge,
++	arm_instr_multi_0x092d41f0__lt,
++	arm_instr_multi_0x092d41f0__gt,
++	arm_instr_multi_0x092d41f0__le,
++	arm_instr_multi_0x092d41f0,
++	arm_instr_nop,
++	arm_instr_multi_0x092ddbf0__eq,
++	arm_instr_multi_0x092ddbf0__ne,
++	arm_instr_multi_0x092ddbf0__cs,
++	arm_instr_multi_0x092ddbf0__cc,
++	arm_instr_multi_0x092ddbf0__mi,
++	arm_instr_multi_0x092ddbf0__pl,
++	arm_instr_multi_0x092ddbf0__vs,
++	arm_instr_multi_0x092ddbf0__vc,
++	arm_instr_multi_0x092ddbf0__hi,
++	arm_instr_multi_0x092ddbf0__ls,
++	arm_instr_multi_0x092ddbf0__ge,
++	arm_instr_multi_0x092ddbf0__lt,
++	arm_instr_multi_0x092ddbf0__gt,
++	arm_instr_multi_0x092ddbf0__le,
++	arm_instr_multi_0x092ddbf0,
++	arm_instr_nop,
++	arm_instr_multi_0x092d0ff0__eq,
++	arm_instr_multi_0x092d0ff0__ne,
++	arm_instr_multi_0x092d0ff0__cs,
++	arm_instr_multi_0x092d0ff0__cc,
++	arm_instr_multi_0x092d0ff0__mi,
++	arm_instr_multi_0x092d0ff0__pl,
++	arm_instr_multi_0x092d0ff0__vs,
++	arm_instr_multi_0x092d0ff0__vc,
++	arm_instr_multi_0x092d0ff0__hi,
++	arm_instr_multi_0x092d0ff0__ls,
++	arm_instr_multi_0x092d0ff0__ge,
++	arm_instr_multi_0x092d0ff0__lt,
++	arm_instr_multi_0x092d0ff0__gt,
++	arm_instr_multi_0x092d0ff0__le,
++	arm_instr_multi_0x092d0ff0,
++	arm_instr_nop,
++	arm_instr_multi_0x092d47f0__eq,
++	arm_instr_multi_0x092d47f0__ne,
++	arm_instr_multi_0x092d47f0__cs,
++	arm_instr_multi_0x092d47f0__cc,
++	arm_instr_multi_0x092d47f0__mi,
++	arm_instr_multi_0x092d47f0__pl,
++	arm_instr_multi_0x092d47f0__vs,
++	arm_instr_multi_0x092d47f0__vc,
++	arm_instr_multi_0x092d47f0__hi,
++	arm_instr_multi_0x092d47f0__ls,
++	arm_instr_multi_0x092d47f0__ge,
++	arm_instr_multi_0x092d47f0__lt,
++	arm_instr_multi_0x092d47f0__gt,
++	arm_instr_multi_0x092d47f0__le,
++	arm_instr_multi_0x092d47f0,
++	arm_instr_nop,
++	arm_instr_multi_0x092d45f0__eq,
++	arm_instr_multi_0x092d45f0__ne,
++	arm_instr_multi_0x092d45f0__cs,
++	arm_instr_multi_0x092d45f0__cc,
++	arm_instr_multi_0x092d45f0__mi,
++	arm_instr_multi_0x092d45f0__pl,
++	arm_instr_multi_0x092d45f0__vs,
++	arm_instr_multi_0x092d45f0__vc,
++	arm_instr_multi_0x092d45f0__hi,
++	arm_instr_multi_0x092d45f0__ls,
++	arm_instr_multi_0x092d45f0__ge,
++	arm_instr_multi_0x092d45f0__lt,
++	arm_instr_multi_0x092d45f0__gt,
++	arm_instr_multi_0x092d45f0__le,
++	arm_instr_multi_0x092d45f0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_64[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08100009__eq,
++	arm_instr_multi_0x08100009__ne,
++	arm_instr_multi_0x08100009__cs,
++	arm_instr_multi_0x08100009__cc,
++	arm_instr_multi_0x08100009__mi,
++	arm_instr_multi_0x08100009__pl,
++	arm_instr_multi_0x08100009__vs,
++	arm_instr_multi_0x08100009__vc,
++	arm_instr_multi_0x08100009__hi,
++	arm_instr_multi_0x08100009__ls,
++	arm_instr_multi_0x08100009__ge,
++	arm_instr_multi_0x08100009__lt,
++	arm_instr_multi_0x08100009__gt,
++	arm_instr_multi_0x08100009__le,
++	arm_instr_multi_0x08100009,
++	arm_instr_nop,
++	arm_instr_multi_0x091a0600__eq,
++	arm_instr_multi_0x091a0600__ne,
++	arm_instr_multi_0x091a0600__cs,
++	arm_instr_multi_0x091a0600__cc,
++	arm_instr_multi_0x091a0600__mi,
++	arm_instr_multi_0x091a0600__pl,
++	arm_instr_multi_0x091a0600__vs,
++	arm_instr_multi_0x091a0600__vc,
++	arm_instr_multi_0x091a0600__hi,
++	arm_instr_multi_0x091a0600__ls,
++	arm_instr_multi_0x091a0600__ge,
++	arm_instr_multi_0x091a0600__lt,
++	arm_instr_multi_0x091a0600__gt,
++	arm_instr_multi_0x091a0600__le,
++	arm_instr_multi_0x091a0600,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_65[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09120006__eq,
++	arm_instr_multi_0x09120006__ne,
++	arm_instr_multi_0x09120006__cs,
++	arm_instr_multi_0x09120006__cc,
++	arm_instr_multi_0x09120006__mi,
++	arm_instr_multi_0x09120006__pl,
++	arm_instr_multi_0x09120006__vs,
++	arm_instr_multi_0x09120006__vc,
++	arm_instr_multi_0x09120006__hi,
++	arm_instr_multi_0x09120006__ls,
++	arm_instr_multi_0x09120006__ge,
++	arm_instr_multi_0x09120006__lt,
++	arm_instr_multi_0x09120006__gt,
++	arm_instr_multi_0x09120006__le,
++	arm_instr_multi_0x09120006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_80[128])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08110003__eq,
++	arm_instr_multi_0x08110003__ne,
++	arm_instr_multi_0x08110003__cs,
++	arm_instr_multi_0x08110003__cc,
++	arm_instr_multi_0x08110003__mi,
++	arm_instr_multi_0x08110003__pl,
++	arm_instr_multi_0x08110003__vs,
++	arm_instr_multi_0x08110003__vc,
++	arm_instr_multi_0x08110003__hi,
++	arm_instr_multi_0x08110003__ls,
++	arm_instr_multi_0x08110003__ge,
++	arm_instr_multi_0x08110003__lt,
++	arm_instr_multi_0x08110003__gt,
++	arm_instr_multi_0x08110003__le,
++	arm_instr_multi_0x08110003,
++	arm_instr_nop,
++	arm_instr_multi_0x091ba800__eq,
++	arm_instr_multi_0x091ba800__ne,
++	arm_instr_multi_0x091ba800__cs,
++	arm_instr_multi_0x091ba800__cc,
++	arm_instr_multi_0x091ba800__mi,
++	arm_instr_multi_0x091ba800__pl,
++	arm_instr_multi_0x091ba800__vs,
++	arm_instr_multi_0x091ba800__vc,
++	arm_instr_multi_0x091ba800__hi,
++	arm_instr_multi_0x091ba800__ls,
++	arm_instr_multi_0x091ba800__ge,
++	arm_instr_multi_0x091ba800__lt,
++	arm_instr_multi_0x091ba800__gt,
++	arm_instr_multi_0x091ba800__le,
++	arm_instr_multi_0x091ba800,
++	arm_instr_nop,
++	arm_instr_multi_0x091b6800__eq,
++	arm_instr_multi_0x091b6800__ne,
++	arm_instr_multi_0x091b6800__cs,
++	arm_instr_multi_0x091b6800__cc,
++	arm_instr_multi_0x091b6800__mi,
++	arm_instr_multi_0x091b6800__pl,
++	arm_instr_multi_0x091b6800__vs,
++	arm_instr_multi_0x091b6800__vc,
++	arm_instr_multi_0x091b6800__hi,
++	arm_instr_multi_0x091b6800__ls,
++	arm_instr_multi_0x091b6800__ge,
++	arm_instr_multi_0x091b6800__lt,
++	arm_instr_multi_0x091b6800__gt,
++	arm_instr_multi_0x091b6800__le,
++	arm_instr_multi_0x091b6800,
++	arm_instr_nop,
++	arm_instr_multi_0x08130003__eq,
++	arm_instr_multi_0x08130003__ne,
++	arm_instr_multi_0x08130003__cs,
++	arm_instr_multi_0x08130003__cc,
++	arm_instr_multi_0x08130003__mi,
++	arm_instr_multi_0x08130003__pl,
++	arm_instr_multi_0x08130003__vs,
++	arm_instr_multi_0x08130003__vc,
++	arm_instr_multi_0x08130003__hi,
++	arm_instr_multi_0x08130003__ls,
++	arm_instr_multi_0x08130003__ge,
++	arm_instr_multi_0x08130003__lt,
++	arm_instr_multi_0x08130003__gt,
++	arm_instr_multi_0x08130003__le,
++	arm_instr_multi_0x08130003,
++	arm_instr_nop,
++	arm_instr_multi_0x091bac00__eq,
++	arm_instr_multi_0x091bac00__ne,
++	arm_instr_multi_0x091bac00__cs,
++	arm_instr_multi_0x091bac00__cc,
++	arm_instr_multi_0x091bac00__mi,
++	arm_instr_multi_0x091bac00__pl,
++	arm_instr_multi_0x091bac00__vs,
++	arm_instr_multi_0x091bac00__vc,
++	arm_instr_multi_0x091bac00__hi,
++	arm_instr_multi_0x091bac00__ls,
++	arm_instr_multi_0x091bac00__ge,
++	arm_instr_multi_0x091bac00__lt,
++	arm_instr_multi_0x091bac00__gt,
++	arm_instr_multi_0x091bac00__le,
++	arm_instr_multi_0x091bac00,
++	arm_instr_nop,
++	arm_instr_multi_0x09311008__eq,
++	arm_instr_multi_0x09311008__ne,
++	arm_instr_multi_0x09311008__cs,
++	arm_instr_multi_0x09311008__cc,
++	arm_instr_multi_0x09311008__mi,
++	arm_instr_multi_0x09311008__pl,
++	arm_instr_multi_0x09311008__vs,
++	arm_instr_multi_0x09311008__vc,
++	arm_instr_multi_0x09311008__hi,
++	arm_instr_multi_0x09311008__ls,
++	arm_instr_multi_0x09311008__ge,
++	arm_instr_multi_0x09311008__lt,
++	arm_instr_multi_0x09311008__gt,
++	arm_instr_multi_0x09311008__le,
++	arm_instr_multi_0x09311008,
++	arm_instr_nop,
++	arm_instr_multi_0x09315008__eq,
++	arm_instr_multi_0x09315008__ne,
++	arm_instr_multi_0x09315008__cs,
++	arm_instr_multi_0x09315008__cc,
++	arm_instr_multi_0x09315008__mi,
++	arm_instr_multi_0x09315008__pl,
++	arm_instr_multi_0x09315008__vs,
++	arm_instr_multi_0x09315008__vc,
++	arm_instr_multi_0x09315008__hi,
++	arm_instr_multi_0x09315008__ls,
++	arm_instr_multi_0x09315008__ge,
++	arm_instr_multi_0x09315008__lt,
++	arm_instr_multi_0x09315008__gt,
++	arm_instr_multi_0x09315008__le,
++	arm_instr_multi_0x09315008,
++	arm_instr_nop,
++	arm_instr_multi_0x09110003__eq,
++	arm_instr_multi_0x09110003__ne,
++	arm_instr_multi_0x09110003__cs,
++	arm_instr_multi_0x09110003__cc,
++	arm_instr_multi_0x09110003__mi,
++	arm_instr_multi_0x09110003__pl,
++	arm_instr_multi_0x09110003__vs,
++	arm_instr_multi_0x09110003__vc,
++	arm_instr_multi_0x09110003__hi,
++	arm_instr_multi_0x09110003__ls,
++	arm_instr_multi_0x09110003__ge,
++	arm_instr_multi_0x09110003__lt,
++	arm_instr_multi_0x09110003__gt,
++	arm_instr_multi_0x09110003__le,
++	arm_instr_multi_0x09110003,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_81[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x0911000f__eq,
++	arm_instr_multi_0x0911000f__ne,
++	arm_instr_multi_0x0911000f__cs,
++	arm_instr_multi_0x0911000f__cc,
++	arm_instr_multi_0x0911000f__mi,
++	arm_instr_multi_0x0911000f__pl,
++	arm_instr_multi_0x0911000f__vs,
++	arm_instr_multi_0x0911000f__vc,
++	arm_instr_multi_0x0911000f__hi,
++	arm_instr_multi_0x0911000f__ls,
++	arm_instr_multi_0x0911000f__ge,
++	arm_instr_multi_0x0911000f__lt,
++	arm_instr_multi_0x0911000f__gt,
++	arm_instr_multi_0x0911000f__le,
++	arm_instr_multi_0x0911000f,
++	arm_instr_nop,
++	arm_instr_multi_0x0813000c__eq,
++	arm_instr_multi_0x0813000c__ne,
++	arm_instr_multi_0x0813000c__cs,
++	arm_instr_multi_0x0813000c__cc,
++	arm_instr_multi_0x0813000c__mi,
++	arm_instr_multi_0x0813000c__pl,
++	arm_instr_multi_0x0813000c__vs,
++	arm_instr_multi_0x0813000c__vc,
++	arm_instr_multi_0x0813000c__hi,
++	arm_instr_multi_0x0813000c__ls,
++	arm_instr_multi_0x0813000c__ge,
++	arm_instr_multi_0x0813000c__lt,
++	arm_instr_multi_0x0813000c__gt,
++	arm_instr_multi_0x0813000c__le,
++	arm_instr_multi_0x0813000c,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_82[128])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x091ba830__eq,
++	arm_instr_multi_0x091ba830__ne,
++	arm_instr_multi_0x091ba830__cs,
++	arm_instr_multi_0x091ba830__cc,
++	arm_instr_multi_0x091ba830__mi,
++	arm_instr_multi_0x091ba830__pl,
++	arm_instr_multi_0x091ba830__vs,
++	arm_instr_multi_0x091ba830__vc,
++	arm_instr_multi_0x091ba830__hi,
++	arm_instr_multi_0x091ba830__ls,
++	arm_instr_multi_0x091ba830__ge,
++	arm_instr_multi_0x091ba830__lt,
++	arm_instr_multi_0x091ba830__gt,
++	arm_instr_multi_0x091ba830__le,
++	arm_instr_multi_0x091ba830,
++	arm_instr_nop,
++	arm_instr_multi_0x091ba810__eq,
++	arm_instr_multi_0x091ba810__ne,
++	arm_instr_multi_0x091ba810__cs,
++	arm_instr_multi_0x091ba810__cc,
++	arm_instr_multi_0x091ba810__mi,
++	arm_instr_multi_0x091ba810__pl,
++	arm_instr_multi_0x091ba810__vs,
++	arm_instr_multi_0x091ba810__vc,
++	arm_instr_multi_0x091ba810__hi,
++	arm_instr_multi_0x091ba810__ls,
++	arm_instr_multi_0x091ba810__ge,
++	arm_instr_multi_0x091ba810__lt,
++	arm_instr_multi_0x091ba810__gt,
++	arm_instr_multi_0x091ba810__le,
++	arm_instr_multi_0x091ba810,
++	arm_instr_nop,
++	arm_instr_multi_0x08130018__eq,
++	arm_instr_multi_0x08130018__ne,
++	arm_instr_multi_0x08130018__cs,
++	arm_instr_multi_0x08130018__cc,
++	arm_instr_multi_0x08130018__mi,
++	arm_instr_multi_0x08130018__pl,
++	arm_instr_multi_0x08130018__vs,
++	arm_instr_multi_0x08130018__vc,
++	arm_instr_multi_0x08130018__hi,
++	arm_instr_multi_0x08130018__ls,
++	arm_instr_multi_0x08130018__ge,
++	arm_instr_multi_0x08130018__lt,
++	arm_instr_multi_0x08130018__gt,
++	arm_instr_multi_0x08130018__le,
++	arm_instr_multi_0x08130018,
++	arm_instr_nop,
++	arm_instr_multi_0x091b6830__eq,
++	arm_instr_multi_0x091b6830__ne,
++	arm_instr_multi_0x091b6830__cs,
++	arm_instr_multi_0x091b6830__cc,
++	arm_instr_multi_0x091b6830__mi,
++	arm_instr_multi_0x091b6830__pl,
++	arm_instr_multi_0x091b6830__vs,
++	arm_instr_multi_0x091b6830__vc,
++	arm_instr_multi_0x091b6830__hi,
++	arm_instr_multi_0x091b6830__ls,
++	arm_instr_multi_0x091b6830__ge,
++	arm_instr_multi_0x091b6830__lt,
++	arm_instr_multi_0x091b6830__gt,
++	arm_instr_multi_0x091b6830__le,
++	arm_instr_multi_0x091b6830,
++	arm_instr_nop,
++	arm_instr_multi_0x091bac30__eq,
++	arm_instr_multi_0x091bac30__ne,
++	arm_instr_multi_0x091bac30__cs,
++	arm_instr_multi_0x091bac30__cc,
++	arm_instr_multi_0x091bac30__mi,
++	arm_instr_multi_0x091bac30__pl,
++	arm_instr_multi_0x091bac30__vs,
++	arm_instr_multi_0x091bac30__vc,
++	arm_instr_multi_0x091bac30__hi,
++	arm_instr_multi_0x091bac30__ls,
++	arm_instr_multi_0x091bac30__ge,
++	arm_instr_multi_0x091bac30__lt,
++	arm_instr_multi_0x091bac30__gt,
++	arm_instr_multi_0x091bac30__le,
++	arm_instr_multi_0x091bac30,
++	arm_instr_nop,
++	arm_instr_multi_0x09315018__eq,
++	arm_instr_multi_0x09315018__ne,
++	arm_instr_multi_0x09315018__cs,
++	arm_instr_multi_0x09315018__cc,
++	arm_instr_multi_0x09315018__mi,
++	arm_instr_multi_0x09315018__pl,
++	arm_instr_multi_0x09315018__vs,
++	arm_instr_multi_0x09315018__vc,
++	arm_instr_multi_0x09315018__hi,
++	arm_instr_multi_0x09315018__ls,
++	arm_instr_multi_0x09315018__ge,
++	arm_instr_multi_0x09315018__lt,
++	arm_instr_multi_0x09315018__gt,
++	arm_instr_multi_0x09315018__le,
++	arm_instr_multi_0x09315018,
++	arm_instr_nop,
++	arm_instr_multi_0x091b6810__eq,
++	arm_instr_multi_0x091b6810__ne,
++	arm_instr_multi_0x091b6810__cs,
++	arm_instr_multi_0x091b6810__cc,
++	arm_instr_multi_0x091b6810__mi,
++	arm_instr_multi_0x091b6810__pl,
++	arm_instr_multi_0x091b6810__vs,
++	arm_instr_multi_0x091b6810__vc,
++	arm_instr_multi_0x091b6810__hi,
++	arm_instr_multi_0x091b6810__ls,
++	arm_instr_multi_0x091b6810__ge,
++	arm_instr_multi_0x091b6810__lt,
++	arm_instr_multi_0x091b6810__gt,
++	arm_instr_multi_0x091b6810__le,
++	arm_instr_multi_0x091b6810,
++	arm_instr_nop,
++	arm_instr_multi_0x09311038__eq,
++	arm_instr_multi_0x09311038__ne,
++	arm_instr_multi_0x09311038__cs,
++	arm_instr_multi_0x09311038__cc,
++	arm_instr_multi_0x09311038__mi,
++	arm_instr_multi_0x09311038__pl,
++	arm_instr_multi_0x09311038__vs,
++	arm_instr_multi_0x09311038__vc,
++	arm_instr_multi_0x09311038__hi,
++	arm_instr_multi_0x09311038__ls,
++	arm_instr_multi_0x09311038__ge,
++	arm_instr_multi_0x09311038__lt,
++	arm_instr_multi_0x09311038__gt,
++	arm_instr_multi_0x09311038__le,
++	arm_instr_multi_0x09311038,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_86[96])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x091ba8f0__eq,
++	arm_instr_multi_0x091ba8f0__ne,
++	arm_instr_multi_0x091ba8f0__cs,
++	arm_instr_multi_0x091ba8f0__cc,
++	arm_instr_multi_0x091ba8f0__mi,
++	arm_instr_multi_0x091ba8f0__pl,
++	arm_instr_multi_0x091ba8f0__vs,
++	arm_instr_multi_0x091ba8f0__vc,
++	arm_instr_multi_0x091ba8f0__hi,
++	arm_instr_multi_0x091ba8f0__ls,
++	arm_instr_multi_0x091ba8f0__ge,
++	arm_instr_multi_0x091ba8f0__lt,
++	arm_instr_multi_0x091ba8f0__gt,
++	arm_instr_multi_0x091ba8f0__le,
++	arm_instr_multi_0x091ba8f0,
++	arm_instr_nop,
++	arm_instr_multi_0x091ba870__eq,
++	arm_instr_multi_0x091ba870__ne,
++	arm_instr_multi_0x091ba870__cs,
++	arm_instr_multi_0x091ba870__cc,
++	arm_instr_multi_0x091ba870__mi,
++	arm_instr_multi_0x091ba870__pl,
++	arm_instr_multi_0x091ba870__vs,
++	arm_instr_multi_0x091ba870__vc,
++	arm_instr_multi_0x091ba870__hi,
++	arm_instr_multi_0x091ba870__ls,
++	arm_instr_multi_0x091ba870__ge,
++	arm_instr_multi_0x091ba870__lt,
++	arm_instr_multi_0x091ba870__gt,
++	arm_instr_multi_0x091ba870__le,
++	arm_instr_multi_0x091ba870,
++	arm_instr_nop,
++	arm_instr_multi_0x091bac70__eq,
++	arm_instr_multi_0x091bac70__ne,
++	arm_instr_multi_0x091bac70__cs,
++	arm_instr_multi_0x091bac70__cc,
++	arm_instr_multi_0x091bac70__mi,
++	arm_instr_multi_0x091bac70__pl,
++	arm_instr_multi_0x091bac70__vs,
++	arm_instr_multi_0x091bac70__vc,
++	arm_instr_multi_0x091bac70__hi,
++	arm_instr_multi_0x091bac70__ls,
++	arm_instr_multi_0x091bac70__ge,
++	arm_instr_multi_0x091bac70__lt,
++	arm_instr_multi_0x091bac70__gt,
++	arm_instr_multi_0x091bac70__le,
++	arm_instr_multi_0x091bac70,
++	arm_instr_nop,
++	arm_instr_multi_0x091bacf0__eq,
++	arm_instr_multi_0x091bacf0__ne,
++	arm_instr_multi_0x091bacf0__cs,
++	arm_instr_multi_0x091bacf0__cc,
++	arm_instr_multi_0x091bacf0__mi,
++	arm_instr_multi_0x091bacf0__pl,
++	arm_instr_multi_0x091bacf0__vs,
++	arm_instr_multi_0x091bacf0__vc,
++	arm_instr_multi_0x091bacf0__hi,
++	arm_instr_multi_0x091bacf0__ls,
++	arm_instr_multi_0x091bacf0__ge,
++	arm_instr_multi_0x091bacf0__lt,
++	arm_instr_multi_0x091bacf0__gt,
++	arm_instr_multi_0x091bacf0__le,
++	arm_instr_multi_0x091bacf0,
++	arm_instr_nop,
++	arm_instr_multi_0x091b6870__eq,
++	arm_instr_multi_0x091b6870__ne,
++	arm_instr_multi_0x091b6870__cs,
++	arm_instr_multi_0x091b6870__cc,
++	arm_instr_multi_0x091b6870__mi,
++	arm_instr_multi_0x091b6870__pl,
++	arm_instr_multi_0x091b6870__vs,
++	arm_instr_multi_0x091b6870__vc,
++	arm_instr_multi_0x091b6870__hi,
++	arm_instr_multi_0x091b6870__ls,
++	arm_instr_multi_0x091b6870__ge,
++	arm_instr_multi_0x091b6870__lt,
++	arm_instr_multi_0x091b6870__gt,
++	arm_instr_multi_0x091b6870__le,
++	arm_instr_multi_0x091b6870,
++	arm_instr_nop,
++	arm_instr_multi_0x091b68f0__eq,
++	arm_instr_multi_0x091b68f0__ne,
++	arm_instr_multi_0x091b68f0__cs,
++	arm_instr_multi_0x091b68f0__cc,
++	arm_instr_multi_0x091b68f0__mi,
++	arm_instr_multi_0x091b68f0__pl,
++	arm_instr_multi_0x091b68f0__vs,
++	arm_instr_multi_0x091b68f0__vc,
++	arm_instr_multi_0x091b68f0__hi,
++	arm_instr_multi_0x091b68f0__ls,
++	arm_instr_multi_0x091b68f0__ge,
++	arm_instr_multi_0x091b68f0__lt,
++	arm_instr_multi_0x091b68f0__gt,
++	arm_instr_multi_0x091b68f0__le,
++	arm_instr_multi_0x091b68f0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_88[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09190300__eq,
++	arm_instr_multi_0x09190300__ne,
++	arm_instr_multi_0x09190300__cs,
++	arm_instr_multi_0x09190300__cc,
++	arm_instr_multi_0x09190300__mi,
++	arm_instr_multi_0x09190300__pl,
++	arm_instr_multi_0x09190300__vs,
++	arm_instr_multi_0x09190300__vc,
++	arm_instr_multi_0x09190300__hi,
++	arm_instr_multi_0x09190300__ls,
++	arm_instr_multi_0x09190300__ge,
++	arm_instr_multi_0x09190300__lt,
++	arm_instr_multi_0x09190300__gt,
++	arm_instr_multi_0x09190300__le,
++	arm_instr_multi_0x09190300,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_94[112])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x091baff0__eq,
++	arm_instr_multi_0x091baff0__ne,
++	arm_instr_multi_0x091baff0__cs,
++	arm_instr_multi_0x091baff0__cc,
++	arm_instr_multi_0x091baff0__mi,
++	arm_instr_multi_0x091baff0__pl,
++	arm_instr_multi_0x091baff0__vs,
++	arm_instr_multi_0x091baff0__vc,
++	arm_instr_multi_0x091baff0__hi,
++	arm_instr_multi_0x091baff0__ls,
++	arm_instr_multi_0x091baff0__ge,
++	arm_instr_multi_0x091baff0__lt,
++	arm_instr_multi_0x091baff0__gt,
++	arm_instr_multi_0x091baff0__le,
++	arm_instr_multi_0x091baff0,
++	arm_instr_nop,
++	arm_instr_multi_0x091badf0__eq,
++	arm_instr_multi_0x091badf0__ne,
++	arm_instr_multi_0x091badf0__cs,
++	arm_instr_multi_0x091badf0__cc,
++	arm_instr_multi_0x091badf0__mi,
++	arm_instr_multi_0x091badf0__pl,
++	arm_instr_multi_0x091badf0__vs,
++	arm_instr_multi_0x091badf0__vc,
++	arm_instr_multi_0x091badf0__hi,
++	arm_instr_multi_0x091badf0__ls,
++	arm_instr_multi_0x091badf0__ge,
++	arm_instr_multi_0x091badf0__lt,
++	arm_instr_multi_0x091badf0__gt,
++	arm_instr_multi_0x091badf0__le,
++	arm_instr_multi_0x091badf0,
++	arm_instr_nop,
++	arm_instr_multi_0x091ba9f0__eq,
++	arm_instr_multi_0x091ba9f0__ne,
++	arm_instr_multi_0x091ba9f0__cs,
++	arm_instr_multi_0x091ba9f0__cc,
++	arm_instr_multi_0x091ba9f0__mi,
++	arm_instr_multi_0x091ba9f0__pl,
++	arm_instr_multi_0x091ba9f0__vs,
++	arm_instr_multi_0x091ba9f0__vc,
++	arm_instr_multi_0x091ba9f0__hi,
++	arm_instr_multi_0x091ba9f0__ls,
++	arm_instr_multi_0x091ba9f0__ge,
++	arm_instr_multi_0x091ba9f0__lt,
++	arm_instr_multi_0x091ba9f0__gt,
++	arm_instr_multi_0x091ba9f0__le,
++	arm_instr_multi_0x091ba9f0,
++	arm_instr_nop,
++	arm_instr_multi_0x091b6ff0__eq,
++	arm_instr_multi_0x091b6ff0__ne,
++	arm_instr_multi_0x091b6ff0__cs,
++	arm_instr_multi_0x091b6ff0__cc,
++	arm_instr_multi_0x091b6ff0__mi,
++	arm_instr_multi_0x091b6ff0__pl,
++	arm_instr_multi_0x091b6ff0__vs,
++	arm_instr_multi_0x091b6ff0__vc,
++	arm_instr_multi_0x091b6ff0__hi,
++	arm_instr_multi_0x091b6ff0__ls,
++	arm_instr_multi_0x091b6ff0__ge,
++	arm_instr_multi_0x091b6ff0__lt,
++	arm_instr_multi_0x091b6ff0__gt,
++	arm_instr_multi_0x091b6ff0__le,
++	arm_instr_multi_0x091b6ff0,
++	arm_instr_nop,
++	arm_instr_multi_0x091babf0__eq,
++	arm_instr_multi_0x091babf0__ne,
++	arm_instr_multi_0x091babf0__cs,
++	arm_instr_multi_0x091babf0__cc,
++	arm_instr_multi_0x091babf0__mi,
++	arm_instr_multi_0x091babf0__pl,
++	arm_instr_multi_0x091babf0__vs,
++	arm_instr_multi_0x091babf0__vc,
++	arm_instr_multi_0x091babf0__hi,
++	arm_instr_multi_0x091babf0__ls,
++	arm_instr_multi_0x091babf0__ge,
++	arm_instr_multi_0x091babf0__lt,
++	arm_instr_multi_0x091babf0__gt,
++	arm_instr_multi_0x091babf0__le,
++	arm_instr_multi_0x091babf0,
++	arm_instr_nop,
++	arm_instr_multi_0x091b69f0__eq,
++	arm_instr_multi_0x091b69f0__ne,
++	arm_instr_multi_0x091b69f0__cs,
++	arm_instr_multi_0x091b69f0__cc,
++	arm_instr_multi_0x091b69f0__mi,
++	arm_instr_multi_0x091b69f0__pl,
++	arm_instr_multi_0x091b69f0__vs,
++	arm_instr_multi_0x091b69f0__vc,
++	arm_instr_multi_0x091b69f0__hi,
++	arm_instr_multi_0x091b69f0__ls,
++	arm_instr_multi_0x091b69f0__ge,
++	arm_instr_multi_0x091b69f0__lt,
++	arm_instr_multi_0x091b69f0__gt,
++	arm_instr_multi_0x091b69f0__le,
++	arm_instr_multi_0x091b69f0,
++	arm_instr_nop,
++	arm_instr_multi_0x091b6df0__eq,
++	arm_instr_multi_0x091b6df0__ne,
++	arm_instr_multi_0x091b6df0__cs,
++	arm_instr_multi_0x091b6df0__cc,
++	arm_instr_multi_0x091b6df0__mi,
++	arm_instr_multi_0x091b6df0__pl,
++	arm_instr_multi_0x091b6df0__vs,
++	arm_instr_multi_0x091b6df0__vc,
++	arm_instr_multi_0x091b6df0__hi,
++	arm_instr_multi_0x091b6df0__ls,
++	arm_instr_multi_0x091b6df0__ge,
++	arm_instr_multi_0x091b6df0__lt,
++	arm_instr_multi_0x091b6df0__gt,
++	arm_instr_multi_0x091b6df0__le,
++	arm_instr_multi_0x091b6df0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_97[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09160006__eq,
++	arm_instr_multi_0x09160006__ne,
++	arm_instr_multi_0x09160006__cs,
++	arm_instr_multi_0x09160006__cc,
++	arm_instr_multi_0x09160006__mi,
++	arm_instr_multi_0x09160006__pl,
++	arm_instr_multi_0x09160006__vs,
++	arm_instr_multi_0x09160006__vc,
++	arm_instr_multi_0x09160006__hi,
++	arm_instr_multi_0x09160006__ls,
++	arm_instr_multi_0x09160006__ge,
++	arm_instr_multi_0x09160006__lt,
++	arm_instr_multi_0x09160006__gt,
++	arm_instr_multi_0x09160006__le,
++	arm_instr_multi_0x09160006,
++	arm_instr_nop,
++	arm_instr_multi_0x091c0006__eq,
++	arm_instr_multi_0x091c0006__ne,
++	arm_instr_multi_0x091c0006__cs,
++	arm_instr_multi_0x091c0006__cc,
++	arm_instr_multi_0x091c0006__mi,
++	arm_instr_multi_0x091c0006__pl,
++	arm_instr_multi_0x091c0006__vs,
++	arm_instr_multi_0x091c0006__vc,
++	arm_instr_multi_0x091c0006__hi,
++	arm_instr_multi_0x091c0006__ls,
++	arm_instr_multi_0x091c0006__ge,
++	arm_instr_multi_0x091c0006__lt,
++	arm_instr_multi_0x091c0006__gt,
++	arm_instr_multi_0x091c0006__le,
++	arm_instr_multi_0x091c0006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_98[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09140018__eq,
++	arm_instr_multi_0x09140018__ne,
++	arm_instr_multi_0x09140018__cs,
++	arm_instr_multi_0x09140018__cc,
++	arm_instr_multi_0x09140018__mi,
++	arm_instr_multi_0x09140018__pl,
++	arm_instr_multi_0x09140018__vs,
++	arm_instr_multi_0x09140018__vc,
++	arm_instr_multi_0x09140018__hi,
++	arm_instr_multi_0x09140018__ls,
++	arm_instr_multi_0x09140018__ge,
++	arm_instr_multi_0x09140018__lt,
++	arm_instr_multi_0x09140018__gt,
++	arm_instr_multi_0x09140018__le,
++	arm_instr_multi_0x09140018,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_100[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09160060__eq,
++	arm_instr_multi_0x09160060__ne,
++	arm_instr_multi_0x09160060__cs,
++	arm_instr_multi_0x09160060__cc,
++	arm_instr_multi_0x09160060__mi,
++	arm_instr_multi_0x09160060__pl,
++	arm_instr_multi_0x09160060__vs,
++	arm_instr_multi_0x09160060__vc,
++	arm_instr_multi_0x09160060__hi,
++	arm_instr_multi_0x09160060__ls,
++	arm_instr_multi_0x09160060__ge,
++	arm_instr_multi_0x09160060__lt,
++	arm_instr_multi_0x09160060__gt,
++	arm_instr_multi_0x09160060__le,
++	arm_instr_multi_0x09160060,
++	arm_instr_nop,
++	arm_instr_multi_0x08160060__eq,
++	arm_instr_multi_0x08160060__ne,
++	arm_instr_multi_0x08160060__cs,
++	arm_instr_multi_0x08160060__cc,
++	arm_instr_multi_0x08160060__mi,
++	arm_instr_multi_0x08160060__pl,
++	arm_instr_multi_0x08160060__vs,
++	arm_instr_multi_0x08160060__vc,
++	arm_instr_multi_0x08160060__hi,
++	arm_instr_multi_0x08160060__ls,
++	arm_instr_multi_0x08160060__ge,
++	arm_instr_multi_0x08160060__lt,
++	arm_instr_multi_0x08160060__gt,
++	arm_instr_multi_0x08160060__le,
++	arm_instr_multi_0x08160060,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_112[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08150003__eq,
++	arm_instr_multi_0x08150003__ne,
++	arm_instr_multi_0x08150003__cs,
++	arm_instr_multi_0x08150003__cc,
++	arm_instr_multi_0x08150003__mi,
++	arm_instr_multi_0x08150003__pl,
++	arm_instr_multi_0x08150003__vs,
++	arm_instr_multi_0x08150003__vc,
++	arm_instr_multi_0x08150003__hi,
++	arm_instr_multi_0x08150003__ls,
++	arm_instr_multi_0x08150003__ge,
++	arm_instr_multi_0x08150003__lt,
++	arm_instr_multi_0x08150003__gt,
++	arm_instr_multi_0x08150003__le,
++	arm_instr_multi_0x08150003,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_113[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x0817000c__eq,
++	arm_instr_multi_0x0817000c__ne,
++	arm_instr_multi_0x0817000c__cs,
++	arm_instr_multi_0x0817000c__cc,
++	arm_instr_multi_0x0817000c__mi,
++	arm_instr_multi_0x0817000c__pl,
++	arm_instr_multi_0x0817000c__vs,
++	arm_instr_multi_0x0817000c__vc,
++	arm_instr_multi_0x0817000c__hi,
++	arm_instr_multi_0x0817000c__ls,
++	arm_instr_multi_0x0817000c__ge,
++	arm_instr_multi_0x0817000c__lt,
++	arm_instr_multi_0x0817000c__gt,
++	arm_instr_multi_0x0817000c__le,
++	arm_instr_multi_0x0817000c,
++	arm_instr_nop,
++	arm_instr_multi_0x09150006__eq,
++	arm_instr_multi_0x09150006__ne,
++	arm_instr_multi_0x09150006__cs,
++	arm_instr_multi_0x09150006__cc,
++	arm_instr_multi_0x09150006__mi,
++	arm_instr_multi_0x09150006__pl,
++	arm_instr_multi_0x09150006__vs,
++	arm_instr_multi_0x09150006__vc,
++	arm_instr_multi_0x09150006__hi,
++	arm_instr_multi_0x09150006__ls,
++	arm_instr_multi_0x09150006__ge,
++	arm_instr_multi_0x09150006__lt,
++	arm_instr_multi_0x09150006__gt,
++	arm_instr_multi_0x09150006__le,
++	arm_instr_multi_0x09150006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_114[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09150018__eq,
++	arm_instr_multi_0x09150018__ne,
++	arm_instr_multi_0x09150018__cs,
++	arm_instr_multi_0x09150018__cc,
++	arm_instr_multi_0x09150018__mi,
++	arm_instr_multi_0x09150018__pl,
++	arm_instr_multi_0x09150018__vs,
++	arm_instr_multi_0x09150018__vc,
++	arm_instr_multi_0x09150018__hi,
++	arm_instr_multi_0x09150018__ls,
++	arm_instr_multi_0x09150018__ge,
++	arm_instr_multi_0x09150018__lt,
++	arm_instr_multi_0x09150018__gt,
++	arm_instr_multi_0x09150018__le,
++	arm_instr_multi_0x09150018,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_128[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08820003__eq,
++	arm_instr_multi_0x08820003__ne,
++	arm_instr_multi_0x08820003__cs,
++	arm_instr_multi_0x08820003__cc,
++	arm_instr_multi_0x08820003__mi,
++	arm_instr_multi_0x08820003__pl,
++	arm_instr_multi_0x08820003__vs,
++	arm_instr_multi_0x08820003__vc,
++	arm_instr_multi_0x08820003__hi,
++	arm_instr_multi_0x08820003__ls,
++	arm_instr_multi_0x08820003__ge,
++	arm_instr_multi_0x08820003__lt,
++	arm_instr_multi_0x08820003__gt,
++	arm_instr_multi_0x08820003__le,
++	arm_instr_multi_0x08820003,
++	arm_instr_nop,
++	arm_instr_multi_0x08a01008__eq,
++	arm_instr_multi_0x08a01008__ne,
++	arm_instr_multi_0x08a01008__cs,
++	arm_instr_multi_0x08a01008__cc,
++	arm_instr_multi_0x08a01008__mi,
++	arm_instr_multi_0x08a01008__pl,
++	arm_instr_multi_0x08a01008__vs,
++	arm_instr_multi_0x08a01008__vc,
++	arm_instr_multi_0x08a01008__hi,
++	arm_instr_multi_0x08a01008__ls,
++	arm_instr_multi_0x08a01008__ge,
++	arm_instr_multi_0x08a01008__lt,
++	arm_instr_multi_0x08a01008__gt,
++	arm_instr_multi_0x08a01008__le,
++	arm_instr_multi_0x08a01008,
++	arm_instr_nop,
++	arm_instr_multi_0x08a05008__eq,
++	arm_instr_multi_0x08a05008__ne,
++	arm_instr_multi_0x08a05008__cs,
++	arm_instr_multi_0x08a05008__cc,
++	arm_instr_multi_0x08a05008__mi,
++	arm_instr_multi_0x08a05008__pl,
++	arm_instr_multi_0x08a05008__vs,
++	arm_instr_multi_0x08a05008__vc,
++	arm_instr_multi_0x08a05008__hi,
++	arm_instr_multi_0x08a05008__ls,
++	arm_instr_multi_0x08a05008__ge,
++	arm_instr_multi_0x08a05008__lt,
++	arm_instr_multi_0x08a05008__gt,
++	arm_instr_multi_0x08a05008__le,
++	arm_instr_multi_0x08a05008,
++	arm_instr_nop,
++	arm_instr_multi_0x08a20600__eq,
++	arm_instr_multi_0x08a20600__ne,
++	arm_instr_multi_0x08a20600__cs,
++	arm_instr_multi_0x08a20600__cc,
++	arm_instr_multi_0x08a20600__mi,
++	arm_instr_multi_0x08a20600__pl,
++	arm_instr_multi_0x08a20600__vs,
++	arm_instr_multi_0x08a20600__vc,
++	arm_instr_multi_0x08a20600__hi,
++	arm_instr_multi_0x08a20600__ls,
++	arm_instr_multi_0x08a20600__ge,
++	arm_instr_multi_0x08a20600__lt,
++	arm_instr_multi_0x08a20600__gt,
++	arm_instr_multi_0x08a20600__le,
++	arm_instr_multi_0x08a20600,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_129[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08800006__eq,
++	arm_instr_multi_0x08800006__ne,
++	arm_instr_multi_0x08800006__cs,
++	arm_instr_multi_0x08800006__cc,
++	arm_instr_multi_0x08800006__mi,
++	arm_instr_multi_0x08800006__pl,
++	arm_instr_multi_0x08800006__vs,
++	arm_instr_multi_0x08800006__vc,
++	arm_instr_multi_0x08800006__hi,
++	arm_instr_multi_0x08800006__ls,
++	arm_instr_multi_0x08800006__ge,
++	arm_instr_multi_0x08800006__lt,
++	arm_instr_multi_0x08800006__gt,
++	arm_instr_multi_0x08800006__le,
++	arm_instr_multi_0x08800006,
++	arm_instr_nop,
++	arm_instr_multi_0x08880006__eq,
++	arm_instr_multi_0x08880006__ne,
++	arm_instr_multi_0x08880006__cs,
++	arm_instr_multi_0x08880006__cc,
++	arm_instr_multi_0x08880006__mi,
++	arm_instr_multi_0x08880006__pl,
++	arm_instr_multi_0x08880006__vs,
++	arm_instr_multi_0x08880006__vc,
++	arm_instr_multi_0x08880006__hi,
++	arm_instr_multi_0x08880006__ls,
++	arm_instr_multi_0x08880006__ge,
++	arm_instr_multi_0x08880006__lt,
++	arm_instr_multi_0x08880006__gt,
++	arm_instr_multi_0x08880006__le,
++	arm_instr_multi_0x08880006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_130[96])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08820018__eq,
++	arm_instr_multi_0x08820018__ne,
++	arm_instr_multi_0x08820018__cs,
++	arm_instr_multi_0x08820018__cc,
++	arm_instr_multi_0x08820018__mi,
++	arm_instr_multi_0x08820018__pl,
++	arm_instr_multi_0x08820018__vs,
++	arm_instr_multi_0x08820018__vc,
++	arm_instr_multi_0x08820018__hi,
++	arm_instr_multi_0x08820018__ls,
++	arm_instr_multi_0x08820018__ge,
++	arm_instr_multi_0x08820018__lt,
++	arm_instr_multi_0x08820018__gt,
++	arm_instr_multi_0x08820018__le,
++	arm_instr_multi_0x08820018,
++	arm_instr_nop,
++	arm_instr_multi_0x08a05018__eq,
++	arm_instr_multi_0x08a05018__ne,
++	arm_instr_multi_0x08a05018__cs,
++	arm_instr_multi_0x08a05018__cc,
++	arm_instr_multi_0x08a05018__mi,
++	arm_instr_multi_0x08a05018__pl,
++	arm_instr_multi_0x08a05018__vs,
++	arm_instr_multi_0x08a05018__vc,
++	arm_instr_multi_0x08a05018__hi,
++	arm_instr_multi_0x08a05018__ls,
++	arm_instr_multi_0x08a05018__ge,
++	arm_instr_multi_0x08a05018__lt,
++	arm_instr_multi_0x08a05018__gt,
++	arm_instr_multi_0x08a05018__le,
++	arm_instr_multi_0x08a05018,
++	arm_instr_nop,
++	arm_instr_multi_0x08880018__eq,
++	arm_instr_multi_0x08880018__ne,
++	arm_instr_multi_0x08880018__cs,
++	arm_instr_multi_0x08880018__cc,
++	arm_instr_multi_0x08880018__mi,
++	arm_instr_multi_0x08880018__pl,
++	arm_instr_multi_0x08880018__vs,
++	arm_instr_multi_0x08880018__vc,
++	arm_instr_multi_0x08880018__hi,
++	arm_instr_multi_0x08880018__ls,
++	arm_instr_multi_0x08880018__ge,
++	arm_instr_multi_0x08880018__lt,
++	arm_instr_multi_0x08880018__gt,
++	arm_instr_multi_0x08880018__le,
++	arm_instr_multi_0x08880018,
++	arm_instr_nop,
++	arm_instr_multi_0x08820030__eq,
++	arm_instr_multi_0x08820030__ne,
++	arm_instr_multi_0x08820030__cs,
++	arm_instr_multi_0x08820030__cc,
++	arm_instr_multi_0x08820030__mi,
++	arm_instr_multi_0x08820030__pl,
++	arm_instr_multi_0x08820030__vs,
++	arm_instr_multi_0x08820030__vc,
++	arm_instr_multi_0x08820030__hi,
++	arm_instr_multi_0x08820030__ls,
++	arm_instr_multi_0x08820030__ge,
++	arm_instr_multi_0x08820030__lt,
++	arm_instr_multi_0x08820030__gt,
++	arm_instr_multi_0x08820030__le,
++	arm_instr_multi_0x08820030,
++	arm_instr_nop,
++	arm_instr_multi_0x08800018__eq,
++	arm_instr_multi_0x08800018__ne,
++	arm_instr_multi_0x08800018__cs,
++	arm_instr_multi_0x08800018__cc,
++	arm_instr_multi_0x08800018__mi,
++	arm_instr_multi_0x08800018__pl,
++	arm_instr_multi_0x08800018__vs,
++	arm_instr_multi_0x08800018__vc,
++	arm_instr_multi_0x08800018__hi,
++	arm_instr_multi_0x08800018__ls,
++	arm_instr_multi_0x08800018__ge,
++	arm_instr_multi_0x08800018__lt,
++	arm_instr_multi_0x08800018__gt,
++	arm_instr_multi_0x08800018__le,
++	arm_instr_multi_0x08800018,
++	arm_instr_nop,
++	arm_instr_multi_0x08800030__eq,
++	arm_instr_multi_0x08800030__ne,
++	arm_instr_multi_0x08800030__cs,
++	arm_instr_multi_0x08800030__cc,
++	arm_instr_multi_0x08800030__mi,
++	arm_instr_multi_0x08800030__pl,
++	arm_instr_multi_0x08800030__vs,
++	arm_instr_multi_0x08800030__vc,
++	arm_instr_multi_0x08800030__hi,
++	arm_instr_multi_0x08800030__ls,
++	arm_instr_multi_0x08800030__ge,
++	arm_instr_multi_0x08800030__lt,
++	arm_instr_multi_0x08800030__gt,
++	arm_instr_multi_0x08800030__le,
++	arm_instr_multi_0x08800030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_132[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x088200c0__eq,
++	arm_instr_multi_0x088200c0__ne,
++	arm_instr_multi_0x088200c0__cs,
++	arm_instr_multi_0x088200c0__cc,
++	arm_instr_multi_0x088200c0__mi,
++	arm_instr_multi_0x088200c0__pl,
++	arm_instr_multi_0x088200c0__vs,
++	arm_instr_multi_0x088200c0__vc,
++	arm_instr_multi_0x088200c0__hi,
++	arm_instr_multi_0x088200c0__ls,
++	arm_instr_multi_0x088200c0__ge,
++	arm_instr_multi_0x088200c0__lt,
++	arm_instr_multi_0x088200c0__gt,
++	arm_instr_multi_0x088200c0__le,
++	arm_instr_multi_0x088200c0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_136[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08820180__eq,
++	arm_instr_multi_0x08820180__ne,
++	arm_instr_multi_0x08820180__cs,
++	arm_instr_multi_0x08820180__cc,
++	arm_instr_multi_0x08820180__mi,
++	arm_instr_multi_0x08820180__pl,
++	arm_instr_multi_0x08820180__vs,
++	arm_instr_multi_0x08820180__vc,
++	arm_instr_multi_0x08820180__hi,
++	arm_instr_multi_0x08820180__ls,
++	arm_instr_multi_0x08820180__ge,
++	arm_instr_multi_0x08820180__lt,
++	arm_instr_multi_0x08820180__gt,
++	arm_instr_multi_0x08820180__le,
++	arm_instr_multi_0x08820180,
++	arm_instr_nop,
++	arm_instr_multi_0x08800180__eq,
++	arm_instr_multi_0x08800180__ne,
++	arm_instr_multi_0x08800180__cs,
++	arm_instr_multi_0x08800180__cc,
++	arm_instr_multi_0x08800180__mi,
++	arm_instr_multi_0x08800180__pl,
++	arm_instr_multi_0x08800180__vs,
++	arm_instr_multi_0x08800180__vc,
++	arm_instr_multi_0x08800180__hi,
++	arm_instr_multi_0x08800180__ls,
++	arm_instr_multi_0x08800180__ge,
++	arm_instr_multi_0x08800180__lt,
++	arm_instr_multi_0x08800180__gt,
++	arm_instr_multi_0x08800180__le,
++	arm_instr_multi_0x08800180,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_142[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08a051f8__eq,
++	arm_instr_multi_0x08a051f8__ne,
++	arm_instr_multi_0x08a051f8__cs,
++	arm_instr_multi_0x08a051f8__cc,
++	arm_instr_multi_0x08a051f8__mi,
++	arm_instr_multi_0x08a051f8__pl,
++	arm_instr_multi_0x08a051f8__vs,
++	arm_instr_multi_0x08a051f8__vc,
++	arm_instr_multi_0x08a051f8__hi,
++	arm_instr_multi_0x08a051f8__ls,
++	arm_instr_multi_0x08a051f8__ge,
++	arm_instr_multi_0x08a051f8__lt,
++	arm_instr_multi_0x08a051f8__gt,
++	arm_instr_multi_0x08a051f8__le,
++	arm_instr_multi_0x08a051f8,
++	arm_instr_nop,
++	arm_instr_multi_0x08807ff0__eq,
++	arm_instr_multi_0x08807ff0__ne,
++	arm_instr_multi_0x08807ff0__cs,
++	arm_instr_multi_0x08807ff0__cc,
++	arm_instr_multi_0x08807ff0__mi,
++	arm_instr_multi_0x08807ff0__pl,
++	arm_instr_multi_0x08807ff0__vs,
++	arm_instr_multi_0x08807ff0__vc,
++	arm_instr_multi_0x08807ff0__hi,
++	arm_instr_multi_0x08807ff0__ls,
++	arm_instr_multi_0x08807ff0__ge,
++	arm_instr_multi_0x08807ff0__lt,
++	arm_instr_multi_0x08807ff0__gt,
++	arm_instr_multi_0x08807ff0__le,
++	arm_instr_multi_0x08807ff0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_144[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08830600__eq,
++	arm_instr_multi_0x08830600__ne,
++	arm_instr_multi_0x08830600__cs,
++	arm_instr_multi_0x08830600__cc,
++	arm_instr_multi_0x08830600__mi,
++	arm_instr_multi_0x08830600__pl,
++	arm_instr_multi_0x08830600__vs,
++	arm_instr_multi_0x08830600__vc,
++	arm_instr_multi_0x08830600__hi,
++	arm_instr_multi_0x08830600__ls,
++	arm_instr_multi_0x08830600__ge,
++	arm_instr_multi_0x08830600__lt,
++	arm_instr_multi_0x08830600__gt,
++	arm_instr_multi_0x08830600__le,
++	arm_instr_multi_0x08830600,
++	arm_instr_nop,
++	arm_instr_multi_0x08810600__eq,
++	arm_instr_multi_0x08810600__ne,
++	arm_instr_multi_0x08810600__cs,
++	arm_instr_multi_0x08810600__cc,
++	arm_instr_multi_0x08810600__mi,
++	arm_instr_multi_0x08810600__pl,
++	arm_instr_multi_0x08810600__vs,
++	arm_instr_multi_0x08810600__vc,
++	arm_instr_multi_0x08810600__hi,
++	arm_instr_multi_0x08810600__ls,
++	arm_instr_multi_0x08810600__ge,
++	arm_instr_multi_0x08810600__lt,
++	arm_instr_multi_0x08810600__gt,
++	arm_instr_multi_0x08810600__le,
++	arm_instr_multi_0x08810600,
++	arm_instr_nop,
++	arm_instr_multi_0x098b0003__eq,
++	arm_instr_multi_0x098b0003__ne,
++	arm_instr_multi_0x098b0003__cs,
++	arm_instr_multi_0x098b0003__cc,
++	arm_instr_multi_0x098b0003__mi,
++	arm_instr_multi_0x098b0003__pl,
++	arm_instr_multi_0x098b0003__vs,
++	arm_instr_multi_0x098b0003__vc,
++	arm_instr_multi_0x098b0003__hi,
++	arm_instr_multi_0x098b0003__ls,
++	arm_instr_multi_0x098b0003__ge,
++	arm_instr_multi_0x098b0003__lt,
++	arm_instr_multi_0x098b0003__gt,
++	arm_instr_multi_0x098b0003__le,
++	arm_instr_multi_0x098b0003,
++	arm_instr_nop,
++	arm_instr_multi_0x08830003__eq,
++	arm_instr_multi_0x08830003__ne,
++	arm_instr_multi_0x08830003__cs,
++	arm_instr_multi_0x08830003__cc,
++	arm_instr_multi_0x08830003__mi,
++	arm_instr_multi_0x08830003__pl,
++	arm_instr_multi_0x08830003__vs,
++	arm_instr_multi_0x08830003__vc,
++	arm_instr_multi_0x08830003__hi,
++	arm_instr_multi_0x08830003__ls,
++	arm_instr_multi_0x08830003__ge,
++	arm_instr_multi_0x08830003__lt,
++	arm_instr_multi_0x08830003__gt,
++	arm_instr_multi_0x08830003__le,
++	arm_instr_multi_0x08830003,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_145[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08830006__eq,
++	arm_instr_multi_0x08830006__ne,
++	arm_instr_multi_0x08830006__cs,
++	arm_instr_multi_0x08830006__cc,
++	arm_instr_multi_0x08830006__mi,
++	arm_instr_multi_0x08830006__pl,
++	arm_instr_multi_0x08830006__vs,
++	arm_instr_multi_0x08830006__vc,
++	arm_instr_multi_0x08830006__hi,
++	arm_instr_multi_0x08830006__ls,
++	arm_instr_multi_0x08830006__ge,
++	arm_instr_multi_0x08830006__lt,
++	arm_instr_multi_0x08830006__gt,
++	arm_instr_multi_0x08830006__le,
++	arm_instr_multi_0x08830006,
++	arm_instr_nop,
++	arm_instr_multi_0x08890006__eq,
++	arm_instr_multi_0x08890006__ne,
++	arm_instr_multi_0x08890006__cs,
++	arm_instr_multi_0x08890006__cc,
++	arm_instr_multi_0x08890006__mi,
++	arm_instr_multi_0x08890006__pl,
++	arm_instr_multi_0x08890006__vs,
++	arm_instr_multi_0x08890006__vc,
++	arm_instr_multi_0x08890006__hi,
++	arm_instr_multi_0x08890006__ls,
++	arm_instr_multi_0x08890006__ge,
++	arm_instr_multi_0x08890006__lt,
++	arm_instr_multi_0x08890006__gt,
++	arm_instr_multi_0x08890006__le,
++	arm_instr_multi_0x08890006,
++	arm_instr_nop,
++	arm_instr_multi_0x09830006__eq,
++	arm_instr_multi_0x09830006__ne,
++	arm_instr_multi_0x09830006__cs,
++	arm_instr_multi_0x09830006__cc,
++	arm_instr_multi_0x09830006__mi,
++	arm_instr_multi_0x09830006__pl,
++	arm_instr_multi_0x09830006__vs,
++	arm_instr_multi_0x09830006__vc,
++	arm_instr_multi_0x09830006__hi,
++	arm_instr_multi_0x09830006__ls,
++	arm_instr_multi_0x09830006__ge,
++	arm_instr_multi_0x09830006__lt,
++	arm_instr_multi_0x09830006__gt,
++	arm_instr_multi_0x09830006__le,
++	arm_instr_multi_0x09830006,
++	arm_instr_nop,
++	arm_instr_multi_0x0989000c__eq,
++	arm_instr_multi_0x0989000c__ne,
++	arm_instr_multi_0x0989000c__cs,
++	arm_instr_multi_0x0989000c__cc,
++	arm_instr_multi_0x0989000c__mi,
++	arm_instr_multi_0x0989000c__pl,
++	arm_instr_multi_0x0989000c__vs,
++	arm_instr_multi_0x0989000c__vc,
++	arm_instr_multi_0x0989000c__hi,
++	arm_instr_multi_0x0989000c__ls,
++	arm_instr_multi_0x0989000c__ge,
++	arm_instr_multi_0x0989000c__lt,
++	arm_instr_multi_0x0989000c__gt,
++	arm_instr_multi_0x0989000c__le,
++	arm_instr_multi_0x0989000c,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_146[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08810018__eq,
++	arm_instr_multi_0x08810018__ne,
++	arm_instr_multi_0x08810018__cs,
++	arm_instr_multi_0x08810018__cc,
++	arm_instr_multi_0x08810018__mi,
++	arm_instr_multi_0x08810018__pl,
++	arm_instr_multi_0x08810018__vs,
++	arm_instr_multi_0x08810018__vc,
++	arm_instr_multi_0x08810018__hi,
++	arm_instr_multi_0x08810018__ls,
++	arm_instr_multi_0x08810018__ge,
++	arm_instr_multi_0x08810018__lt,
++	arm_instr_multi_0x08810018__gt,
++	arm_instr_multi_0x08810018__le,
++	arm_instr_multi_0x08810018,
++	arm_instr_nop,
++	arm_instr_multi_0x08830030__eq,
++	arm_instr_multi_0x08830030__ne,
++	arm_instr_multi_0x08830030__cs,
++	arm_instr_multi_0x08830030__cc,
++	arm_instr_multi_0x08830030__mi,
++	arm_instr_multi_0x08830030__pl,
++	arm_instr_multi_0x08830030__vs,
++	arm_instr_multi_0x08830030__vc,
++	arm_instr_multi_0x08830030__hi,
++	arm_instr_multi_0x08830030__ls,
++	arm_instr_multi_0x08830030__ge,
++	arm_instr_multi_0x08830030__lt,
++	arm_instr_multi_0x08830030__gt,
++	arm_instr_multi_0x08830030__le,
++	arm_instr_multi_0x08830030,
++	arm_instr_nop,
++	arm_instr_multi_0x08890030__eq,
++	arm_instr_multi_0x08890030__ne,
++	arm_instr_multi_0x08890030__cs,
++	arm_instr_multi_0x08890030__cc,
++	arm_instr_multi_0x08890030__mi,
++	arm_instr_multi_0x08890030__pl,
++	arm_instr_multi_0x08890030__vs,
++	arm_instr_multi_0x08890030__vc,
++	arm_instr_multi_0x08890030__hi,
++	arm_instr_multi_0x08890030__ls,
++	arm_instr_multi_0x08890030__ge,
++	arm_instr_multi_0x08890030__lt,
++	arm_instr_multi_0x08890030__gt,
++	arm_instr_multi_0x08890030__le,
++	arm_instr_multi_0x08890030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_148[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08830060__eq,
++	arm_instr_multi_0x08830060__ne,
++	arm_instr_multi_0x08830060__cs,
++	arm_instr_multi_0x08830060__cc,
++	arm_instr_multi_0x08830060__mi,
++	arm_instr_multi_0x08830060__pl,
++	arm_instr_multi_0x08830060__vs,
++	arm_instr_multi_0x08830060__vc,
++	arm_instr_multi_0x08830060__hi,
++	arm_instr_multi_0x08830060__ls,
++	arm_instr_multi_0x08830060__ge,
++	arm_instr_multi_0x08830060__lt,
++	arm_instr_multi_0x08830060__gt,
++	arm_instr_multi_0x08830060__le,
++	arm_instr_multi_0x08830060,
++	arm_instr_nop,
++	arm_instr_multi_0x08a100c0__eq,
++	arm_instr_multi_0x08a100c0__ne,
++	arm_instr_multi_0x08a100c0__cs,
++	arm_instr_multi_0x08a100c0__cc,
++	arm_instr_multi_0x08a100c0__mi,
++	arm_instr_multi_0x08a100c0__pl,
++	arm_instr_multi_0x08a100c0__vs,
++	arm_instr_multi_0x08a100c0__vc,
++	arm_instr_multi_0x08a100c0__hi,
++	arm_instr_multi_0x08a100c0__ls,
++	arm_instr_multi_0x08a100c0__ge,
++	arm_instr_multi_0x08a100c0__lt,
++	arm_instr_multi_0x08a100c0__gt,
++	arm_instr_multi_0x08a100c0__le,
++	arm_instr_multi_0x08a100c0,
++	arm_instr_nop,
++	arm_instr_multi_0x088900c0__eq,
++	arm_instr_multi_0x088900c0__ne,
++	arm_instr_multi_0x088900c0__cs,
++	arm_instr_multi_0x088900c0__cc,
++	arm_instr_multi_0x088900c0__mi,
++	arm_instr_multi_0x088900c0__pl,
++	arm_instr_multi_0x088900c0__vs,
++	arm_instr_multi_0x088900c0__vc,
++	arm_instr_multi_0x088900c0__hi,
++	arm_instr_multi_0x088900c0__ls,
++	arm_instr_multi_0x088900c0__ge,
++	arm_instr_multi_0x088900c0__lt,
++	arm_instr_multi_0x088900c0__gt,
++	arm_instr_multi_0x088900c0__le,
++	arm_instr_multi_0x088900c0,
++	arm_instr_nop,
++	arm_instr_multi_0x088300c0__eq,
++	arm_instr_multi_0x088300c0__ne,
++	arm_instr_multi_0x088300c0__cs,
++	arm_instr_multi_0x088300c0__cc,
++	arm_instr_multi_0x088300c0__mi,
++	arm_instr_multi_0x088300c0__pl,
++	arm_instr_multi_0x088300c0__vs,
++	arm_instr_multi_0x088300c0__vc,
++	arm_instr_multi_0x088300c0__hi,
++	arm_instr_multi_0x088300c0__ls,
++	arm_instr_multi_0x088300c0__ge,
++	arm_instr_multi_0x088300c0__lt,
++	arm_instr_multi_0x088300c0__gt,
++	arm_instr_multi_0x088300c0__le,
++	arm_instr_multi_0x088300c0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_152[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08a10300__eq,
++	arm_instr_multi_0x08a10300__ne,
++	arm_instr_multi_0x08a10300__cs,
++	arm_instr_multi_0x08a10300__cc,
++	arm_instr_multi_0x08a10300__mi,
++	arm_instr_multi_0x08a10300__pl,
++	arm_instr_multi_0x08a10300__vs,
++	arm_instr_multi_0x08a10300__vc,
++	arm_instr_multi_0x08a10300__hi,
++	arm_instr_multi_0x08a10300__ls,
++	arm_instr_multi_0x08a10300__ge,
++	arm_instr_multi_0x08a10300__lt,
++	arm_instr_multi_0x08a10300__gt,
++	arm_instr_multi_0x08a10300__le,
++	arm_instr_multi_0x08a10300,
++	arm_instr_nop,
++	arm_instr_multi_0x08a10f00__eq,
++	arm_instr_multi_0x08a10f00__ne,
++	arm_instr_multi_0x08a10f00__cs,
++	arm_instr_multi_0x08a10f00__cc,
++	arm_instr_multi_0x08a10f00__mi,
++	arm_instr_multi_0x08a10f00__pl,
++	arm_instr_multi_0x08a10f00__vs,
++	arm_instr_multi_0x08a10f00__vc,
++	arm_instr_multi_0x08a10f00__hi,
++	arm_instr_multi_0x08a10f00__ls,
++	arm_instr_multi_0x08a10f00__ge,
++	arm_instr_multi_0x08a10f00__lt,
++	arm_instr_multi_0x08a10f00__gt,
++	arm_instr_multi_0x08a10f00__le,
++	arm_instr_multi_0x08a10f00,
++	arm_instr_nop,
++	arm_instr_multi_0x08830300__eq,
++	arm_instr_multi_0x08830300__ne,
++	arm_instr_multi_0x08830300__cs,
++	arm_instr_multi_0x08830300__cc,
++	arm_instr_multi_0x08830300__mi,
++	arm_instr_multi_0x08830300__pl,
++	arm_instr_multi_0x08830300__vs,
++	arm_instr_multi_0x08830300__vc,
++	arm_instr_multi_0x08830300__hi,
++	arm_instr_multi_0x08830300__ls,
++	arm_instr_multi_0x08830300__ge,
++	arm_instr_multi_0x08830300__lt,
++	arm_instr_multi_0x08830300__gt,
++	arm_instr_multi_0x08830300__le,
++	arm_instr_multi_0x08830300,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_158[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08a151f8__eq,
++	arm_instr_multi_0x08a151f8__ne,
++	arm_instr_multi_0x08a151f8__cs,
++	arm_instr_multi_0x08a151f8__cc,
++	arm_instr_multi_0x08a151f8__mi,
++	arm_instr_multi_0x08a151f8__pl,
++	arm_instr_multi_0x08a151f8__vs,
++	arm_instr_multi_0x08a151f8__vc,
++	arm_instr_multi_0x08a151f8__hi,
++	arm_instr_multi_0x08a151f8__ls,
++	arm_instr_multi_0x08a151f8__ge,
++	arm_instr_multi_0x08a151f8__lt,
++	arm_instr_multi_0x08a151f8__gt,
++	arm_instr_multi_0x08a151f8__le,
++	arm_instr_multi_0x08a151f8,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_160[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08840003__eq,
++	arm_instr_multi_0x08840003__ne,
++	arm_instr_multi_0x08840003__cs,
++	arm_instr_multi_0x08840003__cc,
++	arm_instr_multi_0x08840003__mi,
++	arm_instr_multi_0x08840003__pl,
++	arm_instr_multi_0x08840003__vs,
++	arm_instr_multi_0x08840003__vc,
++	arm_instr_multi_0x08840003__hi,
++	arm_instr_multi_0x08840003__ls,
++	arm_instr_multi_0x08840003__ge,
++	arm_instr_multi_0x08840003__lt,
++	arm_instr_multi_0x08840003__gt,
++	arm_instr_multi_0x08840003__le,
++	arm_instr_multi_0x08840003,
++	arm_instr_nop,
++	arm_instr_multi_0x088e1002__eq,
++	arm_instr_multi_0x088e1002__ne,
++	arm_instr_multi_0x088e1002__cs,
++	arm_instr_multi_0x088e1002__cc,
++	arm_instr_multi_0x088e1002__mi,
++	arm_instr_multi_0x088e1002__pl,
++	arm_instr_multi_0x088e1002__vs,
++	arm_instr_multi_0x088e1002__vc,
++	arm_instr_multi_0x088e1002__hi,
++	arm_instr_multi_0x088e1002__ls,
++	arm_instr_multi_0x088e1002__ge,
++	arm_instr_multi_0x088e1002__lt,
++	arm_instr_multi_0x088e1002__gt,
++	arm_instr_multi_0x088e1002__le,
++	arm_instr_multi_0x088e1002,
++	arm_instr_nop,
++	arm_instr_multi_0x08840600__eq,
++	arm_instr_multi_0x08840600__ne,
++	arm_instr_multi_0x08840600__cs,
++	arm_instr_multi_0x08840600__cc,
++	arm_instr_multi_0x08840600__mi,
++	arm_instr_multi_0x08840600__pl,
++	arm_instr_multi_0x08840600__vs,
++	arm_instr_multi_0x08840600__vc,
++	arm_instr_multi_0x08840600__hi,
++	arm_instr_multi_0x08840600__ls,
++	arm_instr_multi_0x08840600__ge,
++	arm_instr_multi_0x08840600__lt,
++	arm_instr_multi_0x08840600__gt,
++	arm_instr_multi_0x08840600__le,
++	arm_instr_multi_0x08840600,
++	arm_instr_nop,
++	arm_instr_multi_0x088c0003__eq,
++	arm_instr_multi_0x088c0003__ne,
++	arm_instr_multi_0x088c0003__cs,
++	arm_instr_multi_0x088c0003__cc,
++	arm_instr_multi_0x088c0003__mi,
++	arm_instr_multi_0x088c0003__pl,
++	arm_instr_multi_0x088c0003__vs,
++	arm_instr_multi_0x088c0003__vc,
++	arm_instr_multi_0x088c0003__hi,
++	arm_instr_multi_0x088c0003__ls,
++	arm_instr_multi_0x088c0003__ge,
++	arm_instr_multi_0x088c0003__lt,
++	arm_instr_multi_0x088c0003__gt,
++	arm_instr_multi_0x088c0003__le,
++	arm_instr_multi_0x088c0003,
++	arm_instr_nop,
++	arm_instr_multi_0x098c0003__eq,
++	arm_instr_multi_0x098c0003__ne,
++	arm_instr_multi_0x098c0003__cs,
++	arm_instr_multi_0x098c0003__cc,
++	arm_instr_multi_0x098c0003__mi,
++	arm_instr_multi_0x098c0003__pl,
++	arm_instr_multi_0x098c0003__vs,
++	arm_instr_multi_0x098c0003__vc,
++	arm_instr_multi_0x098c0003__hi,
++	arm_instr_multi_0x098c0003__ls,
++	arm_instr_multi_0x098c0003__ge,
++	arm_instr_multi_0x098c0003__lt,
++	arm_instr_multi_0x098c0003__gt,
++	arm_instr_multi_0x098c0003__le,
++	arm_instr_multi_0x098c0003,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_161[112])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08ac000c__eq,
++	arm_instr_multi_0x08ac000c__ne,
++	arm_instr_multi_0x08ac000c__cs,
++	arm_instr_multi_0x08ac000c__cc,
++	arm_instr_multi_0x08ac000c__mi,
++	arm_instr_multi_0x08ac000c__pl,
++	arm_instr_multi_0x08ac000c__vs,
++	arm_instr_multi_0x08ac000c__vc,
++	arm_instr_multi_0x08ac000c__hi,
++	arm_instr_multi_0x08ac000c__ls,
++	arm_instr_multi_0x08ac000c__ge,
++	arm_instr_multi_0x08ac000c__lt,
++	arm_instr_multi_0x08ac000c__gt,
++	arm_instr_multi_0x08ac000c__le,
++	arm_instr_multi_0x08ac000c,
++	arm_instr_nop,
++	arm_instr_multi_0x088c0006__eq,
++	arm_instr_multi_0x088c0006__ne,
++	arm_instr_multi_0x088c0006__cs,
++	arm_instr_multi_0x088c0006__cc,
++	arm_instr_multi_0x088c0006__mi,
++	arm_instr_multi_0x088c0006__pl,
++	arm_instr_multi_0x088c0006__vs,
++	arm_instr_multi_0x088c0006__vc,
++	arm_instr_multi_0x088c0006__hi,
++	arm_instr_multi_0x088c0006__ls,
++	arm_instr_multi_0x088c0006__ge,
++	arm_instr_multi_0x088c0006__lt,
++	arm_instr_multi_0x088c0006__gt,
++	arm_instr_multi_0x088c0006__le,
++	arm_instr_multi_0x088c0006,
++	arm_instr_nop,
++	arm_instr_multi_0x08860006__eq,
++	arm_instr_multi_0x08860006__ne,
++	arm_instr_multi_0x08860006__cs,
++	arm_instr_multi_0x08860006__cc,
++	arm_instr_multi_0x08860006__mi,
++	arm_instr_multi_0x08860006__pl,
++	arm_instr_multi_0x08860006__vs,
++	arm_instr_multi_0x08860006__vc,
++	arm_instr_multi_0x08860006__hi,
++	arm_instr_multi_0x08860006__ls,
++	arm_instr_multi_0x08860006__ge,
++	arm_instr_multi_0x08860006__lt,
++	arm_instr_multi_0x08860006__gt,
++	arm_instr_multi_0x08860006__le,
++	arm_instr_multi_0x08860006,
++	arm_instr_nop,
++	arm_instr_multi_0x088e000c__eq,
++	arm_instr_multi_0x088e000c__ne,
++	arm_instr_multi_0x088e000c__cs,
++	arm_instr_multi_0x088e000c__cc,
++	arm_instr_multi_0x088e000c__mi,
++	arm_instr_multi_0x088e000c__pl,
++	arm_instr_multi_0x088e000c__vs,
++	arm_instr_multi_0x088e000c__vc,
++	arm_instr_multi_0x088e000c__hi,
++	arm_instr_multi_0x088e000c__ls,
++	arm_instr_multi_0x088e000c__ge,
++	arm_instr_multi_0x088e000c__lt,
++	arm_instr_multi_0x088e000c__gt,
++	arm_instr_multi_0x088e000c__le,
++	arm_instr_multi_0x088e000c,
++	arm_instr_nop,
++	arm_instr_multi_0x09860006__eq,
++	arm_instr_multi_0x09860006__ne,
++	arm_instr_multi_0x09860006__cs,
++	arm_instr_multi_0x09860006__cc,
++	arm_instr_multi_0x09860006__mi,
++	arm_instr_multi_0x09860006__pl,
++	arm_instr_multi_0x09860006__vs,
++	arm_instr_multi_0x09860006__vc,
++	arm_instr_multi_0x09860006__hi,
++	arm_instr_multi_0x09860006__ls,
++	arm_instr_multi_0x09860006__ge,
++	arm_instr_multi_0x09860006__lt,
++	arm_instr_multi_0x09860006__gt,
++	arm_instr_multi_0x09860006__le,
++	arm_instr_multi_0x09860006,
++	arm_instr_nop,
++	arm_instr_multi_0x098c0006__eq,
++	arm_instr_multi_0x098c0006__ne,
++	arm_instr_multi_0x098c0006__cs,
++	arm_instr_multi_0x098c0006__cc,
++	arm_instr_multi_0x098c0006__mi,
++	arm_instr_multi_0x098c0006__pl,
++	arm_instr_multi_0x098c0006__vs,
++	arm_instr_multi_0x098c0006__vc,
++	arm_instr_multi_0x098c0006__hi,
++	arm_instr_multi_0x098c0006__ls,
++	arm_instr_multi_0x098c0006__ge,
++	arm_instr_multi_0x098c0006__lt,
++	arm_instr_multi_0x098c0006__gt,
++	arm_instr_multi_0x098c0006__le,
++	arm_instr_multi_0x098c0006,
++	arm_instr_nop,
++	arm_instr_multi_0x08ac000f__eq,
++	arm_instr_multi_0x08ac000f__ne,
++	arm_instr_multi_0x08ac000f__cs,
++	arm_instr_multi_0x08ac000f__cc,
++	arm_instr_multi_0x08ac000f__mi,
++	arm_instr_multi_0x08ac000f__pl,
++	arm_instr_multi_0x08ac000f__vs,
++	arm_instr_multi_0x08ac000f__vc,
++	arm_instr_multi_0x08ac000f__hi,
++	arm_instr_multi_0x08ac000f__ls,
++	arm_instr_multi_0x08ac000f__ge,
++	arm_instr_multi_0x08ac000f__lt,
++	arm_instr_multi_0x08ac000f__gt,
++	arm_instr_multi_0x08ac000f__le,
++	arm_instr_multi_0x08ac000f,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_162[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x088e0018__eq,
++	arm_instr_multi_0x088e0018__ne,
++	arm_instr_multi_0x088e0018__cs,
++	arm_instr_multi_0x088e0018__cc,
++	arm_instr_multi_0x088e0018__mi,
++	arm_instr_multi_0x088e0018__pl,
++	arm_instr_multi_0x088e0018__vs,
++	arm_instr_multi_0x088e0018__vc,
++	arm_instr_multi_0x088e0018__hi,
++	arm_instr_multi_0x088e0018__ls,
++	arm_instr_multi_0x088e0018__ge,
++	arm_instr_multi_0x088e0018__lt,
++	arm_instr_multi_0x088e0018__gt,
++	arm_instr_multi_0x088e0018__le,
++	arm_instr_multi_0x088e0018,
++	arm_instr_nop,
++	arm_instr_multi_0x088c0018__eq,
++	arm_instr_multi_0x088c0018__ne,
++	arm_instr_multi_0x088c0018__cs,
++	arm_instr_multi_0x088c0018__cc,
++	arm_instr_multi_0x088c0018__mi,
++	arm_instr_multi_0x088c0018__pl,
++	arm_instr_multi_0x088c0018__vs,
++	arm_instr_multi_0x088c0018__vc,
++	arm_instr_multi_0x088c0018__hi,
++	arm_instr_multi_0x088c0018__ls,
++	arm_instr_multi_0x088c0018__ge,
++	arm_instr_multi_0x088c0018__lt,
++	arm_instr_multi_0x088c0018__gt,
++	arm_instr_multi_0x088c0018__le,
++	arm_instr_multi_0x088c0018,
++	arm_instr_nop,
++	arm_instr_multi_0x09860030__eq,
++	arm_instr_multi_0x09860030__ne,
++	arm_instr_multi_0x09860030__cs,
++	arm_instr_multi_0x09860030__cc,
++	arm_instr_multi_0x09860030__mi,
++	arm_instr_multi_0x09860030__pl,
++	arm_instr_multi_0x09860030__vs,
++	arm_instr_multi_0x09860030__vc,
++	arm_instr_multi_0x09860030__hi,
++	arm_instr_multi_0x09860030__ls,
++	arm_instr_multi_0x09860030__ge,
++	arm_instr_multi_0x09860030__lt,
++	arm_instr_multi_0x09860030__gt,
++	arm_instr_multi_0x09860030__le,
++	arm_instr_multi_0x09860030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_164[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x088c0060__eq,
++	arm_instr_multi_0x088c0060__ne,
++	arm_instr_multi_0x088c0060__cs,
++	arm_instr_multi_0x088c0060__cc,
++	arm_instr_multi_0x088c0060__mi,
++	arm_instr_multi_0x088c0060__pl,
++	arm_instr_multi_0x088c0060__vs,
++	arm_instr_multi_0x088c0060__vc,
++	arm_instr_multi_0x088c0060__hi,
++	arm_instr_multi_0x088c0060__ls,
++	arm_instr_multi_0x088c0060__ge,
++	arm_instr_multi_0x088c0060__lt,
++	arm_instr_multi_0x088c0060__gt,
++	arm_instr_multi_0x088c0060__le,
++	arm_instr_multi_0x088c0060,
++	arm_instr_nop,
++	arm_instr_multi_0x088e00c0__eq,
++	arm_instr_multi_0x088e00c0__ne,
++	arm_instr_multi_0x088e00c0__cs,
++	arm_instr_multi_0x088e00c0__cc,
++	arm_instr_multi_0x088e00c0__mi,
++	arm_instr_multi_0x088e00c0__pl,
++	arm_instr_multi_0x088e00c0__vs,
++	arm_instr_multi_0x088e00c0__vc,
++	arm_instr_multi_0x088e00c0__hi,
++	arm_instr_multi_0x088e00c0__ls,
++	arm_instr_multi_0x088e00c0__ge,
++	arm_instr_multi_0x088e00c0__lt,
++	arm_instr_multi_0x088e00c0__gt,
++	arm_instr_multi_0x088e00c0__le,
++	arm_instr_multi_0x088e00c0,
++	arm_instr_nop,
++	arm_instr_multi_0x088c00c8__eq,
++	arm_instr_multi_0x088c00c8__ne,
++	arm_instr_multi_0x088c00c8__cs,
++	arm_instr_multi_0x088c00c8__cc,
++	arm_instr_multi_0x088c00c8__mi,
++	arm_instr_multi_0x088c00c8__pl,
++	arm_instr_multi_0x088c00c8__vs,
++	arm_instr_multi_0x088c00c8__vc,
++	arm_instr_multi_0x088c00c8__hi,
++	arm_instr_multi_0x088c00c8__ls,
++	arm_instr_multi_0x088c00c8__ge,
++	arm_instr_multi_0x088c00c8__lt,
++	arm_instr_multi_0x088c00c8__gt,
++	arm_instr_multi_0x088c00c8__le,
++	arm_instr_multi_0x088c00c8,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_176[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08850003__eq,
++	arm_instr_multi_0x08850003__ne,
++	arm_instr_multi_0x08850003__cs,
++	arm_instr_multi_0x08850003__cc,
++	arm_instr_multi_0x08850003__mi,
++	arm_instr_multi_0x08850003__pl,
++	arm_instr_multi_0x08850003__vs,
++	arm_instr_multi_0x08850003__vc,
++	arm_instr_multi_0x08850003__hi,
++	arm_instr_multi_0x08850003__ls,
++	arm_instr_multi_0x08850003__ge,
++	arm_instr_multi_0x08850003__lt,
++	arm_instr_multi_0x08850003__gt,
++	arm_instr_multi_0x08850003__le,
++	arm_instr_multi_0x08850003,
++	arm_instr_nop,
++	arm_instr_multi_0x088d0088__eq,
++	arm_instr_multi_0x088d0088__ne,
++	arm_instr_multi_0x088d0088__cs,
++	arm_instr_multi_0x088d0088__cc,
++	arm_instr_multi_0x088d0088__mi,
++	arm_instr_multi_0x088d0088__pl,
++	arm_instr_multi_0x088d0088__vs,
++	arm_instr_multi_0x088d0088__vc,
++	arm_instr_multi_0x088d0088__hi,
++	arm_instr_multi_0x088d0088__ls,
++	arm_instr_multi_0x088d0088__ge,
++	arm_instr_multi_0x088d0088__lt,
++	arm_instr_multi_0x088d0088__gt,
++	arm_instr_multi_0x088d0088__le,
++	arm_instr_multi_0x088d0088,
++	arm_instr_nop,
++	arm_instr_multi_0x088d1020__eq,
++	arm_instr_multi_0x088d1020__ne,
++	arm_instr_multi_0x088d1020__cs,
++	arm_instr_multi_0x088d1020__cc,
++	arm_instr_multi_0x088d1020__mi,
++	arm_instr_multi_0x088d1020__pl,
++	arm_instr_multi_0x088d1020__vs,
++	arm_instr_multi_0x088d1020__vc,
++	arm_instr_multi_0x088d1020__hi,
++	arm_instr_multi_0x088d1020__ls,
++	arm_instr_multi_0x088d1020__ge,
++	arm_instr_multi_0x088d1020__lt,
++	arm_instr_multi_0x088d1020__gt,
++	arm_instr_multi_0x088d1020__le,
++	arm_instr_multi_0x088d1020,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_177[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08850006__eq,
++	arm_instr_multi_0x08850006__ne,
++	arm_instr_multi_0x08850006__cs,
++	arm_instr_multi_0x08850006__cc,
++	arm_instr_multi_0x08850006__mi,
++	arm_instr_multi_0x08850006__pl,
++	arm_instr_multi_0x08850006__vs,
++	arm_instr_multi_0x08850006__vc,
++	arm_instr_multi_0x08850006__hi,
++	arm_instr_multi_0x08850006__ls,
++	arm_instr_multi_0x08850006__ge,
++	arm_instr_multi_0x08850006__lt,
++	arm_instr_multi_0x08850006__gt,
++	arm_instr_multi_0x08850006__le,
++	arm_instr_multi_0x08850006,
++	arm_instr_nop,
++	arm_instr_multi_0x08870006__eq,
++	arm_instr_multi_0x08870006__ne,
++	arm_instr_multi_0x08870006__cs,
++	arm_instr_multi_0x08870006__cc,
++	arm_instr_multi_0x08870006__mi,
++	arm_instr_multi_0x08870006__pl,
++	arm_instr_multi_0x08870006__vs,
++	arm_instr_multi_0x08870006__vc,
++	arm_instr_multi_0x08870006__hi,
++	arm_instr_multi_0x08870006__ls,
++	arm_instr_multi_0x08870006__ge,
++	arm_instr_multi_0x08870006__lt,
++	arm_instr_multi_0x08870006__gt,
++	arm_instr_multi_0x08870006__le,
++	arm_instr_multi_0x08870006,
++	arm_instr_nop,
++	arm_instr_multi_0x0885000c__eq,
++	arm_instr_multi_0x0885000c__ne,
++	arm_instr_multi_0x0885000c__cs,
++	arm_instr_multi_0x0885000c__cc,
++	arm_instr_multi_0x0885000c__mi,
++	arm_instr_multi_0x0885000c__pl,
++	arm_instr_multi_0x0885000c__vs,
++	arm_instr_multi_0x0885000c__vc,
++	arm_instr_multi_0x0885000c__hi,
++	arm_instr_multi_0x0885000c__ls,
++	arm_instr_multi_0x0885000c__ge,
++	arm_instr_multi_0x0885000c__lt,
++	arm_instr_multi_0x0885000c__gt,
++	arm_instr_multi_0x0885000c__le,
++	arm_instr_multi_0x0885000c,
++	arm_instr_nop,
++	arm_instr_multi_0x098d000e__eq,
++	arm_instr_multi_0x098d000e__ne,
++	arm_instr_multi_0x098d000e__cs,
++	arm_instr_multi_0x098d000e__cc,
++	arm_instr_multi_0x098d000e__mi,
++	arm_instr_multi_0x098d000e__pl,
++	arm_instr_multi_0x098d000e__vs,
++	arm_instr_multi_0x098d000e__vc,
++	arm_instr_multi_0x098d000e__hi,
++	arm_instr_multi_0x098d000e__ls,
++	arm_instr_multi_0x098d000e__ge,
++	arm_instr_multi_0x098d000e__lt,
++	arm_instr_multi_0x098d000e__gt,
++	arm_instr_multi_0x098d000e__le,
++	arm_instr_multi_0x098d000e,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_178[96])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09870018__eq,
++	arm_instr_multi_0x09870018__ne,
++	arm_instr_multi_0x09870018__cs,
++	arm_instr_multi_0x09870018__cc,
++	arm_instr_multi_0x09870018__mi,
++	arm_instr_multi_0x09870018__pl,
++	arm_instr_multi_0x09870018__vs,
++	arm_instr_multi_0x09870018__vc,
++	arm_instr_multi_0x09870018__hi,
++	arm_instr_multi_0x09870018__ls,
++	arm_instr_multi_0x09870018__ge,
++	arm_instr_multi_0x09870018__lt,
++	arm_instr_multi_0x09870018__gt,
++	arm_instr_multi_0x09870018__le,
++	arm_instr_multi_0x09870018,
++	arm_instr_nop,
++	arm_instr_multi_0x098d0030__eq,
++	arm_instr_multi_0x098d0030__ne,
++	arm_instr_multi_0x098d0030__cs,
++	arm_instr_multi_0x098d0030__cc,
++	arm_instr_multi_0x098d0030__mi,
++	arm_instr_multi_0x098d0030__pl,
++	arm_instr_multi_0x098d0030__vs,
++	arm_instr_multi_0x098d0030__vc,
++	arm_instr_multi_0x098d0030__hi,
++	arm_instr_multi_0x098d0030__ls,
++	arm_instr_multi_0x098d0030__ge,
++	arm_instr_multi_0x098d0030__lt,
++	arm_instr_multi_0x098d0030__gt,
++	arm_instr_multi_0x098d0030__le,
++	arm_instr_multi_0x098d0030,
++	arm_instr_nop,
++	arm_instr_multi_0x088d1010__eq,
++	arm_instr_multi_0x088d1010__ne,
++	arm_instr_multi_0x088d1010__cs,
++	arm_instr_multi_0x088d1010__cc,
++	arm_instr_multi_0x088d1010__mi,
++	arm_instr_multi_0x088d1010__pl,
++	arm_instr_multi_0x088d1010__vs,
++	arm_instr_multi_0x088d1010__vc,
++	arm_instr_multi_0x088d1010__hi,
++	arm_instr_multi_0x088d1010__ls,
++	arm_instr_multi_0x088d1010__ge,
++	arm_instr_multi_0x088d1010__lt,
++	arm_instr_multi_0x088d1010__gt,
++	arm_instr_multi_0x088d1010__le,
++	arm_instr_multi_0x088d1010,
++	arm_instr_nop,
++	arm_instr_multi_0x088d0030__eq,
++	arm_instr_multi_0x088d0030__ne,
++	arm_instr_multi_0x088d0030__cs,
++	arm_instr_multi_0x088d0030__cc,
++	arm_instr_multi_0x088d0030__mi,
++	arm_instr_multi_0x088d0030__pl,
++	arm_instr_multi_0x088d0030__vs,
++	arm_instr_multi_0x088d0030__vc,
++	arm_instr_multi_0x088d0030__hi,
++	arm_instr_multi_0x088d0030__ls,
++	arm_instr_multi_0x088d0030__ge,
++	arm_instr_multi_0x088d0030__lt,
++	arm_instr_multi_0x088d0030__gt,
++	arm_instr_multi_0x088d0030__le,
++	arm_instr_multi_0x088d0030,
++	arm_instr_nop,
++	arm_instr_multi_0x088d4010__eq,
++	arm_instr_multi_0x088d4010__ne,
++	arm_instr_multi_0x088d4010__cs,
++	arm_instr_multi_0x088d4010__cc,
++	arm_instr_multi_0x088d4010__mi,
++	arm_instr_multi_0x088d4010__pl,
++	arm_instr_multi_0x088d4010__vs,
++	arm_instr_multi_0x088d4010__vc,
++	arm_instr_multi_0x088d4010__hi,
++	arm_instr_multi_0x088d4010__ls,
++	arm_instr_multi_0x088d4010__ge,
++	arm_instr_multi_0x088d4010__lt,
++	arm_instr_multi_0x088d4010__gt,
++	arm_instr_multi_0x088d4010__le,
++	arm_instr_multi_0x088d4010,
++	arm_instr_nop,
++	arm_instr_multi_0x08850018__eq,
++	arm_instr_multi_0x08850018__ne,
++	arm_instr_multi_0x08850018__cs,
++	arm_instr_multi_0x08850018__cc,
++	arm_instr_multi_0x08850018__mi,
++	arm_instr_multi_0x08850018__pl,
++	arm_instr_multi_0x08850018__vs,
++	arm_instr_multi_0x08850018__vc,
++	arm_instr_multi_0x08850018__hi,
++	arm_instr_multi_0x08850018__ls,
++	arm_instr_multi_0x08850018__ge,
++	arm_instr_multi_0x08850018__lt,
++	arm_instr_multi_0x08850018__gt,
++	arm_instr_multi_0x08850018__le,
++	arm_instr_multi_0x08850018,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_179[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x09850014__eq,
++	arm_instr_multi_0x09850014__ne,
++	arm_instr_multi_0x09850014__cs,
++	arm_instr_multi_0x09850014__cc,
++	arm_instr_multi_0x09850014__mi,
++	arm_instr_multi_0x09850014__pl,
++	arm_instr_multi_0x09850014__vs,
++	arm_instr_multi_0x09850014__vc,
++	arm_instr_multi_0x09850014__hi,
++	arm_instr_multi_0x09850014__ls,
++	arm_instr_multi_0x09850014__ge,
++	arm_instr_multi_0x09850014__lt,
++	arm_instr_multi_0x09850014__gt,
++	arm_instr_multi_0x09850014__le,
++	arm_instr_multi_0x09850014,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_184[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x088d1100__eq,
++	arm_instr_multi_0x088d1100__ne,
++	arm_instr_multi_0x088d1100__cs,
++	arm_instr_multi_0x088d1100__cc,
++	arm_instr_multi_0x088d1100__mi,
++	arm_instr_multi_0x088d1100__pl,
++	arm_instr_multi_0x088d1100__vs,
++	arm_instr_multi_0x088d1100__vc,
++	arm_instr_multi_0x088d1100__hi,
++	arm_instr_multi_0x088d1100__ls,
++	arm_instr_multi_0x088d1100__ge,
++	arm_instr_multi_0x088d1100__lt,
++	arm_instr_multi_0x088d1100__gt,
++	arm_instr_multi_0x088d1100__le,
++	arm_instr_multi_0x088d1100,
++	arm_instr_nop,
++	arm_instr_multi_0x088d0180__eq,
++	arm_instr_multi_0x088d0180__ne,
++	arm_instr_multi_0x088d0180__cs,
++	arm_instr_multi_0x088d0180__cc,
++	arm_instr_multi_0x088d0180__mi,
++	arm_instr_multi_0x088d0180__pl,
++	arm_instr_multi_0x088d0180__vs,
++	arm_instr_multi_0x088d0180__vc,
++	arm_instr_multi_0x088d0180__hi,
++	arm_instr_multi_0x088d0180__ls,
++	arm_instr_multi_0x088d0180__ge,
++	arm_instr_multi_0x088d0180__lt,
++	arm_instr_multi_0x088d0180__gt,
++	arm_instr_multi_0x088d0180__le,
++	arm_instr_multi_0x088d0180,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_191[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x088d1fff__eq,
++	arm_instr_multi_0x088d1fff__ne,
++	arm_instr_multi_0x088d1fff__cs,
++	arm_instr_multi_0x088d1fff__cc,
++	arm_instr_multi_0x088d1fff__mi,
++	arm_instr_multi_0x088d1fff__pl,
++	arm_instr_multi_0x088d1fff__vs,
++	arm_instr_multi_0x088d1fff__vc,
++	arm_instr_multi_0x088d1fff__hi,
++	arm_instr_multi_0x088d1fff__ls,
++	arm_instr_multi_0x088d1fff__ge,
++	arm_instr_multi_0x088d1fff__lt,
++	arm_instr_multi_0x088d1fff__gt,
++	arm_instr_multi_0x088d1fff__le,
++	arm_instr_multi_0x088d1fff,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_192[96])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08920003__eq,
++	arm_instr_multi_0x08920003__ne,
++	arm_instr_multi_0x08920003__cs,
++	arm_instr_multi_0x08920003__cc,
++	arm_instr_multi_0x08920003__mi,
++	arm_instr_multi_0x08920003__pl,
++	arm_instr_multi_0x08920003__vs,
++	arm_instr_multi_0x08920003__vc,
++	arm_instr_multi_0x08920003__hi,
++	arm_instr_multi_0x08920003__ls,
++	arm_instr_multi_0x08920003__ge,
++	arm_instr_multi_0x08920003__lt,
++	arm_instr_multi_0x08920003__gt,
++	arm_instr_multi_0x08920003__le,
++	arm_instr_multi_0x08920003,
++	arm_instr_nop,
++	arm_instr_multi_0x08900003__eq,
++	arm_instr_multi_0x08900003__ne,
++	arm_instr_multi_0x08900003__cs,
++	arm_instr_multi_0x08900003__cc,
++	arm_instr_multi_0x08900003__mi,
++	arm_instr_multi_0x08900003__pl,
++	arm_instr_multi_0x08900003__vs,
++	arm_instr_multi_0x08900003__vc,
++	arm_instr_multi_0x08900003__hi,
++	arm_instr_multi_0x08900003__ls,
++	arm_instr_multi_0x08900003__ge,
++	arm_instr_multi_0x08900003__lt,
++	arm_instr_multi_0x08900003__gt,
++	arm_instr_multi_0x08900003__le,
++	arm_instr_multi_0x08900003,
++	arm_instr_nop,
++	arm_instr_multi_0x09920003__eq,
++	arm_instr_multi_0x09920003__ne,
++	arm_instr_multi_0x09920003__cs,
++	arm_instr_multi_0x09920003__cc,
++	arm_instr_multi_0x09920003__mi,
++	arm_instr_multi_0x09920003__pl,
++	arm_instr_multi_0x09920003__vs,
++	arm_instr_multi_0x09920003__vc,
++	arm_instr_multi_0x09920003__hi,
++	arm_instr_multi_0x09920003__ls,
++	arm_instr_multi_0x09920003__ge,
++	arm_instr_multi_0x09920003__lt,
++	arm_instr_multi_0x09920003__gt,
++	arm_instr_multi_0x09920003__le,
++	arm_instr_multi_0x09920003,
++	arm_instr_nop,
++	arm_instr_multi_0x08980003__eq,
++	arm_instr_multi_0x08980003__ne,
++	arm_instr_multi_0x08980003__cs,
++	arm_instr_multi_0x08980003__cc,
++	arm_instr_multi_0x08980003__mi,
++	arm_instr_multi_0x08980003__pl,
++	arm_instr_multi_0x08980003__vs,
++	arm_instr_multi_0x08980003__vc,
++	arm_instr_multi_0x08980003__hi,
++	arm_instr_multi_0x08980003__ls,
++	arm_instr_multi_0x08980003__ge,
++	arm_instr_multi_0x08980003__lt,
++	arm_instr_multi_0x08980003__gt,
++	arm_instr_multi_0x08980003__le,
++	arm_instr_multi_0x08980003,
++	arm_instr_nop,
++	arm_instr_multi_0x09904008__eq,
++	arm_instr_multi_0x09904008__ne,
++	arm_instr_multi_0x09904008__cs,
++	arm_instr_multi_0x09904008__cc,
++	arm_instr_multi_0x09904008__mi,
++	arm_instr_multi_0x09904008__pl,
++	arm_instr_multi_0x09904008__vs,
++	arm_instr_multi_0x09904008__vc,
++	arm_instr_multi_0x09904008__hi,
++	arm_instr_multi_0x09904008__ls,
++	arm_instr_multi_0x09904008__ge,
++	arm_instr_multi_0x09904008__lt,
++	arm_instr_multi_0x09904008__gt,
++	arm_instr_multi_0x09904008__le,
++	arm_instr_multi_0x09904008,
++	arm_instr_nop,
++	arm_instr_multi_0x099a0003__eq,
++	arm_instr_multi_0x099a0003__ne,
++	arm_instr_multi_0x099a0003__cs,
++	arm_instr_multi_0x099a0003__cc,
++	arm_instr_multi_0x099a0003__mi,
++	arm_instr_multi_0x099a0003__pl,
++	arm_instr_multi_0x099a0003__vs,
++	arm_instr_multi_0x099a0003__vc,
++	arm_instr_multi_0x099a0003__hi,
++	arm_instr_multi_0x099a0003__ls,
++	arm_instr_multi_0x099a0003__ge,
++	arm_instr_multi_0x099a0003__lt,
++	arm_instr_multi_0x099a0003__gt,
++	arm_instr_multi_0x099a0003__le,
++	arm_instr_multi_0x099a0003,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_193[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08900006__eq,
++	arm_instr_multi_0x08900006__ne,
++	arm_instr_multi_0x08900006__cs,
++	arm_instr_multi_0x08900006__cc,
++	arm_instr_multi_0x08900006__mi,
++	arm_instr_multi_0x08900006__pl,
++	arm_instr_multi_0x08900006__vs,
++	arm_instr_multi_0x08900006__vc,
++	arm_instr_multi_0x08900006__hi,
++	arm_instr_multi_0x08900006__ls,
++	arm_instr_multi_0x08900006__ge,
++	arm_instr_multi_0x08900006__lt,
++	arm_instr_multi_0x08900006__gt,
++	arm_instr_multi_0x08900006__le,
++	arm_instr_multi_0x08900006,
++	arm_instr_nop,
++	arm_instr_multi_0x0892000c__eq,
++	arm_instr_multi_0x0892000c__ne,
++	arm_instr_multi_0x0892000c__cs,
++	arm_instr_multi_0x0892000c__cc,
++	arm_instr_multi_0x0892000c__mi,
++	arm_instr_multi_0x0892000c__pl,
++	arm_instr_multi_0x0892000c__vs,
++	arm_instr_multi_0x0892000c__vc,
++	arm_instr_multi_0x0892000c__hi,
++	arm_instr_multi_0x0892000c__ls,
++	arm_instr_multi_0x0892000c__ge,
++	arm_instr_multi_0x0892000c__lt,
++	arm_instr_multi_0x0892000c__gt,
++	arm_instr_multi_0x0892000c__le,
++	arm_instr_multi_0x0892000c,
++	arm_instr_nop,
++	arm_instr_multi_0x08920006__eq,
++	arm_instr_multi_0x08920006__ne,
++	arm_instr_multi_0x08920006__cs,
++	arm_instr_multi_0x08920006__cc,
++	arm_instr_multi_0x08920006__mi,
++	arm_instr_multi_0x08920006__pl,
++	arm_instr_multi_0x08920006__vs,
++	arm_instr_multi_0x08920006__vc,
++	arm_instr_multi_0x08920006__hi,
++	arm_instr_multi_0x08920006__ls,
++	arm_instr_multi_0x08920006__ge,
++	arm_instr_multi_0x08920006__lt,
++	arm_instr_multi_0x08920006__gt,
++	arm_instr_multi_0x08920006__le,
++	arm_instr_multi_0x08920006,
++	arm_instr_nop,
++	arm_instr_multi_0x08980006__eq,
++	arm_instr_multi_0x08980006__ne,
++	arm_instr_multi_0x08980006__cs,
++	arm_instr_multi_0x08980006__cc,
++	arm_instr_multi_0x08980006__mi,
++	arm_instr_multi_0x08980006__pl,
++	arm_instr_multi_0x08980006__vs,
++	arm_instr_multi_0x08980006__vc,
++	arm_instr_multi_0x08980006__hi,
++	arm_instr_multi_0x08980006__ls,
++	arm_instr_multi_0x08980006__ge,
++	arm_instr_multi_0x08980006__lt,
++	arm_instr_multi_0x08980006__gt,
++	arm_instr_multi_0x08980006__le,
++	arm_instr_multi_0x08980006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_194[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08920018__eq,
++	arm_instr_multi_0x08920018__ne,
++	arm_instr_multi_0x08920018__cs,
++	arm_instr_multi_0x08920018__cc,
++	arm_instr_multi_0x08920018__mi,
++	arm_instr_multi_0x08920018__pl,
++	arm_instr_multi_0x08920018__vs,
++	arm_instr_multi_0x08920018__vc,
++	arm_instr_multi_0x08920018__hi,
++	arm_instr_multi_0x08920018__ls,
++	arm_instr_multi_0x08920018__ge,
++	arm_instr_multi_0x08920018__lt,
++	arm_instr_multi_0x08920018__gt,
++	arm_instr_multi_0x08920018__le,
++	arm_instr_multi_0x08920018,
++	arm_instr_nop,
++	arm_instr_multi_0x08980018__eq,
++	arm_instr_multi_0x08980018__ne,
++	arm_instr_multi_0x08980018__cs,
++	arm_instr_multi_0x08980018__cc,
++	arm_instr_multi_0x08980018__mi,
++	arm_instr_multi_0x08980018__pl,
++	arm_instr_multi_0x08980018__vs,
++	arm_instr_multi_0x08980018__vc,
++	arm_instr_multi_0x08980018__hi,
++	arm_instr_multi_0x08980018__ls,
++	arm_instr_multi_0x08980018__ge,
++	arm_instr_multi_0x08980018__lt,
++	arm_instr_multi_0x08980018__gt,
++	arm_instr_multi_0x08980018__le,
++	arm_instr_multi_0x08980018,
++	arm_instr_nop,
++	arm_instr_multi_0x08900018__eq,
++	arm_instr_multi_0x08900018__ne,
++	arm_instr_multi_0x08900018__cs,
++	arm_instr_multi_0x08900018__cc,
++	arm_instr_multi_0x08900018__mi,
++	arm_instr_multi_0x08900018__pl,
++	arm_instr_multi_0x08900018__vs,
++	arm_instr_multi_0x08900018__vc,
++	arm_instr_multi_0x08900018__hi,
++	arm_instr_multi_0x08900018__ls,
++	arm_instr_multi_0x08900018__ge,
++	arm_instr_multi_0x08900018__lt,
++	arm_instr_multi_0x08900018__gt,
++	arm_instr_multi_0x08900018__le,
++	arm_instr_multi_0x08900018,
++	arm_instr_nop,
++	arm_instr_multi_0x09900018__eq,
++	arm_instr_multi_0x09900018__ne,
++	arm_instr_multi_0x09900018__cs,
++	arm_instr_multi_0x09900018__cc,
++	arm_instr_multi_0x09900018__mi,
++	arm_instr_multi_0x09900018__pl,
++	arm_instr_multi_0x09900018__vs,
++	arm_instr_multi_0x09900018__vc,
++	arm_instr_multi_0x09900018__hi,
++	arm_instr_multi_0x09900018__ls,
++	arm_instr_multi_0x09900018__ge,
++	arm_instr_multi_0x09900018__lt,
++	arm_instr_multi_0x09900018__gt,
++	arm_instr_multi_0x09900018__le,
++	arm_instr_multi_0x09900018,
++	arm_instr_nop,
++	arm_instr_multi_0x08920030__eq,
++	arm_instr_multi_0x08920030__ne,
++	arm_instr_multi_0x08920030__cs,
++	arm_instr_multi_0x08920030__cc,
++	arm_instr_multi_0x08920030__mi,
++	arm_instr_multi_0x08920030__pl,
++	arm_instr_multi_0x08920030__vs,
++	arm_instr_multi_0x08920030__vc,
++	arm_instr_multi_0x08920030__hi,
++	arm_instr_multi_0x08920030__ls,
++	arm_instr_multi_0x08920030__ge,
++	arm_instr_multi_0x08920030__lt,
++	arm_instr_multi_0x08920030__gt,
++	arm_instr_multi_0x08920030__le,
++	arm_instr_multi_0x08920030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_196[64])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08b000c0__eq,
++	arm_instr_multi_0x08b000c0__ne,
++	arm_instr_multi_0x08b000c0__cs,
++	arm_instr_multi_0x08b000c0__cc,
++	arm_instr_multi_0x08b000c0__mi,
++	arm_instr_multi_0x08b000c0__pl,
++	arm_instr_multi_0x08b000c0__vs,
++	arm_instr_multi_0x08b000c0__vc,
++	arm_instr_multi_0x08b000c0__hi,
++	arm_instr_multi_0x08b000c0__ls,
++	arm_instr_multi_0x08b000c0__ge,
++	arm_instr_multi_0x08b000c0__lt,
++	arm_instr_multi_0x08b000c0__gt,
++	arm_instr_multi_0x08b000c0__le,
++	arm_instr_multi_0x08b000c0,
++	arm_instr_nop,
++	arm_instr_multi_0x08980060__eq,
++	arm_instr_multi_0x08980060__ne,
++	arm_instr_multi_0x08980060__cs,
++	arm_instr_multi_0x08980060__cc,
++	arm_instr_multi_0x08980060__mi,
++	arm_instr_multi_0x08980060__pl,
++	arm_instr_multi_0x08980060__vs,
++	arm_instr_multi_0x08980060__vc,
++	arm_instr_multi_0x08980060__hi,
++	arm_instr_multi_0x08980060__ls,
++	arm_instr_multi_0x08980060__ge,
++	arm_instr_multi_0x08980060__lt,
++	arm_instr_multi_0x08980060__gt,
++	arm_instr_multi_0x08980060__le,
++	arm_instr_multi_0x08980060,
++	arm_instr_nop,
++	arm_instr_multi_0x08900060__eq,
++	arm_instr_multi_0x08900060__ne,
++	arm_instr_multi_0x08900060__cs,
++	arm_instr_multi_0x08900060__cc,
++	arm_instr_multi_0x08900060__mi,
++	arm_instr_multi_0x08900060__pl,
++	arm_instr_multi_0x08900060__vs,
++	arm_instr_multi_0x08900060__vc,
++	arm_instr_multi_0x08900060__hi,
++	arm_instr_multi_0x08900060__ls,
++	arm_instr_multi_0x08900060__ge,
++	arm_instr_multi_0x08900060__lt,
++	arm_instr_multi_0x08900060__gt,
++	arm_instr_multi_0x08900060__le,
++	arm_instr_multi_0x08900060,
++	arm_instr_nop,
++	arm_instr_multi_0x089200c0__eq,
++	arm_instr_multi_0x089200c0__ne,
++	arm_instr_multi_0x089200c0__cs,
++	arm_instr_multi_0x089200c0__cc,
++	arm_instr_multi_0x089200c0__mi,
++	arm_instr_multi_0x089200c0__pl,
++	arm_instr_multi_0x089200c0__vs,
++	arm_instr_multi_0x089200c0__vc,
++	arm_instr_multi_0x089200c0__hi,
++	arm_instr_multi_0x089200c0__ls,
++	arm_instr_multi_0x089200c0__ge,
++	arm_instr_multi_0x089200c0__lt,
++	arm_instr_multi_0x089200c0__gt,
++	arm_instr_multi_0x089200c0__le,
++	arm_instr_multi_0x089200c0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_200[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08b00300__eq,
++	arm_instr_multi_0x08b00300__ne,
++	arm_instr_multi_0x08b00300__cs,
++	arm_instr_multi_0x08b00300__cc,
++	arm_instr_multi_0x08b00300__mi,
++	arm_instr_multi_0x08b00300__pl,
++	arm_instr_multi_0x08b00300__vs,
++	arm_instr_multi_0x08b00300__vc,
++	arm_instr_multi_0x08b00300__hi,
++	arm_instr_multi_0x08b00300__ls,
++	arm_instr_multi_0x08b00300__ge,
++	arm_instr_multi_0x08b00300__lt,
++	arm_instr_multi_0x08b00300__gt,
++	arm_instr_multi_0x08b00300__le,
++	arm_instr_multi_0x08b00300,
++	arm_instr_nop,
++	arm_instr_multi_0x09900120__eq,
++	arm_instr_multi_0x09900120__ne,
++	arm_instr_multi_0x09900120__cs,
++	arm_instr_multi_0x09900120__cc,
++	arm_instr_multi_0x09900120__mi,
++	arm_instr_multi_0x09900120__pl,
++	arm_instr_multi_0x09900120__vs,
++	arm_instr_multi_0x09900120__vc,
++	arm_instr_multi_0x09900120__hi,
++	arm_instr_multi_0x09900120__ls,
++	arm_instr_multi_0x09900120__ge,
++	arm_instr_multi_0x09900120__lt,
++	arm_instr_multi_0x09900120__gt,
++	arm_instr_multi_0x09900120__le,
++	arm_instr_multi_0x09900120,
++	arm_instr_nop,
++	arm_instr_multi_0x08980300__eq,
++	arm_instr_multi_0x08980300__ne,
++	arm_instr_multi_0x08980300__cs,
++	arm_instr_multi_0x08980300__cc,
++	arm_instr_multi_0x08980300__mi,
++	arm_instr_multi_0x08980300__pl,
++	arm_instr_multi_0x08980300__vs,
++	arm_instr_multi_0x08980300__vc,
++	arm_instr_multi_0x08980300__hi,
++	arm_instr_multi_0x08980300__ls,
++	arm_instr_multi_0x08980300__ge,
++	arm_instr_multi_0x08980300__lt,
++	arm_instr_multi_0x08980300__gt,
++	arm_instr_multi_0x08980300__le,
++	arm_instr_multi_0x08980300,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_204[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08b00fc0__eq,
++	arm_instr_multi_0x08b00fc0__ne,
++	arm_instr_multi_0x08b00fc0__cs,
++	arm_instr_multi_0x08b00fc0__cc,
++	arm_instr_multi_0x08b00fc0__mi,
++	arm_instr_multi_0x08b00fc0__pl,
++	arm_instr_multi_0x08b00fc0__vs,
++	arm_instr_multi_0x08b00fc0__vc,
++	arm_instr_multi_0x08b00fc0__hi,
++	arm_instr_multi_0x08b00fc0__ls,
++	arm_instr_multi_0x08b00fc0__ge,
++	arm_instr_multi_0x08b00fc0__lt,
++	arm_instr_multi_0x08b00fc0__gt,
++	arm_instr_multi_0x08b00fc0__le,
++	arm_instr_multi_0x08b00fc0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_206[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08b051f8__eq,
++	arm_instr_multi_0x08b051f8__ne,
++	arm_instr_multi_0x08b051f8__cs,
++	arm_instr_multi_0x08b051f8__cc,
++	arm_instr_multi_0x08b051f8__mi,
++	arm_instr_multi_0x08b051f8__pl,
++	arm_instr_multi_0x08b051f8__vs,
++	arm_instr_multi_0x08b051f8__vc,
++	arm_instr_multi_0x08b051f8__hi,
++	arm_instr_multi_0x08b051f8__ls,
++	arm_instr_multi_0x08b051f8__ge,
++	arm_instr_multi_0x08b051f8__lt,
++	arm_instr_multi_0x08b051f8__gt,
++	arm_instr_multi_0x08b051f8__le,
++	arm_instr_multi_0x08b051f8,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_208[128])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08930003__eq,
++	arm_instr_multi_0x08930003__ne,
++	arm_instr_multi_0x08930003__cs,
++	arm_instr_multi_0x08930003__cc,
++	arm_instr_multi_0x08930003__mi,
++	arm_instr_multi_0x08930003__pl,
++	arm_instr_multi_0x08930003__vs,
++	arm_instr_multi_0x08930003__vc,
++	arm_instr_multi_0x08930003__hi,
++	arm_instr_multi_0x08930003__ls,
++	arm_instr_multi_0x08930003__ge,
++	arm_instr_multi_0x08930003__lt,
++	arm_instr_multi_0x08930003__gt,
++	arm_instr_multi_0x08930003__le,
++	arm_instr_multi_0x08930003,
++	arm_instr_nop,
++	arm_instr_multi_0x08910003__eq,
++	arm_instr_multi_0x08910003__ne,
++	arm_instr_multi_0x08910003__cs,
++	arm_instr_multi_0x08910003__cc,
++	arm_instr_multi_0x08910003__mi,
++	arm_instr_multi_0x08910003__pl,
++	arm_instr_multi_0x08910003__vs,
++	arm_instr_multi_0x08910003__vc,
++	arm_instr_multi_0x08910003__hi,
++	arm_instr_multi_0x08910003__ls,
++	arm_instr_multi_0x08910003__ge,
++	arm_instr_multi_0x08910003__lt,
++	arm_instr_multi_0x08910003__gt,
++	arm_instr_multi_0x08910003__le,
++	arm_instr_multi_0x08910003,
++	arm_instr_nop,
++	arm_instr_multi_0x08930600__eq,
++	arm_instr_multi_0x08930600__ne,
++	arm_instr_multi_0x08930600__cs,
++	arm_instr_multi_0x08930600__cc,
++	arm_instr_multi_0x08930600__mi,
++	arm_instr_multi_0x08930600__pl,
++	arm_instr_multi_0x08930600__vs,
++	arm_instr_multi_0x08930600__vc,
++	arm_instr_multi_0x08930600__hi,
++	arm_instr_multi_0x08930600__ls,
++	arm_instr_multi_0x08930600__ge,
++	arm_instr_multi_0x08930600__lt,
++	arm_instr_multi_0x08930600__gt,
++	arm_instr_multi_0x08930600__le,
++	arm_instr_multi_0x08930600,
++	arm_instr_nop,
++	arm_instr_multi_0x08b11008__eq,
++	arm_instr_multi_0x08b11008__ne,
++	arm_instr_multi_0x08b11008__cs,
++	arm_instr_multi_0x08b11008__cc,
++	arm_instr_multi_0x08b11008__mi,
++	arm_instr_multi_0x08b11008__pl,
++	arm_instr_multi_0x08b11008__vs,
++	arm_instr_multi_0x08b11008__vc,
++	arm_instr_multi_0x08b11008__hi,
++	arm_instr_multi_0x08b11008__ls,
++	arm_instr_multi_0x08b11008__ge,
++	arm_instr_multi_0x08b11008__lt,
++	arm_instr_multi_0x08b11008__gt,
++	arm_instr_multi_0x08b11008__le,
++	arm_instr_multi_0x08b11008,
++	arm_instr_nop,
++	arm_instr_multi_0x08b15008__eq,
++	arm_instr_multi_0x08b15008__ne,
++	arm_instr_multi_0x08b15008__cs,
++	arm_instr_multi_0x08b15008__cc,
++	arm_instr_multi_0x08b15008__mi,
++	arm_instr_multi_0x08b15008__pl,
++	arm_instr_multi_0x08b15008__vs,
++	arm_instr_multi_0x08b15008__vc,
++	arm_instr_multi_0x08b15008__hi,
++	arm_instr_multi_0x08b15008__ls,
++	arm_instr_multi_0x08b15008__ge,
++	arm_instr_multi_0x08b15008__lt,
++	arm_instr_multi_0x08b15008__gt,
++	arm_instr_multi_0x08b15008__le,
++	arm_instr_multi_0x08b15008,
++	arm_instr_nop,
++	arm_instr_multi_0x08931008__eq,
++	arm_instr_multi_0x08931008__ne,
++	arm_instr_multi_0x08931008__cs,
++	arm_instr_multi_0x08931008__cc,
++	arm_instr_multi_0x08931008__mi,
++	arm_instr_multi_0x08931008__pl,
++	arm_instr_multi_0x08931008__vs,
++	arm_instr_multi_0x08931008__vc,
++	arm_instr_multi_0x08931008__hi,
++	arm_instr_multi_0x08931008__ls,
++	arm_instr_multi_0x08931008__ge,
++	arm_instr_multi_0x08931008__lt,
++	arm_instr_multi_0x08931008__gt,
++	arm_instr_multi_0x08931008__le,
++	arm_instr_multi_0x08931008,
++	arm_instr_nop,
++	arm_instr_multi_0x08990600__eq,
++	arm_instr_multi_0x08990600__ne,
++	arm_instr_multi_0x08990600__cs,
++	arm_instr_multi_0x08990600__cc,
++	arm_instr_multi_0x08990600__mi,
++	arm_instr_multi_0x08990600__pl,
++	arm_instr_multi_0x08990600__vs,
++	arm_instr_multi_0x08990600__vc,
++	arm_instr_multi_0x08990600__hi,
++	arm_instr_multi_0x08990600__ls,
++	arm_instr_multi_0x08990600__ge,
++	arm_instr_multi_0x08990600__lt,
++	arm_instr_multi_0x08990600__gt,
++	arm_instr_multi_0x08990600__le,
++	arm_instr_multi_0x08990600,
++	arm_instr_nop,
++	arm_instr_multi_0x08990003__eq,
++	arm_instr_multi_0x08990003__ne,
++	arm_instr_multi_0x08990003__cs,
++	arm_instr_multi_0x08990003__cc,
++	arm_instr_multi_0x08990003__mi,
++	arm_instr_multi_0x08990003__pl,
++	arm_instr_multi_0x08990003__vs,
++	arm_instr_multi_0x08990003__vc,
++	arm_instr_multi_0x08990003__hi,
++	arm_instr_multi_0x08990003__ls,
++	arm_instr_multi_0x08990003__ge,
++	arm_instr_multi_0x08990003__lt,
++	arm_instr_multi_0x08990003__gt,
++	arm_instr_multi_0x08990003__le,
++	arm_instr_multi_0x08990003,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_209[96])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08930006__eq,
++	arm_instr_multi_0x08930006__ne,
++	arm_instr_multi_0x08930006__cs,
++	arm_instr_multi_0x08930006__cc,
++	arm_instr_multi_0x08930006__mi,
++	arm_instr_multi_0x08930006__pl,
++	arm_instr_multi_0x08930006__vs,
++	arm_instr_multi_0x08930006__vc,
++	arm_instr_multi_0x08930006__hi,
++	arm_instr_multi_0x08930006__ls,
++	arm_instr_multi_0x08930006__ge,
++	arm_instr_multi_0x08930006__lt,
++	arm_instr_multi_0x08930006__gt,
++	arm_instr_multi_0x08930006__le,
++	arm_instr_multi_0x08930006,
++	arm_instr_nop,
++	arm_instr_multi_0x0891000e__eq,
++	arm_instr_multi_0x0891000e__ne,
++	arm_instr_multi_0x0891000e__cs,
++	arm_instr_multi_0x0891000e__cc,
++	arm_instr_multi_0x0891000e__mi,
++	arm_instr_multi_0x0891000e__pl,
++	arm_instr_multi_0x0891000e__vs,
++	arm_instr_multi_0x0891000e__vc,
++	arm_instr_multi_0x0891000e__hi,
++	arm_instr_multi_0x0891000e__ls,
++	arm_instr_multi_0x0891000e__ge,
++	arm_instr_multi_0x0891000e__lt,
++	arm_instr_multi_0x0891000e__gt,
++	arm_instr_multi_0x0891000e__le,
++	arm_instr_multi_0x0891000e,
++	arm_instr_nop,
++	arm_instr_multi_0x08910006__eq,
++	arm_instr_multi_0x08910006__ne,
++	arm_instr_multi_0x08910006__cs,
++	arm_instr_multi_0x08910006__cc,
++	arm_instr_multi_0x08910006__mi,
++	arm_instr_multi_0x08910006__pl,
++	arm_instr_multi_0x08910006__vs,
++	arm_instr_multi_0x08910006__vc,
++	arm_instr_multi_0x08910006__hi,
++	arm_instr_multi_0x08910006__ls,
++	arm_instr_multi_0x08910006__ge,
++	arm_instr_multi_0x08910006__lt,
++	arm_instr_multi_0x08910006__gt,
++	arm_instr_multi_0x08910006__le,
++	arm_instr_multi_0x08910006,
++	arm_instr_nop,
++	arm_instr_multi_0x09930006__eq,
++	arm_instr_multi_0x09930006__ne,
++	arm_instr_multi_0x09930006__cs,
++	arm_instr_multi_0x09930006__cc,
++	arm_instr_multi_0x09930006__mi,
++	arm_instr_multi_0x09930006__pl,
++	arm_instr_multi_0x09930006__vs,
++	arm_instr_multi_0x09930006__vc,
++	arm_instr_multi_0x09930006__hi,
++	arm_instr_multi_0x09930006__ls,
++	arm_instr_multi_0x09930006__ge,
++	arm_instr_multi_0x09930006__lt,
++	arm_instr_multi_0x09930006__gt,
++	arm_instr_multi_0x09930006__le,
++	arm_instr_multi_0x09930006,
++	arm_instr_nop,
++	arm_instr_multi_0x0893000c__eq,
++	arm_instr_multi_0x0893000c__ne,
++	arm_instr_multi_0x0893000c__cs,
++	arm_instr_multi_0x0893000c__cc,
++	arm_instr_multi_0x0893000c__mi,
++	arm_instr_multi_0x0893000c__pl,
++	arm_instr_multi_0x0893000c__vs,
++	arm_instr_multi_0x0893000c__vc,
++	arm_instr_multi_0x0893000c__hi,
++	arm_instr_multi_0x0893000c__ls,
++	arm_instr_multi_0x0893000c__ge,
++	arm_instr_multi_0x0893000c__lt,
++	arm_instr_multi_0x0893000c__gt,
++	arm_instr_multi_0x0893000c__le,
++	arm_instr_multi_0x0893000c,
++	arm_instr_nop,
++	arm_instr_multi_0x08990006__eq,
++	arm_instr_multi_0x08990006__ne,
++	arm_instr_multi_0x08990006__cs,
++	arm_instr_multi_0x08990006__cc,
++	arm_instr_multi_0x08990006__mi,
++	arm_instr_multi_0x08990006__pl,
++	arm_instr_multi_0x08990006__vs,
++	arm_instr_multi_0x08990006__vc,
++	arm_instr_multi_0x08990006__hi,
++	arm_instr_multi_0x08990006__ls,
++	arm_instr_multi_0x08990006__ge,
++	arm_instr_multi_0x08990006__lt,
++	arm_instr_multi_0x08990006__gt,
++	arm_instr_multi_0x08990006__le,
++	arm_instr_multi_0x08990006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_210[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08b15018__eq,
++	arm_instr_multi_0x08b15018__ne,
++	arm_instr_multi_0x08b15018__cs,
++	arm_instr_multi_0x08b15018__cc,
++	arm_instr_multi_0x08b15018__mi,
++	arm_instr_multi_0x08b15018__pl,
++	arm_instr_multi_0x08b15018__vs,
++	arm_instr_multi_0x08b15018__vc,
++	arm_instr_multi_0x08b15018__hi,
++	arm_instr_multi_0x08b15018__ls,
++	arm_instr_multi_0x08b15018__ge,
++	arm_instr_multi_0x08b15018__lt,
++	arm_instr_multi_0x08b15018__gt,
++	arm_instr_multi_0x08b15018__le,
++	arm_instr_multi_0x08b15018,
++	arm_instr_nop,
++	arm_instr_multi_0x08930018__eq,
++	arm_instr_multi_0x08930018__ne,
++	arm_instr_multi_0x08930018__cs,
++	arm_instr_multi_0x08930018__cc,
++	arm_instr_multi_0x08930018__mi,
++	arm_instr_multi_0x08930018__pl,
++	arm_instr_multi_0x08930018__vs,
++	arm_instr_multi_0x08930018__vc,
++	arm_instr_multi_0x08930018__hi,
++	arm_instr_multi_0x08930018__ls,
++	arm_instr_multi_0x08930018__ge,
++	arm_instr_multi_0x08930018__lt,
++	arm_instr_multi_0x08930018__gt,
++	arm_instr_multi_0x08930018__le,
++	arm_instr_multi_0x08930018,
++	arm_instr_nop,
++	arm_instr_multi_0x099b0030__eq,
++	arm_instr_multi_0x099b0030__ne,
++	arm_instr_multi_0x099b0030__cs,
++	arm_instr_multi_0x099b0030__cc,
++	arm_instr_multi_0x099b0030__mi,
++	arm_instr_multi_0x099b0030__pl,
++	arm_instr_multi_0x099b0030__vs,
++	arm_instr_multi_0x099b0030__vc,
++	arm_instr_multi_0x099b0030__hi,
++	arm_instr_multi_0x099b0030__ls,
++	arm_instr_multi_0x099b0030__ge,
++	arm_instr_multi_0x099b0030__lt,
++	arm_instr_multi_0x099b0030__gt,
++	arm_instr_multi_0x099b0030__le,
++	arm_instr_multi_0x099b0030,
++	arm_instr_nop,
++	arm_instr_multi_0x08910030__eq,
++	arm_instr_multi_0x08910030__ne,
++	arm_instr_multi_0x08910030__cs,
++	arm_instr_multi_0x08910030__cc,
++	arm_instr_multi_0x08910030__mi,
++	arm_instr_multi_0x08910030__pl,
++	arm_instr_multi_0x08910030__vs,
++	arm_instr_multi_0x08910030__vc,
++	arm_instr_multi_0x08910030__hi,
++	arm_instr_multi_0x08910030__ls,
++	arm_instr_multi_0x08910030__ge,
++	arm_instr_multi_0x08910030__lt,
++	arm_instr_multi_0x08910030__gt,
++	arm_instr_multi_0x08910030__le,
++	arm_instr_multi_0x08910030,
++	arm_instr_nop,
++	arm_instr_multi_0x08990018__eq,
++	arm_instr_multi_0x08990018__ne,
++	arm_instr_multi_0x08990018__cs,
++	arm_instr_multi_0x08990018__cc,
++	arm_instr_multi_0x08990018__mi,
++	arm_instr_multi_0x08990018__pl,
++	arm_instr_multi_0x08990018__vs,
++	arm_instr_multi_0x08990018__vc,
++	arm_instr_multi_0x08990018__hi,
++	arm_instr_multi_0x08990018__ls,
++	arm_instr_multi_0x08990018__ge,
++	arm_instr_multi_0x08990018__lt,
++	arm_instr_multi_0x08990018__gt,
++	arm_instr_multi_0x08990018__le,
++	arm_instr_multi_0x08990018,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_212[48])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08930060__eq,
++	arm_instr_multi_0x08930060__ne,
++	arm_instr_multi_0x08930060__cs,
++	arm_instr_multi_0x08930060__cc,
++	arm_instr_multi_0x08930060__mi,
++	arm_instr_multi_0x08930060__pl,
++	arm_instr_multi_0x08930060__vs,
++	arm_instr_multi_0x08930060__vc,
++	arm_instr_multi_0x08930060__hi,
++	arm_instr_multi_0x08930060__ls,
++	arm_instr_multi_0x08930060__ge,
++	arm_instr_multi_0x08930060__lt,
++	arm_instr_multi_0x08930060__gt,
++	arm_instr_multi_0x08930060__le,
++	arm_instr_multi_0x08930060,
++	arm_instr_nop,
++	arm_instr_multi_0x089100c0__eq,
++	arm_instr_multi_0x089100c0__ne,
++	arm_instr_multi_0x089100c0__cs,
++	arm_instr_multi_0x089100c0__cc,
++	arm_instr_multi_0x089100c0__mi,
++	arm_instr_multi_0x089100c0__pl,
++	arm_instr_multi_0x089100c0__vs,
++	arm_instr_multi_0x089100c0__vc,
++	arm_instr_multi_0x089100c0__hi,
++	arm_instr_multi_0x089100c0__ls,
++	arm_instr_multi_0x089100c0__ge,
++	arm_instr_multi_0x089100c0__lt,
++	arm_instr_multi_0x089100c0__gt,
++	arm_instr_multi_0x089100c0__le,
++	arm_instr_multi_0x089100c0,
++	arm_instr_nop,
++	arm_instr_multi_0x089300c0__eq,
++	arm_instr_multi_0x089300c0__ne,
++	arm_instr_multi_0x089300c0__cs,
++	arm_instr_multi_0x089300c0__cc,
++	arm_instr_multi_0x089300c0__mi,
++	arm_instr_multi_0x089300c0__pl,
++	arm_instr_multi_0x089300c0__vs,
++	arm_instr_multi_0x089300c0__vc,
++	arm_instr_multi_0x089300c0__hi,
++	arm_instr_multi_0x089300c0__ls,
++	arm_instr_multi_0x089300c0__ge,
++	arm_instr_multi_0x089300c0__lt,
++	arm_instr_multi_0x089300c0__gt,
++	arm_instr_multi_0x089300c0__le,
++	arm_instr_multi_0x089300c0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_216[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08930180__eq,
++	arm_instr_multi_0x08930180__ne,
++	arm_instr_multi_0x08930180__cs,
++	arm_instr_multi_0x08930180__cc,
++	arm_instr_multi_0x08930180__mi,
++	arm_instr_multi_0x08930180__pl,
++	arm_instr_multi_0x08930180__vs,
++	arm_instr_multi_0x08930180__vc,
++	arm_instr_multi_0x08930180__hi,
++	arm_instr_multi_0x08930180__ls,
++	arm_instr_multi_0x08930180__ge,
++	arm_instr_multi_0x08930180__lt,
++	arm_instr_multi_0x08930180__gt,
++	arm_instr_multi_0x08930180__le,
++	arm_instr_multi_0x08930180,
++	arm_instr_nop,
++	arm_instr_multi_0x099b0180__eq,
++	arm_instr_multi_0x099b0180__ne,
++	arm_instr_multi_0x099b0180__cs,
++	arm_instr_multi_0x099b0180__cc,
++	arm_instr_multi_0x099b0180__mi,
++	arm_instr_multi_0x099b0180__pl,
++	arm_instr_multi_0x099b0180__vs,
++	arm_instr_multi_0x099b0180__vc,
++	arm_instr_multi_0x099b0180__hi,
++	arm_instr_multi_0x099b0180__ls,
++	arm_instr_multi_0x099b0180__ge,
++	arm_instr_multi_0x099b0180__lt,
++	arm_instr_multi_0x099b0180__gt,
++	arm_instr_multi_0x099b0180__le,
++	arm_instr_multi_0x099b0180,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_224[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08940003__eq,
++	arm_instr_multi_0x08940003__ne,
++	arm_instr_multi_0x08940003__cs,
++	arm_instr_multi_0x08940003__cc,
++	arm_instr_multi_0x08940003__mi,
++	arm_instr_multi_0x08940003__pl,
++	arm_instr_multi_0x08940003__vs,
++	arm_instr_multi_0x08940003__vc,
++	arm_instr_multi_0x08940003__hi,
++	arm_instr_multi_0x08940003__ls,
++	arm_instr_multi_0x08940003__ge,
++	arm_instr_multi_0x08940003__lt,
++	arm_instr_multi_0x08940003__gt,
++	arm_instr_multi_0x08940003__le,
++	arm_instr_multi_0x08940003,
++	arm_instr_nop,
++	arm_instr_multi_0x089e000a__eq,
++	arm_instr_multi_0x089e000a__ne,
++	arm_instr_multi_0x089e000a__cs,
++	arm_instr_multi_0x089e000a__cc,
++	arm_instr_multi_0x089e000a__mi,
++	arm_instr_multi_0x089e000a__pl,
++	arm_instr_multi_0x089e000a__vs,
++	arm_instr_multi_0x089e000a__vc,
++	arm_instr_multi_0x089e000a__hi,
++	arm_instr_multi_0x089e000a__ls,
++	arm_instr_multi_0x089e000a__ge,
++	arm_instr_multi_0x089e000a__lt,
++	arm_instr_multi_0x089e000a__gt,
++	arm_instr_multi_0x089e000a__le,
++	arm_instr_multi_0x089e000a,
++	arm_instr_nop,
++	arm_instr_multi_0x0894000a__eq,
++	arm_instr_multi_0x0894000a__ne,
++	arm_instr_multi_0x0894000a__cs,
++	arm_instr_multi_0x0894000a__cc,
++	arm_instr_multi_0x0894000a__mi,
++	arm_instr_multi_0x0894000a__pl,
++	arm_instr_multi_0x0894000a__vs,
++	arm_instr_multi_0x0894000a__vc,
++	arm_instr_multi_0x0894000a__hi,
++	arm_instr_multi_0x0894000a__ls,
++	arm_instr_multi_0x0894000a__ge,
++	arm_instr_multi_0x0894000a__lt,
++	arm_instr_multi_0x0894000a__gt,
++	arm_instr_multi_0x0894000a__le,
++	arm_instr_multi_0x0894000a,
++	arm_instr_nop,
++	arm_instr_multi_0x08940009__eq,
++	arm_instr_multi_0x08940009__ne,
++	arm_instr_multi_0x08940009__cs,
++	arm_instr_multi_0x08940009__cc,
++	arm_instr_multi_0x08940009__mi,
++	arm_instr_multi_0x08940009__pl,
++	arm_instr_multi_0x08940009__vs,
++	arm_instr_multi_0x08940009__vc,
++	arm_instr_multi_0x08940009__hi,
++	arm_instr_multi_0x08940009__ls,
++	arm_instr_multi_0x08940009__ge,
++	arm_instr_multi_0x08940009__lt,
++	arm_instr_multi_0x08940009__gt,
++	arm_instr_multi_0x08940009__le,
++	arm_instr_multi_0x08940009,
++	arm_instr_nop,
++	arm_instr_multi_0x089c5000__eq,
++	arm_instr_multi_0x089c5000__ne,
++	arm_instr_multi_0x089c5000__cs,
++	arm_instr_multi_0x089c5000__cc,
++	arm_instr_multi_0x089c5000__mi,
++	arm_instr_multi_0x089c5000__pl,
++	arm_instr_multi_0x089c5000__vs,
++	arm_instr_multi_0x089c5000__vc,
++	arm_instr_multi_0x089c5000__hi,
++	arm_instr_multi_0x089c5000__ls,
++	arm_instr_multi_0x089c5000__ge,
++	arm_instr_multi_0x089c5000__lt,
++	arm_instr_multi_0x089c5000__gt,
++	arm_instr_multi_0x089c5000__le,
++	arm_instr_multi_0x089c5000,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_225[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x0894000c__eq,
++	arm_instr_multi_0x0894000c__ne,
++	arm_instr_multi_0x0894000c__cs,
++	arm_instr_multi_0x0894000c__cc,
++	arm_instr_multi_0x0894000c__mi,
++	arm_instr_multi_0x0894000c__pl,
++	arm_instr_multi_0x0894000c__vs,
++	arm_instr_multi_0x0894000c__vc,
++	arm_instr_multi_0x0894000c__hi,
++	arm_instr_multi_0x0894000c__ls,
++	arm_instr_multi_0x0894000c__ge,
++	arm_instr_multi_0x0894000c__lt,
++	arm_instr_multi_0x0894000c__gt,
++	arm_instr_multi_0x0894000c__le,
++	arm_instr_multi_0x0894000c,
++	arm_instr_nop,
++	arm_instr_multi_0x089c0006__eq,
++	arm_instr_multi_0x089c0006__ne,
++	arm_instr_multi_0x089c0006__cs,
++	arm_instr_multi_0x089c0006__cc,
++	arm_instr_multi_0x089c0006__mi,
++	arm_instr_multi_0x089c0006__pl,
++	arm_instr_multi_0x089c0006__vs,
++	arm_instr_multi_0x089c0006__vc,
++	arm_instr_multi_0x089c0006__hi,
++	arm_instr_multi_0x089c0006__ls,
++	arm_instr_multi_0x089c0006__ge,
++	arm_instr_multi_0x089c0006__lt,
++	arm_instr_multi_0x089c0006__gt,
++	arm_instr_multi_0x089c0006__le,
++	arm_instr_multi_0x089c0006,
++	arm_instr_nop,
++	arm_instr_multi_0x0896000c__eq,
++	arm_instr_multi_0x0896000c__ne,
++	arm_instr_multi_0x0896000c__cs,
++	arm_instr_multi_0x0896000c__cc,
++	arm_instr_multi_0x0896000c__mi,
++	arm_instr_multi_0x0896000c__pl,
++	arm_instr_multi_0x0896000c__vs,
++	arm_instr_multi_0x0896000c__vc,
++	arm_instr_multi_0x0896000c__hi,
++	arm_instr_multi_0x0896000c__ls,
++	arm_instr_multi_0x0896000c__ge,
++	arm_instr_multi_0x0896000c__lt,
++	arm_instr_multi_0x0896000c__gt,
++	arm_instr_multi_0x0896000c__le,
++	arm_instr_multi_0x0896000c,
++	arm_instr_nop,
++	arm_instr_multi_0x089c000c__eq,
++	arm_instr_multi_0x089c000c__ne,
++	arm_instr_multi_0x089c000c__cs,
++	arm_instr_multi_0x089c000c__cc,
++	arm_instr_multi_0x089c000c__mi,
++	arm_instr_multi_0x089c000c__pl,
++	arm_instr_multi_0x089c000c__vs,
++	arm_instr_multi_0x089c000c__vc,
++	arm_instr_multi_0x089c000c__hi,
++	arm_instr_multi_0x089c000c__ls,
++	arm_instr_multi_0x089c000c__ge,
++	arm_instr_multi_0x089c000c__lt,
++	arm_instr_multi_0x089c000c__gt,
++	arm_instr_multi_0x089c000c__le,
++	arm_instr_multi_0x089c000c,
++	arm_instr_nop,
++	arm_instr_multi_0x08be000f__eq,
++	arm_instr_multi_0x08be000f__ne,
++	arm_instr_multi_0x08be000f__cs,
++	arm_instr_multi_0x08be000f__cc,
++	arm_instr_multi_0x08be000f__mi,
++	arm_instr_multi_0x08be000f__pl,
++	arm_instr_multi_0x08be000f__vs,
++	arm_instr_multi_0x08be000f__vc,
++	arm_instr_multi_0x08be000f__hi,
++	arm_instr_multi_0x08be000f__ls,
++	arm_instr_multi_0x08be000f__ge,
++	arm_instr_multi_0x08be000f__lt,
++	arm_instr_multi_0x08be000f__gt,
++	arm_instr_multi_0x08be000f__le,
++	arm_instr_multi_0x08be000f,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_226[112])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x089e0018__eq,
++	arm_instr_multi_0x089e0018__ne,
++	arm_instr_multi_0x089e0018__cs,
++	arm_instr_multi_0x089e0018__cc,
++	arm_instr_multi_0x089e0018__mi,
++	arm_instr_multi_0x089e0018__pl,
++	arm_instr_multi_0x089e0018__vs,
++	arm_instr_multi_0x089e0018__vc,
++	arm_instr_multi_0x089e0018__hi,
++	arm_instr_multi_0x089e0018__ls,
++	arm_instr_multi_0x089e0018__ge,
++	arm_instr_multi_0x089e0018__lt,
++	arm_instr_multi_0x089e0018__gt,
++	arm_instr_multi_0x089e0018__le,
++	arm_instr_multi_0x089e0018,
++	arm_instr_nop,
++	arm_instr_multi_0x09940018__eq,
++	arm_instr_multi_0x09940018__ne,
++	arm_instr_multi_0x09940018__cs,
++	arm_instr_multi_0x09940018__cc,
++	arm_instr_multi_0x09940018__mi,
++	arm_instr_multi_0x09940018__pl,
++	arm_instr_multi_0x09940018__vs,
++	arm_instr_multi_0x09940018__vc,
++	arm_instr_multi_0x09940018__hi,
++	arm_instr_multi_0x09940018__ls,
++	arm_instr_multi_0x09940018__ge,
++	arm_instr_multi_0x09940018__lt,
++	arm_instr_multi_0x09940018__gt,
++	arm_instr_multi_0x09940018__le,
++	arm_instr_multi_0x09940018,
++	arm_instr_nop,
++	arm_instr_multi_0x089c0018__eq,
++	arm_instr_multi_0x089c0018__ne,
++	arm_instr_multi_0x089c0018__cs,
++	arm_instr_multi_0x089c0018__cc,
++	arm_instr_multi_0x089c0018__mi,
++	arm_instr_multi_0x089c0018__pl,
++	arm_instr_multi_0x089c0018__vs,
++	arm_instr_multi_0x089c0018__vc,
++	arm_instr_multi_0x089c0018__hi,
++	arm_instr_multi_0x089c0018__ls,
++	arm_instr_multi_0x089c0018__ge,
++	arm_instr_multi_0x089c0018__lt,
++	arm_instr_multi_0x089c0018__gt,
++	arm_instr_multi_0x089c0018__le,
++	arm_instr_multi_0x089c0018,
++	arm_instr_nop,
++	arm_instr_multi_0x089e0030__eq,
++	arm_instr_multi_0x089e0030__ne,
++	arm_instr_multi_0x089e0030__cs,
++	arm_instr_multi_0x089e0030__cc,
++	arm_instr_multi_0x089e0030__mi,
++	arm_instr_multi_0x089e0030__pl,
++	arm_instr_multi_0x089e0030__vs,
++	arm_instr_multi_0x089e0030__vc,
++	arm_instr_multi_0x089e0030__hi,
++	arm_instr_multi_0x089e0030__ls,
++	arm_instr_multi_0x089e0030__ge,
++	arm_instr_multi_0x089e0030__lt,
++	arm_instr_multi_0x089e0030__gt,
++	arm_instr_multi_0x089e0030__le,
++	arm_instr_multi_0x089e0030,
++	arm_instr_nop,
++	arm_instr_multi_0x08940012__eq,
++	arm_instr_multi_0x08940012__ne,
++	arm_instr_multi_0x08940012__cs,
++	arm_instr_multi_0x08940012__cc,
++	arm_instr_multi_0x08940012__mi,
++	arm_instr_multi_0x08940012__pl,
++	arm_instr_multi_0x08940012__vs,
++	arm_instr_multi_0x08940012__vc,
++	arm_instr_multi_0x08940012__hi,
++	arm_instr_multi_0x08940012__ls,
++	arm_instr_multi_0x08940012__ge,
++	arm_instr_multi_0x08940012__lt,
++	arm_instr_multi_0x08940012__gt,
++	arm_instr_multi_0x08940012__le,
++	arm_instr_multi_0x08940012,
++	arm_instr_nop,
++	arm_instr_multi_0x08940018__eq,
++	arm_instr_multi_0x08940018__ne,
++	arm_instr_multi_0x08940018__cs,
++	arm_instr_multi_0x08940018__cc,
++	arm_instr_multi_0x08940018__mi,
++	arm_instr_multi_0x08940018__pl,
++	arm_instr_multi_0x08940018__vs,
++	arm_instr_multi_0x08940018__vc,
++	arm_instr_multi_0x08940018__hi,
++	arm_instr_multi_0x08940018__ls,
++	arm_instr_multi_0x08940018__ge,
++	arm_instr_multi_0x08940018__lt,
++	arm_instr_multi_0x08940018__gt,
++	arm_instr_multi_0x08940018__le,
++	arm_instr_multi_0x08940018,
++	arm_instr_nop,
++	arm_instr_multi_0x08960030__eq,
++	arm_instr_multi_0x08960030__ne,
++	arm_instr_multi_0x08960030__cs,
++	arm_instr_multi_0x08960030__cc,
++	arm_instr_multi_0x08960030__mi,
++	arm_instr_multi_0x08960030__pl,
++	arm_instr_multi_0x08960030__vs,
++	arm_instr_multi_0x08960030__vc,
++	arm_instr_multi_0x08960030__hi,
++	arm_instr_multi_0x08960030__ls,
++	arm_instr_multi_0x08960030__ge,
++	arm_instr_multi_0x08960030__lt,
++	arm_instr_multi_0x08960030__gt,
++	arm_instr_multi_0x08960030__le,
++	arm_instr_multi_0x08960030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_228[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x089e0060__eq,
++	arm_instr_multi_0x089e0060__ne,
++	arm_instr_multi_0x089e0060__cs,
++	arm_instr_multi_0x089e0060__cc,
++	arm_instr_multi_0x089e0060__mi,
++	arm_instr_multi_0x089e0060__pl,
++	arm_instr_multi_0x089e0060__vs,
++	arm_instr_multi_0x089e0060__vc,
++	arm_instr_multi_0x089e0060__hi,
++	arm_instr_multi_0x089e0060__ls,
++	arm_instr_multi_0x089e0060__ge,
++	arm_instr_multi_0x089e0060__lt,
++	arm_instr_multi_0x089e0060__gt,
++	arm_instr_multi_0x089e0060__le,
++	arm_instr_multi_0x089e0060,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_232[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x099c0180__eq,
++	arm_instr_multi_0x099c0180__ne,
++	arm_instr_multi_0x099c0180__cs,
++	arm_instr_multi_0x099c0180__cc,
++	arm_instr_multi_0x099c0180__mi,
++	arm_instr_multi_0x099c0180__pl,
++	arm_instr_multi_0x099c0180__vs,
++	arm_instr_multi_0x099c0180__vc,
++	arm_instr_multi_0x099c0180__hi,
++	arm_instr_multi_0x099c0180__ls,
++	arm_instr_multi_0x099c0180__ge,
++	arm_instr_multi_0x099c0180__lt,
++	arm_instr_multi_0x099c0180__gt,
++	arm_instr_multi_0x099c0180__le,
++	arm_instr_multi_0x099c0180,
++	arm_instr_nop,
++	arm_instr_multi_0x089c0300__eq,
++	arm_instr_multi_0x089c0300__ne,
++	arm_instr_multi_0x089c0300__cs,
++	arm_instr_multi_0x089c0300__cc,
++	arm_instr_multi_0x089c0300__mi,
++	arm_instr_multi_0x089c0300__pl,
++	arm_instr_multi_0x089c0300__vs,
++	arm_instr_multi_0x089c0300__vc,
++	arm_instr_multi_0x089c0300__hi,
++	arm_instr_multi_0x089c0300__ls,
++	arm_instr_multi_0x089c0300__ge,
++	arm_instr_multi_0x089c0300__lt,
++	arm_instr_multi_0x089c0300__gt,
++	arm_instr_multi_0x089c0300__le,
++	arm_instr_multi_0x089c0300,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_240[96])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08bd8000__eq,
++	arm_instr_multi_0x08bd8000__ne,
++	arm_instr_multi_0x08bd8000__cs,
++	arm_instr_multi_0x08bd8000__cc,
++	arm_instr_multi_0x08bd8000__mi,
++	arm_instr_multi_0x08bd8000__pl,
++	arm_instr_multi_0x08bd8000__vs,
++	arm_instr_multi_0x08bd8000__vc,
++	arm_instr_multi_0x08bd8000__hi,
++	arm_instr_multi_0x08bd8000__ls,
++	arm_instr_multi_0x08bd8000__ge,
++	arm_instr_multi_0x08bd8000__lt,
++	arm_instr_multi_0x08bd8000__gt,
++	arm_instr_multi_0x08bd8000__le,
++	arm_instr_multi_0x08bd8000,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd8001__eq,
++	arm_instr_multi_0x08bd8001__ne,
++	arm_instr_multi_0x08bd8001__cs,
++	arm_instr_multi_0x08bd8001__cc,
++	arm_instr_multi_0x08bd8001__mi,
++	arm_instr_multi_0x08bd8001__pl,
++	arm_instr_multi_0x08bd8001__vs,
++	arm_instr_multi_0x08bd8001__vc,
++	arm_instr_multi_0x08bd8001__hi,
++	arm_instr_multi_0x08bd8001__ls,
++	arm_instr_multi_0x08bd8001__ge,
++	arm_instr_multi_0x08bd8001__lt,
++	arm_instr_multi_0x08bd8001__gt,
++	arm_instr_multi_0x08bd8001__le,
++	arm_instr_multi_0x08bd8001,
++	arm_instr_nop,
++	arm_instr_multi_0x08950003__eq,
++	arm_instr_multi_0x08950003__ne,
++	arm_instr_multi_0x08950003__cs,
++	arm_instr_multi_0x08950003__cc,
++	arm_instr_multi_0x08950003__mi,
++	arm_instr_multi_0x08950003__pl,
++	arm_instr_multi_0x08950003__vs,
++	arm_instr_multi_0x08950003__vc,
++	arm_instr_multi_0x08950003__hi,
++	arm_instr_multi_0x08950003__ls,
++	arm_instr_multi_0x08950003__ge,
++	arm_instr_multi_0x08950003__lt,
++	arm_instr_multi_0x08950003__gt,
++	arm_instr_multi_0x08950003__le,
++	arm_instr_multi_0x08950003,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd0400__eq,
++	arm_instr_multi_0x08bd0400__ne,
++	arm_instr_multi_0x08bd0400__cs,
++	arm_instr_multi_0x08bd0400__cc,
++	arm_instr_multi_0x08bd0400__mi,
++	arm_instr_multi_0x08bd0400__pl,
++	arm_instr_multi_0x08bd0400__vs,
++	arm_instr_multi_0x08bd0400__vc,
++	arm_instr_multi_0x08bd0400__hi,
++	arm_instr_multi_0x08bd0400__ls,
++	arm_instr_multi_0x08bd0400__ge,
++	arm_instr_multi_0x08bd0400__lt,
++	arm_instr_multi_0x08bd0400__gt,
++	arm_instr_multi_0x08bd0400__le,
++	arm_instr_multi_0x08bd0400,
++	arm_instr_nop,
++	arm_instr_multi_0x08970600__eq,
++	arm_instr_multi_0x08970600__ne,
++	arm_instr_multi_0x08970600__cs,
++	arm_instr_multi_0x08970600__cc,
++	arm_instr_multi_0x08970600__mi,
++	arm_instr_multi_0x08970600__pl,
++	arm_instr_multi_0x08970600__vs,
++	arm_instr_multi_0x08970600__vc,
++	arm_instr_multi_0x08970600__hi,
++	arm_instr_multi_0x08970600__ls,
++	arm_instr_multi_0x08970600__ge,
++	arm_instr_multi_0x08970600__lt,
++	arm_instr_multi_0x08970600__gt,
++	arm_instr_multi_0x08970600__le,
++	arm_instr_multi_0x08970600,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd8400__eq,
++	arm_instr_multi_0x08bd8400__ne,
++	arm_instr_multi_0x08bd8400__cs,
++	arm_instr_multi_0x08bd8400__cc,
++	arm_instr_multi_0x08bd8400__mi,
++	arm_instr_multi_0x08bd8400__pl,
++	arm_instr_multi_0x08bd8400__vs,
++	arm_instr_multi_0x08bd8400__vc,
++	arm_instr_multi_0x08bd8400__hi,
++	arm_instr_multi_0x08bd8400__ls,
++	arm_instr_multi_0x08bd8400__ge,
++	arm_instr_multi_0x08bd8400__lt,
++	arm_instr_multi_0x08bd8400__gt,
++	arm_instr_multi_0x08bd8400__le,
++	arm_instr_multi_0x08bd8400,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_241[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08950006__eq,
++	arm_instr_multi_0x08950006__ne,
++	arm_instr_multi_0x08950006__cs,
++	arm_instr_multi_0x08950006__cc,
++	arm_instr_multi_0x08950006__mi,
++	arm_instr_multi_0x08950006__pl,
++	arm_instr_multi_0x08950006__vs,
++	arm_instr_multi_0x08950006__vc,
++	arm_instr_multi_0x08950006__hi,
++	arm_instr_multi_0x08950006__ls,
++	arm_instr_multi_0x08950006__ge,
++	arm_instr_multi_0x08950006__lt,
++	arm_instr_multi_0x08950006__gt,
++	arm_instr_multi_0x08950006__le,
++	arm_instr_multi_0x08950006,
++	arm_instr_nop,
++	arm_instr_multi_0x08970006__eq,
++	arm_instr_multi_0x08970006__ne,
++	arm_instr_multi_0x08970006__cs,
++	arm_instr_multi_0x08970006__cc,
++	arm_instr_multi_0x08970006__mi,
++	arm_instr_multi_0x08970006__pl,
++	arm_instr_multi_0x08970006__vs,
++	arm_instr_multi_0x08970006__vc,
++	arm_instr_multi_0x08970006__hi,
++	arm_instr_multi_0x08970006__ls,
++	arm_instr_multi_0x08970006__ge,
++	arm_instr_multi_0x08970006__lt,
++	arm_instr_multi_0x08970006__gt,
++	arm_instr_multi_0x08970006__le,
++	arm_instr_multi_0x08970006,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_242[112])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08bd8010__eq,
++	arm_instr_multi_0x08bd8010__ne,
++	arm_instr_multi_0x08bd8010__cs,
++	arm_instr_multi_0x08bd8010__cc,
++	arm_instr_multi_0x08bd8010__mi,
++	arm_instr_multi_0x08bd8010__pl,
++	arm_instr_multi_0x08bd8010__vs,
++	arm_instr_multi_0x08bd8010__vc,
++	arm_instr_multi_0x08bd8010__hi,
++	arm_instr_multi_0x08bd8010__ls,
++	arm_instr_multi_0x08bd8010__ge,
++	arm_instr_multi_0x08bd8010__lt,
++	arm_instr_multi_0x08bd8010__gt,
++	arm_instr_multi_0x08bd8010__le,
++	arm_instr_multi_0x08bd8010,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd8030__eq,
++	arm_instr_multi_0x08bd8030__ne,
++	arm_instr_multi_0x08bd8030__cs,
++	arm_instr_multi_0x08bd8030__cc,
++	arm_instr_multi_0x08bd8030__mi,
++	arm_instr_multi_0x08bd8030__pl,
++	arm_instr_multi_0x08bd8030__vs,
++	arm_instr_multi_0x08bd8030__vc,
++	arm_instr_multi_0x08bd8030__hi,
++	arm_instr_multi_0x08bd8030__ls,
++	arm_instr_multi_0x08bd8030__ge,
++	arm_instr_multi_0x08bd8030__lt,
++	arm_instr_multi_0x08bd8030__gt,
++	arm_instr_multi_0x08bd8030__le,
++	arm_instr_multi_0x08bd8030,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd0030__eq,
++	arm_instr_multi_0x08bd0030__ne,
++	arm_instr_multi_0x08bd0030__cs,
++	arm_instr_multi_0x08bd0030__cc,
++	arm_instr_multi_0x08bd0030__mi,
++	arm_instr_multi_0x08bd0030__pl,
++	arm_instr_multi_0x08bd0030__vs,
++	arm_instr_multi_0x08bd0030__vc,
++	arm_instr_multi_0x08bd0030__hi,
++	arm_instr_multi_0x08bd0030__ls,
++	arm_instr_multi_0x08bd0030__ge,
++	arm_instr_multi_0x08bd0030__lt,
++	arm_instr_multi_0x08bd0030__gt,
++	arm_instr_multi_0x08bd0030__le,
++	arm_instr_multi_0x08bd0030,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd0010__eq,
++	arm_instr_multi_0x08bd0010__ne,
++	arm_instr_multi_0x08bd0010__cs,
++	arm_instr_multi_0x08bd0010__cc,
++	arm_instr_multi_0x08bd0010__mi,
++	arm_instr_multi_0x08bd0010__pl,
++	arm_instr_multi_0x08bd0010__vs,
++	arm_instr_multi_0x08bd0010__vc,
++	arm_instr_multi_0x08bd0010__hi,
++	arm_instr_multi_0x08bd0010__ls,
++	arm_instr_multi_0x08bd0010__ge,
++	arm_instr_multi_0x08bd0010__lt,
++	arm_instr_multi_0x08bd0010__gt,
++	arm_instr_multi_0x08bd0010__le,
++	arm_instr_multi_0x08bd0010,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd4010__eq,
++	arm_instr_multi_0x08bd4010__ne,
++	arm_instr_multi_0x08bd4010__cs,
++	arm_instr_multi_0x08bd4010__cc,
++	arm_instr_multi_0x08bd4010__mi,
++	arm_instr_multi_0x08bd4010__pl,
++	arm_instr_multi_0x08bd4010__vs,
++	arm_instr_multi_0x08bd4010__vc,
++	arm_instr_multi_0x08bd4010__hi,
++	arm_instr_multi_0x08bd4010__ls,
++	arm_instr_multi_0x08bd4010__ge,
++	arm_instr_multi_0x08bd4010__lt,
++	arm_instr_multi_0x08bd4010__gt,
++	arm_instr_multi_0x08bd4010__le,
++	arm_instr_multi_0x08bd4010,
++	arm_instr_nop,
++	arm_instr_multi_0x08950030__eq,
++	arm_instr_multi_0x08950030__ne,
++	arm_instr_multi_0x08950030__cs,
++	arm_instr_multi_0x08950030__cc,
++	arm_instr_multi_0x08950030__mi,
++	arm_instr_multi_0x08950030__pl,
++	arm_instr_multi_0x08950030__vs,
++	arm_instr_multi_0x08950030__vc,
++	arm_instr_multi_0x08950030__hi,
++	arm_instr_multi_0x08950030__ls,
++	arm_instr_multi_0x08950030__ge,
++	arm_instr_multi_0x08950030__lt,
++	arm_instr_multi_0x08950030__gt,
++	arm_instr_multi_0x08950030__le,
++	arm_instr_multi_0x08950030,
++	arm_instr_nop,
++	arm_instr_multi_0x08970030__eq,
++	arm_instr_multi_0x08970030__ne,
++	arm_instr_multi_0x08970030__cs,
++	arm_instr_multi_0x08970030__cc,
++	arm_instr_multi_0x08970030__mi,
++	arm_instr_multi_0x08970030__pl,
++	arm_instr_multi_0x08970030__vs,
++	arm_instr_multi_0x08970030__vc,
++	arm_instr_multi_0x08970030__hi,
++	arm_instr_multi_0x08970030__ls,
++	arm_instr_multi_0x08970030__ge,
++	arm_instr_multi_0x08970030__lt,
++	arm_instr_multi_0x08970030__gt,
++	arm_instr_multi_0x08970030__le,
++	arm_instr_multi_0x08970030,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_243[16])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08bd4c1f__eq,
++	arm_instr_multi_0x08bd4c1f__ne,
++	arm_instr_multi_0x08bd4c1f__cs,
++	arm_instr_multi_0x08bd4c1f__cc,
++	arm_instr_multi_0x08bd4c1f__mi,
++	arm_instr_multi_0x08bd4c1f__pl,
++	arm_instr_multi_0x08bd4c1f__vs,
++	arm_instr_multi_0x08bd4c1f__vc,
++	arm_instr_multi_0x08bd4c1f__hi,
++	arm_instr_multi_0x08bd4c1f__ls,
++	arm_instr_multi_0x08bd4c1f__ge,
++	arm_instr_multi_0x08bd4c1f__lt,
++	arm_instr_multi_0x08bd4c1f__gt,
++	arm_instr_multi_0x08bd4c1f__le,
++	arm_instr_multi_0x08bd4c1f,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_244[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08971040__eq,
++	arm_instr_multi_0x08971040__ne,
++	arm_instr_multi_0x08971040__cs,
++	arm_instr_multi_0x08971040__cc,
++	arm_instr_multi_0x08971040__mi,
++	arm_instr_multi_0x08971040__pl,
++	arm_instr_multi_0x08971040__vs,
++	arm_instr_multi_0x08971040__vc,
++	arm_instr_multi_0x08971040__hi,
++	arm_instr_multi_0x08971040__ls,
++	arm_instr_multi_0x08971040__ge,
++	arm_instr_multi_0x08971040__lt,
++	arm_instr_multi_0x08971040__gt,
++	arm_instr_multi_0x08971040__le,
++	arm_instr_multi_0x08971040,
++	arm_instr_nop,
++	arm_instr_multi_0x08950060__eq,
++	arm_instr_multi_0x08950060__ne,
++	arm_instr_multi_0x08950060__cs,
++	arm_instr_multi_0x08950060__cc,
++	arm_instr_multi_0x08950060__mi,
++	arm_instr_multi_0x08950060__pl,
++	arm_instr_multi_0x08950060__vs,
++	arm_instr_multi_0x08950060__vc,
++	arm_instr_multi_0x08950060__hi,
++	arm_instr_multi_0x08950060__ls,
++	arm_instr_multi_0x08950060__ge,
++	arm_instr_multi_0x08950060__lt,
++	arm_instr_multi_0x08950060__gt,
++	arm_instr_multi_0x08950060__le,
++	arm_instr_multi_0x08950060,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_246[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08bd8070__eq,
++	arm_instr_multi_0x08bd8070__ne,
++	arm_instr_multi_0x08bd8070__cs,
++	arm_instr_multi_0x08bd8070__cc,
++	arm_instr_multi_0x08bd8070__mi,
++	arm_instr_multi_0x08bd8070__pl,
++	arm_instr_multi_0x08bd8070__vs,
++	arm_instr_multi_0x08bd8070__vc,
++	arm_instr_multi_0x08bd8070__hi,
++	arm_instr_multi_0x08bd8070__ls,
++	arm_instr_multi_0x08bd8070__ge,
++	arm_instr_multi_0x08bd8070__lt,
++	arm_instr_multi_0x08bd8070__gt,
++	arm_instr_multi_0x08bd8070__le,
++	arm_instr_multi_0x08bd8070,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd40f0__eq,
++	arm_instr_multi_0x08bd40f0__ne,
++	arm_instr_multi_0x08bd40f0__cs,
++	arm_instr_multi_0x08bd40f0__cc,
++	arm_instr_multi_0x08bd40f0__mi,
++	arm_instr_multi_0x08bd40f0__pl,
++	arm_instr_multi_0x08bd40f0__vs,
++	arm_instr_multi_0x08bd40f0__vc,
++	arm_instr_multi_0x08bd40f0__hi,
++	arm_instr_multi_0x08bd40f0__ls,
++	arm_instr_multi_0x08bd40f0__ge,
++	arm_instr_multi_0x08bd40f0__lt,
++	arm_instr_multi_0x08bd40f0__gt,
++	arm_instr_multi_0x08bd40f0__le,
++	arm_instr_multi_0x08bd40f0,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd80f0__eq,
++	arm_instr_multi_0x08bd80f0__ne,
++	arm_instr_multi_0x08bd80f0__cs,
++	arm_instr_multi_0x08bd80f0__cc,
++	arm_instr_multi_0x08bd80f0__mi,
++	arm_instr_multi_0x08bd80f0__pl,
++	arm_instr_multi_0x08bd80f0__vs,
++	arm_instr_multi_0x08bd80f0__vc,
++	arm_instr_multi_0x08bd80f0__hi,
++	arm_instr_multi_0x08bd80f0__ls,
++	arm_instr_multi_0x08bd80f0__ge,
++	arm_instr_multi_0x08bd80f0__lt,
++	arm_instr_multi_0x08bd80f0__gt,
++	arm_instr_multi_0x08bd80f0__le,
++	arm_instr_multi_0x08bd80f0,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd0070__eq,
++	arm_instr_multi_0x08bd0070__ne,
++	arm_instr_multi_0x08bd0070__cs,
++	arm_instr_multi_0x08bd0070__cc,
++	arm_instr_multi_0x08bd0070__mi,
++	arm_instr_multi_0x08bd0070__pl,
++	arm_instr_multi_0x08bd0070__vs,
++	arm_instr_multi_0x08bd0070__vc,
++	arm_instr_multi_0x08bd0070__hi,
++	arm_instr_multi_0x08bd0070__ls,
++	arm_instr_multi_0x08bd0070__ge,
++	arm_instr_multi_0x08bd0070__lt,
++	arm_instr_multi_0x08bd0070__gt,
++	arm_instr_multi_0x08bd0070__le,
++	arm_instr_multi_0x08bd0070,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd00f0__eq,
++	arm_instr_multi_0x08bd00f0__ne,
++	arm_instr_multi_0x08bd00f0__cs,
++	arm_instr_multi_0x08bd00f0__cc,
++	arm_instr_multi_0x08bd00f0__mi,
++	arm_instr_multi_0x08bd00f0__pl,
++	arm_instr_multi_0x08bd00f0__vs,
++	arm_instr_multi_0x08bd00f0__vc,
++	arm_instr_multi_0x08bd00f0__hi,
++	arm_instr_multi_0x08bd00f0__ls,
++	arm_instr_multi_0x08bd00f0__ge,
++	arm_instr_multi_0x08bd00f0__lt,
++	arm_instr_multi_0x08bd00f0__gt,
++	arm_instr_multi_0x08bd00f0__le,
++	arm_instr_multi_0x08bd00f0,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_248[32])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08970300__eq,
++	arm_instr_multi_0x08970300__ne,
++	arm_instr_multi_0x08970300__cs,
++	arm_instr_multi_0x08970300__cc,
++	arm_instr_multi_0x08970300__mi,
++	arm_instr_multi_0x08970300__pl,
++	arm_instr_multi_0x08970300__vs,
++	arm_instr_multi_0x08970300__vc,
++	arm_instr_multi_0x08970300__hi,
++	arm_instr_multi_0x08970300__ls,
++	arm_instr_multi_0x08970300__ge,
++	arm_instr_multi_0x08970300__lt,
++	arm_instr_multi_0x08970300__gt,
++	arm_instr_multi_0x08970300__le,
++	arm_instr_multi_0x08970300,
++	arm_instr_nop,
++	arm_instr_multi_0x08970180__eq,
++	arm_instr_multi_0x08970180__ne,
++	arm_instr_multi_0x08970180__cs,
++	arm_instr_multi_0x08970180__cc,
++	arm_instr_multi_0x08970180__mi,
++	arm_instr_multi_0x08970180__pl,
++	arm_instr_multi_0x08970180__vs,
++	arm_instr_multi_0x08970180__vc,
++	arm_instr_multi_0x08970180__hi,
++	arm_instr_multi_0x08970180__ls,
++	arm_instr_multi_0x08970180__ge,
++	arm_instr_multi_0x08970180__lt,
++	arm_instr_multi_0x08970180__gt,
++	arm_instr_multi_0x08970180__le,
++	arm_instr_multi_0x08970180,
++	arm_instr_nop,
++};
++void (*multi_opcode_f_254[80])(struct cpu *, struct arm_instr_call *) = {
++	arm_instr_multi_0x08bd81f0__eq,
++	arm_instr_multi_0x08bd81f0__ne,
++	arm_instr_multi_0x08bd81f0__cs,
++	arm_instr_multi_0x08bd81f0__cc,
++	arm_instr_multi_0x08bd81f0__mi,
++	arm_instr_multi_0x08bd81f0__pl,
++	arm_instr_multi_0x08bd81f0__vs,
++	arm_instr_multi_0x08bd81f0__vc,
++	arm_instr_multi_0x08bd81f0__hi,
++	arm_instr_multi_0x08bd81f0__ls,
++	arm_instr_multi_0x08bd81f0__ge,
++	arm_instr_multi_0x08bd81f0__lt,
++	arm_instr_multi_0x08bd81f0__gt,
++	arm_instr_multi_0x08bd81f0__le,
++	arm_instr_multi_0x08bd81f0,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd0ff0__eq,
++	arm_instr_multi_0x08bd0ff0__ne,
++	arm_instr_multi_0x08bd0ff0__cs,
++	arm_instr_multi_0x08bd0ff0__cc,
++	arm_instr_multi_0x08bd0ff0__mi,
++	arm_instr_multi_0x08bd0ff0__pl,
++	arm_instr_multi_0x08bd0ff0__vs,
++	arm_instr_multi_0x08bd0ff0__vc,
++	arm_instr_multi_0x08bd0ff0__hi,
++	arm_instr_multi_0x08bd0ff0__ls,
++	arm_instr_multi_0x08bd0ff0__ge,
++	arm_instr_multi_0x08bd0ff0__lt,
++	arm_instr_multi_0x08bd0ff0__gt,
++	arm_instr_multi_0x08bd0ff0__le,
++	arm_instr_multi_0x08bd0ff0,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd87f0__eq,
++	arm_instr_multi_0x08bd87f0__ne,
++	arm_instr_multi_0x08bd87f0__cs,
++	arm_instr_multi_0x08bd87f0__cc,
++	arm_instr_multi_0x08bd87f0__mi,
++	arm_instr_multi_0x08bd87f0__pl,
++	arm_instr_multi_0x08bd87f0__vs,
++	arm_instr_multi_0x08bd87f0__vc,
++	arm_instr_multi_0x08bd87f0__hi,
++	arm_instr_multi_0x08bd87f0__ls,
++	arm_instr_multi_0x08bd87f0__ge,
++	arm_instr_multi_0x08bd87f0__lt,
++	arm_instr_multi_0x08bd87f0__gt,
++	arm_instr_multi_0x08bd87f0__le,
++	arm_instr_multi_0x08bd87f0,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd85f0__eq,
++	arm_instr_multi_0x08bd85f0__ne,
++	arm_instr_multi_0x08bd85f0__cs,
++	arm_instr_multi_0x08bd85f0__cc,
++	arm_instr_multi_0x08bd85f0__mi,
++	arm_instr_multi_0x08bd85f0__pl,
++	arm_instr_multi_0x08bd85f0__vs,
++	arm_instr_multi_0x08bd85f0__vc,
++	arm_instr_multi_0x08bd85f0__hi,
++	arm_instr_multi_0x08bd85f0__ls,
++	arm_instr_multi_0x08bd85f0__ge,
++	arm_instr_multi_0x08bd85f0__lt,
++	arm_instr_multi_0x08bd85f0__gt,
++	arm_instr_multi_0x08bd85f0__le,
++	arm_instr_multi_0x08bd85f0,
++	arm_instr_nop,
++	arm_instr_multi_0x08bd41f0__eq,
++	arm_instr_multi_0x08bd41f0__ne,
++	arm_instr_multi_0x08bd41f0__cs,
++	arm_instr_multi_0x08bd41f0__cc,
++	arm_instr_multi_0x08bd41f0__mi,
++	arm_instr_multi_0x08bd41f0__pl,
++	arm_instr_multi_0x08bd41f0__vs,
++	arm_instr_multi_0x08bd41f0__vc,
++	arm_instr_multi_0x08bd41f0__hi,
++	arm_instr_multi_0x08bd41f0__ls,
++	arm_instr_multi_0x08bd41f0__ge,
++	arm_instr_multi_0x08bd41f0__lt,
++	arm_instr_multi_0x08bd41f0__gt,
++	arm_instr_multi_0x08bd41f0__le,
++	arm_instr_multi_0x08bd41f0,
++	arm_instr_nop,
++};
++
++uint32_t *multi_opcode[256] = {
++ multi_opcode_0,
++ multi_opcode_1, multi_opcode_2, multi_opcode_3, multi_opcode_4,
++ multi_opcode_5, multi_opcode_6, multi_opcode_7, multi_opcode_8,
++ multi_opcode_9, multi_opcode_10, multi_opcode_11, multi_opcode_12,
++ multi_opcode_13, multi_opcode_14, multi_opcode_15, multi_opcode_16,
++ multi_opcode_17, multi_opcode_18, multi_opcode_19, multi_opcode_20,
++ multi_opcode_21, multi_opcode_22, multi_opcode_23, multi_opcode_24,
++ multi_opcode_25, multi_opcode_26, multi_opcode_27, multi_opcode_28,
++ multi_opcode_29, multi_opcode_30, multi_opcode_31, multi_opcode_32,
++ multi_opcode_33, multi_opcode_34, multi_opcode_35, multi_opcode_36,
++ multi_opcode_37, multi_opcode_38, multi_opcode_39, multi_opcode_40,
++ multi_opcode_41, multi_opcode_42, multi_opcode_43, multi_opcode_44,
++ multi_opcode_45, multi_opcode_46, multi_opcode_47, multi_opcode_48,
++ multi_opcode_49, multi_opcode_50, multi_opcode_51, multi_opcode_52,
++ multi_opcode_53, multi_opcode_54, multi_opcode_55, multi_opcode_56,
++ multi_opcode_57, multi_opcode_58, multi_opcode_59, multi_opcode_60,
++ multi_opcode_61, multi_opcode_62, multi_opcode_63, multi_opcode_64,
++ multi_opcode_65, multi_opcode_66, multi_opcode_67, multi_opcode_68,
++ multi_opcode_69, multi_opcode_70, multi_opcode_71, multi_opcode_72,
++ multi_opcode_73, multi_opcode_74, multi_opcode_75, multi_opcode_76,
++ multi_opcode_77, multi_opcode_78, multi_opcode_79, multi_opcode_80,
++ multi_opcode_81, multi_opcode_82, multi_opcode_83, multi_opcode_84,
++ multi_opcode_85, multi_opcode_86, multi_opcode_87, multi_opcode_88,
++ multi_opcode_89, multi_opcode_90, multi_opcode_91, multi_opcode_92,
++ multi_opcode_93, multi_opcode_94, multi_opcode_95, multi_opcode_96,
++ multi_opcode_97, multi_opcode_98, multi_opcode_99, multi_opcode_100,
++ multi_opcode_101, multi_opcode_102, multi_opcode_103, multi_opcode_104,
++ multi_opcode_105, multi_opcode_106, multi_opcode_107, multi_opcode_108,
++ multi_opcode_109, multi_opcode_110, multi_opcode_111, multi_opcode_112,
++ multi_opcode_113, multi_opcode_114, multi_opcode_115, multi_opcode_116,
++ multi_opcode_117, multi_opcode_118, multi_opcode_119, multi_opcode_120,
++ multi_opcode_121, multi_opcode_122, multi_opcode_123, multi_opcode_124,
++ multi_opcode_125, multi_opcode_126, multi_opcode_127, multi_opcode_128,
++ multi_opcode_129, multi_opcode_130, multi_opcode_131, multi_opcode_132,
++ multi_opcode_133, multi_opcode_134, multi_opcode_135, multi_opcode_136,
++ multi_opcode_137, multi_opcode_138, multi_opcode_139, multi_opcode_140,
++ multi_opcode_141, multi_opcode_142, multi_opcode_143, multi_opcode_144,
++ multi_opcode_145, multi_opcode_146, multi_opcode_147, multi_opcode_148,
++ multi_opcode_149, multi_opcode_150, multi_opcode_151, multi_opcode_152,
++ multi_opcode_153, multi_opcode_154, multi_opcode_155, multi_opcode_156,
++ multi_opcode_157, multi_opcode_158, multi_opcode_159, multi_opcode_160,
++ multi_opcode_161, multi_opcode_162, multi_opcode_163, multi_opcode_164,
++ multi_opcode_165, multi_opcode_166, multi_opcode_167, multi_opcode_168,
++ multi_opcode_169, multi_opcode_170, multi_opcode_171, multi_opcode_172,
++ multi_opcode_173, multi_opcode_174, multi_opcode_175, multi_opcode_176,
++ multi_opcode_177, multi_opcode_178, multi_opcode_179, multi_opcode_180,
++ multi_opcode_181, multi_opcode_182, multi_opcode_183, multi_opcode_184,
++ multi_opcode_185, multi_opcode_186, multi_opcode_187, multi_opcode_188,
++ multi_opcode_189, multi_opcode_190, multi_opcode_191, multi_opcode_192,
++ multi_opcode_193, multi_opcode_194, multi_opcode_195, multi_opcode_196,
++ multi_opcode_197, multi_opcode_198, multi_opcode_199, multi_opcode_200,
++ multi_opcode_201, multi_opcode_202, multi_opcode_203, multi_opcode_204,
++ multi_opcode_205, multi_opcode_206, multi_opcode_207, multi_opcode_208,
++ multi_opcode_209, multi_opcode_210, multi_opcode_211, multi_opcode_212,
++ multi_opcode_213, multi_opcode_214, multi_opcode_215, multi_opcode_216,
++ multi_opcode_217, multi_opcode_218, multi_opcode_219, multi_opcode_220,
++ multi_opcode_221, multi_opcode_222, multi_opcode_223, multi_opcode_224,
++ multi_opcode_225, multi_opcode_226, multi_opcode_227, multi_opcode_228,
++ multi_opcode_229, multi_opcode_230, multi_opcode_231, multi_opcode_232,
++ multi_opcode_233, multi_opcode_234, multi_opcode_235, multi_opcode_236,
++ multi_opcode_237, multi_opcode_238, multi_opcode_239, multi_opcode_240,
++ multi_opcode_241, multi_opcode_242, multi_opcode_243, multi_opcode_244,
++ multi_opcode_245, multi_opcode_246, multi_opcode_247, multi_opcode_248,
++ multi_opcode_249, multi_opcode_250, multi_opcode_251, multi_opcode_252,
++ multi_opcode_253, multi_opcode_254, multi_opcode_255,};
++
++void (**multi_opcode_f[256])(struct cpu *, struct arm_instr_call *) = {
++ multi_opcode_f_0,
++ NULL, multi_opcode_f_2, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_8,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, multi_opcode_f_18, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_32,
++ multi_opcode_f_33, multi_opcode_f_34, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_48,
++ multi_opcode_f_49, multi_opcode_f_50, multi_opcode_f_51, NULL,
++ NULL, multi_opcode_f_54, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, multi_opcode_f_62, NULL, multi_opcode_f_64,
++ multi_opcode_f_65, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_80,
++ multi_opcode_f_81, multi_opcode_f_82, NULL, NULL,
++ NULL, multi_opcode_f_86, NULL, multi_opcode_f_88,
++ NULL, NULL, NULL, NULL,
++ NULL, multi_opcode_f_94, NULL, NULL,
++ multi_opcode_f_97, multi_opcode_f_98, NULL, multi_opcode_f_100,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_112,
++ multi_opcode_f_113, multi_opcode_f_114, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_128,
++ multi_opcode_f_129, multi_opcode_f_130, NULL, multi_opcode_f_132,
++ NULL, NULL, NULL, multi_opcode_f_136,
++ NULL, NULL, NULL, NULL,
++ NULL, multi_opcode_f_142, NULL, multi_opcode_f_144,
++ multi_opcode_f_145, multi_opcode_f_146, NULL, multi_opcode_f_148,
++ NULL, NULL, NULL, multi_opcode_f_152,
++ NULL, NULL, NULL, NULL,
++ NULL, multi_opcode_f_158, NULL, multi_opcode_f_160,
++ multi_opcode_f_161, multi_opcode_f_162, NULL, multi_opcode_f_164,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_176,
++ multi_opcode_f_177, multi_opcode_f_178, multi_opcode_f_179, NULL,
++ NULL, NULL, NULL, multi_opcode_f_184,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, multi_opcode_f_191, multi_opcode_f_192,
++ multi_opcode_f_193, multi_opcode_f_194, NULL, multi_opcode_f_196,
++ NULL, NULL, NULL, multi_opcode_f_200,
++ NULL, NULL, NULL, multi_opcode_f_204,
++ NULL, multi_opcode_f_206, NULL, multi_opcode_f_208,
++ multi_opcode_f_209, multi_opcode_f_210, NULL, multi_opcode_f_212,
++ NULL, NULL, NULL, multi_opcode_f_216,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_224,
++ multi_opcode_f_225, multi_opcode_f_226, NULL, multi_opcode_f_228,
++ NULL, NULL, NULL, multi_opcode_f_232,
++ NULL, NULL, NULL, NULL,
++ NULL, NULL, NULL, multi_opcode_f_240,
++ multi_opcode_f_241, multi_opcode_f_242, multi_opcode_f_243, multi_opcode_f_244,
++ NULL, multi_opcode_f_246, NULL, multi_opcode_f_248,
++ NULL, NULL, NULL, NULL,
++ NULL, multi_opcode_f_254, NULL,};
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r.c gxemul-0.7.0/src/cpus/tmp_arm_r.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r.c	2022-10-18 16:37:22.085746800 +0000
+@@ -0,0 +1,16398 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++extern uint32_t arm_r_r0_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r0_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r1_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r2_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r3_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r4_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r5_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r6_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r7_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r8_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r9_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r10_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r11_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r12_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r13_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r14_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_r_r15_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c0(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c1(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c2(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c3(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c4(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c5(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c6(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c7(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c8(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c9(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c10(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c11(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c12(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c13(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c14(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c15(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c16(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c17(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c18(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c19(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c20(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c21(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c22(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c23(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c24(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c25(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c26(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c27(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c28(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c29(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c30(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t0_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t1_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t2_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t3_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t4_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t5_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t6_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r0_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r1_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r2_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r3_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r4_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r5_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r6_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r7_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r8_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r9_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r10_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r11_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r12_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r13_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r14_t7_c31(struct cpu *, struct arm_instr_call *);
++extern uint32_t arm_rs_r15_t7_c31(struct cpu *, struct arm_instr_call *);
++
++uint32_t (*arm_r[8192])(struct cpu *, struct arm_instr_call *) = {
++	arm_r_r0_t0_c0,
++	arm_r_r1_t0_c0,
++	arm_r_r2_t0_c0,
++	arm_r_r3_t0_c0,
++	arm_r_r4_t0_c0,
++	arm_r_r5_t0_c0,
++	arm_r_r6_t0_c0,
++	arm_r_r7_t0_c0,
++	arm_r_r8_t0_c0,
++	arm_r_r9_t0_c0,
++	arm_r_r10_t0_c0,
++	arm_r_r11_t0_c0,
++	arm_r_r12_t0_c0,
++	arm_r_r13_t0_c0,
++	arm_r_r14_t0_c0,
++	arm_r_r15_t0_c0,
++	arm_r_r0_t1_c0,
++	arm_r_r1_t1_c0,
++	arm_r_r2_t1_c0,
++	arm_r_r3_t1_c0,
++	arm_r_r4_t1_c0,
++	arm_r_r5_t1_c0,
++	arm_r_r6_t1_c0,
++	arm_r_r7_t1_c0,
++	arm_r_r8_t1_c0,
++	arm_r_r9_t1_c0,
++	arm_r_r10_t1_c0,
++	arm_r_r11_t1_c0,
++	arm_r_r12_t1_c0,
++	arm_r_r13_t1_c0,
++	arm_r_r14_t1_c0,
++	arm_r_r15_t1_c0,
++	arm_r_r0_t2_c0,
++	arm_r_r1_t2_c0,
++	arm_r_r2_t2_c0,
++	arm_r_r3_t2_c0,
++	arm_r_r4_t2_c0,
++	arm_r_r5_t2_c0,
++	arm_r_r6_t2_c0,
++	arm_r_r7_t2_c0,
++	arm_r_r8_t2_c0,
++	arm_r_r9_t2_c0,
++	arm_r_r10_t2_c0,
++	arm_r_r11_t2_c0,
++	arm_r_r12_t2_c0,
++	arm_r_r13_t2_c0,
++	arm_r_r14_t2_c0,
++	arm_r_r15_t2_c0,
++	arm_r_r0_t3_c0,
++	arm_r_r1_t3_c0,
++	arm_r_r2_t3_c0,
++	arm_r_r3_t3_c0,
++	arm_r_r4_t3_c0,
++	arm_r_r5_t3_c0,
++	arm_r_r6_t3_c0,
++	arm_r_r7_t3_c0,
++	arm_r_r8_t3_c0,
++	arm_r_r9_t3_c0,
++	arm_r_r10_t3_c0,
++	arm_r_r11_t3_c0,
++	arm_r_r12_t3_c0,
++	arm_r_r13_t3_c0,
++	arm_r_r14_t3_c0,
++	arm_r_r15_t3_c0,
++	arm_r_r0_t4_c0,
++	arm_r_r1_t4_c0,
++	arm_r_r2_t4_c0,
++	arm_r_r3_t4_c0,
++	arm_r_r4_t4_c0,
++	arm_r_r5_t4_c0,
++	arm_r_r6_t4_c0,
++	arm_r_r7_t4_c0,
++	arm_r_r8_t4_c0,
++	arm_r_r9_t4_c0,
++	arm_r_r10_t4_c0,
++	arm_r_r11_t4_c0,
++	arm_r_r12_t4_c0,
++	arm_r_r13_t4_c0,
++	arm_r_r14_t4_c0,
++	arm_r_r15_t4_c0,
++	arm_r_r0_t5_c0,
++	arm_r_r1_t5_c0,
++	arm_r_r2_t5_c0,
++	arm_r_r3_t5_c0,
++	arm_r_r4_t5_c0,
++	arm_r_r5_t5_c0,
++	arm_r_r6_t5_c0,
++	arm_r_r7_t5_c0,
++	arm_r_r8_t5_c0,
++	arm_r_r9_t5_c0,
++	arm_r_r10_t5_c0,
++	arm_r_r11_t5_c0,
++	arm_r_r12_t5_c0,
++	arm_r_r13_t5_c0,
++	arm_r_r14_t5_c0,
++	arm_r_r15_t5_c0,
++	arm_r_r0_t6_c0,
++	arm_r_r1_t6_c0,
++	arm_r_r2_t6_c0,
++	arm_r_r3_t6_c0,
++	arm_r_r4_t6_c0,
++	arm_r_r5_t6_c0,
++	arm_r_r6_t6_c0,
++	arm_r_r7_t6_c0,
++	arm_r_r8_t6_c0,
++	arm_r_r9_t6_c0,
++	arm_r_r10_t6_c0,
++	arm_r_r11_t6_c0,
++	arm_r_r12_t6_c0,
++	arm_r_r13_t6_c0,
++	arm_r_r14_t6_c0,
++	arm_r_r15_t6_c0,
++	arm_r_r0_t7_c0,
++	arm_r_r1_t7_c0,
++	arm_r_r2_t7_c0,
++	arm_r_r3_t7_c0,
++	arm_r_r4_t7_c0,
++	arm_r_r5_t7_c0,
++	arm_r_r6_t7_c0,
++	arm_r_r7_t7_c0,
++	arm_r_r8_t7_c0,
++	arm_r_r9_t7_c0,
++	arm_r_r10_t7_c0,
++	arm_r_r11_t7_c0,
++	arm_r_r12_t7_c0,
++	arm_r_r13_t7_c0,
++	arm_r_r14_t7_c0,
++	arm_r_r15_t7_c0,
++	arm_r_r0_t0_c1,
++	arm_r_r1_t0_c1,
++	arm_r_r2_t0_c1,
++	arm_r_r3_t0_c1,
++	arm_r_r4_t0_c1,
++	arm_r_r5_t0_c1,
++	arm_r_r6_t0_c1,
++	arm_r_r7_t0_c1,
++	arm_r_r8_t0_c1,
++	arm_r_r9_t0_c1,
++	arm_r_r10_t0_c1,
++	arm_r_r11_t0_c1,
++	arm_r_r12_t0_c1,
++	arm_r_r13_t0_c1,
++	arm_r_r14_t0_c1,
++	arm_r_r15_t0_c1,
++	arm_r_r0_t1_c1,
++	arm_r_r1_t1_c1,
++	arm_r_r2_t1_c1,
++	arm_r_r3_t1_c1,
++	arm_r_r4_t1_c1,
++	arm_r_r5_t1_c1,
++	arm_r_r6_t1_c1,
++	arm_r_r7_t1_c1,
++	arm_r_r8_t1_c1,
++	arm_r_r9_t1_c1,
++	arm_r_r10_t1_c1,
++	arm_r_r11_t1_c1,
++	arm_r_r12_t1_c1,
++	arm_r_r13_t1_c1,
++	arm_r_r14_t1_c1,
++	arm_r_r15_t1_c1,
++	arm_r_r0_t2_c1,
++	arm_r_r1_t2_c1,
++	arm_r_r2_t2_c1,
++	arm_r_r3_t2_c1,
++	arm_r_r4_t2_c1,
++	arm_r_r5_t2_c1,
++	arm_r_r6_t2_c1,
++	arm_r_r7_t2_c1,
++	arm_r_r8_t2_c1,
++	arm_r_r9_t2_c1,
++	arm_r_r10_t2_c1,
++	arm_r_r11_t2_c1,
++	arm_r_r12_t2_c1,
++	arm_r_r13_t2_c1,
++	arm_r_r14_t2_c1,
++	arm_r_r15_t2_c1,
++	arm_r_r0_t3_c1,
++	arm_r_r1_t3_c1,
++	arm_r_r2_t3_c1,
++	arm_r_r3_t3_c1,
++	arm_r_r4_t3_c1,
++	arm_r_r5_t3_c1,
++	arm_r_r6_t3_c1,
++	arm_r_r7_t3_c1,
++	arm_r_r8_t3_c1,
++	arm_r_r9_t3_c1,
++	arm_r_r10_t3_c1,
++	arm_r_r11_t3_c1,
++	arm_r_r12_t3_c1,
++	arm_r_r13_t3_c1,
++	arm_r_r14_t3_c1,
++	arm_r_r15_t3_c1,
++	arm_r_r0_t4_c1,
++	arm_r_r1_t4_c1,
++	arm_r_r2_t4_c1,
++	arm_r_r3_t4_c1,
++	arm_r_r4_t4_c1,
++	arm_r_r5_t4_c1,
++	arm_r_r6_t4_c1,
++	arm_r_r7_t4_c1,
++	arm_r_r8_t4_c1,
++	arm_r_r9_t4_c1,
++	arm_r_r10_t4_c1,
++	arm_r_r11_t4_c1,
++	arm_r_r12_t4_c1,
++	arm_r_r13_t4_c1,
++	arm_r_r14_t4_c1,
++	arm_r_r15_t4_c1,
++	arm_r_r0_t5_c1,
++	arm_r_r1_t5_c1,
++	arm_r_r2_t5_c1,
++	arm_r_r3_t5_c1,
++	arm_r_r4_t5_c1,
++	arm_r_r5_t5_c1,
++	arm_r_r6_t5_c1,
++	arm_r_r7_t5_c1,
++	arm_r_r8_t5_c1,
++	arm_r_r9_t5_c1,
++	arm_r_r10_t5_c1,
++	arm_r_r11_t5_c1,
++	arm_r_r12_t5_c1,
++	arm_r_r13_t5_c1,
++	arm_r_r14_t5_c1,
++	arm_r_r15_t5_c1,
++	arm_r_r0_t6_c1,
++	arm_r_r1_t6_c1,
++	arm_r_r2_t6_c1,
++	arm_r_r3_t6_c1,
++	arm_r_r4_t6_c1,
++	arm_r_r5_t6_c1,
++	arm_r_r6_t6_c1,
++	arm_r_r7_t6_c1,
++	arm_r_r8_t6_c1,
++	arm_r_r9_t6_c1,
++	arm_r_r10_t6_c1,
++	arm_r_r11_t6_c1,
++	arm_r_r12_t6_c1,
++	arm_r_r13_t6_c1,
++	arm_r_r14_t6_c1,
++	arm_r_r15_t6_c1,
++	arm_r_r0_t7_c1,
++	arm_r_r1_t7_c1,
++	arm_r_r2_t7_c1,
++	arm_r_r3_t7_c1,
++	arm_r_r4_t7_c1,
++	arm_r_r5_t7_c1,
++	arm_r_r6_t7_c1,
++	arm_r_r7_t7_c1,
++	arm_r_r8_t7_c1,
++	arm_r_r9_t7_c1,
++	arm_r_r10_t7_c1,
++	arm_r_r11_t7_c1,
++	arm_r_r12_t7_c1,
++	arm_r_r13_t7_c1,
++	arm_r_r14_t7_c1,
++	arm_r_r15_t7_c1,
++	arm_r_r0_t0_c2,
++	arm_r_r1_t0_c2,
++	arm_r_r2_t0_c2,
++	arm_r_r3_t0_c2,
++	arm_r_r4_t0_c2,
++	arm_r_r5_t0_c2,
++	arm_r_r6_t0_c2,
++	arm_r_r7_t0_c2,
++	arm_r_r8_t0_c2,
++	arm_r_r9_t0_c2,
++	arm_r_r10_t0_c2,
++	arm_r_r11_t0_c2,
++	arm_r_r12_t0_c2,
++	arm_r_r13_t0_c2,
++	arm_r_r14_t0_c2,
++	arm_r_r15_t0_c2,
++	arm_r_r0_t1_c2,
++	arm_r_r1_t1_c2,
++	arm_r_r2_t1_c2,
++	arm_r_r3_t1_c2,
++	arm_r_r4_t1_c2,
++	arm_r_r5_t1_c2,
++	arm_r_r6_t1_c2,
++	arm_r_r7_t1_c2,
++	arm_r_r8_t1_c2,
++	arm_r_r9_t1_c2,
++	arm_r_r10_t1_c2,
++	arm_r_r11_t1_c2,
++	arm_r_r12_t1_c2,
++	arm_r_r13_t1_c2,
++	arm_r_r14_t1_c2,
++	arm_r_r15_t1_c2,
++	arm_r_r0_t2_c2,
++	arm_r_r1_t2_c2,
++	arm_r_r2_t2_c2,
++	arm_r_r3_t2_c2,
++	arm_r_r4_t2_c2,
++	arm_r_r5_t2_c2,
++	arm_r_r6_t2_c2,
++	arm_r_r7_t2_c2,
++	arm_r_r8_t2_c2,
++	arm_r_r9_t2_c2,
++	arm_r_r10_t2_c2,
++	arm_r_r11_t2_c2,
++	arm_r_r12_t2_c2,
++	arm_r_r13_t2_c2,
++	arm_r_r14_t2_c2,
++	arm_r_r15_t2_c2,
++	arm_r_r0_t3_c2,
++	arm_r_r1_t3_c2,
++	arm_r_r2_t3_c2,
++	arm_r_r3_t3_c2,
++	arm_r_r4_t3_c2,
++	arm_r_r5_t3_c2,
++	arm_r_r6_t3_c2,
++	arm_r_r7_t3_c2,
++	arm_r_r8_t3_c2,
++	arm_r_r9_t3_c2,
++	arm_r_r10_t3_c2,
++	arm_r_r11_t3_c2,
++	arm_r_r12_t3_c2,
++	arm_r_r13_t3_c2,
++	arm_r_r14_t3_c2,
++	arm_r_r15_t3_c2,
++	arm_r_r0_t4_c2,
++	arm_r_r1_t4_c2,
++	arm_r_r2_t4_c2,
++	arm_r_r3_t4_c2,
++	arm_r_r4_t4_c2,
++	arm_r_r5_t4_c2,
++	arm_r_r6_t4_c2,
++	arm_r_r7_t4_c2,
++	arm_r_r8_t4_c2,
++	arm_r_r9_t4_c2,
++	arm_r_r10_t4_c2,
++	arm_r_r11_t4_c2,
++	arm_r_r12_t4_c2,
++	arm_r_r13_t4_c2,
++	arm_r_r14_t4_c2,
++	arm_r_r15_t4_c2,
++	arm_r_r0_t5_c2,
++	arm_r_r1_t5_c2,
++	arm_r_r2_t5_c2,
++	arm_r_r3_t5_c2,
++	arm_r_r4_t5_c2,
++	arm_r_r5_t5_c2,
++	arm_r_r6_t5_c2,
++	arm_r_r7_t5_c2,
++	arm_r_r8_t5_c2,
++	arm_r_r9_t5_c2,
++	arm_r_r10_t5_c2,
++	arm_r_r11_t5_c2,
++	arm_r_r12_t5_c2,
++	arm_r_r13_t5_c2,
++	arm_r_r14_t5_c2,
++	arm_r_r15_t5_c2,
++	arm_r_r0_t6_c2,
++	arm_r_r1_t6_c2,
++	arm_r_r2_t6_c2,
++	arm_r_r3_t6_c2,
++	arm_r_r4_t6_c2,
++	arm_r_r5_t6_c2,
++	arm_r_r6_t6_c2,
++	arm_r_r7_t6_c2,
++	arm_r_r8_t6_c2,
++	arm_r_r9_t6_c2,
++	arm_r_r10_t6_c2,
++	arm_r_r11_t6_c2,
++	arm_r_r12_t6_c2,
++	arm_r_r13_t6_c2,
++	arm_r_r14_t6_c2,
++	arm_r_r15_t6_c2,
++	arm_r_r0_t7_c2,
++	arm_r_r1_t7_c2,
++	arm_r_r2_t7_c2,
++	arm_r_r3_t7_c2,
++	arm_r_r4_t7_c2,
++	arm_r_r5_t7_c2,
++	arm_r_r6_t7_c2,
++	arm_r_r7_t7_c2,
++	arm_r_r8_t7_c2,
++	arm_r_r9_t7_c2,
++	arm_r_r10_t7_c2,
++	arm_r_r11_t7_c2,
++	arm_r_r12_t7_c2,
++	arm_r_r13_t7_c2,
++	arm_r_r14_t7_c2,
++	arm_r_r15_t7_c2,
++	arm_r_r0_t0_c3,
++	arm_r_r1_t0_c3,
++	arm_r_r2_t0_c3,
++	arm_r_r3_t0_c3,
++	arm_r_r4_t0_c3,
++	arm_r_r5_t0_c3,
++	arm_r_r6_t0_c3,
++	arm_r_r7_t0_c3,
++	arm_r_r8_t0_c3,
++	arm_r_r9_t0_c3,
++	arm_r_r10_t0_c3,
++	arm_r_r11_t0_c3,
++	arm_r_r12_t0_c3,
++	arm_r_r13_t0_c3,
++	arm_r_r14_t0_c3,
++	arm_r_r15_t0_c3,
++	arm_r_r0_t1_c3,
++	arm_r_r1_t1_c3,
++	arm_r_r2_t1_c3,
++	arm_r_r3_t1_c3,
++	arm_r_r4_t1_c3,
++	arm_r_r5_t1_c3,
++	arm_r_r6_t1_c3,
++	arm_r_r7_t1_c3,
++	arm_r_r8_t1_c3,
++	arm_r_r9_t1_c3,
++	arm_r_r10_t1_c3,
++	arm_r_r11_t1_c3,
++	arm_r_r12_t1_c3,
++	arm_r_r13_t1_c3,
++	arm_r_r14_t1_c3,
++	arm_r_r15_t1_c3,
++	arm_r_r0_t2_c3,
++	arm_r_r1_t2_c3,
++	arm_r_r2_t2_c3,
++	arm_r_r3_t2_c3,
++	arm_r_r4_t2_c3,
++	arm_r_r5_t2_c3,
++	arm_r_r6_t2_c3,
++	arm_r_r7_t2_c3,
++	arm_r_r8_t2_c3,
++	arm_r_r9_t2_c3,
++	arm_r_r10_t2_c3,
++	arm_r_r11_t2_c3,
++	arm_r_r12_t2_c3,
++	arm_r_r13_t2_c3,
++	arm_r_r14_t2_c3,
++	arm_r_r15_t2_c3,
++	arm_r_r0_t3_c3,
++	arm_r_r1_t3_c3,
++	arm_r_r2_t3_c3,
++	arm_r_r3_t3_c3,
++	arm_r_r4_t3_c3,
++	arm_r_r5_t3_c3,
++	arm_r_r6_t3_c3,
++	arm_r_r7_t3_c3,
++	arm_r_r8_t3_c3,
++	arm_r_r9_t3_c3,
++	arm_r_r10_t3_c3,
++	arm_r_r11_t3_c3,
++	arm_r_r12_t3_c3,
++	arm_r_r13_t3_c3,
++	arm_r_r14_t3_c3,
++	arm_r_r15_t3_c3,
++	arm_r_r0_t4_c3,
++	arm_r_r1_t4_c3,
++	arm_r_r2_t4_c3,
++	arm_r_r3_t4_c3,
++	arm_r_r4_t4_c3,
++	arm_r_r5_t4_c3,
++	arm_r_r6_t4_c3,
++	arm_r_r7_t4_c3,
++	arm_r_r8_t4_c3,
++	arm_r_r9_t4_c3,
++	arm_r_r10_t4_c3,
++	arm_r_r11_t4_c3,
++	arm_r_r12_t4_c3,
++	arm_r_r13_t4_c3,
++	arm_r_r14_t4_c3,
++	arm_r_r15_t4_c3,
++	arm_r_r0_t5_c3,
++	arm_r_r1_t5_c3,
++	arm_r_r2_t5_c3,
++	arm_r_r3_t5_c3,
++	arm_r_r4_t5_c3,
++	arm_r_r5_t5_c3,
++	arm_r_r6_t5_c3,
++	arm_r_r7_t5_c3,
++	arm_r_r8_t5_c3,
++	arm_r_r9_t5_c3,
++	arm_r_r10_t5_c3,
++	arm_r_r11_t5_c3,
++	arm_r_r12_t5_c3,
++	arm_r_r13_t5_c3,
++	arm_r_r14_t5_c3,
++	arm_r_r15_t5_c3,
++	arm_r_r0_t6_c3,
++	arm_r_r1_t6_c3,
++	arm_r_r2_t6_c3,
++	arm_r_r3_t6_c3,
++	arm_r_r4_t6_c3,
++	arm_r_r5_t6_c3,
++	arm_r_r6_t6_c3,
++	arm_r_r7_t6_c3,
++	arm_r_r8_t6_c3,
++	arm_r_r9_t6_c3,
++	arm_r_r10_t6_c3,
++	arm_r_r11_t6_c3,
++	arm_r_r12_t6_c3,
++	arm_r_r13_t6_c3,
++	arm_r_r14_t6_c3,
++	arm_r_r15_t6_c3,
++	arm_r_r0_t7_c3,
++	arm_r_r1_t7_c3,
++	arm_r_r2_t7_c3,
++	arm_r_r3_t7_c3,
++	arm_r_r4_t7_c3,
++	arm_r_r5_t7_c3,
++	arm_r_r6_t7_c3,
++	arm_r_r7_t7_c3,
++	arm_r_r8_t7_c3,
++	arm_r_r9_t7_c3,
++	arm_r_r10_t7_c3,
++	arm_r_r11_t7_c3,
++	arm_r_r12_t7_c3,
++	arm_r_r13_t7_c3,
++	arm_r_r14_t7_c3,
++	arm_r_r15_t7_c3,
++	arm_r_r0_t0_c4,
++	arm_r_r1_t0_c4,
++	arm_r_r2_t0_c4,
++	arm_r_r3_t0_c4,
++	arm_r_r4_t0_c4,
++	arm_r_r5_t0_c4,
++	arm_r_r6_t0_c4,
++	arm_r_r7_t0_c4,
++	arm_r_r8_t0_c4,
++	arm_r_r9_t0_c4,
++	arm_r_r10_t0_c4,
++	arm_r_r11_t0_c4,
++	arm_r_r12_t0_c4,
++	arm_r_r13_t0_c4,
++	arm_r_r14_t0_c4,
++	arm_r_r15_t0_c4,
++	arm_r_r0_t1_c4,
++	arm_r_r1_t1_c4,
++	arm_r_r2_t1_c4,
++	arm_r_r3_t1_c4,
++	arm_r_r4_t1_c4,
++	arm_r_r5_t1_c4,
++	arm_r_r6_t1_c4,
++	arm_r_r7_t1_c4,
++	arm_r_r8_t1_c4,
++	arm_r_r9_t1_c4,
++	arm_r_r10_t1_c4,
++	arm_r_r11_t1_c4,
++	arm_r_r12_t1_c4,
++	arm_r_r13_t1_c4,
++	arm_r_r14_t1_c4,
++	arm_r_r15_t1_c4,
++	arm_r_r0_t2_c4,
++	arm_r_r1_t2_c4,
++	arm_r_r2_t2_c4,
++	arm_r_r3_t2_c4,
++	arm_r_r4_t2_c4,
++	arm_r_r5_t2_c4,
++	arm_r_r6_t2_c4,
++	arm_r_r7_t2_c4,
++	arm_r_r8_t2_c4,
++	arm_r_r9_t2_c4,
++	arm_r_r10_t2_c4,
++	arm_r_r11_t2_c4,
++	arm_r_r12_t2_c4,
++	arm_r_r13_t2_c4,
++	arm_r_r14_t2_c4,
++	arm_r_r15_t2_c4,
++	arm_r_r0_t3_c4,
++	arm_r_r1_t3_c4,
++	arm_r_r2_t3_c4,
++	arm_r_r3_t3_c4,
++	arm_r_r4_t3_c4,
++	arm_r_r5_t3_c4,
++	arm_r_r6_t3_c4,
++	arm_r_r7_t3_c4,
++	arm_r_r8_t3_c4,
++	arm_r_r9_t3_c4,
++	arm_r_r10_t3_c4,
++	arm_r_r11_t3_c4,
++	arm_r_r12_t3_c4,
++	arm_r_r13_t3_c4,
++	arm_r_r14_t3_c4,
++	arm_r_r15_t3_c4,
++	arm_r_r0_t4_c4,
++	arm_r_r1_t4_c4,
++	arm_r_r2_t4_c4,
++	arm_r_r3_t4_c4,
++	arm_r_r4_t4_c4,
++	arm_r_r5_t4_c4,
++	arm_r_r6_t4_c4,
++	arm_r_r7_t4_c4,
++	arm_r_r8_t4_c4,
++	arm_r_r9_t4_c4,
++	arm_r_r10_t4_c4,
++	arm_r_r11_t4_c4,
++	arm_r_r12_t4_c4,
++	arm_r_r13_t4_c4,
++	arm_r_r14_t4_c4,
++	arm_r_r15_t4_c4,
++	arm_r_r0_t5_c4,
++	arm_r_r1_t5_c4,
++	arm_r_r2_t5_c4,
++	arm_r_r3_t5_c4,
++	arm_r_r4_t5_c4,
++	arm_r_r5_t5_c4,
++	arm_r_r6_t5_c4,
++	arm_r_r7_t5_c4,
++	arm_r_r8_t5_c4,
++	arm_r_r9_t5_c4,
++	arm_r_r10_t5_c4,
++	arm_r_r11_t5_c4,
++	arm_r_r12_t5_c4,
++	arm_r_r13_t5_c4,
++	arm_r_r14_t5_c4,
++	arm_r_r15_t5_c4,
++	arm_r_r0_t6_c4,
++	arm_r_r1_t6_c4,
++	arm_r_r2_t6_c4,
++	arm_r_r3_t6_c4,
++	arm_r_r4_t6_c4,
++	arm_r_r5_t6_c4,
++	arm_r_r6_t6_c4,
++	arm_r_r7_t6_c4,
++	arm_r_r8_t6_c4,
++	arm_r_r9_t6_c4,
++	arm_r_r10_t6_c4,
++	arm_r_r11_t6_c4,
++	arm_r_r12_t6_c4,
++	arm_r_r13_t6_c4,
++	arm_r_r14_t6_c4,
++	arm_r_r15_t6_c4,
++	arm_r_r0_t7_c4,
++	arm_r_r1_t7_c4,
++	arm_r_r2_t7_c4,
++	arm_r_r3_t7_c4,
++	arm_r_r4_t7_c4,
++	arm_r_r5_t7_c4,
++	arm_r_r6_t7_c4,
++	arm_r_r7_t7_c4,
++	arm_r_r8_t7_c4,
++	arm_r_r9_t7_c4,
++	arm_r_r10_t7_c4,
++	arm_r_r11_t7_c4,
++	arm_r_r12_t7_c4,
++	arm_r_r13_t7_c4,
++	arm_r_r14_t7_c4,
++	arm_r_r15_t7_c4,
++	arm_r_r0_t0_c5,
++	arm_r_r1_t0_c5,
++	arm_r_r2_t0_c5,
++	arm_r_r3_t0_c5,
++	arm_r_r4_t0_c5,
++	arm_r_r5_t0_c5,
++	arm_r_r6_t0_c5,
++	arm_r_r7_t0_c5,
++	arm_r_r8_t0_c5,
++	arm_r_r9_t0_c5,
++	arm_r_r10_t0_c5,
++	arm_r_r11_t0_c5,
++	arm_r_r12_t0_c5,
++	arm_r_r13_t0_c5,
++	arm_r_r14_t0_c5,
++	arm_r_r15_t0_c5,
++	arm_r_r0_t1_c5,
++	arm_r_r1_t1_c5,
++	arm_r_r2_t1_c5,
++	arm_r_r3_t1_c5,
++	arm_r_r4_t1_c5,
++	arm_r_r5_t1_c5,
++	arm_r_r6_t1_c5,
++	arm_r_r7_t1_c5,
++	arm_r_r8_t1_c5,
++	arm_r_r9_t1_c5,
++	arm_r_r10_t1_c5,
++	arm_r_r11_t1_c5,
++	arm_r_r12_t1_c5,
++	arm_r_r13_t1_c5,
++	arm_r_r14_t1_c5,
++	arm_r_r15_t1_c5,
++	arm_r_r0_t2_c5,
++	arm_r_r1_t2_c5,
++	arm_r_r2_t2_c5,
++	arm_r_r3_t2_c5,
++	arm_r_r4_t2_c5,
++	arm_r_r5_t2_c5,
++	arm_r_r6_t2_c5,
++	arm_r_r7_t2_c5,
++	arm_r_r8_t2_c5,
++	arm_r_r9_t2_c5,
++	arm_r_r10_t2_c5,
++	arm_r_r11_t2_c5,
++	arm_r_r12_t2_c5,
++	arm_r_r13_t2_c5,
++	arm_r_r14_t2_c5,
++	arm_r_r15_t2_c5,
++	arm_r_r0_t3_c5,
++	arm_r_r1_t3_c5,
++	arm_r_r2_t3_c5,
++	arm_r_r3_t3_c5,
++	arm_r_r4_t3_c5,
++	arm_r_r5_t3_c5,
++	arm_r_r6_t3_c5,
++	arm_r_r7_t3_c5,
++	arm_r_r8_t3_c5,
++	arm_r_r9_t3_c5,
++	arm_r_r10_t3_c5,
++	arm_r_r11_t3_c5,
++	arm_r_r12_t3_c5,
++	arm_r_r13_t3_c5,
++	arm_r_r14_t3_c5,
++	arm_r_r15_t3_c5,
++	arm_r_r0_t4_c5,
++	arm_r_r1_t4_c5,
++	arm_r_r2_t4_c5,
++	arm_r_r3_t4_c5,
++	arm_r_r4_t4_c5,
++	arm_r_r5_t4_c5,
++	arm_r_r6_t4_c5,
++	arm_r_r7_t4_c5,
++	arm_r_r8_t4_c5,
++	arm_r_r9_t4_c5,
++	arm_r_r10_t4_c5,
++	arm_r_r11_t4_c5,
++	arm_r_r12_t4_c5,
++	arm_r_r13_t4_c5,
++	arm_r_r14_t4_c5,
++	arm_r_r15_t4_c5,
++	arm_r_r0_t5_c5,
++	arm_r_r1_t5_c5,
++	arm_r_r2_t5_c5,
++	arm_r_r3_t5_c5,
++	arm_r_r4_t5_c5,
++	arm_r_r5_t5_c5,
++	arm_r_r6_t5_c5,
++	arm_r_r7_t5_c5,
++	arm_r_r8_t5_c5,
++	arm_r_r9_t5_c5,
++	arm_r_r10_t5_c5,
++	arm_r_r11_t5_c5,
++	arm_r_r12_t5_c5,
++	arm_r_r13_t5_c5,
++	arm_r_r14_t5_c5,
++	arm_r_r15_t5_c5,
++	arm_r_r0_t6_c5,
++	arm_r_r1_t6_c5,
++	arm_r_r2_t6_c5,
++	arm_r_r3_t6_c5,
++	arm_r_r4_t6_c5,
++	arm_r_r5_t6_c5,
++	arm_r_r6_t6_c5,
++	arm_r_r7_t6_c5,
++	arm_r_r8_t6_c5,
++	arm_r_r9_t6_c5,
++	arm_r_r10_t6_c5,
++	arm_r_r11_t6_c5,
++	arm_r_r12_t6_c5,
++	arm_r_r13_t6_c5,
++	arm_r_r14_t6_c5,
++	arm_r_r15_t6_c5,
++	arm_r_r0_t7_c5,
++	arm_r_r1_t7_c5,
++	arm_r_r2_t7_c5,
++	arm_r_r3_t7_c5,
++	arm_r_r4_t7_c5,
++	arm_r_r5_t7_c5,
++	arm_r_r6_t7_c5,
++	arm_r_r7_t7_c5,
++	arm_r_r8_t7_c5,
++	arm_r_r9_t7_c5,
++	arm_r_r10_t7_c5,
++	arm_r_r11_t7_c5,
++	arm_r_r12_t7_c5,
++	arm_r_r13_t7_c5,
++	arm_r_r14_t7_c5,
++	arm_r_r15_t7_c5,
++	arm_r_r0_t0_c6,
++	arm_r_r1_t0_c6,
++	arm_r_r2_t0_c6,
++	arm_r_r3_t0_c6,
++	arm_r_r4_t0_c6,
++	arm_r_r5_t0_c6,
++	arm_r_r6_t0_c6,
++	arm_r_r7_t0_c6,
++	arm_r_r8_t0_c6,
++	arm_r_r9_t0_c6,
++	arm_r_r10_t0_c6,
++	arm_r_r11_t0_c6,
++	arm_r_r12_t0_c6,
++	arm_r_r13_t0_c6,
++	arm_r_r14_t0_c6,
++	arm_r_r15_t0_c6,
++	arm_r_r0_t1_c6,
++	arm_r_r1_t1_c6,
++	arm_r_r2_t1_c6,
++	arm_r_r3_t1_c6,
++	arm_r_r4_t1_c6,
++	arm_r_r5_t1_c6,
++	arm_r_r6_t1_c6,
++	arm_r_r7_t1_c6,
++	arm_r_r8_t1_c6,
++	arm_r_r9_t1_c6,
++	arm_r_r10_t1_c6,
++	arm_r_r11_t1_c6,
++	arm_r_r12_t1_c6,
++	arm_r_r13_t1_c6,
++	arm_r_r14_t1_c6,
++	arm_r_r15_t1_c6,
++	arm_r_r0_t2_c6,
++	arm_r_r1_t2_c6,
++	arm_r_r2_t2_c6,
++	arm_r_r3_t2_c6,
++	arm_r_r4_t2_c6,
++	arm_r_r5_t2_c6,
++	arm_r_r6_t2_c6,
++	arm_r_r7_t2_c6,
++	arm_r_r8_t2_c6,
++	arm_r_r9_t2_c6,
++	arm_r_r10_t2_c6,
++	arm_r_r11_t2_c6,
++	arm_r_r12_t2_c6,
++	arm_r_r13_t2_c6,
++	arm_r_r14_t2_c6,
++	arm_r_r15_t2_c6,
++	arm_r_r0_t3_c6,
++	arm_r_r1_t3_c6,
++	arm_r_r2_t3_c6,
++	arm_r_r3_t3_c6,
++	arm_r_r4_t3_c6,
++	arm_r_r5_t3_c6,
++	arm_r_r6_t3_c6,
++	arm_r_r7_t3_c6,
++	arm_r_r8_t3_c6,
++	arm_r_r9_t3_c6,
++	arm_r_r10_t3_c6,
++	arm_r_r11_t3_c6,
++	arm_r_r12_t3_c6,
++	arm_r_r13_t3_c6,
++	arm_r_r14_t3_c6,
++	arm_r_r15_t3_c6,
++	arm_r_r0_t4_c6,
++	arm_r_r1_t4_c6,
++	arm_r_r2_t4_c6,
++	arm_r_r3_t4_c6,
++	arm_r_r4_t4_c6,
++	arm_r_r5_t4_c6,
++	arm_r_r6_t4_c6,
++	arm_r_r7_t4_c6,
++	arm_r_r8_t4_c6,
++	arm_r_r9_t4_c6,
++	arm_r_r10_t4_c6,
++	arm_r_r11_t4_c6,
++	arm_r_r12_t4_c6,
++	arm_r_r13_t4_c6,
++	arm_r_r14_t4_c6,
++	arm_r_r15_t4_c6,
++	arm_r_r0_t5_c6,
++	arm_r_r1_t5_c6,
++	arm_r_r2_t5_c6,
++	arm_r_r3_t5_c6,
++	arm_r_r4_t5_c6,
++	arm_r_r5_t5_c6,
++	arm_r_r6_t5_c6,
++	arm_r_r7_t5_c6,
++	arm_r_r8_t5_c6,
++	arm_r_r9_t5_c6,
++	arm_r_r10_t5_c6,
++	arm_r_r11_t5_c6,
++	arm_r_r12_t5_c6,
++	arm_r_r13_t5_c6,
++	arm_r_r14_t5_c6,
++	arm_r_r15_t5_c6,
++	arm_r_r0_t6_c6,
++	arm_r_r1_t6_c6,
++	arm_r_r2_t6_c6,
++	arm_r_r3_t6_c6,
++	arm_r_r4_t6_c6,
++	arm_r_r5_t6_c6,
++	arm_r_r6_t6_c6,
++	arm_r_r7_t6_c6,
++	arm_r_r8_t6_c6,
++	arm_r_r9_t6_c6,
++	arm_r_r10_t6_c6,
++	arm_r_r11_t6_c6,
++	arm_r_r12_t6_c6,
++	arm_r_r13_t6_c6,
++	arm_r_r14_t6_c6,
++	arm_r_r15_t6_c6,
++	arm_r_r0_t7_c6,
++	arm_r_r1_t7_c6,
++	arm_r_r2_t7_c6,
++	arm_r_r3_t7_c6,
++	arm_r_r4_t7_c6,
++	arm_r_r5_t7_c6,
++	arm_r_r6_t7_c6,
++	arm_r_r7_t7_c6,
++	arm_r_r8_t7_c6,
++	arm_r_r9_t7_c6,
++	arm_r_r10_t7_c6,
++	arm_r_r11_t7_c6,
++	arm_r_r12_t7_c6,
++	arm_r_r13_t7_c6,
++	arm_r_r14_t7_c6,
++	arm_r_r15_t7_c6,
++	arm_r_r0_t0_c7,
++	arm_r_r1_t0_c7,
++	arm_r_r2_t0_c7,
++	arm_r_r3_t0_c7,
++	arm_r_r4_t0_c7,
++	arm_r_r5_t0_c7,
++	arm_r_r6_t0_c7,
++	arm_r_r7_t0_c7,
++	arm_r_r8_t0_c7,
++	arm_r_r9_t0_c7,
++	arm_r_r10_t0_c7,
++	arm_r_r11_t0_c7,
++	arm_r_r12_t0_c7,
++	arm_r_r13_t0_c7,
++	arm_r_r14_t0_c7,
++	arm_r_r15_t0_c7,
++	arm_r_r0_t1_c7,
++	arm_r_r1_t1_c7,
++	arm_r_r2_t1_c7,
++	arm_r_r3_t1_c7,
++	arm_r_r4_t1_c7,
++	arm_r_r5_t1_c7,
++	arm_r_r6_t1_c7,
++	arm_r_r7_t1_c7,
++	arm_r_r8_t1_c7,
++	arm_r_r9_t1_c7,
++	arm_r_r10_t1_c7,
++	arm_r_r11_t1_c7,
++	arm_r_r12_t1_c7,
++	arm_r_r13_t1_c7,
++	arm_r_r14_t1_c7,
++	arm_r_r15_t1_c7,
++	arm_r_r0_t2_c7,
++	arm_r_r1_t2_c7,
++	arm_r_r2_t2_c7,
++	arm_r_r3_t2_c7,
++	arm_r_r4_t2_c7,
++	arm_r_r5_t2_c7,
++	arm_r_r6_t2_c7,
++	arm_r_r7_t2_c7,
++	arm_r_r8_t2_c7,
++	arm_r_r9_t2_c7,
++	arm_r_r10_t2_c7,
++	arm_r_r11_t2_c7,
++	arm_r_r12_t2_c7,
++	arm_r_r13_t2_c7,
++	arm_r_r14_t2_c7,
++	arm_r_r15_t2_c7,
++	arm_r_r0_t3_c7,
++	arm_r_r1_t3_c7,
++	arm_r_r2_t3_c7,
++	arm_r_r3_t3_c7,
++	arm_r_r4_t3_c7,
++	arm_r_r5_t3_c7,
++	arm_r_r6_t3_c7,
++	arm_r_r7_t3_c7,
++	arm_r_r8_t3_c7,
++	arm_r_r9_t3_c7,
++	arm_r_r10_t3_c7,
++	arm_r_r11_t3_c7,
++	arm_r_r12_t3_c7,
++	arm_r_r13_t3_c7,
++	arm_r_r14_t3_c7,
++	arm_r_r15_t3_c7,
++	arm_r_r0_t4_c7,
++	arm_r_r1_t4_c7,
++	arm_r_r2_t4_c7,
++	arm_r_r3_t4_c7,
++	arm_r_r4_t4_c7,
++	arm_r_r5_t4_c7,
++	arm_r_r6_t4_c7,
++	arm_r_r7_t4_c7,
++	arm_r_r8_t4_c7,
++	arm_r_r9_t4_c7,
++	arm_r_r10_t4_c7,
++	arm_r_r11_t4_c7,
++	arm_r_r12_t4_c7,
++	arm_r_r13_t4_c7,
++	arm_r_r14_t4_c7,
++	arm_r_r15_t4_c7,
++	arm_r_r0_t5_c7,
++	arm_r_r1_t5_c7,
++	arm_r_r2_t5_c7,
++	arm_r_r3_t5_c7,
++	arm_r_r4_t5_c7,
++	arm_r_r5_t5_c7,
++	arm_r_r6_t5_c7,
++	arm_r_r7_t5_c7,
++	arm_r_r8_t5_c7,
++	arm_r_r9_t5_c7,
++	arm_r_r10_t5_c7,
++	arm_r_r11_t5_c7,
++	arm_r_r12_t5_c7,
++	arm_r_r13_t5_c7,
++	arm_r_r14_t5_c7,
++	arm_r_r15_t5_c7,
++	arm_r_r0_t6_c7,
++	arm_r_r1_t6_c7,
++	arm_r_r2_t6_c7,
++	arm_r_r3_t6_c7,
++	arm_r_r4_t6_c7,
++	arm_r_r5_t6_c7,
++	arm_r_r6_t6_c7,
++	arm_r_r7_t6_c7,
++	arm_r_r8_t6_c7,
++	arm_r_r9_t6_c7,
++	arm_r_r10_t6_c7,
++	arm_r_r11_t6_c7,
++	arm_r_r12_t6_c7,
++	arm_r_r13_t6_c7,
++	arm_r_r14_t6_c7,
++	arm_r_r15_t6_c7,
++	arm_r_r0_t7_c7,
++	arm_r_r1_t7_c7,
++	arm_r_r2_t7_c7,
++	arm_r_r3_t7_c7,
++	arm_r_r4_t7_c7,
++	arm_r_r5_t7_c7,
++	arm_r_r6_t7_c7,
++	arm_r_r7_t7_c7,
++	arm_r_r8_t7_c7,
++	arm_r_r9_t7_c7,
++	arm_r_r10_t7_c7,
++	arm_r_r11_t7_c7,
++	arm_r_r12_t7_c7,
++	arm_r_r13_t7_c7,
++	arm_r_r14_t7_c7,
++	arm_r_r15_t7_c7,
++	arm_r_r0_t0_c8,
++	arm_r_r1_t0_c8,
++	arm_r_r2_t0_c8,
++	arm_r_r3_t0_c8,
++	arm_r_r4_t0_c8,
++	arm_r_r5_t0_c8,
++	arm_r_r6_t0_c8,
++	arm_r_r7_t0_c8,
++	arm_r_r8_t0_c8,
++	arm_r_r9_t0_c8,
++	arm_r_r10_t0_c8,
++	arm_r_r11_t0_c8,
++	arm_r_r12_t0_c8,
++	arm_r_r13_t0_c8,
++	arm_r_r14_t0_c8,
++	arm_r_r15_t0_c8,
++	arm_r_r0_t1_c8,
++	arm_r_r1_t1_c8,
++	arm_r_r2_t1_c8,
++	arm_r_r3_t1_c8,
++	arm_r_r4_t1_c8,
++	arm_r_r5_t1_c8,
++	arm_r_r6_t1_c8,
++	arm_r_r7_t1_c8,
++	arm_r_r8_t1_c8,
++	arm_r_r9_t1_c8,
++	arm_r_r10_t1_c8,
++	arm_r_r11_t1_c8,
++	arm_r_r12_t1_c8,
++	arm_r_r13_t1_c8,
++	arm_r_r14_t1_c8,
++	arm_r_r15_t1_c8,
++	arm_r_r0_t2_c8,
++	arm_r_r1_t2_c8,
++	arm_r_r2_t2_c8,
++	arm_r_r3_t2_c8,
++	arm_r_r4_t2_c8,
++	arm_r_r5_t2_c8,
++	arm_r_r6_t2_c8,
++	arm_r_r7_t2_c8,
++	arm_r_r8_t2_c8,
++	arm_r_r9_t2_c8,
++	arm_r_r10_t2_c8,
++	arm_r_r11_t2_c8,
++	arm_r_r12_t2_c8,
++	arm_r_r13_t2_c8,
++	arm_r_r14_t2_c8,
++	arm_r_r15_t2_c8,
++	arm_r_r0_t3_c8,
++	arm_r_r1_t3_c8,
++	arm_r_r2_t3_c8,
++	arm_r_r3_t3_c8,
++	arm_r_r4_t3_c8,
++	arm_r_r5_t3_c8,
++	arm_r_r6_t3_c8,
++	arm_r_r7_t3_c8,
++	arm_r_r8_t3_c8,
++	arm_r_r9_t3_c8,
++	arm_r_r10_t3_c8,
++	arm_r_r11_t3_c8,
++	arm_r_r12_t3_c8,
++	arm_r_r13_t3_c8,
++	arm_r_r14_t3_c8,
++	arm_r_r15_t3_c8,
++	arm_r_r0_t4_c8,
++	arm_r_r1_t4_c8,
++	arm_r_r2_t4_c8,
++	arm_r_r3_t4_c8,
++	arm_r_r4_t4_c8,
++	arm_r_r5_t4_c8,
++	arm_r_r6_t4_c8,
++	arm_r_r7_t4_c8,
++	arm_r_r8_t4_c8,
++	arm_r_r9_t4_c8,
++	arm_r_r10_t4_c8,
++	arm_r_r11_t4_c8,
++	arm_r_r12_t4_c8,
++	arm_r_r13_t4_c8,
++	arm_r_r14_t4_c8,
++	arm_r_r15_t4_c8,
++	arm_r_r0_t5_c8,
++	arm_r_r1_t5_c8,
++	arm_r_r2_t5_c8,
++	arm_r_r3_t5_c8,
++	arm_r_r4_t5_c8,
++	arm_r_r5_t5_c8,
++	arm_r_r6_t5_c8,
++	arm_r_r7_t5_c8,
++	arm_r_r8_t5_c8,
++	arm_r_r9_t5_c8,
++	arm_r_r10_t5_c8,
++	arm_r_r11_t5_c8,
++	arm_r_r12_t5_c8,
++	arm_r_r13_t5_c8,
++	arm_r_r14_t5_c8,
++	arm_r_r15_t5_c8,
++	arm_r_r0_t6_c8,
++	arm_r_r1_t6_c8,
++	arm_r_r2_t6_c8,
++	arm_r_r3_t6_c8,
++	arm_r_r4_t6_c8,
++	arm_r_r5_t6_c8,
++	arm_r_r6_t6_c8,
++	arm_r_r7_t6_c8,
++	arm_r_r8_t6_c8,
++	arm_r_r9_t6_c8,
++	arm_r_r10_t6_c8,
++	arm_r_r11_t6_c8,
++	arm_r_r12_t6_c8,
++	arm_r_r13_t6_c8,
++	arm_r_r14_t6_c8,
++	arm_r_r15_t6_c8,
++	arm_r_r0_t7_c8,
++	arm_r_r1_t7_c8,
++	arm_r_r2_t7_c8,
++	arm_r_r3_t7_c8,
++	arm_r_r4_t7_c8,
++	arm_r_r5_t7_c8,
++	arm_r_r6_t7_c8,
++	arm_r_r7_t7_c8,
++	arm_r_r8_t7_c8,
++	arm_r_r9_t7_c8,
++	arm_r_r10_t7_c8,
++	arm_r_r11_t7_c8,
++	arm_r_r12_t7_c8,
++	arm_r_r13_t7_c8,
++	arm_r_r14_t7_c8,
++	arm_r_r15_t7_c8,
++	arm_r_r0_t0_c9,
++	arm_r_r1_t0_c9,
++	arm_r_r2_t0_c9,
++	arm_r_r3_t0_c9,
++	arm_r_r4_t0_c9,
++	arm_r_r5_t0_c9,
++	arm_r_r6_t0_c9,
++	arm_r_r7_t0_c9,
++	arm_r_r8_t0_c9,
++	arm_r_r9_t0_c9,
++	arm_r_r10_t0_c9,
++	arm_r_r11_t0_c9,
++	arm_r_r12_t0_c9,
++	arm_r_r13_t0_c9,
++	arm_r_r14_t0_c9,
++	arm_r_r15_t0_c9,
++	arm_r_r0_t1_c9,
++	arm_r_r1_t1_c9,
++	arm_r_r2_t1_c9,
++	arm_r_r3_t1_c9,
++	arm_r_r4_t1_c9,
++	arm_r_r5_t1_c9,
++	arm_r_r6_t1_c9,
++	arm_r_r7_t1_c9,
++	arm_r_r8_t1_c9,
++	arm_r_r9_t1_c9,
++	arm_r_r10_t1_c9,
++	arm_r_r11_t1_c9,
++	arm_r_r12_t1_c9,
++	arm_r_r13_t1_c9,
++	arm_r_r14_t1_c9,
++	arm_r_r15_t1_c9,
++	arm_r_r0_t2_c9,
++	arm_r_r1_t2_c9,
++	arm_r_r2_t2_c9,
++	arm_r_r3_t2_c9,
++	arm_r_r4_t2_c9,
++	arm_r_r5_t2_c9,
++	arm_r_r6_t2_c9,
++	arm_r_r7_t2_c9,
++	arm_r_r8_t2_c9,
++	arm_r_r9_t2_c9,
++	arm_r_r10_t2_c9,
++	arm_r_r11_t2_c9,
++	arm_r_r12_t2_c9,
++	arm_r_r13_t2_c9,
++	arm_r_r14_t2_c9,
++	arm_r_r15_t2_c9,
++	arm_r_r0_t3_c9,
++	arm_r_r1_t3_c9,
++	arm_r_r2_t3_c9,
++	arm_r_r3_t3_c9,
++	arm_r_r4_t3_c9,
++	arm_r_r5_t3_c9,
++	arm_r_r6_t3_c9,
++	arm_r_r7_t3_c9,
++	arm_r_r8_t3_c9,
++	arm_r_r9_t3_c9,
++	arm_r_r10_t3_c9,
++	arm_r_r11_t3_c9,
++	arm_r_r12_t3_c9,
++	arm_r_r13_t3_c9,
++	arm_r_r14_t3_c9,
++	arm_r_r15_t3_c9,
++	arm_r_r0_t4_c9,
++	arm_r_r1_t4_c9,
++	arm_r_r2_t4_c9,
++	arm_r_r3_t4_c9,
++	arm_r_r4_t4_c9,
++	arm_r_r5_t4_c9,
++	arm_r_r6_t4_c9,
++	arm_r_r7_t4_c9,
++	arm_r_r8_t4_c9,
++	arm_r_r9_t4_c9,
++	arm_r_r10_t4_c9,
++	arm_r_r11_t4_c9,
++	arm_r_r12_t4_c9,
++	arm_r_r13_t4_c9,
++	arm_r_r14_t4_c9,
++	arm_r_r15_t4_c9,
++	arm_r_r0_t5_c9,
++	arm_r_r1_t5_c9,
++	arm_r_r2_t5_c9,
++	arm_r_r3_t5_c9,
++	arm_r_r4_t5_c9,
++	arm_r_r5_t5_c9,
++	arm_r_r6_t5_c9,
++	arm_r_r7_t5_c9,
++	arm_r_r8_t5_c9,
++	arm_r_r9_t5_c9,
++	arm_r_r10_t5_c9,
++	arm_r_r11_t5_c9,
++	arm_r_r12_t5_c9,
++	arm_r_r13_t5_c9,
++	arm_r_r14_t5_c9,
++	arm_r_r15_t5_c9,
++	arm_r_r0_t6_c9,
++	arm_r_r1_t6_c9,
++	arm_r_r2_t6_c9,
++	arm_r_r3_t6_c9,
++	arm_r_r4_t6_c9,
++	arm_r_r5_t6_c9,
++	arm_r_r6_t6_c9,
++	arm_r_r7_t6_c9,
++	arm_r_r8_t6_c9,
++	arm_r_r9_t6_c9,
++	arm_r_r10_t6_c9,
++	arm_r_r11_t6_c9,
++	arm_r_r12_t6_c9,
++	arm_r_r13_t6_c9,
++	arm_r_r14_t6_c9,
++	arm_r_r15_t6_c9,
++	arm_r_r0_t7_c9,
++	arm_r_r1_t7_c9,
++	arm_r_r2_t7_c9,
++	arm_r_r3_t7_c9,
++	arm_r_r4_t7_c9,
++	arm_r_r5_t7_c9,
++	arm_r_r6_t7_c9,
++	arm_r_r7_t7_c9,
++	arm_r_r8_t7_c9,
++	arm_r_r9_t7_c9,
++	arm_r_r10_t7_c9,
++	arm_r_r11_t7_c9,
++	arm_r_r12_t7_c9,
++	arm_r_r13_t7_c9,
++	arm_r_r14_t7_c9,
++	arm_r_r15_t7_c9,
++	arm_r_r0_t0_c10,
++	arm_r_r1_t0_c10,
++	arm_r_r2_t0_c10,
++	arm_r_r3_t0_c10,
++	arm_r_r4_t0_c10,
++	arm_r_r5_t0_c10,
++	arm_r_r6_t0_c10,
++	arm_r_r7_t0_c10,
++	arm_r_r8_t0_c10,
++	arm_r_r9_t0_c10,
++	arm_r_r10_t0_c10,
++	arm_r_r11_t0_c10,
++	arm_r_r12_t0_c10,
++	arm_r_r13_t0_c10,
++	arm_r_r14_t0_c10,
++	arm_r_r15_t0_c10,
++	arm_r_r0_t1_c10,
++	arm_r_r1_t1_c10,
++	arm_r_r2_t1_c10,
++	arm_r_r3_t1_c10,
++	arm_r_r4_t1_c10,
++	arm_r_r5_t1_c10,
++	arm_r_r6_t1_c10,
++	arm_r_r7_t1_c10,
++	arm_r_r8_t1_c10,
++	arm_r_r9_t1_c10,
++	arm_r_r10_t1_c10,
++	arm_r_r11_t1_c10,
++	arm_r_r12_t1_c10,
++	arm_r_r13_t1_c10,
++	arm_r_r14_t1_c10,
++	arm_r_r15_t1_c10,
++	arm_r_r0_t2_c10,
++	arm_r_r1_t2_c10,
++	arm_r_r2_t2_c10,
++	arm_r_r3_t2_c10,
++	arm_r_r4_t2_c10,
++	arm_r_r5_t2_c10,
++	arm_r_r6_t2_c10,
++	arm_r_r7_t2_c10,
++	arm_r_r8_t2_c10,
++	arm_r_r9_t2_c10,
++	arm_r_r10_t2_c10,
++	arm_r_r11_t2_c10,
++	arm_r_r12_t2_c10,
++	arm_r_r13_t2_c10,
++	arm_r_r14_t2_c10,
++	arm_r_r15_t2_c10,
++	arm_r_r0_t3_c10,
++	arm_r_r1_t3_c10,
++	arm_r_r2_t3_c10,
++	arm_r_r3_t3_c10,
++	arm_r_r4_t3_c10,
++	arm_r_r5_t3_c10,
++	arm_r_r6_t3_c10,
++	arm_r_r7_t3_c10,
++	arm_r_r8_t3_c10,
++	arm_r_r9_t3_c10,
++	arm_r_r10_t3_c10,
++	arm_r_r11_t3_c10,
++	arm_r_r12_t3_c10,
++	arm_r_r13_t3_c10,
++	arm_r_r14_t3_c10,
++	arm_r_r15_t3_c10,
++	arm_r_r0_t4_c10,
++	arm_r_r1_t4_c10,
++	arm_r_r2_t4_c10,
++	arm_r_r3_t4_c10,
++	arm_r_r4_t4_c10,
++	arm_r_r5_t4_c10,
++	arm_r_r6_t4_c10,
++	arm_r_r7_t4_c10,
++	arm_r_r8_t4_c10,
++	arm_r_r9_t4_c10,
++	arm_r_r10_t4_c10,
++	arm_r_r11_t4_c10,
++	arm_r_r12_t4_c10,
++	arm_r_r13_t4_c10,
++	arm_r_r14_t4_c10,
++	arm_r_r15_t4_c10,
++	arm_r_r0_t5_c10,
++	arm_r_r1_t5_c10,
++	arm_r_r2_t5_c10,
++	arm_r_r3_t5_c10,
++	arm_r_r4_t5_c10,
++	arm_r_r5_t5_c10,
++	arm_r_r6_t5_c10,
++	arm_r_r7_t5_c10,
++	arm_r_r8_t5_c10,
++	arm_r_r9_t5_c10,
++	arm_r_r10_t5_c10,
++	arm_r_r11_t5_c10,
++	arm_r_r12_t5_c10,
++	arm_r_r13_t5_c10,
++	arm_r_r14_t5_c10,
++	arm_r_r15_t5_c10,
++	arm_r_r0_t6_c10,
++	arm_r_r1_t6_c10,
++	arm_r_r2_t6_c10,
++	arm_r_r3_t6_c10,
++	arm_r_r4_t6_c10,
++	arm_r_r5_t6_c10,
++	arm_r_r6_t6_c10,
++	arm_r_r7_t6_c10,
++	arm_r_r8_t6_c10,
++	arm_r_r9_t6_c10,
++	arm_r_r10_t6_c10,
++	arm_r_r11_t6_c10,
++	arm_r_r12_t6_c10,
++	arm_r_r13_t6_c10,
++	arm_r_r14_t6_c10,
++	arm_r_r15_t6_c10,
++	arm_r_r0_t7_c10,
++	arm_r_r1_t7_c10,
++	arm_r_r2_t7_c10,
++	arm_r_r3_t7_c10,
++	arm_r_r4_t7_c10,
++	arm_r_r5_t7_c10,
++	arm_r_r6_t7_c10,
++	arm_r_r7_t7_c10,
++	arm_r_r8_t7_c10,
++	arm_r_r9_t7_c10,
++	arm_r_r10_t7_c10,
++	arm_r_r11_t7_c10,
++	arm_r_r12_t7_c10,
++	arm_r_r13_t7_c10,
++	arm_r_r14_t7_c10,
++	arm_r_r15_t7_c10,
++	arm_r_r0_t0_c11,
++	arm_r_r1_t0_c11,
++	arm_r_r2_t0_c11,
++	arm_r_r3_t0_c11,
++	arm_r_r4_t0_c11,
++	arm_r_r5_t0_c11,
++	arm_r_r6_t0_c11,
++	arm_r_r7_t0_c11,
++	arm_r_r8_t0_c11,
++	arm_r_r9_t0_c11,
++	arm_r_r10_t0_c11,
++	arm_r_r11_t0_c11,
++	arm_r_r12_t0_c11,
++	arm_r_r13_t0_c11,
++	arm_r_r14_t0_c11,
++	arm_r_r15_t0_c11,
++	arm_r_r0_t1_c11,
++	arm_r_r1_t1_c11,
++	arm_r_r2_t1_c11,
++	arm_r_r3_t1_c11,
++	arm_r_r4_t1_c11,
++	arm_r_r5_t1_c11,
++	arm_r_r6_t1_c11,
++	arm_r_r7_t1_c11,
++	arm_r_r8_t1_c11,
++	arm_r_r9_t1_c11,
++	arm_r_r10_t1_c11,
++	arm_r_r11_t1_c11,
++	arm_r_r12_t1_c11,
++	arm_r_r13_t1_c11,
++	arm_r_r14_t1_c11,
++	arm_r_r15_t1_c11,
++	arm_r_r0_t2_c11,
++	arm_r_r1_t2_c11,
++	arm_r_r2_t2_c11,
++	arm_r_r3_t2_c11,
++	arm_r_r4_t2_c11,
++	arm_r_r5_t2_c11,
++	arm_r_r6_t2_c11,
++	arm_r_r7_t2_c11,
++	arm_r_r8_t2_c11,
++	arm_r_r9_t2_c11,
++	arm_r_r10_t2_c11,
++	arm_r_r11_t2_c11,
++	arm_r_r12_t2_c11,
++	arm_r_r13_t2_c11,
++	arm_r_r14_t2_c11,
++	arm_r_r15_t2_c11,
++	arm_r_r0_t3_c11,
++	arm_r_r1_t3_c11,
++	arm_r_r2_t3_c11,
++	arm_r_r3_t3_c11,
++	arm_r_r4_t3_c11,
++	arm_r_r5_t3_c11,
++	arm_r_r6_t3_c11,
++	arm_r_r7_t3_c11,
++	arm_r_r8_t3_c11,
++	arm_r_r9_t3_c11,
++	arm_r_r10_t3_c11,
++	arm_r_r11_t3_c11,
++	arm_r_r12_t3_c11,
++	arm_r_r13_t3_c11,
++	arm_r_r14_t3_c11,
++	arm_r_r15_t3_c11,
++	arm_r_r0_t4_c11,
++	arm_r_r1_t4_c11,
++	arm_r_r2_t4_c11,
++	arm_r_r3_t4_c11,
++	arm_r_r4_t4_c11,
++	arm_r_r5_t4_c11,
++	arm_r_r6_t4_c11,
++	arm_r_r7_t4_c11,
++	arm_r_r8_t4_c11,
++	arm_r_r9_t4_c11,
++	arm_r_r10_t4_c11,
++	arm_r_r11_t4_c11,
++	arm_r_r12_t4_c11,
++	arm_r_r13_t4_c11,
++	arm_r_r14_t4_c11,
++	arm_r_r15_t4_c11,
++	arm_r_r0_t5_c11,
++	arm_r_r1_t5_c11,
++	arm_r_r2_t5_c11,
++	arm_r_r3_t5_c11,
++	arm_r_r4_t5_c11,
++	arm_r_r5_t5_c11,
++	arm_r_r6_t5_c11,
++	arm_r_r7_t5_c11,
++	arm_r_r8_t5_c11,
++	arm_r_r9_t5_c11,
++	arm_r_r10_t5_c11,
++	arm_r_r11_t5_c11,
++	arm_r_r12_t5_c11,
++	arm_r_r13_t5_c11,
++	arm_r_r14_t5_c11,
++	arm_r_r15_t5_c11,
++	arm_r_r0_t6_c11,
++	arm_r_r1_t6_c11,
++	arm_r_r2_t6_c11,
++	arm_r_r3_t6_c11,
++	arm_r_r4_t6_c11,
++	arm_r_r5_t6_c11,
++	arm_r_r6_t6_c11,
++	arm_r_r7_t6_c11,
++	arm_r_r8_t6_c11,
++	arm_r_r9_t6_c11,
++	arm_r_r10_t6_c11,
++	arm_r_r11_t6_c11,
++	arm_r_r12_t6_c11,
++	arm_r_r13_t6_c11,
++	arm_r_r14_t6_c11,
++	arm_r_r15_t6_c11,
++	arm_r_r0_t7_c11,
++	arm_r_r1_t7_c11,
++	arm_r_r2_t7_c11,
++	arm_r_r3_t7_c11,
++	arm_r_r4_t7_c11,
++	arm_r_r5_t7_c11,
++	arm_r_r6_t7_c11,
++	arm_r_r7_t7_c11,
++	arm_r_r8_t7_c11,
++	arm_r_r9_t7_c11,
++	arm_r_r10_t7_c11,
++	arm_r_r11_t7_c11,
++	arm_r_r12_t7_c11,
++	arm_r_r13_t7_c11,
++	arm_r_r14_t7_c11,
++	arm_r_r15_t7_c11,
++	arm_r_r0_t0_c12,
++	arm_r_r1_t0_c12,
++	arm_r_r2_t0_c12,
++	arm_r_r3_t0_c12,
++	arm_r_r4_t0_c12,
++	arm_r_r5_t0_c12,
++	arm_r_r6_t0_c12,
++	arm_r_r7_t0_c12,
++	arm_r_r8_t0_c12,
++	arm_r_r9_t0_c12,
++	arm_r_r10_t0_c12,
++	arm_r_r11_t0_c12,
++	arm_r_r12_t0_c12,
++	arm_r_r13_t0_c12,
++	arm_r_r14_t0_c12,
++	arm_r_r15_t0_c12,
++	arm_r_r0_t1_c12,
++	arm_r_r1_t1_c12,
++	arm_r_r2_t1_c12,
++	arm_r_r3_t1_c12,
++	arm_r_r4_t1_c12,
++	arm_r_r5_t1_c12,
++	arm_r_r6_t1_c12,
++	arm_r_r7_t1_c12,
++	arm_r_r8_t1_c12,
++	arm_r_r9_t1_c12,
++	arm_r_r10_t1_c12,
++	arm_r_r11_t1_c12,
++	arm_r_r12_t1_c12,
++	arm_r_r13_t1_c12,
++	arm_r_r14_t1_c12,
++	arm_r_r15_t1_c12,
++	arm_r_r0_t2_c12,
++	arm_r_r1_t2_c12,
++	arm_r_r2_t2_c12,
++	arm_r_r3_t2_c12,
++	arm_r_r4_t2_c12,
++	arm_r_r5_t2_c12,
++	arm_r_r6_t2_c12,
++	arm_r_r7_t2_c12,
++	arm_r_r8_t2_c12,
++	arm_r_r9_t2_c12,
++	arm_r_r10_t2_c12,
++	arm_r_r11_t2_c12,
++	arm_r_r12_t2_c12,
++	arm_r_r13_t2_c12,
++	arm_r_r14_t2_c12,
++	arm_r_r15_t2_c12,
++	arm_r_r0_t3_c12,
++	arm_r_r1_t3_c12,
++	arm_r_r2_t3_c12,
++	arm_r_r3_t3_c12,
++	arm_r_r4_t3_c12,
++	arm_r_r5_t3_c12,
++	arm_r_r6_t3_c12,
++	arm_r_r7_t3_c12,
++	arm_r_r8_t3_c12,
++	arm_r_r9_t3_c12,
++	arm_r_r10_t3_c12,
++	arm_r_r11_t3_c12,
++	arm_r_r12_t3_c12,
++	arm_r_r13_t3_c12,
++	arm_r_r14_t3_c12,
++	arm_r_r15_t3_c12,
++	arm_r_r0_t4_c12,
++	arm_r_r1_t4_c12,
++	arm_r_r2_t4_c12,
++	arm_r_r3_t4_c12,
++	arm_r_r4_t4_c12,
++	arm_r_r5_t4_c12,
++	arm_r_r6_t4_c12,
++	arm_r_r7_t4_c12,
++	arm_r_r8_t4_c12,
++	arm_r_r9_t4_c12,
++	arm_r_r10_t4_c12,
++	arm_r_r11_t4_c12,
++	arm_r_r12_t4_c12,
++	arm_r_r13_t4_c12,
++	arm_r_r14_t4_c12,
++	arm_r_r15_t4_c12,
++	arm_r_r0_t5_c12,
++	arm_r_r1_t5_c12,
++	arm_r_r2_t5_c12,
++	arm_r_r3_t5_c12,
++	arm_r_r4_t5_c12,
++	arm_r_r5_t5_c12,
++	arm_r_r6_t5_c12,
++	arm_r_r7_t5_c12,
++	arm_r_r8_t5_c12,
++	arm_r_r9_t5_c12,
++	arm_r_r10_t5_c12,
++	arm_r_r11_t5_c12,
++	arm_r_r12_t5_c12,
++	arm_r_r13_t5_c12,
++	arm_r_r14_t5_c12,
++	arm_r_r15_t5_c12,
++	arm_r_r0_t6_c12,
++	arm_r_r1_t6_c12,
++	arm_r_r2_t6_c12,
++	arm_r_r3_t6_c12,
++	arm_r_r4_t6_c12,
++	arm_r_r5_t6_c12,
++	arm_r_r6_t6_c12,
++	arm_r_r7_t6_c12,
++	arm_r_r8_t6_c12,
++	arm_r_r9_t6_c12,
++	arm_r_r10_t6_c12,
++	arm_r_r11_t6_c12,
++	arm_r_r12_t6_c12,
++	arm_r_r13_t6_c12,
++	arm_r_r14_t6_c12,
++	arm_r_r15_t6_c12,
++	arm_r_r0_t7_c12,
++	arm_r_r1_t7_c12,
++	arm_r_r2_t7_c12,
++	arm_r_r3_t7_c12,
++	arm_r_r4_t7_c12,
++	arm_r_r5_t7_c12,
++	arm_r_r6_t7_c12,
++	arm_r_r7_t7_c12,
++	arm_r_r8_t7_c12,
++	arm_r_r9_t7_c12,
++	arm_r_r10_t7_c12,
++	arm_r_r11_t7_c12,
++	arm_r_r12_t7_c12,
++	arm_r_r13_t7_c12,
++	arm_r_r14_t7_c12,
++	arm_r_r15_t7_c12,
++	arm_r_r0_t0_c13,
++	arm_r_r1_t0_c13,
++	arm_r_r2_t0_c13,
++	arm_r_r3_t0_c13,
++	arm_r_r4_t0_c13,
++	arm_r_r5_t0_c13,
++	arm_r_r6_t0_c13,
++	arm_r_r7_t0_c13,
++	arm_r_r8_t0_c13,
++	arm_r_r9_t0_c13,
++	arm_r_r10_t0_c13,
++	arm_r_r11_t0_c13,
++	arm_r_r12_t0_c13,
++	arm_r_r13_t0_c13,
++	arm_r_r14_t0_c13,
++	arm_r_r15_t0_c13,
++	arm_r_r0_t1_c13,
++	arm_r_r1_t1_c13,
++	arm_r_r2_t1_c13,
++	arm_r_r3_t1_c13,
++	arm_r_r4_t1_c13,
++	arm_r_r5_t1_c13,
++	arm_r_r6_t1_c13,
++	arm_r_r7_t1_c13,
++	arm_r_r8_t1_c13,
++	arm_r_r9_t1_c13,
++	arm_r_r10_t1_c13,
++	arm_r_r11_t1_c13,
++	arm_r_r12_t1_c13,
++	arm_r_r13_t1_c13,
++	arm_r_r14_t1_c13,
++	arm_r_r15_t1_c13,
++	arm_r_r0_t2_c13,
++	arm_r_r1_t2_c13,
++	arm_r_r2_t2_c13,
++	arm_r_r3_t2_c13,
++	arm_r_r4_t2_c13,
++	arm_r_r5_t2_c13,
++	arm_r_r6_t2_c13,
++	arm_r_r7_t2_c13,
++	arm_r_r8_t2_c13,
++	arm_r_r9_t2_c13,
++	arm_r_r10_t2_c13,
++	arm_r_r11_t2_c13,
++	arm_r_r12_t2_c13,
++	arm_r_r13_t2_c13,
++	arm_r_r14_t2_c13,
++	arm_r_r15_t2_c13,
++	arm_r_r0_t3_c13,
++	arm_r_r1_t3_c13,
++	arm_r_r2_t3_c13,
++	arm_r_r3_t3_c13,
++	arm_r_r4_t3_c13,
++	arm_r_r5_t3_c13,
++	arm_r_r6_t3_c13,
++	arm_r_r7_t3_c13,
++	arm_r_r8_t3_c13,
++	arm_r_r9_t3_c13,
++	arm_r_r10_t3_c13,
++	arm_r_r11_t3_c13,
++	arm_r_r12_t3_c13,
++	arm_r_r13_t3_c13,
++	arm_r_r14_t3_c13,
++	arm_r_r15_t3_c13,
++	arm_r_r0_t4_c13,
++	arm_r_r1_t4_c13,
++	arm_r_r2_t4_c13,
++	arm_r_r3_t4_c13,
++	arm_r_r4_t4_c13,
++	arm_r_r5_t4_c13,
++	arm_r_r6_t4_c13,
++	arm_r_r7_t4_c13,
++	arm_r_r8_t4_c13,
++	arm_r_r9_t4_c13,
++	arm_r_r10_t4_c13,
++	arm_r_r11_t4_c13,
++	arm_r_r12_t4_c13,
++	arm_r_r13_t4_c13,
++	arm_r_r14_t4_c13,
++	arm_r_r15_t4_c13,
++	arm_r_r0_t5_c13,
++	arm_r_r1_t5_c13,
++	arm_r_r2_t5_c13,
++	arm_r_r3_t5_c13,
++	arm_r_r4_t5_c13,
++	arm_r_r5_t5_c13,
++	arm_r_r6_t5_c13,
++	arm_r_r7_t5_c13,
++	arm_r_r8_t5_c13,
++	arm_r_r9_t5_c13,
++	arm_r_r10_t5_c13,
++	arm_r_r11_t5_c13,
++	arm_r_r12_t5_c13,
++	arm_r_r13_t5_c13,
++	arm_r_r14_t5_c13,
++	arm_r_r15_t5_c13,
++	arm_r_r0_t6_c13,
++	arm_r_r1_t6_c13,
++	arm_r_r2_t6_c13,
++	arm_r_r3_t6_c13,
++	arm_r_r4_t6_c13,
++	arm_r_r5_t6_c13,
++	arm_r_r6_t6_c13,
++	arm_r_r7_t6_c13,
++	arm_r_r8_t6_c13,
++	arm_r_r9_t6_c13,
++	arm_r_r10_t6_c13,
++	arm_r_r11_t6_c13,
++	arm_r_r12_t6_c13,
++	arm_r_r13_t6_c13,
++	arm_r_r14_t6_c13,
++	arm_r_r15_t6_c13,
++	arm_r_r0_t7_c13,
++	arm_r_r1_t7_c13,
++	arm_r_r2_t7_c13,
++	arm_r_r3_t7_c13,
++	arm_r_r4_t7_c13,
++	arm_r_r5_t7_c13,
++	arm_r_r6_t7_c13,
++	arm_r_r7_t7_c13,
++	arm_r_r8_t7_c13,
++	arm_r_r9_t7_c13,
++	arm_r_r10_t7_c13,
++	arm_r_r11_t7_c13,
++	arm_r_r12_t7_c13,
++	arm_r_r13_t7_c13,
++	arm_r_r14_t7_c13,
++	arm_r_r15_t7_c13,
++	arm_r_r0_t0_c14,
++	arm_r_r1_t0_c14,
++	arm_r_r2_t0_c14,
++	arm_r_r3_t0_c14,
++	arm_r_r4_t0_c14,
++	arm_r_r5_t0_c14,
++	arm_r_r6_t0_c14,
++	arm_r_r7_t0_c14,
++	arm_r_r8_t0_c14,
++	arm_r_r9_t0_c14,
++	arm_r_r10_t0_c14,
++	arm_r_r11_t0_c14,
++	arm_r_r12_t0_c14,
++	arm_r_r13_t0_c14,
++	arm_r_r14_t0_c14,
++	arm_r_r15_t0_c14,
++	arm_r_r0_t1_c14,
++	arm_r_r1_t1_c14,
++	arm_r_r2_t1_c14,
++	arm_r_r3_t1_c14,
++	arm_r_r4_t1_c14,
++	arm_r_r5_t1_c14,
++	arm_r_r6_t1_c14,
++	arm_r_r7_t1_c14,
++	arm_r_r8_t1_c14,
++	arm_r_r9_t1_c14,
++	arm_r_r10_t1_c14,
++	arm_r_r11_t1_c14,
++	arm_r_r12_t1_c14,
++	arm_r_r13_t1_c14,
++	arm_r_r14_t1_c14,
++	arm_r_r15_t1_c14,
++	arm_r_r0_t2_c14,
++	arm_r_r1_t2_c14,
++	arm_r_r2_t2_c14,
++	arm_r_r3_t2_c14,
++	arm_r_r4_t2_c14,
++	arm_r_r5_t2_c14,
++	arm_r_r6_t2_c14,
++	arm_r_r7_t2_c14,
++	arm_r_r8_t2_c14,
++	arm_r_r9_t2_c14,
++	arm_r_r10_t2_c14,
++	arm_r_r11_t2_c14,
++	arm_r_r12_t2_c14,
++	arm_r_r13_t2_c14,
++	arm_r_r14_t2_c14,
++	arm_r_r15_t2_c14,
++	arm_r_r0_t3_c14,
++	arm_r_r1_t3_c14,
++	arm_r_r2_t3_c14,
++	arm_r_r3_t3_c14,
++	arm_r_r4_t3_c14,
++	arm_r_r5_t3_c14,
++	arm_r_r6_t3_c14,
++	arm_r_r7_t3_c14,
++	arm_r_r8_t3_c14,
++	arm_r_r9_t3_c14,
++	arm_r_r10_t3_c14,
++	arm_r_r11_t3_c14,
++	arm_r_r12_t3_c14,
++	arm_r_r13_t3_c14,
++	arm_r_r14_t3_c14,
++	arm_r_r15_t3_c14,
++	arm_r_r0_t4_c14,
++	arm_r_r1_t4_c14,
++	arm_r_r2_t4_c14,
++	arm_r_r3_t4_c14,
++	arm_r_r4_t4_c14,
++	arm_r_r5_t4_c14,
++	arm_r_r6_t4_c14,
++	arm_r_r7_t4_c14,
++	arm_r_r8_t4_c14,
++	arm_r_r9_t4_c14,
++	arm_r_r10_t4_c14,
++	arm_r_r11_t4_c14,
++	arm_r_r12_t4_c14,
++	arm_r_r13_t4_c14,
++	arm_r_r14_t4_c14,
++	arm_r_r15_t4_c14,
++	arm_r_r0_t5_c14,
++	arm_r_r1_t5_c14,
++	arm_r_r2_t5_c14,
++	arm_r_r3_t5_c14,
++	arm_r_r4_t5_c14,
++	arm_r_r5_t5_c14,
++	arm_r_r6_t5_c14,
++	arm_r_r7_t5_c14,
++	arm_r_r8_t5_c14,
++	arm_r_r9_t5_c14,
++	arm_r_r10_t5_c14,
++	arm_r_r11_t5_c14,
++	arm_r_r12_t5_c14,
++	arm_r_r13_t5_c14,
++	arm_r_r14_t5_c14,
++	arm_r_r15_t5_c14,
++	arm_r_r0_t6_c14,
++	arm_r_r1_t6_c14,
++	arm_r_r2_t6_c14,
++	arm_r_r3_t6_c14,
++	arm_r_r4_t6_c14,
++	arm_r_r5_t6_c14,
++	arm_r_r6_t6_c14,
++	arm_r_r7_t6_c14,
++	arm_r_r8_t6_c14,
++	arm_r_r9_t6_c14,
++	arm_r_r10_t6_c14,
++	arm_r_r11_t6_c14,
++	arm_r_r12_t6_c14,
++	arm_r_r13_t6_c14,
++	arm_r_r14_t6_c14,
++	arm_r_r15_t6_c14,
++	arm_r_r0_t7_c14,
++	arm_r_r1_t7_c14,
++	arm_r_r2_t7_c14,
++	arm_r_r3_t7_c14,
++	arm_r_r4_t7_c14,
++	arm_r_r5_t7_c14,
++	arm_r_r6_t7_c14,
++	arm_r_r7_t7_c14,
++	arm_r_r8_t7_c14,
++	arm_r_r9_t7_c14,
++	arm_r_r10_t7_c14,
++	arm_r_r11_t7_c14,
++	arm_r_r12_t7_c14,
++	arm_r_r13_t7_c14,
++	arm_r_r14_t7_c14,
++	arm_r_r15_t7_c14,
++	arm_r_r0_t0_c15,
++	arm_r_r1_t0_c15,
++	arm_r_r2_t0_c15,
++	arm_r_r3_t0_c15,
++	arm_r_r4_t0_c15,
++	arm_r_r5_t0_c15,
++	arm_r_r6_t0_c15,
++	arm_r_r7_t0_c15,
++	arm_r_r8_t0_c15,
++	arm_r_r9_t0_c15,
++	arm_r_r10_t0_c15,
++	arm_r_r11_t0_c15,
++	arm_r_r12_t0_c15,
++	arm_r_r13_t0_c15,
++	arm_r_r14_t0_c15,
++	arm_r_r15_t0_c15,
++	arm_r_r0_t1_c15,
++	arm_r_r1_t1_c15,
++	arm_r_r2_t1_c15,
++	arm_r_r3_t1_c15,
++	arm_r_r4_t1_c15,
++	arm_r_r5_t1_c15,
++	arm_r_r6_t1_c15,
++	arm_r_r7_t1_c15,
++	arm_r_r8_t1_c15,
++	arm_r_r9_t1_c15,
++	arm_r_r10_t1_c15,
++	arm_r_r11_t1_c15,
++	arm_r_r12_t1_c15,
++	arm_r_r13_t1_c15,
++	arm_r_r14_t1_c15,
++	arm_r_r15_t1_c15,
++	arm_r_r0_t2_c15,
++	arm_r_r1_t2_c15,
++	arm_r_r2_t2_c15,
++	arm_r_r3_t2_c15,
++	arm_r_r4_t2_c15,
++	arm_r_r5_t2_c15,
++	arm_r_r6_t2_c15,
++	arm_r_r7_t2_c15,
++	arm_r_r8_t2_c15,
++	arm_r_r9_t2_c15,
++	arm_r_r10_t2_c15,
++	arm_r_r11_t2_c15,
++	arm_r_r12_t2_c15,
++	arm_r_r13_t2_c15,
++	arm_r_r14_t2_c15,
++	arm_r_r15_t2_c15,
++	arm_r_r0_t3_c15,
++	arm_r_r1_t3_c15,
++	arm_r_r2_t3_c15,
++	arm_r_r3_t3_c15,
++	arm_r_r4_t3_c15,
++	arm_r_r5_t3_c15,
++	arm_r_r6_t3_c15,
++	arm_r_r7_t3_c15,
++	arm_r_r8_t3_c15,
++	arm_r_r9_t3_c15,
++	arm_r_r10_t3_c15,
++	arm_r_r11_t3_c15,
++	arm_r_r12_t3_c15,
++	arm_r_r13_t3_c15,
++	arm_r_r14_t3_c15,
++	arm_r_r15_t3_c15,
++	arm_r_r0_t4_c15,
++	arm_r_r1_t4_c15,
++	arm_r_r2_t4_c15,
++	arm_r_r3_t4_c15,
++	arm_r_r4_t4_c15,
++	arm_r_r5_t4_c15,
++	arm_r_r6_t4_c15,
++	arm_r_r7_t4_c15,
++	arm_r_r8_t4_c15,
++	arm_r_r9_t4_c15,
++	arm_r_r10_t4_c15,
++	arm_r_r11_t4_c15,
++	arm_r_r12_t4_c15,
++	arm_r_r13_t4_c15,
++	arm_r_r14_t4_c15,
++	arm_r_r15_t4_c15,
++	arm_r_r0_t5_c15,
++	arm_r_r1_t5_c15,
++	arm_r_r2_t5_c15,
++	arm_r_r3_t5_c15,
++	arm_r_r4_t5_c15,
++	arm_r_r5_t5_c15,
++	arm_r_r6_t5_c15,
++	arm_r_r7_t5_c15,
++	arm_r_r8_t5_c15,
++	arm_r_r9_t5_c15,
++	arm_r_r10_t5_c15,
++	arm_r_r11_t5_c15,
++	arm_r_r12_t5_c15,
++	arm_r_r13_t5_c15,
++	arm_r_r14_t5_c15,
++	arm_r_r15_t5_c15,
++	arm_r_r0_t6_c15,
++	arm_r_r1_t6_c15,
++	arm_r_r2_t6_c15,
++	arm_r_r3_t6_c15,
++	arm_r_r4_t6_c15,
++	arm_r_r5_t6_c15,
++	arm_r_r6_t6_c15,
++	arm_r_r7_t6_c15,
++	arm_r_r8_t6_c15,
++	arm_r_r9_t6_c15,
++	arm_r_r10_t6_c15,
++	arm_r_r11_t6_c15,
++	arm_r_r12_t6_c15,
++	arm_r_r13_t6_c15,
++	arm_r_r14_t6_c15,
++	arm_r_r15_t6_c15,
++	arm_r_r0_t7_c15,
++	arm_r_r1_t7_c15,
++	arm_r_r2_t7_c15,
++	arm_r_r3_t7_c15,
++	arm_r_r4_t7_c15,
++	arm_r_r5_t7_c15,
++	arm_r_r6_t7_c15,
++	arm_r_r7_t7_c15,
++	arm_r_r8_t7_c15,
++	arm_r_r9_t7_c15,
++	arm_r_r10_t7_c15,
++	arm_r_r11_t7_c15,
++	arm_r_r12_t7_c15,
++	arm_r_r13_t7_c15,
++	arm_r_r14_t7_c15,
++	arm_r_r15_t7_c15,
++	arm_r_r0_t0_c16,
++	arm_r_r1_t0_c16,
++	arm_r_r2_t0_c16,
++	arm_r_r3_t0_c16,
++	arm_r_r4_t0_c16,
++	arm_r_r5_t0_c16,
++	arm_r_r6_t0_c16,
++	arm_r_r7_t0_c16,
++	arm_r_r8_t0_c16,
++	arm_r_r9_t0_c16,
++	arm_r_r10_t0_c16,
++	arm_r_r11_t0_c16,
++	arm_r_r12_t0_c16,
++	arm_r_r13_t0_c16,
++	arm_r_r14_t0_c16,
++	arm_r_r15_t0_c16,
++	arm_r_r0_t1_c16,
++	arm_r_r1_t1_c16,
++	arm_r_r2_t1_c16,
++	arm_r_r3_t1_c16,
++	arm_r_r4_t1_c16,
++	arm_r_r5_t1_c16,
++	arm_r_r6_t1_c16,
++	arm_r_r7_t1_c16,
++	arm_r_r8_t1_c16,
++	arm_r_r9_t1_c16,
++	arm_r_r10_t1_c16,
++	arm_r_r11_t1_c16,
++	arm_r_r12_t1_c16,
++	arm_r_r13_t1_c16,
++	arm_r_r14_t1_c16,
++	arm_r_r15_t1_c16,
++	arm_r_r0_t2_c16,
++	arm_r_r1_t2_c16,
++	arm_r_r2_t2_c16,
++	arm_r_r3_t2_c16,
++	arm_r_r4_t2_c16,
++	arm_r_r5_t2_c16,
++	arm_r_r6_t2_c16,
++	arm_r_r7_t2_c16,
++	arm_r_r8_t2_c16,
++	arm_r_r9_t2_c16,
++	arm_r_r10_t2_c16,
++	arm_r_r11_t2_c16,
++	arm_r_r12_t2_c16,
++	arm_r_r13_t2_c16,
++	arm_r_r14_t2_c16,
++	arm_r_r15_t2_c16,
++	arm_r_r0_t3_c16,
++	arm_r_r1_t3_c16,
++	arm_r_r2_t3_c16,
++	arm_r_r3_t3_c16,
++	arm_r_r4_t3_c16,
++	arm_r_r5_t3_c16,
++	arm_r_r6_t3_c16,
++	arm_r_r7_t3_c16,
++	arm_r_r8_t3_c16,
++	arm_r_r9_t3_c16,
++	arm_r_r10_t3_c16,
++	arm_r_r11_t3_c16,
++	arm_r_r12_t3_c16,
++	arm_r_r13_t3_c16,
++	arm_r_r14_t3_c16,
++	arm_r_r15_t3_c16,
++	arm_r_r0_t4_c16,
++	arm_r_r1_t4_c16,
++	arm_r_r2_t4_c16,
++	arm_r_r3_t4_c16,
++	arm_r_r4_t4_c16,
++	arm_r_r5_t4_c16,
++	arm_r_r6_t4_c16,
++	arm_r_r7_t4_c16,
++	arm_r_r8_t4_c16,
++	arm_r_r9_t4_c16,
++	arm_r_r10_t4_c16,
++	arm_r_r11_t4_c16,
++	arm_r_r12_t4_c16,
++	arm_r_r13_t4_c16,
++	arm_r_r14_t4_c16,
++	arm_r_r15_t4_c16,
++	arm_r_r0_t5_c16,
++	arm_r_r1_t5_c16,
++	arm_r_r2_t5_c16,
++	arm_r_r3_t5_c16,
++	arm_r_r4_t5_c16,
++	arm_r_r5_t5_c16,
++	arm_r_r6_t5_c16,
++	arm_r_r7_t5_c16,
++	arm_r_r8_t5_c16,
++	arm_r_r9_t5_c16,
++	arm_r_r10_t5_c16,
++	arm_r_r11_t5_c16,
++	arm_r_r12_t5_c16,
++	arm_r_r13_t5_c16,
++	arm_r_r14_t5_c16,
++	arm_r_r15_t5_c16,
++	arm_r_r0_t6_c16,
++	arm_r_r1_t6_c16,
++	arm_r_r2_t6_c16,
++	arm_r_r3_t6_c16,
++	arm_r_r4_t6_c16,
++	arm_r_r5_t6_c16,
++	arm_r_r6_t6_c16,
++	arm_r_r7_t6_c16,
++	arm_r_r8_t6_c16,
++	arm_r_r9_t6_c16,
++	arm_r_r10_t6_c16,
++	arm_r_r11_t6_c16,
++	arm_r_r12_t6_c16,
++	arm_r_r13_t6_c16,
++	arm_r_r14_t6_c16,
++	arm_r_r15_t6_c16,
++	arm_r_r0_t7_c16,
++	arm_r_r1_t7_c16,
++	arm_r_r2_t7_c16,
++	arm_r_r3_t7_c16,
++	arm_r_r4_t7_c16,
++	arm_r_r5_t7_c16,
++	arm_r_r6_t7_c16,
++	arm_r_r7_t7_c16,
++	arm_r_r8_t7_c16,
++	arm_r_r9_t7_c16,
++	arm_r_r10_t7_c16,
++	arm_r_r11_t7_c16,
++	arm_r_r12_t7_c16,
++	arm_r_r13_t7_c16,
++	arm_r_r14_t7_c16,
++	arm_r_r15_t7_c16,
++	arm_r_r0_t0_c17,
++	arm_r_r1_t0_c17,
++	arm_r_r2_t0_c17,
++	arm_r_r3_t0_c17,
++	arm_r_r4_t0_c17,
++	arm_r_r5_t0_c17,
++	arm_r_r6_t0_c17,
++	arm_r_r7_t0_c17,
++	arm_r_r8_t0_c17,
++	arm_r_r9_t0_c17,
++	arm_r_r10_t0_c17,
++	arm_r_r11_t0_c17,
++	arm_r_r12_t0_c17,
++	arm_r_r13_t0_c17,
++	arm_r_r14_t0_c17,
++	arm_r_r15_t0_c17,
++	arm_r_r0_t1_c17,
++	arm_r_r1_t1_c17,
++	arm_r_r2_t1_c17,
++	arm_r_r3_t1_c17,
++	arm_r_r4_t1_c17,
++	arm_r_r5_t1_c17,
++	arm_r_r6_t1_c17,
++	arm_r_r7_t1_c17,
++	arm_r_r8_t1_c17,
++	arm_r_r9_t1_c17,
++	arm_r_r10_t1_c17,
++	arm_r_r11_t1_c17,
++	arm_r_r12_t1_c17,
++	arm_r_r13_t1_c17,
++	arm_r_r14_t1_c17,
++	arm_r_r15_t1_c17,
++	arm_r_r0_t2_c17,
++	arm_r_r1_t2_c17,
++	arm_r_r2_t2_c17,
++	arm_r_r3_t2_c17,
++	arm_r_r4_t2_c17,
++	arm_r_r5_t2_c17,
++	arm_r_r6_t2_c17,
++	arm_r_r7_t2_c17,
++	arm_r_r8_t2_c17,
++	arm_r_r9_t2_c17,
++	arm_r_r10_t2_c17,
++	arm_r_r11_t2_c17,
++	arm_r_r12_t2_c17,
++	arm_r_r13_t2_c17,
++	arm_r_r14_t2_c17,
++	arm_r_r15_t2_c17,
++	arm_r_r0_t3_c17,
++	arm_r_r1_t3_c17,
++	arm_r_r2_t3_c17,
++	arm_r_r3_t3_c17,
++	arm_r_r4_t3_c17,
++	arm_r_r5_t3_c17,
++	arm_r_r6_t3_c17,
++	arm_r_r7_t3_c17,
++	arm_r_r8_t3_c17,
++	arm_r_r9_t3_c17,
++	arm_r_r10_t3_c17,
++	arm_r_r11_t3_c17,
++	arm_r_r12_t3_c17,
++	arm_r_r13_t3_c17,
++	arm_r_r14_t3_c17,
++	arm_r_r15_t3_c17,
++	arm_r_r0_t4_c17,
++	arm_r_r1_t4_c17,
++	arm_r_r2_t4_c17,
++	arm_r_r3_t4_c17,
++	arm_r_r4_t4_c17,
++	arm_r_r5_t4_c17,
++	arm_r_r6_t4_c17,
++	arm_r_r7_t4_c17,
++	arm_r_r8_t4_c17,
++	arm_r_r9_t4_c17,
++	arm_r_r10_t4_c17,
++	arm_r_r11_t4_c17,
++	arm_r_r12_t4_c17,
++	arm_r_r13_t4_c17,
++	arm_r_r14_t4_c17,
++	arm_r_r15_t4_c17,
++	arm_r_r0_t5_c17,
++	arm_r_r1_t5_c17,
++	arm_r_r2_t5_c17,
++	arm_r_r3_t5_c17,
++	arm_r_r4_t5_c17,
++	arm_r_r5_t5_c17,
++	arm_r_r6_t5_c17,
++	arm_r_r7_t5_c17,
++	arm_r_r8_t5_c17,
++	arm_r_r9_t5_c17,
++	arm_r_r10_t5_c17,
++	arm_r_r11_t5_c17,
++	arm_r_r12_t5_c17,
++	arm_r_r13_t5_c17,
++	arm_r_r14_t5_c17,
++	arm_r_r15_t5_c17,
++	arm_r_r0_t6_c17,
++	arm_r_r1_t6_c17,
++	arm_r_r2_t6_c17,
++	arm_r_r3_t6_c17,
++	arm_r_r4_t6_c17,
++	arm_r_r5_t6_c17,
++	arm_r_r6_t6_c17,
++	arm_r_r7_t6_c17,
++	arm_r_r8_t6_c17,
++	arm_r_r9_t6_c17,
++	arm_r_r10_t6_c17,
++	arm_r_r11_t6_c17,
++	arm_r_r12_t6_c17,
++	arm_r_r13_t6_c17,
++	arm_r_r14_t6_c17,
++	arm_r_r15_t6_c17,
++	arm_r_r0_t7_c17,
++	arm_r_r1_t7_c17,
++	arm_r_r2_t7_c17,
++	arm_r_r3_t7_c17,
++	arm_r_r4_t7_c17,
++	arm_r_r5_t7_c17,
++	arm_r_r6_t7_c17,
++	arm_r_r7_t7_c17,
++	arm_r_r8_t7_c17,
++	arm_r_r9_t7_c17,
++	arm_r_r10_t7_c17,
++	arm_r_r11_t7_c17,
++	arm_r_r12_t7_c17,
++	arm_r_r13_t7_c17,
++	arm_r_r14_t7_c17,
++	arm_r_r15_t7_c17,
++	arm_r_r0_t0_c18,
++	arm_r_r1_t0_c18,
++	arm_r_r2_t0_c18,
++	arm_r_r3_t0_c18,
++	arm_r_r4_t0_c18,
++	arm_r_r5_t0_c18,
++	arm_r_r6_t0_c18,
++	arm_r_r7_t0_c18,
++	arm_r_r8_t0_c18,
++	arm_r_r9_t0_c18,
++	arm_r_r10_t0_c18,
++	arm_r_r11_t0_c18,
++	arm_r_r12_t0_c18,
++	arm_r_r13_t0_c18,
++	arm_r_r14_t0_c18,
++	arm_r_r15_t0_c18,
++	arm_r_r0_t1_c18,
++	arm_r_r1_t1_c18,
++	arm_r_r2_t1_c18,
++	arm_r_r3_t1_c18,
++	arm_r_r4_t1_c18,
++	arm_r_r5_t1_c18,
++	arm_r_r6_t1_c18,
++	arm_r_r7_t1_c18,
++	arm_r_r8_t1_c18,
++	arm_r_r9_t1_c18,
++	arm_r_r10_t1_c18,
++	arm_r_r11_t1_c18,
++	arm_r_r12_t1_c18,
++	arm_r_r13_t1_c18,
++	arm_r_r14_t1_c18,
++	arm_r_r15_t1_c18,
++	arm_r_r0_t2_c18,
++	arm_r_r1_t2_c18,
++	arm_r_r2_t2_c18,
++	arm_r_r3_t2_c18,
++	arm_r_r4_t2_c18,
++	arm_r_r5_t2_c18,
++	arm_r_r6_t2_c18,
++	arm_r_r7_t2_c18,
++	arm_r_r8_t2_c18,
++	arm_r_r9_t2_c18,
++	arm_r_r10_t2_c18,
++	arm_r_r11_t2_c18,
++	arm_r_r12_t2_c18,
++	arm_r_r13_t2_c18,
++	arm_r_r14_t2_c18,
++	arm_r_r15_t2_c18,
++	arm_r_r0_t3_c18,
++	arm_r_r1_t3_c18,
++	arm_r_r2_t3_c18,
++	arm_r_r3_t3_c18,
++	arm_r_r4_t3_c18,
++	arm_r_r5_t3_c18,
++	arm_r_r6_t3_c18,
++	arm_r_r7_t3_c18,
++	arm_r_r8_t3_c18,
++	arm_r_r9_t3_c18,
++	arm_r_r10_t3_c18,
++	arm_r_r11_t3_c18,
++	arm_r_r12_t3_c18,
++	arm_r_r13_t3_c18,
++	arm_r_r14_t3_c18,
++	arm_r_r15_t3_c18,
++	arm_r_r0_t4_c18,
++	arm_r_r1_t4_c18,
++	arm_r_r2_t4_c18,
++	arm_r_r3_t4_c18,
++	arm_r_r4_t4_c18,
++	arm_r_r5_t4_c18,
++	arm_r_r6_t4_c18,
++	arm_r_r7_t4_c18,
++	arm_r_r8_t4_c18,
++	arm_r_r9_t4_c18,
++	arm_r_r10_t4_c18,
++	arm_r_r11_t4_c18,
++	arm_r_r12_t4_c18,
++	arm_r_r13_t4_c18,
++	arm_r_r14_t4_c18,
++	arm_r_r15_t4_c18,
++	arm_r_r0_t5_c18,
++	arm_r_r1_t5_c18,
++	arm_r_r2_t5_c18,
++	arm_r_r3_t5_c18,
++	arm_r_r4_t5_c18,
++	arm_r_r5_t5_c18,
++	arm_r_r6_t5_c18,
++	arm_r_r7_t5_c18,
++	arm_r_r8_t5_c18,
++	arm_r_r9_t5_c18,
++	arm_r_r10_t5_c18,
++	arm_r_r11_t5_c18,
++	arm_r_r12_t5_c18,
++	arm_r_r13_t5_c18,
++	arm_r_r14_t5_c18,
++	arm_r_r15_t5_c18,
++	arm_r_r0_t6_c18,
++	arm_r_r1_t6_c18,
++	arm_r_r2_t6_c18,
++	arm_r_r3_t6_c18,
++	arm_r_r4_t6_c18,
++	arm_r_r5_t6_c18,
++	arm_r_r6_t6_c18,
++	arm_r_r7_t6_c18,
++	arm_r_r8_t6_c18,
++	arm_r_r9_t6_c18,
++	arm_r_r10_t6_c18,
++	arm_r_r11_t6_c18,
++	arm_r_r12_t6_c18,
++	arm_r_r13_t6_c18,
++	arm_r_r14_t6_c18,
++	arm_r_r15_t6_c18,
++	arm_r_r0_t7_c18,
++	arm_r_r1_t7_c18,
++	arm_r_r2_t7_c18,
++	arm_r_r3_t7_c18,
++	arm_r_r4_t7_c18,
++	arm_r_r5_t7_c18,
++	arm_r_r6_t7_c18,
++	arm_r_r7_t7_c18,
++	arm_r_r8_t7_c18,
++	arm_r_r9_t7_c18,
++	arm_r_r10_t7_c18,
++	arm_r_r11_t7_c18,
++	arm_r_r12_t7_c18,
++	arm_r_r13_t7_c18,
++	arm_r_r14_t7_c18,
++	arm_r_r15_t7_c18,
++	arm_r_r0_t0_c19,
++	arm_r_r1_t0_c19,
++	arm_r_r2_t0_c19,
++	arm_r_r3_t0_c19,
++	arm_r_r4_t0_c19,
++	arm_r_r5_t0_c19,
++	arm_r_r6_t0_c19,
++	arm_r_r7_t0_c19,
++	arm_r_r8_t0_c19,
++	arm_r_r9_t0_c19,
++	arm_r_r10_t0_c19,
++	arm_r_r11_t0_c19,
++	arm_r_r12_t0_c19,
++	arm_r_r13_t0_c19,
++	arm_r_r14_t0_c19,
++	arm_r_r15_t0_c19,
++	arm_r_r0_t1_c19,
++	arm_r_r1_t1_c19,
++	arm_r_r2_t1_c19,
++	arm_r_r3_t1_c19,
++	arm_r_r4_t1_c19,
++	arm_r_r5_t1_c19,
++	arm_r_r6_t1_c19,
++	arm_r_r7_t1_c19,
++	arm_r_r8_t1_c19,
++	arm_r_r9_t1_c19,
++	arm_r_r10_t1_c19,
++	arm_r_r11_t1_c19,
++	arm_r_r12_t1_c19,
++	arm_r_r13_t1_c19,
++	arm_r_r14_t1_c19,
++	arm_r_r15_t1_c19,
++	arm_r_r0_t2_c19,
++	arm_r_r1_t2_c19,
++	arm_r_r2_t2_c19,
++	arm_r_r3_t2_c19,
++	arm_r_r4_t2_c19,
++	arm_r_r5_t2_c19,
++	arm_r_r6_t2_c19,
++	arm_r_r7_t2_c19,
++	arm_r_r8_t2_c19,
++	arm_r_r9_t2_c19,
++	arm_r_r10_t2_c19,
++	arm_r_r11_t2_c19,
++	arm_r_r12_t2_c19,
++	arm_r_r13_t2_c19,
++	arm_r_r14_t2_c19,
++	arm_r_r15_t2_c19,
++	arm_r_r0_t3_c19,
++	arm_r_r1_t3_c19,
++	arm_r_r2_t3_c19,
++	arm_r_r3_t3_c19,
++	arm_r_r4_t3_c19,
++	arm_r_r5_t3_c19,
++	arm_r_r6_t3_c19,
++	arm_r_r7_t3_c19,
++	arm_r_r8_t3_c19,
++	arm_r_r9_t3_c19,
++	arm_r_r10_t3_c19,
++	arm_r_r11_t3_c19,
++	arm_r_r12_t3_c19,
++	arm_r_r13_t3_c19,
++	arm_r_r14_t3_c19,
++	arm_r_r15_t3_c19,
++	arm_r_r0_t4_c19,
++	arm_r_r1_t4_c19,
++	arm_r_r2_t4_c19,
++	arm_r_r3_t4_c19,
++	arm_r_r4_t4_c19,
++	arm_r_r5_t4_c19,
++	arm_r_r6_t4_c19,
++	arm_r_r7_t4_c19,
++	arm_r_r8_t4_c19,
++	arm_r_r9_t4_c19,
++	arm_r_r10_t4_c19,
++	arm_r_r11_t4_c19,
++	arm_r_r12_t4_c19,
++	arm_r_r13_t4_c19,
++	arm_r_r14_t4_c19,
++	arm_r_r15_t4_c19,
++	arm_r_r0_t5_c19,
++	arm_r_r1_t5_c19,
++	arm_r_r2_t5_c19,
++	arm_r_r3_t5_c19,
++	arm_r_r4_t5_c19,
++	arm_r_r5_t5_c19,
++	arm_r_r6_t5_c19,
++	arm_r_r7_t5_c19,
++	arm_r_r8_t5_c19,
++	arm_r_r9_t5_c19,
++	arm_r_r10_t5_c19,
++	arm_r_r11_t5_c19,
++	arm_r_r12_t5_c19,
++	arm_r_r13_t5_c19,
++	arm_r_r14_t5_c19,
++	arm_r_r15_t5_c19,
++	arm_r_r0_t6_c19,
++	arm_r_r1_t6_c19,
++	arm_r_r2_t6_c19,
++	arm_r_r3_t6_c19,
++	arm_r_r4_t6_c19,
++	arm_r_r5_t6_c19,
++	arm_r_r6_t6_c19,
++	arm_r_r7_t6_c19,
++	arm_r_r8_t6_c19,
++	arm_r_r9_t6_c19,
++	arm_r_r10_t6_c19,
++	arm_r_r11_t6_c19,
++	arm_r_r12_t6_c19,
++	arm_r_r13_t6_c19,
++	arm_r_r14_t6_c19,
++	arm_r_r15_t6_c19,
++	arm_r_r0_t7_c19,
++	arm_r_r1_t7_c19,
++	arm_r_r2_t7_c19,
++	arm_r_r3_t7_c19,
++	arm_r_r4_t7_c19,
++	arm_r_r5_t7_c19,
++	arm_r_r6_t7_c19,
++	arm_r_r7_t7_c19,
++	arm_r_r8_t7_c19,
++	arm_r_r9_t7_c19,
++	arm_r_r10_t7_c19,
++	arm_r_r11_t7_c19,
++	arm_r_r12_t7_c19,
++	arm_r_r13_t7_c19,
++	arm_r_r14_t7_c19,
++	arm_r_r15_t7_c19,
++	arm_r_r0_t0_c20,
++	arm_r_r1_t0_c20,
++	arm_r_r2_t0_c20,
++	arm_r_r3_t0_c20,
++	arm_r_r4_t0_c20,
++	arm_r_r5_t0_c20,
++	arm_r_r6_t0_c20,
++	arm_r_r7_t0_c20,
++	arm_r_r8_t0_c20,
++	arm_r_r9_t0_c20,
++	arm_r_r10_t0_c20,
++	arm_r_r11_t0_c20,
++	arm_r_r12_t0_c20,
++	arm_r_r13_t0_c20,
++	arm_r_r14_t0_c20,
++	arm_r_r15_t0_c20,
++	arm_r_r0_t1_c20,
++	arm_r_r1_t1_c20,
++	arm_r_r2_t1_c20,
++	arm_r_r3_t1_c20,
++	arm_r_r4_t1_c20,
++	arm_r_r5_t1_c20,
++	arm_r_r6_t1_c20,
++	arm_r_r7_t1_c20,
++	arm_r_r8_t1_c20,
++	arm_r_r9_t1_c20,
++	arm_r_r10_t1_c20,
++	arm_r_r11_t1_c20,
++	arm_r_r12_t1_c20,
++	arm_r_r13_t1_c20,
++	arm_r_r14_t1_c20,
++	arm_r_r15_t1_c20,
++	arm_r_r0_t2_c20,
++	arm_r_r1_t2_c20,
++	arm_r_r2_t2_c20,
++	arm_r_r3_t2_c20,
++	arm_r_r4_t2_c20,
++	arm_r_r5_t2_c20,
++	arm_r_r6_t2_c20,
++	arm_r_r7_t2_c20,
++	arm_r_r8_t2_c20,
++	arm_r_r9_t2_c20,
++	arm_r_r10_t2_c20,
++	arm_r_r11_t2_c20,
++	arm_r_r12_t2_c20,
++	arm_r_r13_t2_c20,
++	arm_r_r14_t2_c20,
++	arm_r_r15_t2_c20,
++	arm_r_r0_t3_c20,
++	arm_r_r1_t3_c20,
++	arm_r_r2_t3_c20,
++	arm_r_r3_t3_c20,
++	arm_r_r4_t3_c20,
++	arm_r_r5_t3_c20,
++	arm_r_r6_t3_c20,
++	arm_r_r7_t3_c20,
++	arm_r_r8_t3_c20,
++	arm_r_r9_t3_c20,
++	arm_r_r10_t3_c20,
++	arm_r_r11_t3_c20,
++	arm_r_r12_t3_c20,
++	arm_r_r13_t3_c20,
++	arm_r_r14_t3_c20,
++	arm_r_r15_t3_c20,
++	arm_r_r0_t4_c20,
++	arm_r_r1_t4_c20,
++	arm_r_r2_t4_c20,
++	arm_r_r3_t4_c20,
++	arm_r_r4_t4_c20,
++	arm_r_r5_t4_c20,
++	arm_r_r6_t4_c20,
++	arm_r_r7_t4_c20,
++	arm_r_r8_t4_c20,
++	arm_r_r9_t4_c20,
++	arm_r_r10_t4_c20,
++	arm_r_r11_t4_c20,
++	arm_r_r12_t4_c20,
++	arm_r_r13_t4_c20,
++	arm_r_r14_t4_c20,
++	arm_r_r15_t4_c20,
++	arm_r_r0_t5_c20,
++	arm_r_r1_t5_c20,
++	arm_r_r2_t5_c20,
++	arm_r_r3_t5_c20,
++	arm_r_r4_t5_c20,
++	arm_r_r5_t5_c20,
++	arm_r_r6_t5_c20,
++	arm_r_r7_t5_c20,
++	arm_r_r8_t5_c20,
++	arm_r_r9_t5_c20,
++	arm_r_r10_t5_c20,
++	arm_r_r11_t5_c20,
++	arm_r_r12_t5_c20,
++	arm_r_r13_t5_c20,
++	arm_r_r14_t5_c20,
++	arm_r_r15_t5_c20,
++	arm_r_r0_t6_c20,
++	arm_r_r1_t6_c20,
++	arm_r_r2_t6_c20,
++	arm_r_r3_t6_c20,
++	arm_r_r4_t6_c20,
++	arm_r_r5_t6_c20,
++	arm_r_r6_t6_c20,
++	arm_r_r7_t6_c20,
++	arm_r_r8_t6_c20,
++	arm_r_r9_t6_c20,
++	arm_r_r10_t6_c20,
++	arm_r_r11_t6_c20,
++	arm_r_r12_t6_c20,
++	arm_r_r13_t6_c20,
++	arm_r_r14_t6_c20,
++	arm_r_r15_t6_c20,
++	arm_r_r0_t7_c20,
++	arm_r_r1_t7_c20,
++	arm_r_r2_t7_c20,
++	arm_r_r3_t7_c20,
++	arm_r_r4_t7_c20,
++	arm_r_r5_t7_c20,
++	arm_r_r6_t7_c20,
++	arm_r_r7_t7_c20,
++	arm_r_r8_t7_c20,
++	arm_r_r9_t7_c20,
++	arm_r_r10_t7_c20,
++	arm_r_r11_t7_c20,
++	arm_r_r12_t7_c20,
++	arm_r_r13_t7_c20,
++	arm_r_r14_t7_c20,
++	arm_r_r15_t7_c20,
++	arm_r_r0_t0_c21,
++	arm_r_r1_t0_c21,
++	arm_r_r2_t0_c21,
++	arm_r_r3_t0_c21,
++	arm_r_r4_t0_c21,
++	arm_r_r5_t0_c21,
++	arm_r_r6_t0_c21,
++	arm_r_r7_t0_c21,
++	arm_r_r8_t0_c21,
++	arm_r_r9_t0_c21,
++	arm_r_r10_t0_c21,
++	arm_r_r11_t0_c21,
++	arm_r_r12_t0_c21,
++	arm_r_r13_t0_c21,
++	arm_r_r14_t0_c21,
++	arm_r_r15_t0_c21,
++	arm_r_r0_t1_c21,
++	arm_r_r1_t1_c21,
++	arm_r_r2_t1_c21,
++	arm_r_r3_t1_c21,
++	arm_r_r4_t1_c21,
++	arm_r_r5_t1_c21,
++	arm_r_r6_t1_c21,
++	arm_r_r7_t1_c21,
++	arm_r_r8_t1_c21,
++	arm_r_r9_t1_c21,
++	arm_r_r10_t1_c21,
++	arm_r_r11_t1_c21,
++	arm_r_r12_t1_c21,
++	arm_r_r13_t1_c21,
++	arm_r_r14_t1_c21,
++	arm_r_r15_t1_c21,
++	arm_r_r0_t2_c21,
++	arm_r_r1_t2_c21,
++	arm_r_r2_t2_c21,
++	arm_r_r3_t2_c21,
++	arm_r_r4_t2_c21,
++	arm_r_r5_t2_c21,
++	arm_r_r6_t2_c21,
++	arm_r_r7_t2_c21,
++	arm_r_r8_t2_c21,
++	arm_r_r9_t2_c21,
++	arm_r_r10_t2_c21,
++	arm_r_r11_t2_c21,
++	arm_r_r12_t2_c21,
++	arm_r_r13_t2_c21,
++	arm_r_r14_t2_c21,
++	arm_r_r15_t2_c21,
++	arm_r_r0_t3_c21,
++	arm_r_r1_t3_c21,
++	arm_r_r2_t3_c21,
++	arm_r_r3_t3_c21,
++	arm_r_r4_t3_c21,
++	arm_r_r5_t3_c21,
++	arm_r_r6_t3_c21,
++	arm_r_r7_t3_c21,
++	arm_r_r8_t3_c21,
++	arm_r_r9_t3_c21,
++	arm_r_r10_t3_c21,
++	arm_r_r11_t3_c21,
++	arm_r_r12_t3_c21,
++	arm_r_r13_t3_c21,
++	arm_r_r14_t3_c21,
++	arm_r_r15_t3_c21,
++	arm_r_r0_t4_c21,
++	arm_r_r1_t4_c21,
++	arm_r_r2_t4_c21,
++	arm_r_r3_t4_c21,
++	arm_r_r4_t4_c21,
++	arm_r_r5_t4_c21,
++	arm_r_r6_t4_c21,
++	arm_r_r7_t4_c21,
++	arm_r_r8_t4_c21,
++	arm_r_r9_t4_c21,
++	arm_r_r10_t4_c21,
++	arm_r_r11_t4_c21,
++	arm_r_r12_t4_c21,
++	arm_r_r13_t4_c21,
++	arm_r_r14_t4_c21,
++	arm_r_r15_t4_c21,
++	arm_r_r0_t5_c21,
++	arm_r_r1_t5_c21,
++	arm_r_r2_t5_c21,
++	arm_r_r3_t5_c21,
++	arm_r_r4_t5_c21,
++	arm_r_r5_t5_c21,
++	arm_r_r6_t5_c21,
++	arm_r_r7_t5_c21,
++	arm_r_r8_t5_c21,
++	arm_r_r9_t5_c21,
++	arm_r_r10_t5_c21,
++	arm_r_r11_t5_c21,
++	arm_r_r12_t5_c21,
++	arm_r_r13_t5_c21,
++	arm_r_r14_t5_c21,
++	arm_r_r15_t5_c21,
++	arm_r_r0_t6_c21,
++	arm_r_r1_t6_c21,
++	arm_r_r2_t6_c21,
++	arm_r_r3_t6_c21,
++	arm_r_r4_t6_c21,
++	arm_r_r5_t6_c21,
++	arm_r_r6_t6_c21,
++	arm_r_r7_t6_c21,
++	arm_r_r8_t6_c21,
++	arm_r_r9_t6_c21,
++	arm_r_r10_t6_c21,
++	arm_r_r11_t6_c21,
++	arm_r_r12_t6_c21,
++	arm_r_r13_t6_c21,
++	arm_r_r14_t6_c21,
++	arm_r_r15_t6_c21,
++	arm_r_r0_t7_c21,
++	arm_r_r1_t7_c21,
++	arm_r_r2_t7_c21,
++	arm_r_r3_t7_c21,
++	arm_r_r4_t7_c21,
++	arm_r_r5_t7_c21,
++	arm_r_r6_t7_c21,
++	arm_r_r7_t7_c21,
++	arm_r_r8_t7_c21,
++	arm_r_r9_t7_c21,
++	arm_r_r10_t7_c21,
++	arm_r_r11_t7_c21,
++	arm_r_r12_t7_c21,
++	arm_r_r13_t7_c21,
++	arm_r_r14_t7_c21,
++	arm_r_r15_t7_c21,
++	arm_r_r0_t0_c22,
++	arm_r_r1_t0_c22,
++	arm_r_r2_t0_c22,
++	arm_r_r3_t0_c22,
++	arm_r_r4_t0_c22,
++	arm_r_r5_t0_c22,
++	arm_r_r6_t0_c22,
++	arm_r_r7_t0_c22,
++	arm_r_r8_t0_c22,
++	arm_r_r9_t0_c22,
++	arm_r_r10_t0_c22,
++	arm_r_r11_t0_c22,
++	arm_r_r12_t0_c22,
++	arm_r_r13_t0_c22,
++	arm_r_r14_t0_c22,
++	arm_r_r15_t0_c22,
++	arm_r_r0_t1_c22,
++	arm_r_r1_t1_c22,
++	arm_r_r2_t1_c22,
++	arm_r_r3_t1_c22,
++	arm_r_r4_t1_c22,
++	arm_r_r5_t1_c22,
++	arm_r_r6_t1_c22,
++	arm_r_r7_t1_c22,
++	arm_r_r8_t1_c22,
++	arm_r_r9_t1_c22,
++	arm_r_r10_t1_c22,
++	arm_r_r11_t1_c22,
++	arm_r_r12_t1_c22,
++	arm_r_r13_t1_c22,
++	arm_r_r14_t1_c22,
++	arm_r_r15_t1_c22,
++	arm_r_r0_t2_c22,
++	arm_r_r1_t2_c22,
++	arm_r_r2_t2_c22,
++	arm_r_r3_t2_c22,
++	arm_r_r4_t2_c22,
++	arm_r_r5_t2_c22,
++	arm_r_r6_t2_c22,
++	arm_r_r7_t2_c22,
++	arm_r_r8_t2_c22,
++	arm_r_r9_t2_c22,
++	arm_r_r10_t2_c22,
++	arm_r_r11_t2_c22,
++	arm_r_r12_t2_c22,
++	arm_r_r13_t2_c22,
++	arm_r_r14_t2_c22,
++	arm_r_r15_t2_c22,
++	arm_r_r0_t3_c22,
++	arm_r_r1_t3_c22,
++	arm_r_r2_t3_c22,
++	arm_r_r3_t3_c22,
++	arm_r_r4_t3_c22,
++	arm_r_r5_t3_c22,
++	arm_r_r6_t3_c22,
++	arm_r_r7_t3_c22,
++	arm_r_r8_t3_c22,
++	arm_r_r9_t3_c22,
++	arm_r_r10_t3_c22,
++	arm_r_r11_t3_c22,
++	arm_r_r12_t3_c22,
++	arm_r_r13_t3_c22,
++	arm_r_r14_t3_c22,
++	arm_r_r15_t3_c22,
++	arm_r_r0_t4_c22,
++	arm_r_r1_t4_c22,
++	arm_r_r2_t4_c22,
++	arm_r_r3_t4_c22,
++	arm_r_r4_t4_c22,
++	arm_r_r5_t4_c22,
++	arm_r_r6_t4_c22,
++	arm_r_r7_t4_c22,
++	arm_r_r8_t4_c22,
++	arm_r_r9_t4_c22,
++	arm_r_r10_t4_c22,
++	arm_r_r11_t4_c22,
++	arm_r_r12_t4_c22,
++	arm_r_r13_t4_c22,
++	arm_r_r14_t4_c22,
++	arm_r_r15_t4_c22,
++	arm_r_r0_t5_c22,
++	arm_r_r1_t5_c22,
++	arm_r_r2_t5_c22,
++	arm_r_r3_t5_c22,
++	arm_r_r4_t5_c22,
++	arm_r_r5_t5_c22,
++	arm_r_r6_t5_c22,
++	arm_r_r7_t5_c22,
++	arm_r_r8_t5_c22,
++	arm_r_r9_t5_c22,
++	arm_r_r10_t5_c22,
++	arm_r_r11_t5_c22,
++	arm_r_r12_t5_c22,
++	arm_r_r13_t5_c22,
++	arm_r_r14_t5_c22,
++	arm_r_r15_t5_c22,
++	arm_r_r0_t6_c22,
++	arm_r_r1_t6_c22,
++	arm_r_r2_t6_c22,
++	arm_r_r3_t6_c22,
++	arm_r_r4_t6_c22,
++	arm_r_r5_t6_c22,
++	arm_r_r6_t6_c22,
++	arm_r_r7_t6_c22,
++	arm_r_r8_t6_c22,
++	arm_r_r9_t6_c22,
++	arm_r_r10_t6_c22,
++	arm_r_r11_t6_c22,
++	arm_r_r12_t6_c22,
++	arm_r_r13_t6_c22,
++	arm_r_r14_t6_c22,
++	arm_r_r15_t6_c22,
++	arm_r_r0_t7_c22,
++	arm_r_r1_t7_c22,
++	arm_r_r2_t7_c22,
++	arm_r_r3_t7_c22,
++	arm_r_r4_t7_c22,
++	arm_r_r5_t7_c22,
++	arm_r_r6_t7_c22,
++	arm_r_r7_t7_c22,
++	arm_r_r8_t7_c22,
++	arm_r_r9_t7_c22,
++	arm_r_r10_t7_c22,
++	arm_r_r11_t7_c22,
++	arm_r_r12_t7_c22,
++	arm_r_r13_t7_c22,
++	arm_r_r14_t7_c22,
++	arm_r_r15_t7_c22,
++	arm_r_r0_t0_c23,
++	arm_r_r1_t0_c23,
++	arm_r_r2_t0_c23,
++	arm_r_r3_t0_c23,
++	arm_r_r4_t0_c23,
++	arm_r_r5_t0_c23,
++	arm_r_r6_t0_c23,
++	arm_r_r7_t0_c23,
++	arm_r_r8_t0_c23,
++	arm_r_r9_t0_c23,
++	arm_r_r10_t0_c23,
++	arm_r_r11_t0_c23,
++	arm_r_r12_t0_c23,
++	arm_r_r13_t0_c23,
++	arm_r_r14_t0_c23,
++	arm_r_r15_t0_c23,
++	arm_r_r0_t1_c23,
++	arm_r_r1_t1_c23,
++	arm_r_r2_t1_c23,
++	arm_r_r3_t1_c23,
++	arm_r_r4_t1_c23,
++	arm_r_r5_t1_c23,
++	arm_r_r6_t1_c23,
++	arm_r_r7_t1_c23,
++	arm_r_r8_t1_c23,
++	arm_r_r9_t1_c23,
++	arm_r_r10_t1_c23,
++	arm_r_r11_t1_c23,
++	arm_r_r12_t1_c23,
++	arm_r_r13_t1_c23,
++	arm_r_r14_t1_c23,
++	arm_r_r15_t1_c23,
++	arm_r_r0_t2_c23,
++	arm_r_r1_t2_c23,
++	arm_r_r2_t2_c23,
++	arm_r_r3_t2_c23,
++	arm_r_r4_t2_c23,
++	arm_r_r5_t2_c23,
++	arm_r_r6_t2_c23,
++	arm_r_r7_t2_c23,
++	arm_r_r8_t2_c23,
++	arm_r_r9_t2_c23,
++	arm_r_r10_t2_c23,
++	arm_r_r11_t2_c23,
++	arm_r_r12_t2_c23,
++	arm_r_r13_t2_c23,
++	arm_r_r14_t2_c23,
++	arm_r_r15_t2_c23,
++	arm_r_r0_t3_c23,
++	arm_r_r1_t3_c23,
++	arm_r_r2_t3_c23,
++	arm_r_r3_t3_c23,
++	arm_r_r4_t3_c23,
++	arm_r_r5_t3_c23,
++	arm_r_r6_t3_c23,
++	arm_r_r7_t3_c23,
++	arm_r_r8_t3_c23,
++	arm_r_r9_t3_c23,
++	arm_r_r10_t3_c23,
++	arm_r_r11_t3_c23,
++	arm_r_r12_t3_c23,
++	arm_r_r13_t3_c23,
++	arm_r_r14_t3_c23,
++	arm_r_r15_t3_c23,
++	arm_r_r0_t4_c23,
++	arm_r_r1_t4_c23,
++	arm_r_r2_t4_c23,
++	arm_r_r3_t4_c23,
++	arm_r_r4_t4_c23,
++	arm_r_r5_t4_c23,
++	arm_r_r6_t4_c23,
++	arm_r_r7_t4_c23,
++	arm_r_r8_t4_c23,
++	arm_r_r9_t4_c23,
++	arm_r_r10_t4_c23,
++	arm_r_r11_t4_c23,
++	arm_r_r12_t4_c23,
++	arm_r_r13_t4_c23,
++	arm_r_r14_t4_c23,
++	arm_r_r15_t4_c23,
++	arm_r_r0_t5_c23,
++	arm_r_r1_t5_c23,
++	arm_r_r2_t5_c23,
++	arm_r_r3_t5_c23,
++	arm_r_r4_t5_c23,
++	arm_r_r5_t5_c23,
++	arm_r_r6_t5_c23,
++	arm_r_r7_t5_c23,
++	arm_r_r8_t5_c23,
++	arm_r_r9_t5_c23,
++	arm_r_r10_t5_c23,
++	arm_r_r11_t5_c23,
++	arm_r_r12_t5_c23,
++	arm_r_r13_t5_c23,
++	arm_r_r14_t5_c23,
++	arm_r_r15_t5_c23,
++	arm_r_r0_t6_c23,
++	arm_r_r1_t6_c23,
++	arm_r_r2_t6_c23,
++	arm_r_r3_t6_c23,
++	arm_r_r4_t6_c23,
++	arm_r_r5_t6_c23,
++	arm_r_r6_t6_c23,
++	arm_r_r7_t6_c23,
++	arm_r_r8_t6_c23,
++	arm_r_r9_t6_c23,
++	arm_r_r10_t6_c23,
++	arm_r_r11_t6_c23,
++	arm_r_r12_t6_c23,
++	arm_r_r13_t6_c23,
++	arm_r_r14_t6_c23,
++	arm_r_r15_t6_c23,
++	arm_r_r0_t7_c23,
++	arm_r_r1_t7_c23,
++	arm_r_r2_t7_c23,
++	arm_r_r3_t7_c23,
++	arm_r_r4_t7_c23,
++	arm_r_r5_t7_c23,
++	arm_r_r6_t7_c23,
++	arm_r_r7_t7_c23,
++	arm_r_r8_t7_c23,
++	arm_r_r9_t7_c23,
++	arm_r_r10_t7_c23,
++	arm_r_r11_t7_c23,
++	arm_r_r12_t7_c23,
++	arm_r_r13_t7_c23,
++	arm_r_r14_t7_c23,
++	arm_r_r15_t7_c23,
++	arm_r_r0_t0_c24,
++	arm_r_r1_t0_c24,
++	arm_r_r2_t0_c24,
++	arm_r_r3_t0_c24,
++	arm_r_r4_t0_c24,
++	arm_r_r5_t0_c24,
++	arm_r_r6_t0_c24,
++	arm_r_r7_t0_c24,
++	arm_r_r8_t0_c24,
++	arm_r_r9_t0_c24,
++	arm_r_r10_t0_c24,
++	arm_r_r11_t0_c24,
++	arm_r_r12_t0_c24,
++	arm_r_r13_t0_c24,
++	arm_r_r14_t0_c24,
++	arm_r_r15_t0_c24,
++	arm_r_r0_t1_c24,
++	arm_r_r1_t1_c24,
++	arm_r_r2_t1_c24,
++	arm_r_r3_t1_c24,
++	arm_r_r4_t1_c24,
++	arm_r_r5_t1_c24,
++	arm_r_r6_t1_c24,
++	arm_r_r7_t1_c24,
++	arm_r_r8_t1_c24,
++	arm_r_r9_t1_c24,
++	arm_r_r10_t1_c24,
++	arm_r_r11_t1_c24,
++	arm_r_r12_t1_c24,
++	arm_r_r13_t1_c24,
++	arm_r_r14_t1_c24,
++	arm_r_r15_t1_c24,
++	arm_r_r0_t2_c24,
++	arm_r_r1_t2_c24,
++	arm_r_r2_t2_c24,
++	arm_r_r3_t2_c24,
++	arm_r_r4_t2_c24,
++	arm_r_r5_t2_c24,
++	arm_r_r6_t2_c24,
++	arm_r_r7_t2_c24,
++	arm_r_r8_t2_c24,
++	arm_r_r9_t2_c24,
++	arm_r_r10_t2_c24,
++	arm_r_r11_t2_c24,
++	arm_r_r12_t2_c24,
++	arm_r_r13_t2_c24,
++	arm_r_r14_t2_c24,
++	arm_r_r15_t2_c24,
++	arm_r_r0_t3_c24,
++	arm_r_r1_t3_c24,
++	arm_r_r2_t3_c24,
++	arm_r_r3_t3_c24,
++	arm_r_r4_t3_c24,
++	arm_r_r5_t3_c24,
++	arm_r_r6_t3_c24,
++	arm_r_r7_t3_c24,
++	arm_r_r8_t3_c24,
++	arm_r_r9_t3_c24,
++	arm_r_r10_t3_c24,
++	arm_r_r11_t3_c24,
++	arm_r_r12_t3_c24,
++	arm_r_r13_t3_c24,
++	arm_r_r14_t3_c24,
++	arm_r_r15_t3_c24,
++	arm_r_r0_t4_c24,
++	arm_r_r1_t4_c24,
++	arm_r_r2_t4_c24,
++	arm_r_r3_t4_c24,
++	arm_r_r4_t4_c24,
++	arm_r_r5_t4_c24,
++	arm_r_r6_t4_c24,
++	arm_r_r7_t4_c24,
++	arm_r_r8_t4_c24,
++	arm_r_r9_t4_c24,
++	arm_r_r10_t4_c24,
++	arm_r_r11_t4_c24,
++	arm_r_r12_t4_c24,
++	arm_r_r13_t4_c24,
++	arm_r_r14_t4_c24,
++	arm_r_r15_t4_c24,
++	arm_r_r0_t5_c24,
++	arm_r_r1_t5_c24,
++	arm_r_r2_t5_c24,
++	arm_r_r3_t5_c24,
++	arm_r_r4_t5_c24,
++	arm_r_r5_t5_c24,
++	arm_r_r6_t5_c24,
++	arm_r_r7_t5_c24,
++	arm_r_r8_t5_c24,
++	arm_r_r9_t5_c24,
++	arm_r_r10_t5_c24,
++	arm_r_r11_t5_c24,
++	arm_r_r12_t5_c24,
++	arm_r_r13_t5_c24,
++	arm_r_r14_t5_c24,
++	arm_r_r15_t5_c24,
++	arm_r_r0_t6_c24,
++	arm_r_r1_t6_c24,
++	arm_r_r2_t6_c24,
++	arm_r_r3_t6_c24,
++	arm_r_r4_t6_c24,
++	arm_r_r5_t6_c24,
++	arm_r_r6_t6_c24,
++	arm_r_r7_t6_c24,
++	arm_r_r8_t6_c24,
++	arm_r_r9_t6_c24,
++	arm_r_r10_t6_c24,
++	arm_r_r11_t6_c24,
++	arm_r_r12_t6_c24,
++	arm_r_r13_t6_c24,
++	arm_r_r14_t6_c24,
++	arm_r_r15_t6_c24,
++	arm_r_r0_t7_c24,
++	arm_r_r1_t7_c24,
++	arm_r_r2_t7_c24,
++	arm_r_r3_t7_c24,
++	arm_r_r4_t7_c24,
++	arm_r_r5_t7_c24,
++	arm_r_r6_t7_c24,
++	arm_r_r7_t7_c24,
++	arm_r_r8_t7_c24,
++	arm_r_r9_t7_c24,
++	arm_r_r10_t7_c24,
++	arm_r_r11_t7_c24,
++	arm_r_r12_t7_c24,
++	arm_r_r13_t7_c24,
++	arm_r_r14_t7_c24,
++	arm_r_r15_t7_c24,
++	arm_r_r0_t0_c25,
++	arm_r_r1_t0_c25,
++	arm_r_r2_t0_c25,
++	arm_r_r3_t0_c25,
++	arm_r_r4_t0_c25,
++	arm_r_r5_t0_c25,
++	arm_r_r6_t0_c25,
++	arm_r_r7_t0_c25,
++	arm_r_r8_t0_c25,
++	arm_r_r9_t0_c25,
++	arm_r_r10_t0_c25,
++	arm_r_r11_t0_c25,
++	arm_r_r12_t0_c25,
++	arm_r_r13_t0_c25,
++	arm_r_r14_t0_c25,
++	arm_r_r15_t0_c25,
++	arm_r_r0_t1_c25,
++	arm_r_r1_t1_c25,
++	arm_r_r2_t1_c25,
++	arm_r_r3_t1_c25,
++	arm_r_r4_t1_c25,
++	arm_r_r5_t1_c25,
++	arm_r_r6_t1_c25,
++	arm_r_r7_t1_c25,
++	arm_r_r8_t1_c25,
++	arm_r_r9_t1_c25,
++	arm_r_r10_t1_c25,
++	arm_r_r11_t1_c25,
++	arm_r_r12_t1_c25,
++	arm_r_r13_t1_c25,
++	arm_r_r14_t1_c25,
++	arm_r_r15_t1_c25,
++	arm_r_r0_t2_c25,
++	arm_r_r1_t2_c25,
++	arm_r_r2_t2_c25,
++	arm_r_r3_t2_c25,
++	arm_r_r4_t2_c25,
++	arm_r_r5_t2_c25,
++	arm_r_r6_t2_c25,
++	arm_r_r7_t2_c25,
++	arm_r_r8_t2_c25,
++	arm_r_r9_t2_c25,
++	arm_r_r10_t2_c25,
++	arm_r_r11_t2_c25,
++	arm_r_r12_t2_c25,
++	arm_r_r13_t2_c25,
++	arm_r_r14_t2_c25,
++	arm_r_r15_t2_c25,
++	arm_r_r0_t3_c25,
++	arm_r_r1_t3_c25,
++	arm_r_r2_t3_c25,
++	arm_r_r3_t3_c25,
++	arm_r_r4_t3_c25,
++	arm_r_r5_t3_c25,
++	arm_r_r6_t3_c25,
++	arm_r_r7_t3_c25,
++	arm_r_r8_t3_c25,
++	arm_r_r9_t3_c25,
++	arm_r_r10_t3_c25,
++	arm_r_r11_t3_c25,
++	arm_r_r12_t3_c25,
++	arm_r_r13_t3_c25,
++	arm_r_r14_t3_c25,
++	arm_r_r15_t3_c25,
++	arm_r_r0_t4_c25,
++	arm_r_r1_t4_c25,
++	arm_r_r2_t4_c25,
++	arm_r_r3_t4_c25,
++	arm_r_r4_t4_c25,
++	arm_r_r5_t4_c25,
++	arm_r_r6_t4_c25,
++	arm_r_r7_t4_c25,
++	arm_r_r8_t4_c25,
++	arm_r_r9_t4_c25,
++	arm_r_r10_t4_c25,
++	arm_r_r11_t4_c25,
++	arm_r_r12_t4_c25,
++	arm_r_r13_t4_c25,
++	arm_r_r14_t4_c25,
++	arm_r_r15_t4_c25,
++	arm_r_r0_t5_c25,
++	arm_r_r1_t5_c25,
++	arm_r_r2_t5_c25,
++	arm_r_r3_t5_c25,
++	arm_r_r4_t5_c25,
++	arm_r_r5_t5_c25,
++	arm_r_r6_t5_c25,
++	arm_r_r7_t5_c25,
++	arm_r_r8_t5_c25,
++	arm_r_r9_t5_c25,
++	arm_r_r10_t5_c25,
++	arm_r_r11_t5_c25,
++	arm_r_r12_t5_c25,
++	arm_r_r13_t5_c25,
++	arm_r_r14_t5_c25,
++	arm_r_r15_t5_c25,
++	arm_r_r0_t6_c25,
++	arm_r_r1_t6_c25,
++	arm_r_r2_t6_c25,
++	arm_r_r3_t6_c25,
++	arm_r_r4_t6_c25,
++	arm_r_r5_t6_c25,
++	arm_r_r6_t6_c25,
++	arm_r_r7_t6_c25,
++	arm_r_r8_t6_c25,
++	arm_r_r9_t6_c25,
++	arm_r_r10_t6_c25,
++	arm_r_r11_t6_c25,
++	arm_r_r12_t6_c25,
++	arm_r_r13_t6_c25,
++	arm_r_r14_t6_c25,
++	arm_r_r15_t6_c25,
++	arm_r_r0_t7_c25,
++	arm_r_r1_t7_c25,
++	arm_r_r2_t7_c25,
++	arm_r_r3_t7_c25,
++	arm_r_r4_t7_c25,
++	arm_r_r5_t7_c25,
++	arm_r_r6_t7_c25,
++	arm_r_r7_t7_c25,
++	arm_r_r8_t7_c25,
++	arm_r_r9_t7_c25,
++	arm_r_r10_t7_c25,
++	arm_r_r11_t7_c25,
++	arm_r_r12_t7_c25,
++	arm_r_r13_t7_c25,
++	arm_r_r14_t7_c25,
++	arm_r_r15_t7_c25,
++	arm_r_r0_t0_c26,
++	arm_r_r1_t0_c26,
++	arm_r_r2_t0_c26,
++	arm_r_r3_t0_c26,
++	arm_r_r4_t0_c26,
++	arm_r_r5_t0_c26,
++	arm_r_r6_t0_c26,
++	arm_r_r7_t0_c26,
++	arm_r_r8_t0_c26,
++	arm_r_r9_t0_c26,
++	arm_r_r10_t0_c26,
++	arm_r_r11_t0_c26,
++	arm_r_r12_t0_c26,
++	arm_r_r13_t0_c26,
++	arm_r_r14_t0_c26,
++	arm_r_r15_t0_c26,
++	arm_r_r0_t1_c26,
++	arm_r_r1_t1_c26,
++	arm_r_r2_t1_c26,
++	arm_r_r3_t1_c26,
++	arm_r_r4_t1_c26,
++	arm_r_r5_t1_c26,
++	arm_r_r6_t1_c26,
++	arm_r_r7_t1_c26,
++	arm_r_r8_t1_c26,
++	arm_r_r9_t1_c26,
++	arm_r_r10_t1_c26,
++	arm_r_r11_t1_c26,
++	arm_r_r12_t1_c26,
++	arm_r_r13_t1_c26,
++	arm_r_r14_t1_c26,
++	arm_r_r15_t1_c26,
++	arm_r_r0_t2_c26,
++	arm_r_r1_t2_c26,
++	arm_r_r2_t2_c26,
++	arm_r_r3_t2_c26,
++	arm_r_r4_t2_c26,
++	arm_r_r5_t2_c26,
++	arm_r_r6_t2_c26,
++	arm_r_r7_t2_c26,
++	arm_r_r8_t2_c26,
++	arm_r_r9_t2_c26,
++	arm_r_r10_t2_c26,
++	arm_r_r11_t2_c26,
++	arm_r_r12_t2_c26,
++	arm_r_r13_t2_c26,
++	arm_r_r14_t2_c26,
++	arm_r_r15_t2_c26,
++	arm_r_r0_t3_c26,
++	arm_r_r1_t3_c26,
++	arm_r_r2_t3_c26,
++	arm_r_r3_t3_c26,
++	arm_r_r4_t3_c26,
++	arm_r_r5_t3_c26,
++	arm_r_r6_t3_c26,
++	arm_r_r7_t3_c26,
++	arm_r_r8_t3_c26,
++	arm_r_r9_t3_c26,
++	arm_r_r10_t3_c26,
++	arm_r_r11_t3_c26,
++	arm_r_r12_t3_c26,
++	arm_r_r13_t3_c26,
++	arm_r_r14_t3_c26,
++	arm_r_r15_t3_c26,
++	arm_r_r0_t4_c26,
++	arm_r_r1_t4_c26,
++	arm_r_r2_t4_c26,
++	arm_r_r3_t4_c26,
++	arm_r_r4_t4_c26,
++	arm_r_r5_t4_c26,
++	arm_r_r6_t4_c26,
++	arm_r_r7_t4_c26,
++	arm_r_r8_t4_c26,
++	arm_r_r9_t4_c26,
++	arm_r_r10_t4_c26,
++	arm_r_r11_t4_c26,
++	arm_r_r12_t4_c26,
++	arm_r_r13_t4_c26,
++	arm_r_r14_t4_c26,
++	arm_r_r15_t4_c26,
++	arm_r_r0_t5_c26,
++	arm_r_r1_t5_c26,
++	arm_r_r2_t5_c26,
++	arm_r_r3_t5_c26,
++	arm_r_r4_t5_c26,
++	arm_r_r5_t5_c26,
++	arm_r_r6_t5_c26,
++	arm_r_r7_t5_c26,
++	arm_r_r8_t5_c26,
++	arm_r_r9_t5_c26,
++	arm_r_r10_t5_c26,
++	arm_r_r11_t5_c26,
++	arm_r_r12_t5_c26,
++	arm_r_r13_t5_c26,
++	arm_r_r14_t5_c26,
++	arm_r_r15_t5_c26,
++	arm_r_r0_t6_c26,
++	arm_r_r1_t6_c26,
++	arm_r_r2_t6_c26,
++	arm_r_r3_t6_c26,
++	arm_r_r4_t6_c26,
++	arm_r_r5_t6_c26,
++	arm_r_r6_t6_c26,
++	arm_r_r7_t6_c26,
++	arm_r_r8_t6_c26,
++	arm_r_r9_t6_c26,
++	arm_r_r10_t6_c26,
++	arm_r_r11_t6_c26,
++	arm_r_r12_t6_c26,
++	arm_r_r13_t6_c26,
++	arm_r_r14_t6_c26,
++	arm_r_r15_t6_c26,
++	arm_r_r0_t7_c26,
++	arm_r_r1_t7_c26,
++	arm_r_r2_t7_c26,
++	arm_r_r3_t7_c26,
++	arm_r_r4_t7_c26,
++	arm_r_r5_t7_c26,
++	arm_r_r6_t7_c26,
++	arm_r_r7_t7_c26,
++	arm_r_r8_t7_c26,
++	arm_r_r9_t7_c26,
++	arm_r_r10_t7_c26,
++	arm_r_r11_t7_c26,
++	arm_r_r12_t7_c26,
++	arm_r_r13_t7_c26,
++	arm_r_r14_t7_c26,
++	arm_r_r15_t7_c26,
++	arm_r_r0_t0_c27,
++	arm_r_r1_t0_c27,
++	arm_r_r2_t0_c27,
++	arm_r_r3_t0_c27,
++	arm_r_r4_t0_c27,
++	arm_r_r5_t0_c27,
++	arm_r_r6_t0_c27,
++	arm_r_r7_t0_c27,
++	arm_r_r8_t0_c27,
++	arm_r_r9_t0_c27,
++	arm_r_r10_t0_c27,
++	arm_r_r11_t0_c27,
++	arm_r_r12_t0_c27,
++	arm_r_r13_t0_c27,
++	arm_r_r14_t0_c27,
++	arm_r_r15_t0_c27,
++	arm_r_r0_t1_c27,
++	arm_r_r1_t1_c27,
++	arm_r_r2_t1_c27,
++	arm_r_r3_t1_c27,
++	arm_r_r4_t1_c27,
++	arm_r_r5_t1_c27,
++	arm_r_r6_t1_c27,
++	arm_r_r7_t1_c27,
++	arm_r_r8_t1_c27,
++	arm_r_r9_t1_c27,
++	arm_r_r10_t1_c27,
++	arm_r_r11_t1_c27,
++	arm_r_r12_t1_c27,
++	arm_r_r13_t1_c27,
++	arm_r_r14_t1_c27,
++	arm_r_r15_t1_c27,
++	arm_r_r0_t2_c27,
++	arm_r_r1_t2_c27,
++	arm_r_r2_t2_c27,
++	arm_r_r3_t2_c27,
++	arm_r_r4_t2_c27,
++	arm_r_r5_t2_c27,
++	arm_r_r6_t2_c27,
++	arm_r_r7_t2_c27,
++	arm_r_r8_t2_c27,
++	arm_r_r9_t2_c27,
++	arm_r_r10_t2_c27,
++	arm_r_r11_t2_c27,
++	arm_r_r12_t2_c27,
++	arm_r_r13_t2_c27,
++	arm_r_r14_t2_c27,
++	arm_r_r15_t2_c27,
++	arm_r_r0_t3_c27,
++	arm_r_r1_t3_c27,
++	arm_r_r2_t3_c27,
++	arm_r_r3_t3_c27,
++	arm_r_r4_t3_c27,
++	arm_r_r5_t3_c27,
++	arm_r_r6_t3_c27,
++	arm_r_r7_t3_c27,
++	arm_r_r8_t3_c27,
++	arm_r_r9_t3_c27,
++	arm_r_r10_t3_c27,
++	arm_r_r11_t3_c27,
++	arm_r_r12_t3_c27,
++	arm_r_r13_t3_c27,
++	arm_r_r14_t3_c27,
++	arm_r_r15_t3_c27,
++	arm_r_r0_t4_c27,
++	arm_r_r1_t4_c27,
++	arm_r_r2_t4_c27,
++	arm_r_r3_t4_c27,
++	arm_r_r4_t4_c27,
++	arm_r_r5_t4_c27,
++	arm_r_r6_t4_c27,
++	arm_r_r7_t4_c27,
++	arm_r_r8_t4_c27,
++	arm_r_r9_t4_c27,
++	arm_r_r10_t4_c27,
++	arm_r_r11_t4_c27,
++	arm_r_r12_t4_c27,
++	arm_r_r13_t4_c27,
++	arm_r_r14_t4_c27,
++	arm_r_r15_t4_c27,
++	arm_r_r0_t5_c27,
++	arm_r_r1_t5_c27,
++	arm_r_r2_t5_c27,
++	arm_r_r3_t5_c27,
++	arm_r_r4_t5_c27,
++	arm_r_r5_t5_c27,
++	arm_r_r6_t5_c27,
++	arm_r_r7_t5_c27,
++	arm_r_r8_t5_c27,
++	arm_r_r9_t5_c27,
++	arm_r_r10_t5_c27,
++	arm_r_r11_t5_c27,
++	arm_r_r12_t5_c27,
++	arm_r_r13_t5_c27,
++	arm_r_r14_t5_c27,
++	arm_r_r15_t5_c27,
++	arm_r_r0_t6_c27,
++	arm_r_r1_t6_c27,
++	arm_r_r2_t6_c27,
++	arm_r_r3_t6_c27,
++	arm_r_r4_t6_c27,
++	arm_r_r5_t6_c27,
++	arm_r_r6_t6_c27,
++	arm_r_r7_t6_c27,
++	arm_r_r8_t6_c27,
++	arm_r_r9_t6_c27,
++	arm_r_r10_t6_c27,
++	arm_r_r11_t6_c27,
++	arm_r_r12_t6_c27,
++	arm_r_r13_t6_c27,
++	arm_r_r14_t6_c27,
++	arm_r_r15_t6_c27,
++	arm_r_r0_t7_c27,
++	arm_r_r1_t7_c27,
++	arm_r_r2_t7_c27,
++	arm_r_r3_t7_c27,
++	arm_r_r4_t7_c27,
++	arm_r_r5_t7_c27,
++	arm_r_r6_t7_c27,
++	arm_r_r7_t7_c27,
++	arm_r_r8_t7_c27,
++	arm_r_r9_t7_c27,
++	arm_r_r10_t7_c27,
++	arm_r_r11_t7_c27,
++	arm_r_r12_t7_c27,
++	arm_r_r13_t7_c27,
++	arm_r_r14_t7_c27,
++	arm_r_r15_t7_c27,
++	arm_r_r0_t0_c28,
++	arm_r_r1_t0_c28,
++	arm_r_r2_t0_c28,
++	arm_r_r3_t0_c28,
++	arm_r_r4_t0_c28,
++	arm_r_r5_t0_c28,
++	arm_r_r6_t0_c28,
++	arm_r_r7_t0_c28,
++	arm_r_r8_t0_c28,
++	arm_r_r9_t0_c28,
++	arm_r_r10_t0_c28,
++	arm_r_r11_t0_c28,
++	arm_r_r12_t0_c28,
++	arm_r_r13_t0_c28,
++	arm_r_r14_t0_c28,
++	arm_r_r15_t0_c28,
++	arm_r_r0_t1_c28,
++	arm_r_r1_t1_c28,
++	arm_r_r2_t1_c28,
++	arm_r_r3_t1_c28,
++	arm_r_r4_t1_c28,
++	arm_r_r5_t1_c28,
++	arm_r_r6_t1_c28,
++	arm_r_r7_t1_c28,
++	arm_r_r8_t1_c28,
++	arm_r_r9_t1_c28,
++	arm_r_r10_t1_c28,
++	arm_r_r11_t1_c28,
++	arm_r_r12_t1_c28,
++	arm_r_r13_t1_c28,
++	arm_r_r14_t1_c28,
++	arm_r_r15_t1_c28,
++	arm_r_r0_t2_c28,
++	arm_r_r1_t2_c28,
++	arm_r_r2_t2_c28,
++	arm_r_r3_t2_c28,
++	arm_r_r4_t2_c28,
++	arm_r_r5_t2_c28,
++	arm_r_r6_t2_c28,
++	arm_r_r7_t2_c28,
++	arm_r_r8_t2_c28,
++	arm_r_r9_t2_c28,
++	arm_r_r10_t2_c28,
++	arm_r_r11_t2_c28,
++	arm_r_r12_t2_c28,
++	arm_r_r13_t2_c28,
++	arm_r_r14_t2_c28,
++	arm_r_r15_t2_c28,
++	arm_r_r0_t3_c28,
++	arm_r_r1_t3_c28,
++	arm_r_r2_t3_c28,
++	arm_r_r3_t3_c28,
++	arm_r_r4_t3_c28,
++	arm_r_r5_t3_c28,
++	arm_r_r6_t3_c28,
++	arm_r_r7_t3_c28,
++	arm_r_r8_t3_c28,
++	arm_r_r9_t3_c28,
++	arm_r_r10_t3_c28,
++	arm_r_r11_t3_c28,
++	arm_r_r12_t3_c28,
++	arm_r_r13_t3_c28,
++	arm_r_r14_t3_c28,
++	arm_r_r15_t3_c28,
++	arm_r_r0_t4_c28,
++	arm_r_r1_t4_c28,
++	arm_r_r2_t4_c28,
++	arm_r_r3_t4_c28,
++	arm_r_r4_t4_c28,
++	arm_r_r5_t4_c28,
++	arm_r_r6_t4_c28,
++	arm_r_r7_t4_c28,
++	arm_r_r8_t4_c28,
++	arm_r_r9_t4_c28,
++	arm_r_r10_t4_c28,
++	arm_r_r11_t4_c28,
++	arm_r_r12_t4_c28,
++	arm_r_r13_t4_c28,
++	arm_r_r14_t4_c28,
++	arm_r_r15_t4_c28,
++	arm_r_r0_t5_c28,
++	arm_r_r1_t5_c28,
++	arm_r_r2_t5_c28,
++	arm_r_r3_t5_c28,
++	arm_r_r4_t5_c28,
++	arm_r_r5_t5_c28,
++	arm_r_r6_t5_c28,
++	arm_r_r7_t5_c28,
++	arm_r_r8_t5_c28,
++	arm_r_r9_t5_c28,
++	arm_r_r10_t5_c28,
++	arm_r_r11_t5_c28,
++	arm_r_r12_t5_c28,
++	arm_r_r13_t5_c28,
++	arm_r_r14_t5_c28,
++	arm_r_r15_t5_c28,
++	arm_r_r0_t6_c28,
++	arm_r_r1_t6_c28,
++	arm_r_r2_t6_c28,
++	arm_r_r3_t6_c28,
++	arm_r_r4_t6_c28,
++	arm_r_r5_t6_c28,
++	arm_r_r6_t6_c28,
++	arm_r_r7_t6_c28,
++	arm_r_r8_t6_c28,
++	arm_r_r9_t6_c28,
++	arm_r_r10_t6_c28,
++	arm_r_r11_t6_c28,
++	arm_r_r12_t6_c28,
++	arm_r_r13_t6_c28,
++	arm_r_r14_t6_c28,
++	arm_r_r15_t6_c28,
++	arm_r_r0_t7_c28,
++	arm_r_r1_t7_c28,
++	arm_r_r2_t7_c28,
++	arm_r_r3_t7_c28,
++	arm_r_r4_t7_c28,
++	arm_r_r5_t7_c28,
++	arm_r_r6_t7_c28,
++	arm_r_r7_t7_c28,
++	arm_r_r8_t7_c28,
++	arm_r_r9_t7_c28,
++	arm_r_r10_t7_c28,
++	arm_r_r11_t7_c28,
++	arm_r_r12_t7_c28,
++	arm_r_r13_t7_c28,
++	arm_r_r14_t7_c28,
++	arm_r_r15_t7_c28,
++	arm_r_r0_t0_c29,
++	arm_r_r1_t0_c29,
++	arm_r_r2_t0_c29,
++	arm_r_r3_t0_c29,
++	arm_r_r4_t0_c29,
++	arm_r_r5_t0_c29,
++	arm_r_r6_t0_c29,
++	arm_r_r7_t0_c29,
++	arm_r_r8_t0_c29,
++	arm_r_r9_t0_c29,
++	arm_r_r10_t0_c29,
++	arm_r_r11_t0_c29,
++	arm_r_r12_t0_c29,
++	arm_r_r13_t0_c29,
++	arm_r_r14_t0_c29,
++	arm_r_r15_t0_c29,
++	arm_r_r0_t1_c29,
++	arm_r_r1_t1_c29,
++	arm_r_r2_t1_c29,
++	arm_r_r3_t1_c29,
++	arm_r_r4_t1_c29,
++	arm_r_r5_t1_c29,
++	arm_r_r6_t1_c29,
++	arm_r_r7_t1_c29,
++	arm_r_r8_t1_c29,
++	arm_r_r9_t1_c29,
++	arm_r_r10_t1_c29,
++	arm_r_r11_t1_c29,
++	arm_r_r12_t1_c29,
++	arm_r_r13_t1_c29,
++	arm_r_r14_t1_c29,
++	arm_r_r15_t1_c29,
++	arm_r_r0_t2_c29,
++	arm_r_r1_t2_c29,
++	arm_r_r2_t2_c29,
++	arm_r_r3_t2_c29,
++	arm_r_r4_t2_c29,
++	arm_r_r5_t2_c29,
++	arm_r_r6_t2_c29,
++	arm_r_r7_t2_c29,
++	arm_r_r8_t2_c29,
++	arm_r_r9_t2_c29,
++	arm_r_r10_t2_c29,
++	arm_r_r11_t2_c29,
++	arm_r_r12_t2_c29,
++	arm_r_r13_t2_c29,
++	arm_r_r14_t2_c29,
++	arm_r_r15_t2_c29,
++	arm_r_r0_t3_c29,
++	arm_r_r1_t3_c29,
++	arm_r_r2_t3_c29,
++	arm_r_r3_t3_c29,
++	arm_r_r4_t3_c29,
++	arm_r_r5_t3_c29,
++	arm_r_r6_t3_c29,
++	arm_r_r7_t3_c29,
++	arm_r_r8_t3_c29,
++	arm_r_r9_t3_c29,
++	arm_r_r10_t3_c29,
++	arm_r_r11_t3_c29,
++	arm_r_r12_t3_c29,
++	arm_r_r13_t3_c29,
++	arm_r_r14_t3_c29,
++	arm_r_r15_t3_c29,
++	arm_r_r0_t4_c29,
++	arm_r_r1_t4_c29,
++	arm_r_r2_t4_c29,
++	arm_r_r3_t4_c29,
++	arm_r_r4_t4_c29,
++	arm_r_r5_t4_c29,
++	arm_r_r6_t4_c29,
++	arm_r_r7_t4_c29,
++	arm_r_r8_t4_c29,
++	arm_r_r9_t4_c29,
++	arm_r_r10_t4_c29,
++	arm_r_r11_t4_c29,
++	arm_r_r12_t4_c29,
++	arm_r_r13_t4_c29,
++	arm_r_r14_t4_c29,
++	arm_r_r15_t4_c29,
++	arm_r_r0_t5_c29,
++	arm_r_r1_t5_c29,
++	arm_r_r2_t5_c29,
++	arm_r_r3_t5_c29,
++	arm_r_r4_t5_c29,
++	arm_r_r5_t5_c29,
++	arm_r_r6_t5_c29,
++	arm_r_r7_t5_c29,
++	arm_r_r8_t5_c29,
++	arm_r_r9_t5_c29,
++	arm_r_r10_t5_c29,
++	arm_r_r11_t5_c29,
++	arm_r_r12_t5_c29,
++	arm_r_r13_t5_c29,
++	arm_r_r14_t5_c29,
++	arm_r_r15_t5_c29,
++	arm_r_r0_t6_c29,
++	arm_r_r1_t6_c29,
++	arm_r_r2_t6_c29,
++	arm_r_r3_t6_c29,
++	arm_r_r4_t6_c29,
++	arm_r_r5_t6_c29,
++	arm_r_r6_t6_c29,
++	arm_r_r7_t6_c29,
++	arm_r_r8_t6_c29,
++	arm_r_r9_t6_c29,
++	arm_r_r10_t6_c29,
++	arm_r_r11_t6_c29,
++	arm_r_r12_t6_c29,
++	arm_r_r13_t6_c29,
++	arm_r_r14_t6_c29,
++	arm_r_r15_t6_c29,
++	arm_r_r0_t7_c29,
++	arm_r_r1_t7_c29,
++	arm_r_r2_t7_c29,
++	arm_r_r3_t7_c29,
++	arm_r_r4_t7_c29,
++	arm_r_r5_t7_c29,
++	arm_r_r6_t7_c29,
++	arm_r_r7_t7_c29,
++	arm_r_r8_t7_c29,
++	arm_r_r9_t7_c29,
++	arm_r_r10_t7_c29,
++	arm_r_r11_t7_c29,
++	arm_r_r12_t7_c29,
++	arm_r_r13_t7_c29,
++	arm_r_r14_t7_c29,
++	arm_r_r15_t7_c29,
++	arm_r_r0_t0_c30,
++	arm_r_r1_t0_c30,
++	arm_r_r2_t0_c30,
++	arm_r_r3_t0_c30,
++	arm_r_r4_t0_c30,
++	arm_r_r5_t0_c30,
++	arm_r_r6_t0_c30,
++	arm_r_r7_t0_c30,
++	arm_r_r8_t0_c30,
++	arm_r_r9_t0_c30,
++	arm_r_r10_t0_c30,
++	arm_r_r11_t0_c30,
++	arm_r_r12_t0_c30,
++	arm_r_r13_t0_c30,
++	arm_r_r14_t0_c30,
++	arm_r_r15_t0_c30,
++	arm_r_r0_t1_c30,
++	arm_r_r1_t1_c30,
++	arm_r_r2_t1_c30,
++	arm_r_r3_t1_c30,
++	arm_r_r4_t1_c30,
++	arm_r_r5_t1_c30,
++	arm_r_r6_t1_c30,
++	arm_r_r7_t1_c30,
++	arm_r_r8_t1_c30,
++	arm_r_r9_t1_c30,
++	arm_r_r10_t1_c30,
++	arm_r_r11_t1_c30,
++	arm_r_r12_t1_c30,
++	arm_r_r13_t1_c30,
++	arm_r_r14_t1_c30,
++	arm_r_r15_t1_c30,
++	arm_r_r0_t2_c30,
++	arm_r_r1_t2_c30,
++	arm_r_r2_t2_c30,
++	arm_r_r3_t2_c30,
++	arm_r_r4_t2_c30,
++	arm_r_r5_t2_c30,
++	arm_r_r6_t2_c30,
++	arm_r_r7_t2_c30,
++	arm_r_r8_t2_c30,
++	arm_r_r9_t2_c30,
++	arm_r_r10_t2_c30,
++	arm_r_r11_t2_c30,
++	arm_r_r12_t2_c30,
++	arm_r_r13_t2_c30,
++	arm_r_r14_t2_c30,
++	arm_r_r15_t2_c30,
++	arm_r_r0_t3_c30,
++	arm_r_r1_t3_c30,
++	arm_r_r2_t3_c30,
++	arm_r_r3_t3_c30,
++	arm_r_r4_t3_c30,
++	arm_r_r5_t3_c30,
++	arm_r_r6_t3_c30,
++	arm_r_r7_t3_c30,
++	arm_r_r8_t3_c30,
++	arm_r_r9_t3_c30,
++	arm_r_r10_t3_c30,
++	arm_r_r11_t3_c30,
++	arm_r_r12_t3_c30,
++	arm_r_r13_t3_c30,
++	arm_r_r14_t3_c30,
++	arm_r_r15_t3_c30,
++	arm_r_r0_t4_c30,
++	arm_r_r1_t4_c30,
++	arm_r_r2_t4_c30,
++	arm_r_r3_t4_c30,
++	arm_r_r4_t4_c30,
++	arm_r_r5_t4_c30,
++	arm_r_r6_t4_c30,
++	arm_r_r7_t4_c30,
++	arm_r_r8_t4_c30,
++	arm_r_r9_t4_c30,
++	arm_r_r10_t4_c30,
++	arm_r_r11_t4_c30,
++	arm_r_r12_t4_c30,
++	arm_r_r13_t4_c30,
++	arm_r_r14_t4_c30,
++	arm_r_r15_t4_c30,
++	arm_r_r0_t5_c30,
++	arm_r_r1_t5_c30,
++	arm_r_r2_t5_c30,
++	arm_r_r3_t5_c30,
++	arm_r_r4_t5_c30,
++	arm_r_r5_t5_c30,
++	arm_r_r6_t5_c30,
++	arm_r_r7_t5_c30,
++	arm_r_r8_t5_c30,
++	arm_r_r9_t5_c30,
++	arm_r_r10_t5_c30,
++	arm_r_r11_t5_c30,
++	arm_r_r12_t5_c30,
++	arm_r_r13_t5_c30,
++	arm_r_r14_t5_c30,
++	arm_r_r15_t5_c30,
++	arm_r_r0_t6_c30,
++	arm_r_r1_t6_c30,
++	arm_r_r2_t6_c30,
++	arm_r_r3_t6_c30,
++	arm_r_r4_t6_c30,
++	arm_r_r5_t6_c30,
++	arm_r_r6_t6_c30,
++	arm_r_r7_t6_c30,
++	arm_r_r8_t6_c30,
++	arm_r_r9_t6_c30,
++	arm_r_r10_t6_c30,
++	arm_r_r11_t6_c30,
++	arm_r_r12_t6_c30,
++	arm_r_r13_t6_c30,
++	arm_r_r14_t6_c30,
++	arm_r_r15_t6_c30,
++	arm_r_r0_t7_c30,
++	arm_r_r1_t7_c30,
++	arm_r_r2_t7_c30,
++	arm_r_r3_t7_c30,
++	arm_r_r4_t7_c30,
++	arm_r_r5_t7_c30,
++	arm_r_r6_t7_c30,
++	arm_r_r7_t7_c30,
++	arm_r_r8_t7_c30,
++	arm_r_r9_t7_c30,
++	arm_r_r10_t7_c30,
++	arm_r_r11_t7_c30,
++	arm_r_r12_t7_c30,
++	arm_r_r13_t7_c30,
++	arm_r_r14_t7_c30,
++	arm_r_r15_t7_c30,
++	arm_r_r0_t0_c31,
++	arm_r_r1_t0_c31,
++	arm_r_r2_t0_c31,
++	arm_r_r3_t0_c31,
++	arm_r_r4_t0_c31,
++	arm_r_r5_t0_c31,
++	arm_r_r6_t0_c31,
++	arm_r_r7_t0_c31,
++	arm_r_r8_t0_c31,
++	arm_r_r9_t0_c31,
++	arm_r_r10_t0_c31,
++	arm_r_r11_t0_c31,
++	arm_r_r12_t0_c31,
++	arm_r_r13_t0_c31,
++	arm_r_r14_t0_c31,
++	arm_r_r15_t0_c31,
++	arm_r_r0_t1_c31,
++	arm_r_r1_t1_c31,
++	arm_r_r2_t1_c31,
++	arm_r_r3_t1_c31,
++	arm_r_r4_t1_c31,
++	arm_r_r5_t1_c31,
++	arm_r_r6_t1_c31,
++	arm_r_r7_t1_c31,
++	arm_r_r8_t1_c31,
++	arm_r_r9_t1_c31,
++	arm_r_r10_t1_c31,
++	arm_r_r11_t1_c31,
++	arm_r_r12_t1_c31,
++	arm_r_r13_t1_c31,
++	arm_r_r14_t1_c31,
++	arm_r_r15_t1_c31,
++	arm_r_r0_t2_c31,
++	arm_r_r1_t2_c31,
++	arm_r_r2_t2_c31,
++	arm_r_r3_t2_c31,
++	arm_r_r4_t2_c31,
++	arm_r_r5_t2_c31,
++	arm_r_r6_t2_c31,
++	arm_r_r7_t2_c31,
++	arm_r_r8_t2_c31,
++	arm_r_r9_t2_c31,
++	arm_r_r10_t2_c31,
++	arm_r_r11_t2_c31,
++	arm_r_r12_t2_c31,
++	arm_r_r13_t2_c31,
++	arm_r_r14_t2_c31,
++	arm_r_r15_t2_c31,
++	arm_r_r0_t3_c31,
++	arm_r_r1_t3_c31,
++	arm_r_r2_t3_c31,
++	arm_r_r3_t3_c31,
++	arm_r_r4_t3_c31,
++	arm_r_r5_t3_c31,
++	arm_r_r6_t3_c31,
++	arm_r_r7_t3_c31,
++	arm_r_r8_t3_c31,
++	arm_r_r9_t3_c31,
++	arm_r_r10_t3_c31,
++	arm_r_r11_t3_c31,
++	arm_r_r12_t3_c31,
++	arm_r_r13_t3_c31,
++	arm_r_r14_t3_c31,
++	arm_r_r15_t3_c31,
++	arm_r_r0_t4_c31,
++	arm_r_r1_t4_c31,
++	arm_r_r2_t4_c31,
++	arm_r_r3_t4_c31,
++	arm_r_r4_t4_c31,
++	arm_r_r5_t4_c31,
++	arm_r_r6_t4_c31,
++	arm_r_r7_t4_c31,
++	arm_r_r8_t4_c31,
++	arm_r_r9_t4_c31,
++	arm_r_r10_t4_c31,
++	arm_r_r11_t4_c31,
++	arm_r_r12_t4_c31,
++	arm_r_r13_t4_c31,
++	arm_r_r14_t4_c31,
++	arm_r_r15_t4_c31,
++	arm_r_r0_t5_c31,
++	arm_r_r1_t5_c31,
++	arm_r_r2_t5_c31,
++	arm_r_r3_t5_c31,
++	arm_r_r4_t5_c31,
++	arm_r_r5_t5_c31,
++	arm_r_r6_t5_c31,
++	arm_r_r7_t5_c31,
++	arm_r_r8_t5_c31,
++	arm_r_r9_t5_c31,
++	arm_r_r10_t5_c31,
++	arm_r_r11_t5_c31,
++	arm_r_r12_t5_c31,
++	arm_r_r13_t5_c31,
++	arm_r_r14_t5_c31,
++	arm_r_r15_t5_c31,
++	arm_r_r0_t6_c31,
++	arm_r_r1_t6_c31,
++	arm_r_r2_t6_c31,
++	arm_r_r3_t6_c31,
++	arm_r_r4_t6_c31,
++	arm_r_r5_t6_c31,
++	arm_r_r6_t6_c31,
++	arm_r_r7_t6_c31,
++	arm_r_r8_t6_c31,
++	arm_r_r9_t6_c31,
++	arm_r_r10_t6_c31,
++	arm_r_r11_t6_c31,
++	arm_r_r12_t6_c31,
++	arm_r_r13_t6_c31,
++	arm_r_r14_t6_c31,
++	arm_r_r15_t6_c31,
++	arm_r_r0_t7_c31,
++	arm_r_r1_t7_c31,
++	arm_r_r2_t7_c31,
++	arm_r_r3_t7_c31,
++	arm_r_r4_t7_c31,
++	arm_r_r5_t7_c31,
++	arm_r_r6_t7_c31,
++	arm_r_r7_t7_c31,
++	arm_r_r8_t7_c31,
++	arm_r_r9_t7_c31,
++	arm_r_r10_t7_c31,
++	arm_r_r11_t7_c31,
++	arm_r_r12_t7_c31,
++	arm_r_r13_t7_c31,
++	arm_r_r14_t7_c31,
++	arm_r_r15_t7_c31,
++	arm_rs_r0_t0_c0,
++	arm_rs_r1_t0_c0,
++	arm_rs_r2_t0_c0,
++	arm_rs_r3_t0_c0,
++	arm_rs_r4_t0_c0,
++	arm_rs_r5_t0_c0,
++	arm_rs_r6_t0_c0,
++	arm_rs_r7_t0_c0,
++	arm_rs_r8_t0_c0,
++	arm_rs_r9_t0_c0,
++	arm_rs_r10_t0_c0,
++	arm_rs_r11_t0_c0,
++	arm_rs_r12_t0_c0,
++	arm_rs_r13_t0_c0,
++	arm_rs_r14_t0_c0,
++	arm_rs_r15_t0_c0,
++	arm_rs_r0_t1_c0,
++	arm_rs_r1_t1_c0,
++	arm_rs_r2_t1_c0,
++	arm_rs_r3_t1_c0,
++	arm_rs_r4_t1_c0,
++	arm_rs_r5_t1_c0,
++	arm_rs_r6_t1_c0,
++	arm_rs_r7_t1_c0,
++	arm_rs_r8_t1_c0,
++	arm_rs_r9_t1_c0,
++	arm_rs_r10_t1_c0,
++	arm_rs_r11_t1_c0,
++	arm_rs_r12_t1_c0,
++	arm_rs_r13_t1_c0,
++	arm_rs_r14_t1_c0,
++	arm_rs_r15_t1_c0,
++	arm_rs_r0_t2_c0,
++	arm_rs_r1_t2_c0,
++	arm_rs_r2_t2_c0,
++	arm_rs_r3_t2_c0,
++	arm_rs_r4_t2_c0,
++	arm_rs_r5_t2_c0,
++	arm_rs_r6_t2_c0,
++	arm_rs_r7_t2_c0,
++	arm_rs_r8_t2_c0,
++	arm_rs_r9_t2_c0,
++	arm_rs_r10_t2_c0,
++	arm_rs_r11_t2_c0,
++	arm_rs_r12_t2_c0,
++	arm_rs_r13_t2_c0,
++	arm_rs_r14_t2_c0,
++	arm_rs_r15_t2_c0,
++	arm_rs_r0_t3_c0,
++	arm_rs_r1_t3_c0,
++	arm_rs_r2_t3_c0,
++	arm_rs_r3_t3_c0,
++	arm_rs_r4_t3_c0,
++	arm_rs_r5_t3_c0,
++	arm_rs_r6_t3_c0,
++	arm_rs_r7_t3_c0,
++	arm_rs_r8_t3_c0,
++	arm_rs_r9_t3_c0,
++	arm_rs_r10_t3_c0,
++	arm_rs_r11_t3_c0,
++	arm_rs_r12_t3_c0,
++	arm_rs_r13_t3_c0,
++	arm_rs_r14_t3_c0,
++	arm_rs_r15_t3_c0,
++	arm_rs_r0_t4_c0,
++	arm_rs_r1_t4_c0,
++	arm_rs_r2_t4_c0,
++	arm_rs_r3_t4_c0,
++	arm_rs_r4_t4_c0,
++	arm_rs_r5_t4_c0,
++	arm_rs_r6_t4_c0,
++	arm_rs_r7_t4_c0,
++	arm_rs_r8_t4_c0,
++	arm_rs_r9_t4_c0,
++	arm_rs_r10_t4_c0,
++	arm_rs_r11_t4_c0,
++	arm_rs_r12_t4_c0,
++	arm_rs_r13_t4_c0,
++	arm_rs_r14_t4_c0,
++	arm_rs_r15_t4_c0,
++	arm_rs_r0_t5_c0,
++	arm_rs_r1_t5_c0,
++	arm_rs_r2_t5_c0,
++	arm_rs_r3_t5_c0,
++	arm_rs_r4_t5_c0,
++	arm_rs_r5_t5_c0,
++	arm_rs_r6_t5_c0,
++	arm_rs_r7_t5_c0,
++	arm_rs_r8_t5_c0,
++	arm_rs_r9_t5_c0,
++	arm_rs_r10_t5_c0,
++	arm_rs_r11_t5_c0,
++	arm_rs_r12_t5_c0,
++	arm_rs_r13_t5_c0,
++	arm_rs_r14_t5_c0,
++	arm_rs_r15_t5_c0,
++	arm_rs_r0_t6_c0,
++	arm_rs_r1_t6_c0,
++	arm_rs_r2_t6_c0,
++	arm_rs_r3_t6_c0,
++	arm_rs_r4_t6_c0,
++	arm_rs_r5_t6_c0,
++	arm_rs_r6_t6_c0,
++	arm_rs_r7_t6_c0,
++	arm_rs_r8_t6_c0,
++	arm_rs_r9_t6_c0,
++	arm_rs_r10_t6_c0,
++	arm_rs_r11_t6_c0,
++	arm_rs_r12_t6_c0,
++	arm_rs_r13_t6_c0,
++	arm_rs_r14_t6_c0,
++	arm_rs_r15_t6_c0,
++	arm_rs_r0_t7_c0,
++	arm_rs_r1_t7_c0,
++	arm_rs_r2_t7_c0,
++	arm_rs_r3_t7_c0,
++	arm_rs_r4_t7_c0,
++	arm_rs_r5_t7_c0,
++	arm_rs_r6_t7_c0,
++	arm_rs_r7_t7_c0,
++	arm_rs_r8_t7_c0,
++	arm_rs_r9_t7_c0,
++	arm_rs_r10_t7_c0,
++	arm_rs_r11_t7_c0,
++	arm_rs_r12_t7_c0,
++	arm_rs_r13_t7_c0,
++	arm_rs_r14_t7_c0,
++	arm_rs_r15_t7_c0,
++	arm_rs_r0_t0_c1,
++	arm_rs_r1_t0_c1,
++	arm_rs_r2_t0_c1,
++	arm_rs_r3_t0_c1,
++	arm_rs_r4_t0_c1,
++	arm_rs_r5_t0_c1,
++	arm_rs_r6_t0_c1,
++	arm_rs_r7_t0_c1,
++	arm_rs_r8_t0_c1,
++	arm_rs_r9_t0_c1,
++	arm_rs_r10_t0_c1,
++	arm_rs_r11_t0_c1,
++	arm_rs_r12_t0_c1,
++	arm_rs_r13_t0_c1,
++	arm_rs_r14_t0_c1,
++	arm_rs_r15_t0_c1,
++	arm_rs_r0_t1_c1,
++	arm_rs_r1_t1_c1,
++	arm_rs_r2_t1_c1,
++	arm_rs_r3_t1_c1,
++	arm_rs_r4_t1_c1,
++	arm_rs_r5_t1_c1,
++	arm_rs_r6_t1_c1,
++	arm_rs_r7_t1_c1,
++	arm_rs_r8_t1_c1,
++	arm_rs_r9_t1_c1,
++	arm_rs_r10_t1_c1,
++	arm_rs_r11_t1_c1,
++	arm_rs_r12_t1_c1,
++	arm_rs_r13_t1_c1,
++	arm_rs_r14_t1_c1,
++	arm_rs_r15_t1_c1,
++	arm_rs_r0_t2_c1,
++	arm_rs_r1_t2_c1,
++	arm_rs_r2_t2_c1,
++	arm_rs_r3_t2_c1,
++	arm_rs_r4_t2_c1,
++	arm_rs_r5_t2_c1,
++	arm_rs_r6_t2_c1,
++	arm_rs_r7_t2_c1,
++	arm_rs_r8_t2_c1,
++	arm_rs_r9_t2_c1,
++	arm_rs_r10_t2_c1,
++	arm_rs_r11_t2_c1,
++	arm_rs_r12_t2_c1,
++	arm_rs_r13_t2_c1,
++	arm_rs_r14_t2_c1,
++	arm_rs_r15_t2_c1,
++	arm_rs_r0_t3_c1,
++	arm_rs_r1_t3_c1,
++	arm_rs_r2_t3_c1,
++	arm_rs_r3_t3_c1,
++	arm_rs_r4_t3_c1,
++	arm_rs_r5_t3_c1,
++	arm_rs_r6_t3_c1,
++	arm_rs_r7_t3_c1,
++	arm_rs_r8_t3_c1,
++	arm_rs_r9_t3_c1,
++	arm_rs_r10_t3_c1,
++	arm_rs_r11_t3_c1,
++	arm_rs_r12_t3_c1,
++	arm_rs_r13_t3_c1,
++	arm_rs_r14_t3_c1,
++	arm_rs_r15_t3_c1,
++	arm_rs_r0_t4_c1,
++	arm_rs_r1_t4_c1,
++	arm_rs_r2_t4_c1,
++	arm_rs_r3_t4_c1,
++	arm_rs_r4_t4_c1,
++	arm_rs_r5_t4_c1,
++	arm_rs_r6_t4_c1,
++	arm_rs_r7_t4_c1,
++	arm_rs_r8_t4_c1,
++	arm_rs_r9_t4_c1,
++	arm_rs_r10_t4_c1,
++	arm_rs_r11_t4_c1,
++	arm_rs_r12_t4_c1,
++	arm_rs_r13_t4_c1,
++	arm_rs_r14_t4_c1,
++	arm_rs_r15_t4_c1,
++	arm_rs_r0_t5_c1,
++	arm_rs_r1_t5_c1,
++	arm_rs_r2_t5_c1,
++	arm_rs_r3_t5_c1,
++	arm_rs_r4_t5_c1,
++	arm_rs_r5_t5_c1,
++	arm_rs_r6_t5_c1,
++	arm_rs_r7_t5_c1,
++	arm_rs_r8_t5_c1,
++	arm_rs_r9_t5_c1,
++	arm_rs_r10_t5_c1,
++	arm_rs_r11_t5_c1,
++	arm_rs_r12_t5_c1,
++	arm_rs_r13_t5_c1,
++	arm_rs_r14_t5_c1,
++	arm_rs_r15_t5_c1,
++	arm_rs_r0_t6_c1,
++	arm_rs_r1_t6_c1,
++	arm_rs_r2_t6_c1,
++	arm_rs_r3_t6_c1,
++	arm_rs_r4_t6_c1,
++	arm_rs_r5_t6_c1,
++	arm_rs_r6_t6_c1,
++	arm_rs_r7_t6_c1,
++	arm_rs_r8_t6_c1,
++	arm_rs_r9_t6_c1,
++	arm_rs_r10_t6_c1,
++	arm_rs_r11_t6_c1,
++	arm_rs_r12_t6_c1,
++	arm_rs_r13_t6_c1,
++	arm_rs_r14_t6_c1,
++	arm_rs_r15_t6_c1,
++	arm_rs_r0_t7_c1,
++	arm_rs_r1_t7_c1,
++	arm_rs_r2_t7_c1,
++	arm_rs_r3_t7_c1,
++	arm_rs_r4_t7_c1,
++	arm_rs_r5_t7_c1,
++	arm_rs_r6_t7_c1,
++	arm_rs_r7_t7_c1,
++	arm_rs_r8_t7_c1,
++	arm_rs_r9_t7_c1,
++	arm_rs_r10_t7_c1,
++	arm_rs_r11_t7_c1,
++	arm_rs_r12_t7_c1,
++	arm_rs_r13_t7_c1,
++	arm_rs_r14_t7_c1,
++	arm_rs_r15_t7_c1,
++	arm_rs_r0_t0_c2,
++	arm_rs_r1_t0_c2,
++	arm_rs_r2_t0_c2,
++	arm_rs_r3_t0_c2,
++	arm_rs_r4_t0_c2,
++	arm_rs_r5_t0_c2,
++	arm_rs_r6_t0_c2,
++	arm_rs_r7_t0_c2,
++	arm_rs_r8_t0_c2,
++	arm_rs_r9_t0_c2,
++	arm_rs_r10_t0_c2,
++	arm_rs_r11_t0_c2,
++	arm_rs_r12_t0_c2,
++	arm_rs_r13_t0_c2,
++	arm_rs_r14_t0_c2,
++	arm_rs_r15_t0_c2,
++	arm_rs_r0_t1_c2,
++	arm_rs_r1_t1_c2,
++	arm_rs_r2_t1_c2,
++	arm_rs_r3_t1_c2,
++	arm_rs_r4_t1_c2,
++	arm_rs_r5_t1_c2,
++	arm_rs_r6_t1_c2,
++	arm_rs_r7_t1_c2,
++	arm_rs_r8_t1_c2,
++	arm_rs_r9_t1_c2,
++	arm_rs_r10_t1_c2,
++	arm_rs_r11_t1_c2,
++	arm_rs_r12_t1_c2,
++	arm_rs_r13_t1_c2,
++	arm_rs_r14_t1_c2,
++	arm_rs_r15_t1_c2,
++	arm_rs_r0_t2_c2,
++	arm_rs_r1_t2_c2,
++	arm_rs_r2_t2_c2,
++	arm_rs_r3_t2_c2,
++	arm_rs_r4_t2_c2,
++	arm_rs_r5_t2_c2,
++	arm_rs_r6_t2_c2,
++	arm_rs_r7_t2_c2,
++	arm_rs_r8_t2_c2,
++	arm_rs_r9_t2_c2,
++	arm_rs_r10_t2_c2,
++	arm_rs_r11_t2_c2,
++	arm_rs_r12_t2_c2,
++	arm_rs_r13_t2_c2,
++	arm_rs_r14_t2_c2,
++	arm_rs_r15_t2_c2,
++	arm_rs_r0_t3_c2,
++	arm_rs_r1_t3_c2,
++	arm_rs_r2_t3_c2,
++	arm_rs_r3_t3_c2,
++	arm_rs_r4_t3_c2,
++	arm_rs_r5_t3_c2,
++	arm_rs_r6_t3_c2,
++	arm_rs_r7_t3_c2,
++	arm_rs_r8_t3_c2,
++	arm_rs_r9_t3_c2,
++	arm_rs_r10_t3_c2,
++	arm_rs_r11_t3_c2,
++	arm_rs_r12_t3_c2,
++	arm_rs_r13_t3_c2,
++	arm_rs_r14_t3_c2,
++	arm_rs_r15_t3_c2,
++	arm_rs_r0_t4_c2,
++	arm_rs_r1_t4_c2,
++	arm_rs_r2_t4_c2,
++	arm_rs_r3_t4_c2,
++	arm_rs_r4_t4_c2,
++	arm_rs_r5_t4_c2,
++	arm_rs_r6_t4_c2,
++	arm_rs_r7_t4_c2,
++	arm_rs_r8_t4_c2,
++	arm_rs_r9_t4_c2,
++	arm_rs_r10_t4_c2,
++	arm_rs_r11_t4_c2,
++	arm_rs_r12_t4_c2,
++	arm_rs_r13_t4_c2,
++	arm_rs_r14_t4_c2,
++	arm_rs_r15_t4_c2,
++	arm_rs_r0_t5_c2,
++	arm_rs_r1_t5_c2,
++	arm_rs_r2_t5_c2,
++	arm_rs_r3_t5_c2,
++	arm_rs_r4_t5_c2,
++	arm_rs_r5_t5_c2,
++	arm_rs_r6_t5_c2,
++	arm_rs_r7_t5_c2,
++	arm_rs_r8_t5_c2,
++	arm_rs_r9_t5_c2,
++	arm_rs_r10_t5_c2,
++	arm_rs_r11_t5_c2,
++	arm_rs_r12_t5_c2,
++	arm_rs_r13_t5_c2,
++	arm_rs_r14_t5_c2,
++	arm_rs_r15_t5_c2,
++	arm_rs_r0_t6_c2,
++	arm_rs_r1_t6_c2,
++	arm_rs_r2_t6_c2,
++	arm_rs_r3_t6_c2,
++	arm_rs_r4_t6_c2,
++	arm_rs_r5_t6_c2,
++	arm_rs_r6_t6_c2,
++	arm_rs_r7_t6_c2,
++	arm_rs_r8_t6_c2,
++	arm_rs_r9_t6_c2,
++	arm_rs_r10_t6_c2,
++	arm_rs_r11_t6_c2,
++	arm_rs_r12_t6_c2,
++	arm_rs_r13_t6_c2,
++	arm_rs_r14_t6_c2,
++	arm_rs_r15_t6_c2,
++	arm_rs_r0_t7_c2,
++	arm_rs_r1_t7_c2,
++	arm_rs_r2_t7_c2,
++	arm_rs_r3_t7_c2,
++	arm_rs_r4_t7_c2,
++	arm_rs_r5_t7_c2,
++	arm_rs_r6_t7_c2,
++	arm_rs_r7_t7_c2,
++	arm_rs_r8_t7_c2,
++	arm_rs_r9_t7_c2,
++	arm_rs_r10_t7_c2,
++	arm_rs_r11_t7_c2,
++	arm_rs_r12_t7_c2,
++	arm_rs_r13_t7_c2,
++	arm_rs_r14_t7_c2,
++	arm_rs_r15_t7_c2,
++	arm_rs_r0_t0_c3,
++	arm_rs_r1_t0_c3,
++	arm_rs_r2_t0_c3,
++	arm_rs_r3_t0_c3,
++	arm_rs_r4_t0_c3,
++	arm_rs_r5_t0_c3,
++	arm_rs_r6_t0_c3,
++	arm_rs_r7_t0_c3,
++	arm_rs_r8_t0_c3,
++	arm_rs_r9_t0_c3,
++	arm_rs_r10_t0_c3,
++	arm_rs_r11_t0_c3,
++	arm_rs_r12_t0_c3,
++	arm_rs_r13_t0_c3,
++	arm_rs_r14_t0_c3,
++	arm_rs_r15_t0_c3,
++	arm_rs_r0_t1_c3,
++	arm_rs_r1_t1_c3,
++	arm_rs_r2_t1_c3,
++	arm_rs_r3_t1_c3,
++	arm_rs_r4_t1_c3,
++	arm_rs_r5_t1_c3,
++	arm_rs_r6_t1_c3,
++	arm_rs_r7_t1_c3,
++	arm_rs_r8_t1_c3,
++	arm_rs_r9_t1_c3,
++	arm_rs_r10_t1_c3,
++	arm_rs_r11_t1_c3,
++	arm_rs_r12_t1_c3,
++	arm_rs_r13_t1_c3,
++	arm_rs_r14_t1_c3,
++	arm_rs_r15_t1_c3,
++	arm_rs_r0_t2_c3,
++	arm_rs_r1_t2_c3,
++	arm_rs_r2_t2_c3,
++	arm_rs_r3_t2_c3,
++	arm_rs_r4_t2_c3,
++	arm_rs_r5_t2_c3,
++	arm_rs_r6_t2_c3,
++	arm_rs_r7_t2_c3,
++	arm_rs_r8_t2_c3,
++	arm_rs_r9_t2_c3,
++	arm_rs_r10_t2_c3,
++	arm_rs_r11_t2_c3,
++	arm_rs_r12_t2_c3,
++	arm_rs_r13_t2_c3,
++	arm_rs_r14_t2_c3,
++	arm_rs_r15_t2_c3,
++	arm_rs_r0_t3_c3,
++	arm_rs_r1_t3_c3,
++	arm_rs_r2_t3_c3,
++	arm_rs_r3_t3_c3,
++	arm_rs_r4_t3_c3,
++	arm_rs_r5_t3_c3,
++	arm_rs_r6_t3_c3,
++	arm_rs_r7_t3_c3,
++	arm_rs_r8_t3_c3,
++	arm_rs_r9_t3_c3,
++	arm_rs_r10_t3_c3,
++	arm_rs_r11_t3_c3,
++	arm_rs_r12_t3_c3,
++	arm_rs_r13_t3_c3,
++	arm_rs_r14_t3_c3,
++	arm_rs_r15_t3_c3,
++	arm_rs_r0_t4_c3,
++	arm_rs_r1_t4_c3,
++	arm_rs_r2_t4_c3,
++	arm_rs_r3_t4_c3,
++	arm_rs_r4_t4_c3,
++	arm_rs_r5_t4_c3,
++	arm_rs_r6_t4_c3,
++	arm_rs_r7_t4_c3,
++	arm_rs_r8_t4_c3,
++	arm_rs_r9_t4_c3,
++	arm_rs_r10_t4_c3,
++	arm_rs_r11_t4_c3,
++	arm_rs_r12_t4_c3,
++	arm_rs_r13_t4_c3,
++	arm_rs_r14_t4_c3,
++	arm_rs_r15_t4_c3,
++	arm_rs_r0_t5_c3,
++	arm_rs_r1_t5_c3,
++	arm_rs_r2_t5_c3,
++	arm_rs_r3_t5_c3,
++	arm_rs_r4_t5_c3,
++	arm_rs_r5_t5_c3,
++	arm_rs_r6_t5_c3,
++	arm_rs_r7_t5_c3,
++	arm_rs_r8_t5_c3,
++	arm_rs_r9_t5_c3,
++	arm_rs_r10_t5_c3,
++	arm_rs_r11_t5_c3,
++	arm_rs_r12_t5_c3,
++	arm_rs_r13_t5_c3,
++	arm_rs_r14_t5_c3,
++	arm_rs_r15_t5_c3,
++	arm_rs_r0_t6_c3,
++	arm_rs_r1_t6_c3,
++	arm_rs_r2_t6_c3,
++	arm_rs_r3_t6_c3,
++	arm_rs_r4_t6_c3,
++	arm_rs_r5_t6_c3,
++	arm_rs_r6_t6_c3,
++	arm_rs_r7_t6_c3,
++	arm_rs_r8_t6_c3,
++	arm_rs_r9_t6_c3,
++	arm_rs_r10_t6_c3,
++	arm_rs_r11_t6_c3,
++	arm_rs_r12_t6_c3,
++	arm_rs_r13_t6_c3,
++	arm_rs_r14_t6_c3,
++	arm_rs_r15_t6_c3,
++	arm_rs_r0_t7_c3,
++	arm_rs_r1_t7_c3,
++	arm_rs_r2_t7_c3,
++	arm_rs_r3_t7_c3,
++	arm_rs_r4_t7_c3,
++	arm_rs_r5_t7_c3,
++	arm_rs_r6_t7_c3,
++	arm_rs_r7_t7_c3,
++	arm_rs_r8_t7_c3,
++	arm_rs_r9_t7_c3,
++	arm_rs_r10_t7_c3,
++	arm_rs_r11_t7_c3,
++	arm_rs_r12_t7_c3,
++	arm_rs_r13_t7_c3,
++	arm_rs_r14_t7_c3,
++	arm_rs_r15_t7_c3,
++	arm_rs_r0_t0_c4,
++	arm_rs_r1_t0_c4,
++	arm_rs_r2_t0_c4,
++	arm_rs_r3_t0_c4,
++	arm_rs_r4_t0_c4,
++	arm_rs_r5_t0_c4,
++	arm_rs_r6_t0_c4,
++	arm_rs_r7_t0_c4,
++	arm_rs_r8_t0_c4,
++	arm_rs_r9_t0_c4,
++	arm_rs_r10_t0_c4,
++	arm_rs_r11_t0_c4,
++	arm_rs_r12_t0_c4,
++	arm_rs_r13_t0_c4,
++	arm_rs_r14_t0_c4,
++	arm_rs_r15_t0_c4,
++	arm_rs_r0_t1_c4,
++	arm_rs_r1_t1_c4,
++	arm_rs_r2_t1_c4,
++	arm_rs_r3_t1_c4,
++	arm_rs_r4_t1_c4,
++	arm_rs_r5_t1_c4,
++	arm_rs_r6_t1_c4,
++	arm_rs_r7_t1_c4,
++	arm_rs_r8_t1_c4,
++	arm_rs_r9_t1_c4,
++	arm_rs_r10_t1_c4,
++	arm_rs_r11_t1_c4,
++	arm_rs_r12_t1_c4,
++	arm_rs_r13_t1_c4,
++	arm_rs_r14_t1_c4,
++	arm_rs_r15_t1_c4,
++	arm_rs_r0_t2_c4,
++	arm_rs_r1_t2_c4,
++	arm_rs_r2_t2_c4,
++	arm_rs_r3_t2_c4,
++	arm_rs_r4_t2_c4,
++	arm_rs_r5_t2_c4,
++	arm_rs_r6_t2_c4,
++	arm_rs_r7_t2_c4,
++	arm_rs_r8_t2_c4,
++	arm_rs_r9_t2_c4,
++	arm_rs_r10_t2_c4,
++	arm_rs_r11_t2_c4,
++	arm_rs_r12_t2_c4,
++	arm_rs_r13_t2_c4,
++	arm_rs_r14_t2_c4,
++	arm_rs_r15_t2_c4,
++	arm_rs_r0_t3_c4,
++	arm_rs_r1_t3_c4,
++	arm_rs_r2_t3_c4,
++	arm_rs_r3_t3_c4,
++	arm_rs_r4_t3_c4,
++	arm_rs_r5_t3_c4,
++	arm_rs_r6_t3_c4,
++	arm_rs_r7_t3_c4,
++	arm_rs_r8_t3_c4,
++	arm_rs_r9_t3_c4,
++	arm_rs_r10_t3_c4,
++	arm_rs_r11_t3_c4,
++	arm_rs_r12_t3_c4,
++	arm_rs_r13_t3_c4,
++	arm_rs_r14_t3_c4,
++	arm_rs_r15_t3_c4,
++	arm_rs_r0_t4_c4,
++	arm_rs_r1_t4_c4,
++	arm_rs_r2_t4_c4,
++	arm_rs_r3_t4_c4,
++	arm_rs_r4_t4_c4,
++	arm_rs_r5_t4_c4,
++	arm_rs_r6_t4_c4,
++	arm_rs_r7_t4_c4,
++	arm_rs_r8_t4_c4,
++	arm_rs_r9_t4_c4,
++	arm_rs_r10_t4_c4,
++	arm_rs_r11_t4_c4,
++	arm_rs_r12_t4_c4,
++	arm_rs_r13_t4_c4,
++	arm_rs_r14_t4_c4,
++	arm_rs_r15_t4_c4,
++	arm_rs_r0_t5_c4,
++	arm_rs_r1_t5_c4,
++	arm_rs_r2_t5_c4,
++	arm_rs_r3_t5_c4,
++	arm_rs_r4_t5_c4,
++	arm_rs_r5_t5_c4,
++	arm_rs_r6_t5_c4,
++	arm_rs_r7_t5_c4,
++	arm_rs_r8_t5_c4,
++	arm_rs_r9_t5_c4,
++	arm_rs_r10_t5_c4,
++	arm_rs_r11_t5_c4,
++	arm_rs_r12_t5_c4,
++	arm_rs_r13_t5_c4,
++	arm_rs_r14_t5_c4,
++	arm_rs_r15_t5_c4,
++	arm_rs_r0_t6_c4,
++	arm_rs_r1_t6_c4,
++	arm_rs_r2_t6_c4,
++	arm_rs_r3_t6_c4,
++	arm_rs_r4_t6_c4,
++	arm_rs_r5_t6_c4,
++	arm_rs_r6_t6_c4,
++	arm_rs_r7_t6_c4,
++	arm_rs_r8_t6_c4,
++	arm_rs_r9_t6_c4,
++	arm_rs_r10_t6_c4,
++	arm_rs_r11_t6_c4,
++	arm_rs_r12_t6_c4,
++	arm_rs_r13_t6_c4,
++	arm_rs_r14_t6_c4,
++	arm_rs_r15_t6_c4,
++	arm_rs_r0_t7_c4,
++	arm_rs_r1_t7_c4,
++	arm_rs_r2_t7_c4,
++	arm_rs_r3_t7_c4,
++	arm_rs_r4_t7_c4,
++	arm_rs_r5_t7_c4,
++	arm_rs_r6_t7_c4,
++	arm_rs_r7_t7_c4,
++	arm_rs_r8_t7_c4,
++	arm_rs_r9_t7_c4,
++	arm_rs_r10_t7_c4,
++	arm_rs_r11_t7_c4,
++	arm_rs_r12_t7_c4,
++	arm_rs_r13_t7_c4,
++	arm_rs_r14_t7_c4,
++	arm_rs_r15_t7_c4,
++	arm_rs_r0_t0_c5,
++	arm_rs_r1_t0_c5,
++	arm_rs_r2_t0_c5,
++	arm_rs_r3_t0_c5,
++	arm_rs_r4_t0_c5,
++	arm_rs_r5_t0_c5,
++	arm_rs_r6_t0_c5,
++	arm_rs_r7_t0_c5,
++	arm_rs_r8_t0_c5,
++	arm_rs_r9_t0_c5,
++	arm_rs_r10_t0_c5,
++	arm_rs_r11_t0_c5,
++	arm_rs_r12_t0_c5,
++	arm_rs_r13_t0_c5,
++	arm_rs_r14_t0_c5,
++	arm_rs_r15_t0_c5,
++	arm_rs_r0_t1_c5,
++	arm_rs_r1_t1_c5,
++	arm_rs_r2_t1_c5,
++	arm_rs_r3_t1_c5,
++	arm_rs_r4_t1_c5,
++	arm_rs_r5_t1_c5,
++	arm_rs_r6_t1_c5,
++	arm_rs_r7_t1_c5,
++	arm_rs_r8_t1_c5,
++	arm_rs_r9_t1_c5,
++	arm_rs_r10_t1_c5,
++	arm_rs_r11_t1_c5,
++	arm_rs_r12_t1_c5,
++	arm_rs_r13_t1_c5,
++	arm_rs_r14_t1_c5,
++	arm_rs_r15_t1_c5,
++	arm_rs_r0_t2_c5,
++	arm_rs_r1_t2_c5,
++	arm_rs_r2_t2_c5,
++	arm_rs_r3_t2_c5,
++	arm_rs_r4_t2_c5,
++	arm_rs_r5_t2_c5,
++	arm_rs_r6_t2_c5,
++	arm_rs_r7_t2_c5,
++	arm_rs_r8_t2_c5,
++	arm_rs_r9_t2_c5,
++	arm_rs_r10_t2_c5,
++	arm_rs_r11_t2_c5,
++	arm_rs_r12_t2_c5,
++	arm_rs_r13_t2_c5,
++	arm_rs_r14_t2_c5,
++	arm_rs_r15_t2_c5,
++	arm_rs_r0_t3_c5,
++	arm_rs_r1_t3_c5,
++	arm_rs_r2_t3_c5,
++	arm_rs_r3_t3_c5,
++	arm_rs_r4_t3_c5,
++	arm_rs_r5_t3_c5,
++	arm_rs_r6_t3_c5,
++	arm_rs_r7_t3_c5,
++	arm_rs_r8_t3_c5,
++	arm_rs_r9_t3_c5,
++	arm_rs_r10_t3_c5,
++	arm_rs_r11_t3_c5,
++	arm_rs_r12_t3_c5,
++	arm_rs_r13_t3_c5,
++	arm_rs_r14_t3_c5,
++	arm_rs_r15_t3_c5,
++	arm_rs_r0_t4_c5,
++	arm_rs_r1_t4_c5,
++	arm_rs_r2_t4_c5,
++	arm_rs_r3_t4_c5,
++	arm_rs_r4_t4_c5,
++	arm_rs_r5_t4_c5,
++	arm_rs_r6_t4_c5,
++	arm_rs_r7_t4_c5,
++	arm_rs_r8_t4_c5,
++	arm_rs_r9_t4_c5,
++	arm_rs_r10_t4_c5,
++	arm_rs_r11_t4_c5,
++	arm_rs_r12_t4_c5,
++	arm_rs_r13_t4_c5,
++	arm_rs_r14_t4_c5,
++	arm_rs_r15_t4_c5,
++	arm_rs_r0_t5_c5,
++	arm_rs_r1_t5_c5,
++	arm_rs_r2_t5_c5,
++	arm_rs_r3_t5_c5,
++	arm_rs_r4_t5_c5,
++	arm_rs_r5_t5_c5,
++	arm_rs_r6_t5_c5,
++	arm_rs_r7_t5_c5,
++	arm_rs_r8_t5_c5,
++	arm_rs_r9_t5_c5,
++	arm_rs_r10_t5_c5,
++	arm_rs_r11_t5_c5,
++	arm_rs_r12_t5_c5,
++	arm_rs_r13_t5_c5,
++	arm_rs_r14_t5_c5,
++	arm_rs_r15_t5_c5,
++	arm_rs_r0_t6_c5,
++	arm_rs_r1_t6_c5,
++	arm_rs_r2_t6_c5,
++	arm_rs_r3_t6_c5,
++	arm_rs_r4_t6_c5,
++	arm_rs_r5_t6_c5,
++	arm_rs_r6_t6_c5,
++	arm_rs_r7_t6_c5,
++	arm_rs_r8_t6_c5,
++	arm_rs_r9_t6_c5,
++	arm_rs_r10_t6_c5,
++	arm_rs_r11_t6_c5,
++	arm_rs_r12_t6_c5,
++	arm_rs_r13_t6_c5,
++	arm_rs_r14_t6_c5,
++	arm_rs_r15_t6_c5,
++	arm_rs_r0_t7_c5,
++	arm_rs_r1_t7_c5,
++	arm_rs_r2_t7_c5,
++	arm_rs_r3_t7_c5,
++	arm_rs_r4_t7_c5,
++	arm_rs_r5_t7_c5,
++	arm_rs_r6_t7_c5,
++	arm_rs_r7_t7_c5,
++	arm_rs_r8_t7_c5,
++	arm_rs_r9_t7_c5,
++	arm_rs_r10_t7_c5,
++	arm_rs_r11_t7_c5,
++	arm_rs_r12_t7_c5,
++	arm_rs_r13_t7_c5,
++	arm_rs_r14_t7_c5,
++	arm_rs_r15_t7_c5,
++	arm_rs_r0_t0_c6,
++	arm_rs_r1_t0_c6,
++	arm_rs_r2_t0_c6,
++	arm_rs_r3_t0_c6,
++	arm_rs_r4_t0_c6,
++	arm_rs_r5_t0_c6,
++	arm_rs_r6_t0_c6,
++	arm_rs_r7_t0_c6,
++	arm_rs_r8_t0_c6,
++	arm_rs_r9_t0_c6,
++	arm_rs_r10_t0_c6,
++	arm_rs_r11_t0_c6,
++	arm_rs_r12_t0_c6,
++	arm_rs_r13_t0_c6,
++	arm_rs_r14_t0_c6,
++	arm_rs_r15_t0_c6,
++	arm_rs_r0_t1_c6,
++	arm_rs_r1_t1_c6,
++	arm_rs_r2_t1_c6,
++	arm_rs_r3_t1_c6,
++	arm_rs_r4_t1_c6,
++	arm_rs_r5_t1_c6,
++	arm_rs_r6_t1_c6,
++	arm_rs_r7_t1_c6,
++	arm_rs_r8_t1_c6,
++	arm_rs_r9_t1_c6,
++	arm_rs_r10_t1_c6,
++	arm_rs_r11_t1_c6,
++	arm_rs_r12_t1_c6,
++	arm_rs_r13_t1_c6,
++	arm_rs_r14_t1_c6,
++	arm_rs_r15_t1_c6,
++	arm_rs_r0_t2_c6,
++	arm_rs_r1_t2_c6,
++	arm_rs_r2_t2_c6,
++	arm_rs_r3_t2_c6,
++	arm_rs_r4_t2_c6,
++	arm_rs_r5_t2_c6,
++	arm_rs_r6_t2_c6,
++	arm_rs_r7_t2_c6,
++	arm_rs_r8_t2_c6,
++	arm_rs_r9_t2_c6,
++	arm_rs_r10_t2_c6,
++	arm_rs_r11_t2_c6,
++	arm_rs_r12_t2_c6,
++	arm_rs_r13_t2_c6,
++	arm_rs_r14_t2_c6,
++	arm_rs_r15_t2_c6,
++	arm_rs_r0_t3_c6,
++	arm_rs_r1_t3_c6,
++	arm_rs_r2_t3_c6,
++	arm_rs_r3_t3_c6,
++	arm_rs_r4_t3_c6,
++	arm_rs_r5_t3_c6,
++	arm_rs_r6_t3_c6,
++	arm_rs_r7_t3_c6,
++	arm_rs_r8_t3_c6,
++	arm_rs_r9_t3_c6,
++	arm_rs_r10_t3_c6,
++	arm_rs_r11_t3_c6,
++	arm_rs_r12_t3_c6,
++	arm_rs_r13_t3_c6,
++	arm_rs_r14_t3_c6,
++	arm_rs_r15_t3_c6,
++	arm_rs_r0_t4_c6,
++	arm_rs_r1_t4_c6,
++	arm_rs_r2_t4_c6,
++	arm_rs_r3_t4_c6,
++	arm_rs_r4_t4_c6,
++	arm_rs_r5_t4_c6,
++	arm_rs_r6_t4_c6,
++	arm_rs_r7_t4_c6,
++	arm_rs_r8_t4_c6,
++	arm_rs_r9_t4_c6,
++	arm_rs_r10_t4_c6,
++	arm_rs_r11_t4_c6,
++	arm_rs_r12_t4_c6,
++	arm_rs_r13_t4_c6,
++	arm_rs_r14_t4_c6,
++	arm_rs_r15_t4_c6,
++	arm_rs_r0_t5_c6,
++	arm_rs_r1_t5_c6,
++	arm_rs_r2_t5_c6,
++	arm_rs_r3_t5_c6,
++	arm_rs_r4_t5_c6,
++	arm_rs_r5_t5_c6,
++	arm_rs_r6_t5_c6,
++	arm_rs_r7_t5_c6,
++	arm_rs_r8_t5_c6,
++	arm_rs_r9_t5_c6,
++	arm_rs_r10_t5_c6,
++	arm_rs_r11_t5_c6,
++	arm_rs_r12_t5_c6,
++	arm_rs_r13_t5_c6,
++	arm_rs_r14_t5_c6,
++	arm_rs_r15_t5_c6,
++	arm_rs_r0_t6_c6,
++	arm_rs_r1_t6_c6,
++	arm_rs_r2_t6_c6,
++	arm_rs_r3_t6_c6,
++	arm_rs_r4_t6_c6,
++	arm_rs_r5_t6_c6,
++	arm_rs_r6_t6_c6,
++	arm_rs_r7_t6_c6,
++	arm_rs_r8_t6_c6,
++	arm_rs_r9_t6_c6,
++	arm_rs_r10_t6_c6,
++	arm_rs_r11_t6_c6,
++	arm_rs_r12_t6_c6,
++	arm_rs_r13_t6_c6,
++	arm_rs_r14_t6_c6,
++	arm_rs_r15_t6_c6,
++	arm_rs_r0_t7_c6,
++	arm_rs_r1_t7_c6,
++	arm_rs_r2_t7_c6,
++	arm_rs_r3_t7_c6,
++	arm_rs_r4_t7_c6,
++	arm_rs_r5_t7_c6,
++	arm_rs_r6_t7_c6,
++	arm_rs_r7_t7_c6,
++	arm_rs_r8_t7_c6,
++	arm_rs_r9_t7_c6,
++	arm_rs_r10_t7_c6,
++	arm_rs_r11_t7_c6,
++	arm_rs_r12_t7_c6,
++	arm_rs_r13_t7_c6,
++	arm_rs_r14_t7_c6,
++	arm_rs_r15_t7_c6,
++	arm_rs_r0_t0_c7,
++	arm_rs_r1_t0_c7,
++	arm_rs_r2_t0_c7,
++	arm_rs_r3_t0_c7,
++	arm_rs_r4_t0_c7,
++	arm_rs_r5_t0_c7,
++	arm_rs_r6_t0_c7,
++	arm_rs_r7_t0_c7,
++	arm_rs_r8_t0_c7,
++	arm_rs_r9_t0_c7,
++	arm_rs_r10_t0_c7,
++	arm_rs_r11_t0_c7,
++	arm_rs_r12_t0_c7,
++	arm_rs_r13_t0_c7,
++	arm_rs_r14_t0_c7,
++	arm_rs_r15_t0_c7,
++	arm_rs_r0_t1_c7,
++	arm_rs_r1_t1_c7,
++	arm_rs_r2_t1_c7,
++	arm_rs_r3_t1_c7,
++	arm_rs_r4_t1_c7,
++	arm_rs_r5_t1_c7,
++	arm_rs_r6_t1_c7,
++	arm_rs_r7_t1_c7,
++	arm_rs_r8_t1_c7,
++	arm_rs_r9_t1_c7,
++	arm_rs_r10_t1_c7,
++	arm_rs_r11_t1_c7,
++	arm_rs_r12_t1_c7,
++	arm_rs_r13_t1_c7,
++	arm_rs_r14_t1_c7,
++	arm_rs_r15_t1_c7,
++	arm_rs_r0_t2_c7,
++	arm_rs_r1_t2_c7,
++	arm_rs_r2_t2_c7,
++	arm_rs_r3_t2_c7,
++	arm_rs_r4_t2_c7,
++	arm_rs_r5_t2_c7,
++	arm_rs_r6_t2_c7,
++	arm_rs_r7_t2_c7,
++	arm_rs_r8_t2_c7,
++	arm_rs_r9_t2_c7,
++	arm_rs_r10_t2_c7,
++	arm_rs_r11_t2_c7,
++	arm_rs_r12_t2_c7,
++	arm_rs_r13_t2_c7,
++	arm_rs_r14_t2_c7,
++	arm_rs_r15_t2_c7,
++	arm_rs_r0_t3_c7,
++	arm_rs_r1_t3_c7,
++	arm_rs_r2_t3_c7,
++	arm_rs_r3_t3_c7,
++	arm_rs_r4_t3_c7,
++	arm_rs_r5_t3_c7,
++	arm_rs_r6_t3_c7,
++	arm_rs_r7_t3_c7,
++	arm_rs_r8_t3_c7,
++	arm_rs_r9_t3_c7,
++	arm_rs_r10_t3_c7,
++	arm_rs_r11_t3_c7,
++	arm_rs_r12_t3_c7,
++	arm_rs_r13_t3_c7,
++	arm_rs_r14_t3_c7,
++	arm_rs_r15_t3_c7,
++	arm_rs_r0_t4_c7,
++	arm_rs_r1_t4_c7,
++	arm_rs_r2_t4_c7,
++	arm_rs_r3_t4_c7,
++	arm_rs_r4_t4_c7,
++	arm_rs_r5_t4_c7,
++	arm_rs_r6_t4_c7,
++	arm_rs_r7_t4_c7,
++	arm_rs_r8_t4_c7,
++	arm_rs_r9_t4_c7,
++	arm_rs_r10_t4_c7,
++	arm_rs_r11_t4_c7,
++	arm_rs_r12_t4_c7,
++	arm_rs_r13_t4_c7,
++	arm_rs_r14_t4_c7,
++	arm_rs_r15_t4_c7,
++	arm_rs_r0_t5_c7,
++	arm_rs_r1_t5_c7,
++	arm_rs_r2_t5_c7,
++	arm_rs_r3_t5_c7,
++	arm_rs_r4_t5_c7,
++	arm_rs_r5_t5_c7,
++	arm_rs_r6_t5_c7,
++	arm_rs_r7_t5_c7,
++	arm_rs_r8_t5_c7,
++	arm_rs_r9_t5_c7,
++	arm_rs_r10_t5_c7,
++	arm_rs_r11_t5_c7,
++	arm_rs_r12_t5_c7,
++	arm_rs_r13_t5_c7,
++	arm_rs_r14_t5_c7,
++	arm_rs_r15_t5_c7,
++	arm_rs_r0_t6_c7,
++	arm_rs_r1_t6_c7,
++	arm_rs_r2_t6_c7,
++	arm_rs_r3_t6_c7,
++	arm_rs_r4_t6_c7,
++	arm_rs_r5_t6_c7,
++	arm_rs_r6_t6_c7,
++	arm_rs_r7_t6_c7,
++	arm_rs_r8_t6_c7,
++	arm_rs_r9_t6_c7,
++	arm_rs_r10_t6_c7,
++	arm_rs_r11_t6_c7,
++	arm_rs_r12_t6_c7,
++	arm_rs_r13_t6_c7,
++	arm_rs_r14_t6_c7,
++	arm_rs_r15_t6_c7,
++	arm_rs_r0_t7_c7,
++	arm_rs_r1_t7_c7,
++	arm_rs_r2_t7_c7,
++	arm_rs_r3_t7_c7,
++	arm_rs_r4_t7_c7,
++	arm_rs_r5_t7_c7,
++	arm_rs_r6_t7_c7,
++	arm_rs_r7_t7_c7,
++	arm_rs_r8_t7_c7,
++	arm_rs_r9_t7_c7,
++	arm_rs_r10_t7_c7,
++	arm_rs_r11_t7_c7,
++	arm_rs_r12_t7_c7,
++	arm_rs_r13_t7_c7,
++	arm_rs_r14_t7_c7,
++	arm_rs_r15_t7_c7,
++	arm_rs_r0_t0_c8,
++	arm_rs_r1_t0_c8,
++	arm_rs_r2_t0_c8,
++	arm_rs_r3_t0_c8,
++	arm_rs_r4_t0_c8,
++	arm_rs_r5_t0_c8,
++	arm_rs_r6_t0_c8,
++	arm_rs_r7_t0_c8,
++	arm_rs_r8_t0_c8,
++	arm_rs_r9_t0_c8,
++	arm_rs_r10_t0_c8,
++	arm_rs_r11_t0_c8,
++	arm_rs_r12_t0_c8,
++	arm_rs_r13_t0_c8,
++	arm_rs_r14_t0_c8,
++	arm_rs_r15_t0_c8,
++	arm_rs_r0_t1_c8,
++	arm_rs_r1_t1_c8,
++	arm_rs_r2_t1_c8,
++	arm_rs_r3_t1_c8,
++	arm_rs_r4_t1_c8,
++	arm_rs_r5_t1_c8,
++	arm_rs_r6_t1_c8,
++	arm_rs_r7_t1_c8,
++	arm_rs_r8_t1_c8,
++	arm_rs_r9_t1_c8,
++	arm_rs_r10_t1_c8,
++	arm_rs_r11_t1_c8,
++	arm_rs_r12_t1_c8,
++	arm_rs_r13_t1_c8,
++	arm_rs_r14_t1_c8,
++	arm_rs_r15_t1_c8,
++	arm_rs_r0_t2_c8,
++	arm_rs_r1_t2_c8,
++	arm_rs_r2_t2_c8,
++	arm_rs_r3_t2_c8,
++	arm_rs_r4_t2_c8,
++	arm_rs_r5_t2_c8,
++	arm_rs_r6_t2_c8,
++	arm_rs_r7_t2_c8,
++	arm_rs_r8_t2_c8,
++	arm_rs_r9_t2_c8,
++	arm_rs_r10_t2_c8,
++	arm_rs_r11_t2_c8,
++	arm_rs_r12_t2_c8,
++	arm_rs_r13_t2_c8,
++	arm_rs_r14_t2_c8,
++	arm_rs_r15_t2_c8,
++	arm_rs_r0_t3_c8,
++	arm_rs_r1_t3_c8,
++	arm_rs_r2_t3_c8,
++	arm_rs_r3_t3_c8,
++	arm_rs_r4_t3_c8,
++	arm_rs_r5_t3_c8,
++	arm_rs_r6_t3_c8,
++	arm_rs_r7_t3_c8,
++	arm_rs_r8_t3_c8,
++	arm_rs_r9_t3_c8,
++	arm_rs_r10_t3_c8,
++	arm_rs_r11_t3_c8,
++	arm_rs_r12_t3_c8,
++	arm_rs_r13_t3_c8,
++	arm_rs_r14_t3_c8,
++	arm_rs_r15_t3_c8,
++	arm_rs_r0_t4_c8,
++	arm_rs_r1_t4_c8,
++	arm_rs_r2_t4_c8,
++	arm_rs_r3_t4_c8,
++	arm_rs_r4_t4_c8,
++	arm_rs_r5_t4_c8,
++	arm_rs_r6_t4_c8,
++	arm_rs_r7_t4_c8,
++	arm_rs_r8_t4_c8,
++	arm_rs_r9_t4_c8,
++	arm_rs_r10_t4_c8,
++	arm_rs_r11_t4_c8,
++	arm_rs_r12_t4_c8,
++	arm_rs_r13_t4_c8,
++	arm_rs_r14_t4_c8,
++	arm_rs_r15_t4_c8,
++	arm_rs_r0_t5_c8,
++	arm_rs_r1_t5_c8,
++	arm_rs_r2_t5_c8,
++	arm_rs_r3_t5_c8,
++	arm_rs_r4_t5_c8,
++	arm_rs_r5_t5_c8,
++	arm_rs_r6_t5_c8,
++	arm_rs_r7_t5_c8,
++	arm_rs_r8_t5_c8,
++	arm_rs_r9_t5_c8,
++	arm_rs_r10_t5_c8,
++	arm_rs_r11_t5_c8,
++	arm_rs_r12_t5_c8,
++	arm_rs_r13_t5_c8,
++	arm_rs_r14_t5_c8,
++	arm_rs_r15_t5_c8,
++	arm_rs_r0_t6_c8,
++	arm_rs_r1_t6_c8,
++	arm_rs_r2_t6_c8,
++	arm_rs_r3_t6_c8,
++	arm_rs_r4_t6_c8,
++	arm_rs_r5_t6_c8,
++	arm_rs_r6_t6_c8,
++	arm_rs_r7_t6_c8,
++	arm_rs_r8_t6_c8,
++	arm_rs_r9_t6_c8,
++	arm_rs_r10_t6_c8,
++	arm_rs_r11_t6_c8,
++	arm_rs_r12_t6_c8,
++	arm_rs_r13_t6_c8,
++	arm_rs_r14_t6_c8,
++	arm_rs_r15_t6_c8,
++	arm_rs_r0_t7_c8,
++	arm_rs_r1_t7_c8,
++	arm_rs_r2_t7_c8,
++	arm_rs_r3_t7_c8,
++	arm_rs_r4_t7_c8,
++	arm_rs_r5_t7_c8,
++	arm_rs_r6_t7_c8,
++	arm_rs_r7_t7_c8,
++	arm_rs_r8_t7_c8,
++	arm_rs_r9_t7_c8,
++	arm_rs_r10_t7_c8,
++	arm_rs_r11_t7_c8,
++	arm_rs_r12_t7_c8,
++	arm_rs_r13_t7_c8,
++	arm_rs_r14_t7_c8,
++	arm_rs_r15_t7_c8,
++	arm_rs_r0_t0_c9,
++	arm_rs_r1_t0_c9,
++	arm_rs_r2_t0_c9,
++	arm_rs_r3_t0_c9,
++	arm_rs_r4_t0_c9,
++	arm_rs_r5_t0_c9,
++	arm_rs_r6_t0_c9,
++	arm_rs_r7_t0_c9,
++	arm_rs_r8_t0_c9,
++	arm_rs_r9_t0_c9,
++	arm_rs_r10_t0_c9,
++	arm_rs_r11_t0_c9,
++	arm_rs_r12_t0_c9,
++	arm_rs_r13_t0_c9,
++	arm_rs_r14_t0_c9,
++	arm_rs_r15_t0_c9,
++	arm_rs_r0_t1_c9,
++	arm_rs_r1_t1_c9,
++	arm_rs_r2_t1_c9,
++	arm_rs_r3_t1_c9,
++	arm_rs_r4_t1_c9,
++	arm_rs_r5_t1_c9,
++	arm_rs_r6_t1_c9,
++	arm_rs_r7_t1_c9,
++	arm_rs_r8_t1_c9,
++	arm_rs_r9_t1_c9,
++	arm_rs_r10_t1_c9,
++	arm_rs_r11_t1_c9,
++	arm_rs_r12_t1_c9,
++	arm_rs_r13_t1_c9,
++	arm_rs_r14_t1_c9,
++	arm_rs_r15_t1_c9,
++	arm_rs_r0_t2_c9,
++	arm_rs_r1_t2_c9,
++	arm_rs_r2_t2_c9,
++	arm_rs_r3_t2_c9,
++	arm_rs_r4_t2_c9,
++	arm_rs_r5_t2_c9,
++	arm_rs_r6_t2_c9,
++	arm_rs_r7_t2_c9,
++	arm_rs_r8_t2_c9,
++	arm_rs_r9_t2_c9,
++	arm_rs_r10_t2_c9,
++	arm_rs_r11_t2_c9,
++	arm_rs_r12_t2_c9,
++	arm_rs_r13_t2_c9,
++	arm_rs_r14_t2_c9,
++	arm_rs_r15_t2_c9,
++	arm_rs_r0_t3_c9,
++	arm_rs_r1_t3_c9,
++	arm_rs_r2_t3_c9,
++	arm_rs_r3_t3_c9,
++	arm_rs_r4_t3_c9,
++	arm_rs_r5_t3_c9,
++	arm_rs_r6_t3_c9,
++	arm_rs_r7_t3_c9,
++	arm_rs_r8_t3_c9,
++	arm_rs_r9_t3_c9,
++	arm_rs_r10_t3_c9,
++	arm_rs_r11_t3_c9,
++	arm_rs_r12_t3_c9,
++	arm_rs_r13_t3_c9,
++	arm_rs_r14_t3_c9,
++	arm_rs_r15_t3_c9,
++	arm_rs_r0_t4_c9,
++	arm_rs_r1_t4_c9,
++	arm_rs_r2_t4_c9,
++	arm_rs_r3_t4_c9,
++	arm_rs_r4_t4_c9,
++	arm_rs_r5_t4_c9,
++	arm_rs_r6_t4_c9,
++	arm_rs_r7_t4_c9,
++	arm_rs_r8_t4_c9,
++	arm_rs_r9_t4_c9,
++	arm_rs_r10_t4_c9,
++	arm_rs_r11_t4_c9,
++	arm_rs_r12_t4_c9,
++	arm_rs_r13_t4_c9,
++	arm_rs_r14_t4_c9,
++	arm_rs_r15_t4_c9,
++	arm_rs_r0_t5_c9,
++	arm_rs_r1_t5_c9,
++	arm_rs_r2_t5_c9,
++	arm_rs_r3_t5_c9,
++	arm_rs_r4_t5_c9,
++	arm_rs_r5_t5_c9,
++	arm_rs_r6_t5_c9,
++	arm_rs_r7_t5_c9,
++	arm_rs_r8_t5_c9,
++	arm_rs_r9_t5_c9,
++	arm_rs_r10_t5_c9,
++	arm_rs_r11_t5_c9,
++	arm_rs_r12_t5_c9,
++	arm_rs_r13_t5_c9,
++	arm_rs_r14_t5_c9,
++	arm_rs_r15_t5_c9,
++	arm_rs_r0_t6_c9,
++	arm_rs_r1_t6_c9,
++	arm_rs_r2_t6_c9,
++	arm_rs_r3_t6_c9,
++	arm_rs_r4_t6_c9,
++	arm_rs_r5_t6_c9,
++	arm_rs_r6_t6_c9,
++	arm_rs_r7_t6_c9,
++	arm_rs_r8_t6_c9,
++	arm_rs_r9_t6_c9,
++	arm_rs_r10_t6_c9,
++	arm_rs_r11_t6_c9,
++	arm_rs_r12_t6_c9,
++	arm_rs_r13_t6_c9,
++	arm_rs_r14_t6_c9,
++	arm_rs_r15_t6_c9,
++	arm_rs_r0_t7_c9,
++	arm_rs_r1_t7_c9,
++	arm_rs_r2_t7_c9,
++	arm_rs_r3_t7_c9,
++	arm_rs_r4_t7_c9,
++	arm_rs_r5_t7_c9,
++	arm_rs_r6_t7_c9,
++	arm_rs_r7_t7_c9,
++	arm_rs_r8_t7_c9,
++	arm_rs_r9_t7_c9,
++	arm_rs_r10_t7_c9,
++	arm_rs_r11_t7_c9,
++	arm_rs_r12_t7_c9,
++	arm_rs_r13_t7_c9,
++	arm_rs_r14_t7_c9,
++	arm_rs_r15_t7_c9,
++	arm_rs_r0_t0_c10,
++	arm_rs_r1_t0_c10,
++	arm_rs_r2_t0_c10,
++	arm_rs_r3_t0_c10,
++	arm_rs_r4_t0_c10,
++	arm_rs_r5_t0_c10,
++	arm_rs_r6_t0_c10,
++	arm_rs_r7_t0_c10,
++	arm_rs_r8_t0_c10,
++	arm_rs_r9_t0_c10,
++	arm_rs_r10_t0_c10,
++	arm_rs_r11_t0_c10,
++	arm_rs_r12_t0_c10,
++	arm_rs_r13_t0_c10,
++	arm_rs_r14_t0_c10,
++	arm_rs_r15_t0_c10,
++	arm_rs_r0_t1_c10,
++	arm_rs_r1_t1_c10,
++	arm_rs_r2_t1_c10,
++	arm_rs_r3_t1_c10,
++	arm_rs_r4_t1_c10,
++	arm_rs_r5_t1_c10,
++	arm_rs_r6_t1_c10,
++	arm_rs_r7_t1_c10,
++	arm_rs_r8_t1_c10,
++	arm_rs_r9_t1_c10,
++	arm_rs_r10_t1_c10,
++	arm_rs_r11_t1_c10,
++	arm_rs_r12_t1_c10,
++	arm_rs_r13_t1_c10,
++	arm_rs_r14_t1_c10,
++	arm_rs_r15_t1_c10,
++	arm_rs_r0_t2_c10,
++	arm_rs_r1_t2_c10,
++	arm_rs_r2_t2_c10,
++	arm_rs_r3_t2_c10,
++	arm_rs_r4_t2_c10,
++	arm_rs_r5_t2_c10,
++	arm_rs_r6_t2_c10,
++	arm_rs_r7_t2_c10,
++	arm_rs_r8_t2_c10,
++	arm_rs_r9_t2_c10,
++	arm_rs_r10_t2_c10,
++	arm_rs_r11_t2_c10,
++	arm_rs_r12_t2_c10,
++	arm_rs_r13_t2_c10,
++	arm_rs_r14_t2_c10,
++	arm_rs_r15_t2_c10,
++	arm_rs_r0_t3_c10,
++	arm_rs_r1_t3_c10,
++	arm_rs_r2_t3_c10,
++	arm_rs_r3_t3_c10,
++	arm_rs_r4_t3_c10,
++	arm_rs_r5_t3_c10,
++	arm_rs_r6_t3_c10,
++	arm_rs_r7_t3_c10,
++	arm_rs_r8_t3_c10,
++	arm_rs_r9_t3_c10,
++	arm_rs_r10_t3_c10,
++	arm_rs_r11_t3_c10,
++	arm_rs_r12_t3_c10,
++	arm_rs_r13_t3_c10,
++	arm_rs_r14_t3_c10,
++	arm_rs_r15_t3_c10,
++	arm_rs_r0_t4_c10,
++	arm_rs_r1_t4_c10,
++	arm_rs_r2_t4_c10,
++	arm_rs_r3_t4_c10,
++	arm_rs_r4_t4_c10,
++	arm_rs_r5_t4_c10,
++	arm_rs_r6_t4_c10,
++	arm_rs_r7_t4_c10,
++	arm_rs_r8_t4_c10,
++	arm_rs_r9_t4_c10,
++	arm_rs_r10_t4_c10,
++	arm_rs_r11_t4_c10,
++	arm_rs_r12_t4_c10,
++	arm_rs_r13_t4_c10,
++	arm_rs_r14_t4_c10,
++	arm_rs_r15_t4_c10,
++	arm_rs_r0_t5_c10,
++	arm_rs_r1_t5_c10,
++	arm_rs_r2_t5_c10,
++	arm_rs_r3_t5_c10,
++	arm_rs_r4_t5_c10,
++	arm_rs_r5_t5_c10,
++	arm_rs_r6_t5_c10,
++	arm_rs_r7_t5_c10,
++	arm_rs_r8_t5_c10,
++	arm_rs_r9_t5_c10,
++	arm_rs_r10_t5_c10,
++	arm_rs_r11_t5_c10,
++	arm_rs_r12_t5_c10,
++	arm_rs_r13_t5_c10,
++	arm_rs_r14_t5_c10,
++	arm_rs_r15_t5_c10,
++	arm_rs_r0_t6_c10,
++	arm_rs_r1_t6_c10,
++	arm_rs_r2_t6_c10,
++	arm_rs_r3_t6_c10,
++	arm_rs_r4_t6_c10,
++	arm_rs_r5_t6_c10,
++	arm_rs_r6_t6_c10,
++	arm_rs_r7_t6_c10,
++	arm_rs_r8_t6_c10,
++	arm_rs_r9_t6_c10,
++	arm_rs_r10_t6_c10,
++	arm_rs_r11_t6_c10,
++	arm_rs_r12_t6_c10,
++	arm_rs_r13_t6_c10,
++	arm_rs_r14_t6_c10,
++	arm_rs_r15_t6_c10,
++	arm_rs_r0_t7_c10,
++	arm_rs_r1_t7_c10,
++	arm_rs_r2_t7_c10,
++	arm_rs_r3_t7_c10,
++	arm_rs_r4_t7_c10,
++	arm_rs_r5_t7_c10,
++	arm_rs_r6_t7_c10,
++	arm_rs_r7_t7_c10,
++	arm_rs_r8_t7_c10,
++	arm_rs_r9_t7_c10,
++	arm_rs_r10_t7_c10,
++	arm_rs_r11_t7_c10,
++	arm_rs_r12_t7_c10,
++	arm_rs_r13_t7_c10,
++	arm_rs_r14_t7_c10,
++	arm_rs_r15_t7_c10,
++	arm_rs_r0_t0_c11,
++	arm_rs_r1_t0_c11,
++	arm_rs_r2_t0_c11,
++	arm_rs_r3_t0_c11,
++	arm_rs_r4_t0_c11,
++	arm_rs_r5_t0_c11,
++	arm_rs_r6_t0_c11,
++	arm_rs_r7_t0_c11,
++	arm_rs_r8_t0_c11,
++	arm_rs_r9_t0_c11,
++	arm_rs_r10_t0_c11,
++	arm_rs_r11_t0_c11,
++	arm_rs_r12_t0_c11,
++	arm_rs_r13_t0_c11,
++	arm_rs_r14_t0_c11,
++	arm_rs_r15_t0_c11,
++	arm_rs_r0_t1_c11,
++	arm_rs_r1_t1_c11,
++	arm_rs_r2_t1_c11,
++	arm_rs_r3_t1_c11,
++	arm_rs_r4_t1_c11,
++	arm_rs_r5_t1_c11,
++	arm_rs_r6_t1_c11,
++	arm_rs_r7_t1_c11,
++	arm_rs_r8_t1_c11,
++	arm_rs_r9_t1_c11,
++	arm_rs_r10_t1_c11,
++	arm_rs_r11_t1_c11,
++	arm_rs_r12_t1_c11,
++	arm_rs_r13_t1_c11,
++	arm_rs_r14_t1_c11,
++	arm_rs_r15_t1_c11,
++	arm_rs_r0_t2_c11,
++	arm_rs_r1_t2_c11,
++	arm_rs_r2_t2_c11,
++	arm_rs_r3_t2_c11,
++	arm_rs_r4_t2_c11,
++	arm_rs_r5_t2_c11,
++	arm_rs_r6_t2_c11,
++	arm_rs_r7_t2_c11,
++	arm_rs_r8_t2_c11,
++	arm_rs_r9_t2_c11,
++	arm_rs_r10_t2_c11,
++	arm_rs_r11_t2_c11,
++	arm_rs_r12_t2_c11,
++	arm_rs_r13_t2_c11,
++	arm_rs_r14_t2_c11,
++	arm_rs_r15_t2_c11,
++	arm_rs_r0_t3_c11,
++	arm_rs_r1_t3_c11,
++	arm_rs_r2_t3_c11,
++	arm_rs_r3_t3_c11,
++	arm_rs_r4_t3_c11,
++	arm_rs_r5_t3_c11,
++	arm_rs_r6_t3_c11,
++	arm_rs_r7_t3_c11,
++	arm_rs_r8_t3_c11,
++	arm_rs_r9_t3_c11,
++	arm_rs_r10_t3_c11,
++	arm_rs_r11_t3_c11,
++	arm_rs_r12_t3_c11,
++	arm_rs_r13_t3_c11,
++	arm_rs_r14_t3_c11,
++	arm_rs_r15_t3_c11,
++	arm_rs_r0_t4_c11,
++	arm_rs_r1_t4_c11,
++	arm_rs_r2_t4_c11,
++	arm_rs_r3_t4_c11,
++	arm_rs_r4_t4_c11,
++	arm_rs_r5_t4_c11,
++	arm_rs_r6_t4_c11,
++	arm_rs_r7_t4_c11,
++	arm_rs_r8_t4_c11,
++	arm_rs_r9_t4_c11,
++	arm_rs_r10_t4_c11,
++	arm_rs_r11_t4_c11,
++	arm_rs_r12_t4_c11,
++	arm_rs_r13_t4_c11,
++	arm_rs_r14_t4_c11,
++	arm_rs_r15_t4_c11,
++	arm_rs_r0_t5_c11,
++	arm_rs_r1_t5_c11,
++	arm_rs_r2_t5_c11,
++	arm_rs_r3_t5_c11,
++	arm_rs_r4_t5_c11,
++	arm_rs_r5_t5_c11,
++	arm_rs_r6_t5_c11,
++	arm_rs_r7_t5_c11,
++	arm_rs_r8_t5_c11,
++	arm_rs_r9_t5_c11,
++	arm_rs_r10_t5_c11,
++	arm_rs_r11_t5_c11,
++	arm_rs_r12_t5_c11,
++	arm_rs_r13_t5_c11,
++	arm_rs_r14_t5_c11,
++	arm_rs_r15_t5_c11,
++	arm_rs_r0_t6_c11,
++	arm_rs_r1_t6_c11,
++	arm_rs_r2_t6_c11,
++	arm_rs_r3_t6_c11,
++	arm_rs_r4_t6_c11,
++	arm_rs_r5_t6_c11,
++	arm_rs_r6_t6_c11,
++	arm_rs_r7_t6_c11,
++	arm_rs_r8_t6_c11,
++	arm_rs_r9_t6_c11,
++	arm_rs_r10_t6_c11,
++	arm_rs_r11_t6_c11,
++	arm_rs_r12_t6_c11,
++	arm_rs_r13_t6_c11,
++	arm_rs_r14_t6_c11,
++	arm_rs_r15_t6_c11,
++	arm_rs_r0_t7_c11,
++	arm_rs_r1_t7_c11,
++	arm_rs_r2_t7_c11,
++	arm_rs_r3_t7_c11,
++	arm_rs_r4_t7_c11,
++	arm_rs_r5_t7_c11,
++	arm_rs_r6_t7_c11,
++	arm_rs_r7_t7_c11,
++	arm_rs_r8_t7_c11,
++	arm_rs_r9_t7_c11,
++	arm_rs_r10_t7_c11,
++	arm_rs_r11_t7_c11,
++	arm_rs_r12_t7_c11,
++	arm_rs_r13_t7_c11,
++	arm_rs_r14_t7_c11,
++	arm_rs_r15_t7_c11,
++	arm_rs_r0_t0_c12,
++	arm_rs_r1_t0_c12,
++	arm_rs_r2_t0_c12,
++	arm_rs_r3_t0_c12,
++	arm_rs_r4_t0_c12,
++	arm_rs_r5_t0_c12,
++	arm_rs_r6_t0_c12,
++	arm_rs_r7_t0_c12,
++	arm_rs_r8_t0_c12,
++	arm_rs_r9_t0_c12,
++	arm_rs_r10_t0_c12,
++	arm_rs_r11_t0_c12,
++	arm_rs_r12_t0_c12,
++	arm_rs_r13_t0_c12,
++	arm_rs_r14_t0_c12,
++	arm_rs_r15_t0_c12,
++	arm_rs_r0_t1_c12,
++	arm_rs_r1_t1_c12,
++	arm_rs_r2_t1_c12,
++	arm_rs_r3_t1_c12,
++	arm_rs_r4_t1_c12,
++	arm_rs_r5_t1_c12,
++	arm_rs_r6_t1_c12,
++	arm_rs_r7_t1_c12,
++	arm_rs_r8_t1_c12,
++	arm_rs_r9_t1_c12,
++	arm_rs_r10_t1_c12,
++	arm_rs_r11_t1_c12,
++	arm_rs_r12_t1_c12,
++	arm_rs_r13_t1_c12,
++	arm_rs_r14_t1_c12,
++	arm_rs_r15_t1_c12,
++	arm_rs_r0_t2_c12,
++	arm_rs_r1_t2_c12,
++	arm_rs_r2_t2_c12,
++	arm_rs_r3_t2_c12,
++	arm_rs_r4_t2_c12,
++	arm_rs_r5_t2_c12,
++	arm_rs_r6_t2_c12,
++	arm_rs_r7_t2_c12,
++	arm_rs_r8_t2_c12,
++	arm_rs_r9_t2_c12,
++	arm_rs_r10_t2_c12,
++	arm_rs_r11_t2_c12,
++	arm_rs_r12_t2_c12,
++	arm_rs_r13_t2_c12,
++	arm_rs_r14_t2_c12,
++	arm_rs_r15_t2_c12,
++	arm_rs_r0_t3_c12,
++	arm_rs_r1_t3_c12,
++	arm_rs_r2_t3_c12,
++	arm_rs_r3_t3_c12,
++	arm_rs_r4_t3_c12,
++	arm_rs_r5_t3_c12,
++	arm_rs_r6_t3_c12,
++	arm_rs_r7_t3_c12,
++	arm_rs_r8_t3_c12,
++	arm_rs_r9_t3_c12,
++	arm_rs_r10_t3_c12,
++	arm_rs_r11_t3_c12,
++	arm_rs_r12_t3_c12,
++	arm_rs_r13_t3_c12,
++	arm_rs_r14_t3_c12,
++	arm_rs_r15_t3_c12,
++	arm_rs_r0_t4_c12,
++	arm_rs_r1_t4_c12,
++	arm_rs_r2_t4_c12,
++	arm_rs_r3_t4_c12,
++	arm_rs_r4_t4_c12,
++	arm_rs_r5_t4_c12,
++	arm_rs_r6_t4_c12,
++	arm_rs_r7_t4_c12,
++	arm_rs_r8_t4_c12,
++	arm_rs_r9_t4_c12,
++	arm_rs_r10_t4_c12,
++	arm_rs_r11_t4_c12,
++	arm_rs_r12_t4_c12,
++	arm_rs_r13_t4_c12,
++	arm_rs_r14_t4_c12,
++	arm_rs_r15_t4_c12,
++	arm_rs_r0_t5_c12,
++	arm_rs_r1_t5_c12,
++	arm_rs_r2_t5_c12,
++	arm_rs_r3_t5_c12,
++	arm_rs_r4_t5_c12,
++	arm_rs_r5_t5_c12,
++	arm_rs_r6_t5_c12,
++	arm_rs_r7_t5_c12,
++	arm_rs_r8_t5_c12,
++	arm_rs_r9_t5_c12,
++	arm_rs_r10_t5_c12,
++	arm_rs_r11_t5_c12,
++	arm_rs_r12_t5_c12,
++	arm_rs_r13_t5_c12,
++	arm_rs_r14_t5_c12,
++	arm_rs_r15_t5_c12,
++	arm_rs_r0_t6_c12,
++	arm_rs_r1_t6_c12,
++	arm_rs_r2_t6_c12,
++	arm_rs_r3_t6_c12,
++	arm_rs_r4_t6_c12,
++	arm_rs_r5_t6_c12,
++	arm_rs_r6_t6_c12,
++	arm_rs_r7_t6_c12,
++	arm_rs_r8_t6_c12,
++	arm_rs_r9_t6_c12,
++	arm_rs_r10_t6_c12,
++	arm_rs_r11_t6_c12,
++	arm_rs_r12_t6_c12,
++	arm_rs_r13_t6_c12,
++	arm_rs_r14_t6_c12,
++	arm_rs_r15_t6_c12,
++	arm_rs_r0_t7_c12,
++	arm_rs_r1_t7_c12,
++	arm_rs_r2_t7_c12,
++	arm_rs_r3_t7_c12,
++	arm_rs_r4_t7_c12,
++	arm_rs_r5_t7_c12,
++	arm_rs_r6_t7_c12,
++	arm_rs_r7_t7_c12,
++	arm_rs_r8_t7_c12,
++	arm_rs_r9_t7_c12,
++	arm_rs_r10_t7_c12,
++	arm_rs_r11_t7_c12,
++	arm_rs_r12_t7_c12,
++	arm_rs_r13_t7_c12,
++	arm_rs_r14_t7_c12,
++	arm_rs_r15_t7_c12,
++	arm_rs_r0_t0_c13,
++	arm_rs_r1_t0_c13,
++	arm_rs_r2_t0_c13,
++	arm_rs_r3_t0_c13,
++	arm_rs_r4_t0_c13,
++	arm_rs_r5_t0_c13,
++	arm_rs_r6_t0_c13,
++	arm_rs_r7_t0_c13,
++	arm_rs_r8_t0_c13,
++	arm_rs_r9_t0_c13,
++	arm_rs_r10_t0_c13,
++	arm_rs_r11_t0_c13,
++	arm_rs_r12_t0_c13,
++	arm_rs_r13_t0_c13,
++	arm_rs_r14_t0_c13,
++	arm_rs_r15_t0_c13,
++	arm_rs_r0_t1_c13,
++	arm_rs_r1_t1_c13,
++	arm_rs_r2_t1_c13,
++	arm_rs_r3_t1_c13,
++	arm_rs_r4_t1_c13,
++	arm_rs_r5_t1_c13,
++	arm_rs_r6_t1_c13,
++	arm_rs_r7_t1_c13,
++	arm_rs_r8_t1_c13,
++	arm_rs_r9_t1_c13,
++	arm_rs_r10_t1_c13,
++	arm_rs_r11_t1_c13,
++	arm_rs_r12_t1_c13,
++	arm_rs_r13_t1_c13,
++	arm_rs_r14_t1_c13,
++	arm_rs_r15_t1_c13,
++	arm_rs_r0_t2_c13,
++	arm_rs_r1_t2_c13,
++	arm_rs_r2_t2_c13,
++	arm_rs_r3_t2_c13,
++	arm_rs_r4_t2_c13,
++	arm_rs_r5_t2_c13,
++	arm_rs_r6_t2_c13,
++	arm_rs_r7_t2_c13,
++	arm_rs_r8_t2_c13,
++	arm_rs_r9_t2_c13,
++	arm_rs_r10_t2_c13,
++	arm_rs_r11_t2_c13,
++	arm_rs_r12_t2_c13,
++	arm_rs_r13_t2_c13,
++	arm_rs_r14_t2_c13,
++	arm_rs_r15_t2_c13,
++	arm_rs_r0_t3_c13,
++	arm_rs_r1_t3_c13,
++	arm_rs_r2_t3_c13,
++	arm_rs_r3_t3_c13,
++	arm_rs_r4_t3_c13,
++	arm_rs_r5_t3_c13,
++	arm_rs_r6_t3_c13,
++	arm_rs_r7_t3_c13,
++	arm_rs_r8_t3_c13,
++	arm_rs_r9_t3_c13,
++	arm_rs_r10_t3_c13,
++	arm_rs_r11_t3_c13,
++	arm_rs_r12_t3_c13,
++	arm_rs_r13_t3_c13,
++	arm_rs_r14_t3_c13,
++	arm_rs_r15_t3_c13,
++	arm_rs_r0_t4_c13,
++	arm_rs_r1_t4_c13,
++	arm_rs_r2_t4_c13,
++	arm_rs_r3_t4_c13,
++	arm_rs_r4_t4_c13,
++	arm_rs_r5_t4_c13,
++	arm_rs_r6_t4_c13,
++	arm_rs_r7_t4_c13,
++	arm_rs_r8_t4_c13,
++	arm_rs_r9_t4_c13,
++	arm_rs_r10_t4_c13,
++	arm_rs_r11_t4_c13,
++	arm_rs_r12_t4_c13,
++	arm_rs_r13_t4_c13,
++	arm_rs_r14_t4_c13,
++	arm_rs_r15_t4_c13,
++	arm_rs_r0_t5_c13,
++	arm_rs_r1_t5_c13,
++	arm_rs_r2_t5_c13,
++	arm_rs_r3_t5_c13,
++	arm_rs_r4_t5_c13,
++	arm_rs_r5_t5_c13,
++	arm_rs_r6_t5_c13,
++	arm_rs_r7_t5_c13,
++	arm_rs_r8_t5_c13,
++	arm_rs_r9_t5_c13,
++	arm_rs_r10_t5_c13,
++	arm_rs_r11_t5_c13,
++	arm_rs_r12_t5_c13,
++	arm_rs_r13_t5_c13,
++	arm_rs_r14_t5_c13,
++	arm_rs_r15_t5_c13,
++	arm_rs_r0_t6_c13,
++	arm_rs_r1_t6_c13,
++	arm_rs_r2_t6_c13,
++	arm_rs_r3_t6_c13,
++	arm_rs_r4_t6_c13,
++	arm_rs_r5_t6_c13,
++	arm_rs_r6_t6_c13,
++	arm_rs_r7_t6_c13,
++	arm_rs_r8_t6_c13,
++	arm_rs_r9_t6_c13,
++	arm_rs_r10_t6_c13,
++	arm_rs_r11_t6_c13,
++	arm_rs_r12_t6_c13,
++	arm_rs_r13_t6_c13,
++	arm_rs_r14_t6_c13,
++	arm_rs_r15_t6_c13,
++	arm_rs_r0_t7_c13,
++	arm_rs_r1_t7_c13,
++	arm_rs_r2_t7_c13,
++	arm_rs_r3_t7_c13,
++	arm_rs_r4_t7_c13,
++	arm_rs_r5_t7_c13,
++	arm_rs_r6_t7_c13,
++	arm_rs_r7_t7_c13,
++	arm_rs_r8_t7_c13,
++	arm_rs_r9_t7_c13,
++	arm_rs_r10_t7_c13,
++	arm_rs_r11_t7_c13,
++	arm_rs_r12_t7_c13,
++	arm_rs_r13_t7_c13,
++	arm_rs_r14_t7_c13,
++	arm_rs_r15_t7_c13,
++	arm_rs_r0_t0_c14,
++	arm_rs_r1_t0_c14,
++	arm_rs_r2_t0_c14,
++	arm_rs_r3_t0_c14,
++	arm_rs_r4_t0_c14,
++	arm_rs_r5_t0_c14,
++	arm_rs_r6_t0_c14,
++	arm_rs_r7_t0_c14,
++	arm_rs_r8_t0_c14,
++	arm_rs_r9_t0_c14,
++	arm_rs_r10_t0_c14,
++	arm_rs_r11_t0_c14,
++	arm_rs_r12_t0_c14,
++	arm_rs_r13_t0_c14,
++	arm_rs_r14_t0_c14,
++	arm_rs_r15_t0_c14,
++	arm_rs_r0_t1_c14,
++	arm_rs_r1_t1_c14,
++	arm_rs_r2_t1_c14,
++	arm_rs_r3_t1_c14,
++	arm_rs_r4_t1_c14,
++	arm_rs_r5_t1_c14,
++	arm_rs_r6_t1_c14,
++	arm_rs_r7_t1_c14,
++	arm_rs_r8_t1_c14,
++	arm_rs_r9_t1_c14,
++	arm_rs_r10_t1_c14,
++	arm_rs_r11_t1_c14,
++	arm_rs_r12_t1_c14,
++	arm_rs_r13_t1_c14,
++	arm_rs_r14_t1_c14,
++	arm_rs_r15_t1_c14,
++	arm_rs_r0_t2_c14,
++	arm_rs_r1_t2_c14,
++	arm_rs_r2_t2_c14,
++	arm_rs_r3_t2_c14,
++	arm_rs_r4_t2_c14,
++	arm_rs_r5_t2_c14,
++	arm_rs_r6_t2_c14,
++	arm_rs_r7_t2_c14,
++	arm_rs_r8_t2_c14,
++	arm_rs_r9_t2_c14,
++	arm_rs_r10_t2_c14,
++	arm_rs_r11_t2_c14,
++	arm_rs_r12_t2_c14,
++	arm_rs_r13_t2_c14,
++	arm_rs_r14_t2_c14,
++	arm_rs_r15_t2_c14,
++	arm_rs_r0_t3_c14,
++	arm_rs_r1_t3_c14,
++	arm_rs_r2_t3_c14,
++	arm_rs_r3_t3_c14,
++	arm_rs_r4_t3_c14,
++	arm_rs_r5_t3_c14,
++	arm_rs_r6_t3_c14,
++	arm_rs_r7_t3_c14,
++	arm_rs_r8_t3_c14,
++	arm_rs_r9_t3_c14,
++	arm_rs_r10_t3_c14,
++	arm_rs_r11_t3_c14,
++	arm_rs_r12_t3_c14,
++	arm_rs_r13_t3_c14,
++	arm_rs_r14_t3_c14,
++	arm_rs_r15_t3_c14,
++	arm_rs_r0_t4_c14,
++	arm_rs_r1_t4_c14,
++	arm_rs_r2_t4_c14,
++	arm_rs_r3_t4_c14,
++	arm_rs_r4_t4_c14,
++	arm_rs_r5_t4_c14,
++	arm_rs_r6_t4_c14,
++	arm_rs_r7_t4_c14,
++	arm_rs_r8_t4_c14,
++	arm_rs_r9_t4_c14,
++	arm_rs_r10_t4_c14,
++	arm_rs_r11_t4_c14,
++	arm_rs_r12_t4_c14,
++	arm_rs_r13_t4_c14,
++	arm_rs_r14_t4_c14,
++	arm_rs_r15_t4_c14,
++	arm_rs_r0_t5_c14,
++	arm_rs_r1_t5_c14,
++	arm_rs_r2_t5_c14,
++	arm_rs_r3_t5_c14,
++	arm_rs_r4_t5_c14,
++	arm_rs_r5_t5_c14,
++	arm_rs_r6_t5_c14,
++	arm_rs_r7_t5_c14,
++	arm_rs_r8_t5_c14,
++	arm_rs_r9_t5_c14,
++	arm_rs_r10_t5_c14,
++	arm_rs_r11_t5_c14,
++	arm_rs_r12_t5_c14,
++	arm_rs_r13_t5_c14,
++	arm_rs_r14_t5_c14,
++	arm_rs_r15_t5_c14,
++	arm_rs_r0_t6_c14,
++	arm_rs_r1_t6_c14,
++	arm_rs_r2_t6_c14,
++	arm_rs_r3_t6_c14,
++	arm_rs_r4_t6_c14,
++	arm_rs_r5_t6_c14,
++	arm_rs_r6_t6_c14,
++	arm_rs_r7_t6_c14,
++	arm_rs_r8_t6_c14,
++	arm_rs_r9_t6_c14,
++	arm_rs_r10_t6_c14,
++	arm_rs_r11_t6_c14,
++	arm_rs_r12_t6_c14,
++	arm_rs_r13_t6_c14,
++	arm_rs_r14_t6_c14,
++	arm_rs_r15_t6_c14,
++	arm_rs_r0_t7_c14,
++	arm_rs_r1_t7_c14,
++	arm_rs_r2_t7_c14,
++	arm_rs_r3_t7_c14,
++	arm_rs_r4_t7_c14,
++	arm_rs_r5_t7_c14,
++	arm_rs_r6_t7_c14,
++	arm_rs_r7_t7_c14,
++	arm_rs_r8_t7_c14,
++	arm_rs_r9_t7_c14,
++	arm_rs_r10_t7_c14,
++	arm_rs_r11_t7_c14,
++	arm_rs_r12_t7_c14,
++	arm_rs_r13_t7_c14,
++	arm_rs_r14_t7_c14,
++	arm_rs_r15_t7_c14,
++	arm_rs_r0_t0_c15,
++	arm_rs_r1_t0_c15,
++	arm_rs_r2_t0_c15,
++	arm_rs_r3_t0_c15,
++	arm_rs_r4_t0_c15,
++	arm_rs_r5_t0_c15,
++	arm_rs_r6_t0_c15,
++	arm_rs_r7_t0_c15,
++	arm_rs_r8_t0_c15,
++	arm_rs_r9_t0_c15,
++	arm_rs_r10_t0_c15,
++	arm_rs_r11_t0_c15,
++	arm_rs_r12_t0_c15,
++	arm_rs_r13_t0_c15,
++	arm_rs_r14_t0_c15,
++	arm_rs_r15_t0_c15,
++	arm_rs_r0_t1_c15,
++	arm_rs_r1_t1_c15,
++	arm_rs_r2_t1_c15,
++	arm_rs_r3_t1_c15,
++	arm_rs_r4_t1_c15,
++	arm_rs_r5_t1_c15,
++	arm_rs_r6_t1_c15,
++	arm_rs_r7_t1_c15,
++	arm_rs_r8_t1_c15,
++	arm_rs_r9_t1_c15,
++	arm_rs_r10_t1_c15,
++	arm_rs_r11_t1_c15,
++	arm_rs_r12_t1_c15,
++	arm_rs_r13_t1_c15,
++	arm_rs_r14_t1_c15,
++	arm_rs_r15_t1_c15,
++	arm_rs_r0_t2_c15,
++	arm_rs_r1_t2_c15,
++	arm_rs_r2_t2_c15,
++	arm_rs_r3_t2_c15,
++	arm_rs_r4_t2_c15,
++	arm_rs_r5_t2_c15,
++	arm_rs_r6_t2_c15,
++	arm_rs_r7_t2_c15,
++	arm_rs_r8_t2_c15,
++	arm_rs_r9_t2_c15,
++	arm_rs_r10_t2_c15,
++	arm_rs_r11_t2_c15,
++	arm_rs_r12_t2_c15,
++	arm_rs_r13_t2_c15,
++	arm_rs_r14_t2_c15,
++	arm_rs_r15_t2_c15,
++	arm_rs_r0_t3_c15,
++	arm_rs_r1_t3_c15,
++	arm_rs_r2_t3_c15,
++	arm_rs_r3_t3_c15,
++	arm_rs_r4_t3_c15,
++	arm_rs_r5_t3_c15,
++	arm_rs_r6_t3_c15,
++	arm_rs_r7_t3_c15,
++	arm_rs_r8_t3_c15,
++	arm_rs_r9_t3_c15,
++	arm_rs_r10_t3_c15,
++	arm_rs_r11_t3_c15,
++	arm_rs_r12_t3_c15,
++	arm_rs_r13_t3_c15,
++	arm_rs_r14_t3_c15,
++	arm_rs_r15_t3_c15,
++	arm_rs_r0_t4_c15,
++	arm_rs_r1_t4_c15,
++	arm_rs_r2_t4_c15,
++	arm_rs_r3_t4_c15,
++	arm_rs_r4_t4_c15,
++	arm_rs_r5_t4_c15,
++	arm_rs_r6_t4_c15,
++	arm_rs_r7_t4_c15,
++	arm_rs_r8_t4_c15,
++	arm_rs_r9_t4_c15,
++	arm_rs_r10_t4_c15,
++	arm_rs_r11_t4_c15,
++	arm_rs_r12_t4_c15,
++	arm_rs_r13_t4_c15,
++	arm_rs_r14_t4_c15,
++	arm_rs_r15_t4_c15,
++	arm_rs_r0_t5_c15,
++	arm_rs_r1_t5_c15,
++	arm_rs_r2_t5_c15,
++	arm_rs_r3_t5_c15,
++	arm_rs_r4_t5_c15,
++	arm_rs_r5_t5_c15,
++	arm_rs_r6_t5_c15,
++	arm_rs_r7_t5_c15,
++	arm_rs_r8_t5_c15,
++	arm_rs_r9_t5_c15,
++	arm_rs_r10_t5_c15,
++	arm_rs_r11_t5_c15,
++	arm_rs_r12_t5_c15,
++	arm_rs_r13_t5_c15,
++	arm_rs_r14_t5_c15,
++	arm_rs_r15_t5_c15,
++	arm_rs_r0_t6_c15,
++	arm_rs_r1_t6_c15,
++	arm_rs_r2_t6_c15,
++	arm_rs_r3_t6_c15,
++	arm_rs_r4_t6_c15,
++	arm_rs_r5_t6_c15,
++	arm_rs_r6_t6_c15,
++	arm_rs_r7_t6_c15,
++	arm_rs_r8_t6_c15,
++	arm_rs_r9_t6_c15,
++	arm_rs_r10_t6_c15,
++	arm_rs_r11_t6_c15,
++	arm_rs_r12_t6_c15,
++	arm_rs_r13_t6_c15,
++	arm_rs_r14_t6_c15,
++	arm_rs_r15_t6_c15,
++	arm_rs_r0_t7_c15,
++	arm_rs_r1_t7_c15,
++	arm_rs_r2_t7_c15,
++	arm_rs_r3_t7_c15,
++	arm_rs_r4_t7_c15,
++	arm_rs_r5_t7_c15,
++	arm_rs_r6_t7_c15,
++	arm_rs_r7_t7_c15,
++	arm_rs_r8_t7_c15,
++	arm_rs_r9_t7_c15,
++	arm_rs_r10_t7_c15,
++	arm_rs_r11_t7_c15,
++	arm_rs_r12_t7_c15,
++	arm_rs_r13_t7_c15,
++	arm_rs_r14_t7_c15,
++	arm_rs_r15_t7_c15,
++	arm_rs_r0_t0_c16,
++	arm_rs_r1_t0_c16,
++	arm_rs_r2_t0_c16,
++	arm_rs_r3_t0_c16,
++	arm_rs_r4_t0_c16,
++	arm_rs_r5_t0_c16,
++	arm_rs_r6_t0_c16,
++	arm_rs_r7_t0_c16,
++	arm_rs_r8_t0_c16,
++	arm_rs_r9_t0_c16,
++	arm_rs_r10_t0_c16,
++	arm_rs_r11_t0_c16,
++	arm_rs_r12_t0_c16,
++	arm_rs_r13_t0_c16,
++	arm_rs_r14_t0_c16,
++	arm_rs_r15_t0_c16,
++	arm_rs_r0_t1_c16,
++	arm_rs_r1_t1_c16,
++	arm_rs_r2_t1_c16,
++	arm_rs_r3_t1_c16,
++	arm_rs_r4_t1_c16,
++	arm_rs_r5_t1_c16,
++	arm_rs_r6_t1_c16,
++	arm_rs_r7_t1_c16,
++	arm_rs_r8_t1_c16,
++	arm_rs_r9_t1_c16,
++	arm_rs_r10_t1_c16,
++	arm_rs_r11_t1_c16,
++	arm_rs_r12_t1_c16,
++	arm_rs_r13_t1_c16,
++	arm_rs_r14_t1_c16,
++	arm_rs_r15_t1_c16,
++	arm_rs_r0_t2_c16,
++	arm_rs_r1_t2_c16,
++	arm_rs_r2_t2_c16,
++	arm_rs_r3_t2_c16,
++	arm_rs_r4_t2_c16,
++	arm_rs_r5_t2_c16,
++	arm_rs_r6_t2_c16,
++	arm_rs_r7_t2_c16,
++	arm_rs_r8_t2_c16,
++	arm_rs_r9_t2_c16,
++	arm_rs_r10_t2_c16,
++	arm_rs_r11_t2_c16,
++	arm_rs_r12_t2_c16,
++	arm_rs_r13_t2_c16,
++	arm_rs_r14_t2_c16,
++	arm_rs_r15_t2_c16,
++	arm_rs_r0_t3_c16,
++	arm_rs_r1_t3_c16,
++	arm_rs_r2_t3_c16,
++	arm_rs_r3_t3_c16,
++	arm_rs_r4_t3_c16,
++	arm_rs_r5_t3_c16,
++	arm_rs_r6_t3_c16,
++	arm_rs_r7_t3_c16,
++	arm_rs_r8_t3_c16,
++	arm_rs_r9_t3_c16,
++	arm_rs_r10_t3_c16,
++	arm_rs_r11_t3_c16,
++	arm_rs_r12_t3_c16,
++	arm_rs_r13_t3_c16,
++	arm_rs_r14_t3_c16,
++	arm_rs_r15_t3_c16,
++	arm_rs_r0_t4_c16,
++	arm_rs_r1_t4_c16,
++	arm_rs_r2_t4_c16,
++	arm_rs_r3_t4_c16,
++	arm_rs_r4_t4_c16,
++	arm_rs_r5_t4_c16,
++	arm_rs_r6_t4_c16,
++	arm_rs_r7_t4_c16,
++	arm_rs_r8_t4_c16,
++	arm_rs_r9_t4_c16,
++	arm_rs_r10_t4_c16,
++	arm_rs_r11_t4_c16,
++	arm_rs_r12_t4_c16,
++	arm_rs_r13_t4_c16,
++	arm_rs_r14_t4_c16,
++	arm_rs_r15_t4_c16,
++	arm_rs_r0_t5_c16,
++	arm_rs_r1_t5_c16,
++	arm_rs_r2_t5_c16,
++	arm_rs_r3_t5_c16,
++	arm_rs_r4_t5_c16,
++	arm_rs_r5_t5_c16,
++	arm_rs_r6_t5_c16,
++	arm_rs_r7_t5_c16,
++	arm_rs_r8_t5_c16,
++	arm_rs_r9_t5_c16,
++	arm_rs_r10_t5_c16,
++	arm_rs_r11_t5_c16,
++	arm_rs_r12_t5_c16,
++	arm_rs_r13_t5_c16,
++	arm_rs_r14_t5_c16,
++	arm_rs_r15_t5_c16,
++	arm_rs_r0_t6_c16,
++	arm_rs_r1_t6_c16,
++	arm_rs_r2_t6_c16,
++	arm_rs_r3_t6_c16,
++	arm_rs_r4_t6_c16,
++	arm_rs_r5_t6_c16,
++	arm_rs_r6_t6_c16,
++	arm_rs_r7_t6_c16,
++	arm_rs_r8_t6_c16,
++	arm_rs_r9_t6_c16,
++	arm_rs_r10_t6_c16,
++	arm_rs_r11_t6_c16,
++	arm_rs_r12_t6_c16,
++	arm_rs_r13_t6_c16,
++	arm_rs_r14_t6_c16,
++	arm_rs_r15_t6_c16,
++	arm_rs_r0_t7_c16,
++	arm_rs_r1_t7_c16,
++	arm_rs_r2_t7_c16,
++	arm_rs_r3_t7_c16,
++	arm_rs_r4_t7_c16,
++	arm_rs_r5_t7_c16,
++	arm_rs_r6_t7_c16,
++	arm_rs_r7_t7_c16,
++	arm_rs_r8_t7_c16,
++	arm_rs_r9_t7_c16,
++	arm_rs_r10_t7_c16,
++	arm_rs_r11_t7_c16,
++	arm_rs_r12_t7_c16,
++	arm_rs_r13_t7_c16,
++	arm_rs_r14_t7_c16,
++	arm_rs_r15_t7_c16,
++	arm_rs_r0_t0_c17,
++	arm_rs_r1_t0_c17,
++	arm_rs_r2_t0_c17,
++	arm_rs_r3_t0_c17,
++	arm_rs_r4_t0_c17,
++	arm_rs_r5_t0_c17,
++	arm_rs_r6_t0_c17,
++	arm_rs_r7_t0_c17,
++	arm_rs_r8_t0_c17,
++	arm_rs_r9_t0_c17,
++	arm_rs_r10_t0_c17,
++	arm_rs_r11_t0_c17,
++	arm_rs_r12_t0_c17,
++	arm_rs_r13_t0_c17,
++	arm_rs_r14_t0_c17,
++	arm_rs_r15_t0_c17,
++	arm_rs_r0_t1_c17,
++	arm_rs_r1_t1_c17,
++	arm_rs_r2_t1_c17,
++	arm_rs_r3_t1_c17,
++	arm_rs_r4_t1_c17,
++	arm_rs_r5_t1_c17,
++	arm_rs_r6_t1_c17,
++	arm_rs_r7_t1_c17,
++	arm_rs_r8_t1_c17,
++	arm_rs_r9_t1_c17,
++	arm_rs_r10_t1_c17,
++	arm_rs_r11_t1_c17,
++	arm_rs_r12_t1_c17,
++	arm_rs_r13_t1_c17,
++	arm_rs_r14_t1_c17,
++	arm_rs_r15_t1_c17,
++	arm_rs_r0_t2_c17,
++	arm_rs_r1_t2_c17,
++	arm_rs_r2_t2_c17,
++	arm_rs_r3_t2_c17,
++	arm_rs_r4_t2_c17,
++	arm_rs_r5_t2_c17,
++	arm_rs_r6_t2_c17,
++	arm_rs_r7_t2_c17,
++	arm_rs_r8_t2_c17,
++	arm_rs_r9_t2_c17,
++	arm_rs_r10_t2_c17,
++	arm_rs_r11_t2_c17,
++	arm_rs_r12_t2_c17,
++	arm_rs_r13_t2_c17,
++	arm_rs_r14_t2_c17,
++	arm_rs_r15_t2_c17,
++	arm_rs_r0_t3_c17,
++	arm_rs_r1_t3_c17,
++	arm_rs_r2_t3_c17,
++	arm_rs_r3_t3_c17,
++	arm_rs_r4_t3_c17,
++	arm_rs_r5_t3_c17,
++	arm_rs_r6_t3_c17,
++	arm_rs_r7_t3_c17,
++	arm_rs_r8_t3_c17,
++	arm_rs_r9_t3_c17,
++	arm_rs_r10_t3_c17,
++	arm_rs_r11_t3_c17,
++	arm_rs_r12_t3_c17,
++	arm_rs_r13_t3_c17,
++	arm_rs_r14_t3_c17,
++	arm_rs_r15_t3_c17,
++	arm_rs_r0_t4_c17,
++	arm_rs_r1_t4_c17,
++	arm_rs_r2_t4_c17,
++	arm_rs_r3_t4_c17,
++	arm_rs_r4_t4_c17,
++	arm_rs_r5_t4_c17,
++	arm_rs_r6_t4_c17,
++	arm_rs_r7_t4_c17,
++	arm_rs_r8_t4_c17,
++	arm_rs_r9_t4_c17,
++	arm_rs_r10_t4_c17,
++	arm_rs_r11_t4_c17,
++	arm_rs_r12_t4_c17,
++	arm_rs_r13_t4_c17,
++	arm_rs_r14_t4_c17,
++	arm_rs_r15_t4_c17,
++	arm_rs_r0_t5_c17,
++	arm_rs_r1_t5_c17,
++	arm_rs_r2_t5_c17,
++	arm_rs_r3_t5_c17,
++	arm_rs_r4_t5_c17,
++	arm_rs_r5_t5_c17,
++	arm_rs_r6_t5_c17,
++	arm_rs_r7_t5_c17,
++	arm_rs_r8_t5_c17,
++	arm_rs_r9_t5_c17,
++	arm_rs_r10_t5_c17,
++	arm_rs_r11_t5_c17,
++	arm_rs_r12_t5_c17,
++	arm_rs_r13_t5_c17,
++	arm_rs_r14_t5_c17,
++	arm_rs_r15_t5_c17,
++	arm_rs_r0_t6_c17,
++	arm_rs_r1_t6_c17,
++	arm_rs_r2_t6_c17,
++	arm_rs_r3_t6_c17,
++	arm_rs_r4_t6_c17,
++	arm_rs_r5_t6_c17,
++	arm_rs_r6_t6_c17,
++	arm_rs_r7_t6_c17,
++	arm_rs_r8_t6_c17,
++	arm_rs_r9_t6_c17,
++	arm_rs_r10_t6_c17,
++	arm_rs_r11_t6_c17,
++	arm_rs_r12_t6_c17,
++	arm_rs_r13_t6_c17,
++	arm_rs_r14_t6_c17,
++	arm_rs_r15_t6_c17,
++	arm_rs_r0_t7_c17,
++	arm_rs_r1_t7_c17,
++	arm_rs_r2_t7_c17,
++	arm_rs_r3_t7_c17,
++	arm_rs_r4_t7_c17,
++	arm_rs_r5_t7_c17,
++	arm_rs_r6_t7_c17,
++	arm_rs_r7_t7_c17,
++	arm_rs_r8_t7_c17,
++	arm_rs_r9_t7_c17,
++	arm_rs_r10_t7_c17,
++	arm_rs_r11_t7_c17,
++	arm_rs_r12_t7_c17,
++	arm_rs_r13_t7_c17,
++	arm_rs_r14_t7_c17,
++	arm_rs_r15_t7_c17,
++	arm_rs_r0_t0_c18,
++	arm_rs_r1_t0_c18,
++	arm_rs_r2_t0_c18,
++	arm_rs_r3_t0_c18,
++	arm_rs_r4_t0_c18,
++	arm_rs_r5_t0_c18,
++	arm_rs_r6_t0_c18,
++	arm_rs_r7_t0_c18,
++	arm_rs_r8_t0_c18,
++	arm_rs_r9_t0_c18,
++	arm_rs_r10_t0_c18,
++	arm_rs_r11_t0_c18,
++	arm_rs_r12_t0_c18,
++	arm_rs_r13_t0_c18,
++	arm_rs_r14_t0_c18,
++	arm_rs_r15_t0_c18,
++	arm_rs_r0_t1_c18,
++	arm_rs_r1_t1_c18,
++	arm_rs_r2_t1_c18,
++	arm_rs_r3_t1_c18,
++	arm_rs_r4_t1_c18,
++	arm_rs_r5_t1_c18,
++	arm_rs_r6_t1_c18,
++	arm_rs_r7_t1_c18,
++	arm_rs_r8_t1_c18,
++	arm_rs_r9_t1_c18,
++	arm_rs_r10_t1_c18,
++	arm_rs_r11_t1_c18,
++	arm_rs_r12_t1_c18,
++	arm_rs_r13_t1_c18,
++	arm_rs_r14_t1_c18,
++	arm_rs_r15_t1_c18,
++	arm_rs_r0_t2_c18,
++	arm_rs_r1_t2_c18,
++	arm_rs_r2_t2_c18,
++	arm_rs_r3_t2_c18,
++	arm_rs_r4_t2_c18,
++	arm_rs_r5_t2_c18,
++	arm_rs_r6_t2_c18,
++	arm_rs_r7_t2_c18,
++	arm_rs_r8_t2_c18,
++	arm_rs_r9_t2_c18,
++	arm_rs_r10_t2_c18,
++	arm_rs_r11_t2_c18,
++	arm_rs_r12_t2_c18,
++	arm_rs_r13_t2_c18,
++	arm_rs_r14_t2_c18,
++	arm_rs_r15_t2_c18,
++	arm_rs_r0_t3_c18,
++	arm_rs_r1_t3_c18,
++	arm_rs_r2_t3_c18,
++	arm_rs_r3_t3_c18,
++	arm_rs_r4_t3_c18,
++	arm_rs_r5_t3_c18,
++	arm_rs_r6_t3_c18,
++	arm_rs_r7_t3_c18,
++	arm_rs_r8_t3_c18,
++	arm_rs_r9_t3_c18,
++	arm_rs_r10_t3_c18,
++	arm_rs_r11_t3_c18,
++	arm_rs_r12_t3_c18,
++	arm_rs_r13_t3_c18,
++	arm_rs_r14_t3_c18,
++	arm_rs_r15_t3_c18,
++	arm_rs_r0_t4_c18,
++	arm_rs_r1_t4_c18,
++	arm_rs_r2_t4_c18,
++	arm_rs_r3_t4_c18,
++	arm_rs_r4_t4_c18,
++	arm_rs_r5_t4_c18,
++	arm_rs_r6_t4_c18,
++	arm_rs_r7_t4_c18,
++	arm_rs_r8_t4_c18,
++	arm_rs_r9_t4_c18,
++	arm_rs_r10_t4_c18,
++	arm_rs_r11_t4_c18,
++	arm_rs_r12_t4_c18,
++	arm_rs_r13_t4_c18,
++	arm_rs_r14_t4_c18,
++	arm_rs_r15_t4_c18,
++	arm_rs_r0_t5_c18,
++	arm_rs_r1_t5_c18,
++	arm_rs_r2_t5_c18,
++	arm_rs_r3_t5_c18,
++	arm_rs_r4_t5_c18,
++	arm_rs_r5_t5_c18,
++	arm_rs_r6_t5_c18,
++	arm_rs_r7_t5_c18,
++	arm_rs_r8_t5_c18,
++	arm_rs_r9_t5_c18,
++	arm_rs_r10_t5_c18,
++	arm_rs_r11_t5_c18,
++	arm_rs_r12_t5_c18,
++	arm_rs_r13_t5_c18,
++	arm_rs_r14_t5_c18,
++	arm_rs_r15_t5_c18,
++	arm_rs_r0_t6_c18,
++	arm_rs_r1_t6_c18,
++	arm_rs_r2_t6_c18,
++	arm_rs_r3_t6_c18,
++	arm_rs_r4_t6_c18,
++	arm_rs_r5_t6_c18,
++	arm_rs_r6_t6_c18,
++	arm_rs_r7_t6_c18,
++	arm_rs_r8_t6_c18,
++	arm_rs_r9_t6_c18,
++	arm_rs_r10_t6_c18,
++	arm_rs_r11_t6_c18,
++	arm_rs_r12_t6_c18,
++	arm_rs_r13_t6_c18,
++	arm_rs_r14_t6_c18,
++	arm_rs_r15_t6_c18,
++	arm_rs_r0_t7_c18,
++	arm_rs_r1_t7_c18,
++	arm_rs_r2_t7_c18,
++	arm_rs_r3_t7_c18,
++	arm_rs_r4_t7_c18,
++	arm_rs_r5_t7_c18,
++	arm_rs_r6_t7_c18,
++	arm_rs_r7_t7_c18,
++	arm_rs_r8_t7_c18,
++	arm_rs_r9_t7_c18,
++	arm_rs_r10_t7_c18,
++	arm_rs_r11_t7_c18,
++	arm_rs_r12_t7_c18,
++	arm_rs_r13_t7_c18,
++	arm_rs_r14_t7_c18,
++	arm_rs_r15_t7_c18,
++	arm_rs_r0_t0_c19,
++	arm_rs_r1_t0_c19,
++	arm_rs_r2_t0_c19,
++	arm_rs_r3_t0_c19,
++	arm_rs_r4_t0_c19,
++	arm_rs_r5_t0_c19,
++	arm_rs_r6_t0_c19,
++	arm_rs_r7_t0_c19,
++	arm_rs_r8_t0_c19,
++	arm_rs_r9_t0_c19,
++	arm_rs_r10_t0_c19,
++	arm_rs_r11_t0_c19,
++	arm_rs_r12_t0_c19,
++	arm_rs_r13_t0_c19,
++	arm_rs_r14_t0_c19,
++	arm_rs_r15_t0_c19,
++	arm_rs_r0_t1_c19,
++	arm_rs_r1_t1_c19,
++	arm_rs_r2_t1_c19,
++	arm_rs_r3_t1_c19,
++	arm_rs_r4_t1_c19,
++	arm_rs_r5_t1_c19,
++	arm_rs_r6_t1_c19,
++	arm_rs_r7_t1_c19,
++	arm_rs_r8_t1_c19,
++	arm_rs_r9_t1_c19,
++	arm_rs_r10_t1_c19,
++	arm_rs_r11_t1_c19,
++	arm_rs_r12_t1_c19,
++	arm_rs_r13_t1_c19,
++	arm_rs_r14_t1_c19,
++	arm_rs_r15_t1_c19,
++	arm_rs_r0_t2_c19,
++	arm_rs_r1_t2_c19,
++	arm_rs_r2_t2_c19,
++	arm_rs_r3_t2_c19,
++	arm_rs_r4_t2_c19,
++	arm_rs_r5_t2_c19,
++	arm_rs_r6_t2_c19,
++	arm_rs_r7_t2_c19,
++	arm_rs_r8_t2_c19,
++	arm_rs_r9_t2_c19,
++	arm_rs_r10_t2_c19,
++	arm_rs_r11_t2_c19,
++	arm_rs_r12_t2_c19,
++	arm_rs_r13_t2_c19,
++	arm_rs_r14_t2_c19,
++	arm_rs_r15_t2_c19,
++	arm_rs_r0_t3_c19,
++	arm_rs_r1_t3_c19,
++	arm_rs_r2_t3_c19,
++	arm_rs_r3_t3_c19,
++	arm_rs_r4_t3_c19,
++	arm_rs_r5_t3_c19,
++	arm_rs_r6_t3_c19,
++	arm_rs_r7_t3_c19,
++	arm_rs_r8_t3_c19,
++	arm_rs_r9_t3_c19,
++	arm_rs_r10_t3_c19,
++	arm_rs_r11_t3_c19,
++	arm_rs_r12_t3_c19,
++	arm_rs_r13_t3_c19,
++	arm_rs_r14_t3_c19,
++	arm_rs_r15_t3_c19,
++	arm_rs_r0_t4_c19,
++	arm_rs_r1_t4_c19,
++	arm_rs_r2_t4_c19,
++	arm_rs_r3_t4_c19,
++	arm_rs_r4_t4_c19,
++	arm_rs_r5_t4_c19,
++	arm_rs_r6_t4_c19,
++	arm_rs_r7_t4_c19,
++	arm_rs_r8_t4_c19,
++	arm_rs_r9_t4_c19,
++	arm_rs_r10_t4_c19,
++	arm_rs_r11_t4_c19,
++	arm_rs_r12_t4_c19,
++	arm_rs_r13_t4_c19,
++	arm_rs_r14_t4_c19,
++	arm_rs_r15_t4_c19,
++	arm_rs_r0_t5_c19,
++	arm_rs_r1_t5_c19,
++	arm_rs_r2_t5_c19,
++	arm_rs_r3_t5_c19,
++	arm_rs_r4_t5_c19,
++	arm_rs_r5_t5_c19,
++	arm_rs_r6_t5_c19,
++	arm_rs_r7_t5_c19,
++	arm_rs_r8_t5_c19,
++	arm_rs_r9_t5_c19,
++	arm_rs_r10_t5_c19,
++	arm_rs_r11_t5_c19,
++	arm_rs_r12_t5_c19,
++	arm_rs_r13_t5_c19,
++	arm_rs_r14_t5_c19,
++	arm_rs_r15_t5_c19,
++	arm_rs_r0_t6_c19,
++	arm_rs_r1_t6_c19,
++	arm_rs_r2_t6_c19,
++	arm_rs_r3_t6_c19,
++	arm_rs_r4_t6_c19,
++	arm_rs_r5_t6_c19,
++	arm_rs_r6_t6_c19,
++	arm_rs_r7_t6_c19,
++	arm_rs_r8_t6_c19,
++	arm_rs_r9_t6_c19,
++	arm_rs_r10_t6_c19,
++	arm_rs_r11_t6_c19,
++	arm_rs_r12_t6_c19,
++	arm_rs_r13_t6_c19,
++	arm_rs_r14_t6_c19,
++	arm_rs_r15_t6_c19,
++	arm_rs_r0_t7_c19,
++	arm_rs_r1_t7_c19,
++	arm_rs_r2_t7_c19,
++	arm_rs_r3_t7_c19,
++	arm_rs_r4_t7_c19,
++	arm_rs_r5_t7_c19,
++	arm_rs_r6_t7_c19,
++	arm_rs_r7_t7_c19,
++	arm_rs_r8_t7_c19,
++	arm_rs_r9_t7_c19,
++	arm_rs_r10_t7_c19,
++	arm_rs_r11_t7_c19,
++	arm_rs_r12_t7_c19,
++	arm_rs_r13_t7_c19,
++	arm_rs_r14_t7_c19,
++	arm_rs_r15_t7_c19,
++	arm_rs_r0_t0_c20,
++	arm_rs_r1_t0_c20,
++	arm_rs_r2_t0_c20,
++	arm_rs_r3_t0_c20,
++	arm_rs_r4_t0_c20,
++	arm_rs_r5_t0_c20,
++	arm_rs_r6_t0_c20,
++	arm_rs_r7_t0_c20,
++	arm_rs_r8_t0_c20,
++	arm_rs_r9_t0_c20,
++	arm_rs_r10_t0_c20,
++	arm_rs_r11_t0_c20,
++	arm_rs_r12_t0_c20,
++	arm_rs_r13_t0_c20,
++	arm_rs_r14_t0_c20,
++	arm_rs_r15_t0_c20,
++	arm_rs_r0_t1_c20,
++	arm_rs_r1_t1_c20,
++	arm_rs_r2_t1_c20,
++	arm_rs_r3_t1_c20,
++	arm_rs_r4_t1_c20,
++	arm_rs_r5_t1_c20,
++	arm_rs_r6_t1_c20,
++	arm_rs_r7_t1_c20,
++	arm_rs_r8_t1_c20,
++	arm_rs_r9_t1_c20,
++	arm_rs_r10_t1_c20,
++	arm_rs_r11_t1_c20,
++	arm_rs_r12_t1_c20,
++	arm_rs_r13_t1_c20,
++	arm_rs_r14_t1_c20,
++	arm_rs_r15_t1_c20,
++	arm_rs_r0_t2_c20,
++	arm_rs_r1_t2_c20,
++	arm_rs_r2_t2_c20,
++	arm_rs_r3_t2_c20,
++	arm_rs_r4_t2_c20,
++	arm_rs_r5_t2_c20,
++	arm_rs_r6_t2_c20,
++	arm_rs_r7_t2_c20,
++	arm_rs_r8_t2_c20,
++	arm_rs_r9_t2_c20,
++	arm_rs_r10_t2_c20,
++	arm_rs_r11_t2_c20,
++	arm_rs_r12_t2_c20,
++	arm_rs_r13_t2_c20,
++	arm_rs_r14_t2_c20,
++	arm_rs_r15_t2_c20,
++	arm_rs_r0_t3_c20,
++	arm_rs_r1_t3_c20,
++	arm_rs_r2_t3_c20,
++	arm_rs_r3_t3_c20,
++	arm_rs_r4_t3_c20,
++	arm_rs_r5_t3_c20,
++	arm_rs_r6_t3_c20,
++	arm_rs_r7_t3_c20,
++	arm_rs_r8_t3_c20,
++	arm_rs_r9_t3_c20,
++	arm_rs_r10_t3_c20,
++	arm_rs_r11_t3_c20,
++	arm_rs_r12_t3_c20,
++	arm_rs_r13_t3_c20,
++	arm_rs_r14_t3_c20,
++	arm_rs_r15_t3_c20,
++	arm_rs_r0_t4_c20,
++	arm_rs_r1_t4_c20,
++	arm_rs_r2_t4_c20,
++	arm_rs_r3_t4_c20,
++	arm_rs_r4_t4_c20,
++	arm_rs_r5_t4_c20,
++	arm_rs_r6_t4_c20,
++	arm_rs_r7_t4_c20,
++	arm_rs_r8_t4_c20,
++	arm_rs_r9_t4_c20,
++	arm_rs_r10_t4_c20,
++	arm_rs_r11_t4_c20,
++	arm_rs_r12_t4_c20,
++	arm_rs_r13_t4_c20,
++	arm_rs_r14_t4_c20,
++	arm_rs_r15_t4_c20,
++	arm_rs_r0_t5_c20,
++	arm_rs_r1_t5_c20,
++	arm_rs_r2_t5_c20,
++	arm_rs_r3_t5_c20,
++	arm_rs_r4_t5_c20,
++	arm_rs_r5_t5_c20,
++	arm_rs_r6_t5_c20,
++	arm_rs_r7_t5_c20,
++	arm_rs_r8_t5_c20,
++	arm_rs_r9_t5_c20,
++	arm_rs_r10_t5_c20,
++	arm_rs_r11_t5_c20,
++	arm_rs_r12_t5_c20,
++	arm_rs_r13_t5_c20,
++	arm_rs_r14_t5_c20,
++	arm_rs_r15_t5_c20,
++	arm_rs_r0_t6_c20,
++	arm_rs_r1_t6_c20,
++	arm_rs_r2_t6_c20,
++	arm_rs_r3_t6_c20,
++	arm_rs_r4_t6_c20,
++	arm_rs_r5_t6_c20,
++	arm_rs_r6_t6_c20,
++	arm_rs_r7_t6_c20,
++	arm_rs_r8_t6_c20,
++	arm_rs_r9_t6_c20,
++	arm_rs_r10_t6_c20,
++	arm_rs_r11_t6_c20,
++	arm_rs_r12_t6_c20,
++	arm_rs_r13_t6_c20,
++	arm_rs_r14_t6_c20,
++	arm_rs_r15_t6_c20,
++	arm_rs_r0_t7_c20,
++	arm_rs_r1_t7_c20,
++	arm_rs_r2_t7_c20,
++	arm_rs_r3_t7_c20,
++	arm_rs_r4_t7_c20,
++	arm_rs_r5_t7_c20,
++	arm_rs_r6_t7_c20,
++	arm_rs_r7_t7_c20,
++	arm_rs_r8_t7_c20,
++	arm_rs_r9_t7_c20,
++	arm_rs_r10_t7_c20,
++	arm_rs_r11_t7_c20,
++	arm_rs_r12_t7_c20,
++	arm_rs_r13_t7_c20,
++	arm_rs_r14_t7_c20,
++	arm_rs_r15_t7_c20,
++	arm_rs_r0_t0_c21,
++	arm_rs_r1_t0_c21,
++	arm_rs_r2_t0_c21,
++	arm_rs_r3_t0_c21,
++	arm_rs_r4_t0_c21,
++	arm_rs_r5_t0_c21,
++	arm_rs_r6_t0_c21,
++	arm_rs_r7_t0_c21,
++	arm_rs_r8_t0_c21,
++	arm_rs_r9_t0_c21,
++	arm_rs_r10_t0_c21,
++	arm_rs_r11_t0_c21,
++	arm_rs_r12_t0_c21,
++	arm_rs_r13_t0_c21,
++	arm_rs_r14_t0_c21,
++	arm_rs_r15_t0_c21,
++	arm_rs_r0_t1_c21,
++	arm_rs_r1_t1_c21,
++	arm_rs_r2_t1_c21,
++	arm_rs_r3_t1_c21,
++	arm_rs_r4_t1_c21,
++	arm_rs_r5_t1_c21,
++	arm_rs_r6_t1_c21,
++	arm_rs_r7_t1_c21,
++	arm_rs_r8_t1_c21,
++	arm_rs_r9_t1_c21,
++	arm_rs_r10_t1_c21,
++	arm_rs_r11_t1_c21,
++	arm_rs_r12_t1_c21,
++	arm_rs_r13_t1_c21,
++	arm_rs_r14_t1_c21,
++	arm_rs_r15_t1_c21,
++	arm_rs_r0_t2_c21,
++	arm_rs_r1_t2_c21,
++	arm_rs_r2_t2_c21,
++	arm_rs_r3_t2_c21,
++	arm_rs_r4_t2_c21,
++	arm_rs_r5_t2_c21,
++	arm_rs_r6_t2_c21,
++	arm_rs_r7_t2_c21,
++	arm_rs_r8_t2_c21,
++	arm_rs_r9_t2_c21,
++	arm_rs_r10_t2_c21,
++	arm_rs_r11_t2_c21,
++	arm_rs_r12_t2_c21,
++	arm_rs_r13_t2_c21,
++	arm_rs_r14_t2_c21,
++	arm_rs_r15_t2_c21,
++	arm_rs_r0_t3_c21,
++	arm_rs_r1_t3_c21,
++	arm_rs_r2_t3_c21,
++	arm_rs_r3_t3_c21,
++	arm_rs_r4_t3_c21,
++	arm_rs_r5_t3_c21,
++	arm_rs_r6_t3_c21,
++	arm_rs_r7_t3_c21,
++	arm_rs_r8_t3_c21,
++	arm_rs_r9_t3_c21,
++	arm_rs_r10_t3_c21,
++	arm_rs_r11_t3_c21,
++	arm_rs_r12_t3_c21,
++	arm_rs_r13_t3_c21,
++	arm_rs_r14_t3_c21,
++	arm_rs_r15_t3_c21,
++	arm_rs_r0_t4_c21,
++	arm_rs_r1_t4_c21,
++	arm_rs_r2_t4_c21,
++	arm_rs_r3_t4_c21,
++	arm_rs_r4_t4_c21,
++	arm_rs_r5_t4_c21,
++	arm_rs_r6_t4_c21,
++	arm_rs_r7_t4_c21,
++	arm_rs_r8_t4_c21,
++	arm_rs_r9_t4_c21,
++	arm_rs_r10_t4_c21,
++	arm_rs_r11_t4_c21,
++	arm_rs_r12_t4_c21,
++	arm_rs_r13_t4_c21,
++	arm_rs_r14_t4_c21,
++	arm_rs_r15_t4_c21,
++	arm_rs_r0_t5_c21,
++	arm_rs_r1_t5_c21,
++	arm_rs_r2_t5_c21,
++	arm_rs_r3_t5_c21,
++	arm_rs_r4_t5_c21,
++	arm_rs_r5_t5_c21,
++	arm_rs_r6_t5_c21,
++	arm_rs_r7_t5_c21,
++	arm_rs_r8_t5_c21,
++	arm_rs_r9_t5_c21,
++	arm_rs_r10_t5_c21,
++	arm_rs_r11_t5_c21,
++	arm_rs_r12_t5_c21,
++	arm_rs_r13_t5_c21,
++	arm_rs_r14_t5_c21,
++	arm_rs_r15_t5_c21,
++	arm_rs_r0_t6_c21,
++	arm_rs_r1_t6_c21,
++	arm_rs_r2_t6_c21,
++	arm_rs_r3_t6_c21,
++	arm_rs_r4_t6_c21,
++	arm_rs_r5_t6_c21,
++	arm_rs_r6_t6_c21,
++	arm_rs_r7_t6_c21,
++	arm_rs_r8_t6_c21,
++	arm_rs_r9_t6_c21,
++	arm_rs_r10_t6_c21,
++	arm_rs_r11_t6_c21,
++	arm_rs_r12_t6_c21,
++	arm_rs_r13_t6_c21,
++	arm_rs_r14_t6_c21,
++	arm_rs_r15_t6_c21,
++	arm_rs_r0_t7_c21,
++	arm_rs_r1_t7_c21,
++	arm_rs_r2_t7_c21,
++	arm_rs_r3_t7_c21,
++	arm_rs_r4_t7_c21,
++	arm_rs_r5_t7_c21,
++	arm_rs_r6_t7_c21,
++	arm_rs_r7_t7_c21,
++	arm_rs_r8_t7_c21,
++	arm_rs_r9_t7_c21,
++	arm_rs_r10_t7_c21,
++	arm_rs_r11_t7_c21,
++	arm_rs_r12_t7_c21,
++	arm_rs_r13_t7_c21,
++	arm_rs_r14_t7_c21,
++	arm_rs_r15_t7_c21,
++	arm_rs_r0_t0_c22,
++	arm_rs_r1_t0_c22,
++	arm_rs_r2_t0_c22,
++	arm_rs_r3_t0_c22,
++	arm_rs_r4_t0_c22,
++	arm_rs_r5_t0_c22,
++	arm_rs_r6_t0_c22,
++	arm_rs_r7_t0_c22,
++	arm_rs_r8_t0_c22,
++	arm_rs_r9_t0_c22,
++	arm_rs_r10_t0_c22,
++	arm_rs_r11_t0_c22,
++	arm_rs_r12_t0_c22,
++	arm_rs_r13_t0_c22,
++	arm_rs_r14_t0_c22,
++	arm_rs_r15_t0_c22,
++	arm_rs_r0_t1_c22,
++	arm_rs_r1_t1_c22,
++	arm_rs_r2_t1_c22,
++	arm_rs_r3_t1_c22,
++	arm_rs_r4_t1_c22,
++	arm_rs_r5_t1_c22,
++	arm_rs_r6_t1_c22,
++	arm_rs_r7_t1_c22,
++	arm_rs_r8_t1_c22,
++	arm_rs_r9_t1_c22,
++	arm_rs_r10_t1_c22,
++	arm_rs_r11_t1_c22,
++	arm_rs_r12_t1_c22,
++	arm_rs_r13_t1_c22,
++	arm_rs_r14_t1_c22,
++	arm_rs_r15_t1_c22,
++	arm_rs_r0_t2_c22,
++	arm_rs_r1_t2_c22,
++	arm_rs_r2_t2_c22,
++	arm_rs_r3_t2_c22,
++	arm_rs_r4_t2_c22,
++	arm_rs_r5_t2_c22,
++	arm_rs_r6_t2_c22,
++	arm_rs_r7_t2_c22,
++	arm_rs_r8_t2_c22,
++	arm_rs_r9_t2_c22,
++	arm_rs_r10_t2_c22,
++	arm_rs_r11_t2_c22,
++	arm_rs_r12_t2_c22,
++	arm_rs_r13_t2_c22,
++	arm_rs_r14_t2_c22,
++	arm_rs_r15_t2_c22,
++	arm_rs_r0_t3_c22,
++	arm_rs_r1_t3_c22,
++	arm_rs_r2_t3_c22,
++	arm_rs_r3_t3_c22,
++	arm_rs_r4_t3_c22,
++	arm_rs_r5_t3_c22,
++	arm_rs_r6_t3_c22,
++	arm_rs_r7_t3_c22,
++	arm_rs_r8_t3_c22,
++	arm_rs_r9_t3_c22,
++	arm_rs_r10_t3_c22,
++	arm_rs_r11_t3_c22,
++	arm_rs_r12_t3_c22,
++	arm_rs_r13_t3_c22,
++	arm_rs_r14_t3_c22,
++	arm_rs_r15_t3_c22,
++	arm_rs_r0_t4_c22,
++	arm_rs_r1_t4_c22,
++	arm_rs_r2_t4_c22,
++	arm_rs_r3_t4_c22,
++	arm_rs_r4_t4_c22,
++	arm_rs_r5_t4_c22,
++	arm_rs_r6_t4_c22,
++	arm_rs_r7_t4_c22,
++	arm_rs_r8_t4_c22,
++	arm_rs_r9_t4_c22,
++	arm_rs_r10_t4_c22,
++	arm_rs_r11_t4_c22,
++	arm_rs_r12_t4_c22,
++	arm_rs_r13_t4_c22,
++	arm_rs_r14_t4_c22,
++	arm_rs_r15_t4_c22,
++	arm_rs_r0_t5_c22,
++	arm_rs_r1_t5_c22,
++	arm_rs_r2_t5_c22,
++	arm_rs_r3_t5_c22,
++	arm_rs_r4_t5_c22,
++	arm_rs_r5_t5_c22,
++	arm_rs_r6_t5_c22,
++	arm_rs_r7_t5_c22,
++	arm_rs_r8_t5_c22,
++	arm_rs_r9_t5_c22,
++	arm_rs_r10_t5_c22,
++	arm_rs_r11_t5_c22,
++	arm_rs_r12_t5_c22,
++	arm_rs_r13_t5_c22,
++	arm_rs_r14_t5_c22,
++	arm_rs_r15_t5_c22,
++	arm_rs_r0_t6_c22,
++	arm_rs_r1_t6_c22,
++	arm_rs_r2_t6_c22,
++	arm_rs_r3_t6_c22,
++	arm_rs_r4_t6_c22,
++	arm_rs_r5_t6_c22,
++	arm_rs_r6_t6_c22,
++	arm_rs_r7_t6_c22,
++	arm_rs_r8_t6_c22,
++	arm_rs_r9_t6_c22,
++	arm_rs_r10_t6_c22,
++	arm_rs_r11_t6_c22,
++	arm_rs_r12_t6_c22,
++	arm_rs_r13_t6_c22,
++	arm_rs_r14_t6_c22,
++	arm_rs_r15_t6_c22,
++	arm_rs_r0_t7_c22,
++	arm_rs_r1_t7_c22,
++	arm_rs_r2_t7_c22,
++	arm_rs_r3_t7_c22,
++	arm_rs_r4_t7_c22,
++	arm_rs_r5_t7_c22,
++	arm_rs_r6_t7_c22,
++	arm_rs_r7_t7_c22,
++	arm_rs_r8_t7_c22,
++	arm_rs_r9_t7_c22,
++	arm_rs_r10_t7_c22,
++	arm_rs_r11_t7_c22,
++	arm_rs_r12_t7_c22,
++	arm_rs_r13_t7_c22,
++	arm_rs_r14_t7_c22,
++	arm_rs_r15_t7_c22,
++	arm_rs_r0_t0_c23,
++	arm_rs_r1_t0_c23,
++	arm_rs_r2_t0_c23,
++	arm_rs_r3_t0_c23,
++	arm_rs_r4_t0_c23,
++	arm_rs_r5_t0_c23,
++	arm_rs_r6_t0_c23,
++	arm_rs_r7_t0_c23,
++	arm_rs_r8_t0_c23,
++	arm_rs_r9_t0_c23,
++	arm_rs_r10_t0_c23,
++	arm_rs_r11_t0_c23,
++	arm_rs_r12_t0_c23,
++	arm_rs_r13_t0_c23,
++	arm_rs_r14_t0_c23,
++	arm_rs_r15_t0_c23,
++	arm_rs_r0_t1_c23,
++	arm_rs_r1_t1_c23,
++	arm_rs_r2_t1_c23,
++	arm_rs_r3_t1_c23,
++	arm_rs_r4_t1_c23,
++	arm_rs_r5_t1_c23,
++	arm_rs_r6_t1_c23,
++	arm_rs_r7_t1_c23,
++	arm_rs_r8_t1_c23,
++	arm_rs_r9_t1_c23,
++	arm_rs_r10_t1_c23,
++	arm_rs_r11_t1_c23,
++	arm_rs_r12_t1_c23,
++	arm_rs_r13_t1_c23,
++	arm_rs_r14_t1_c23,
++	arm_rs_r15_t1_c23,
++	arm_rs_r0_t2_c23,
++	arm_rs_r1_t2_c23,
++	arm_rs_r2_t2_c23,
++	arm_rs_r3_t2_c23,
++	arm_rs_r4_t2_c23,
++	arm_rs_r5_t2_c23,
++	arm_rs_r6_t2_c23,
++	arm_rs_r7_t2_c23,
++	arm_rs_r8_t2_c23,
++	arm_rs_r9_t2_c23,
++	arm_rs_r10_t2_c23,
++	arm_rs_r11_t2_c23,
++	arm_rs_r12_t2_c23,
++	arm_rs_r13_t2_c23,
++	arm_rs_r14_t2_c23,
++	arm_rs_r15_t2_c23,
++	arm_rs_r0_t3_c23,
++	arm_rs_r1_t3_c23,
++	arm_rs_r2_t3_c23,
++	arm_rs_r3_t3_c23,
++	arm_rs_r4_t3_c23,
++	arm_rs_r5_t3_c23,
++	arm_rs_r6_t3_c23,
++	arm_rs_r7_t3_c23,
++	arm_rs_r8_t3_c23,
++	arm_rs_r9_t3_c23,
++	arm_rs_r10_t3_c23,
++	arm_rs_r11_t3_c23,
++	arm_rs_r12_t3_c23,
++	arm_rs_r13_t3_c23,
++	arm_rs_r14_t3_c23,
++	arm_rs_r15_t3_c23,
++	arm_rs_r0_t4_c23,
++	arm_rs_r1_t4_c23,
++	arm_rs_r2_t4_c23,
++	arm_rs_r3_t4_c23,
++	arm_rs_r4_t4_c23,
++	arm_rs_r5_t4_c23,
++	arm_rs_r6_t4_c23,
++	arm_rs_r7_t4_c23,
++	arm_rs_r8_t4_c23,
++	arm_rs_r9_t4_c23,
++	arm_rs_r10_t4_c23,
++	arm_rs_r11_t4_c23,
++	arm_rs_r12_t4_c23,
++	arm_rs_r13_t4_c23,
++	arm_rs_r14_t4_c23,
++	arm_rs_r15_t4_c23,
++	arm_rs_r0_t5_c23,
++	arm_rs_r1_t5_c23,
++	arm_rs_r2_t5_c23,
++	arm_rs_r3_t5_c23,
++	arm_rs_r4_t5_c23,
++	arm_rs_r5_t5_c23,
++	arm_rs_r6_t5_c23,
++	arm_rs_r7_t5_c23,
++	arm_rs_r8_t5_c23,
++	arm_rs_r9_t5_c23,
++	arm_rs_r10_t5_c23,
++	arm_rs_r11_t5_c23,
++	arm_rs_r12_t5_c23,
++	arm_rs_r13_t5_c23,
++	arm_rs_r14_t5_c23,
++	arm_rs_r15_t5_c23,
++	arm_rs_r0_t6_c23,
++	arm_rs_r1_t6_c23,
++	arm_rs_r2_t6_c23,
++	arm_rs_r3_t6_c23,
++	arm_rs_r4_t6_c23,
++	arm_rs_r5_t6_c23,
++	arm_rs_r6_t6_c23,
++	arm_rs_r7_t6_c23,
++	arm_rs_r8_t6_c23,
++	arm_rs_r9_t6_c23,
++	arm_rs_r10_t6_c23,
++	arm_rs_r11_t6_c23,
++	arm_rs_r12_t6_c23,
++	arm_rs_r13_t6_c23,
++	arm_rs_r14_t6_c23,
++	arm_rs_r15_t6_c23,
++	arm_rs_r0_t7_c23,
++	arm_rs_r1_t7_c23,
++	arm_rs_r2_t7_c23,
++	arm_rs_r3_t7_c23,
++	arm_rs_r4_t7_c23,
++	arm_rs_r5_t7_c23,
++	arm_rs_r6_t7_c23,
++	arm_rs_r7_t7_c23,
++	arm_rs_r8_t7_c23,
++	arm_rs_r9_t7_c23,
++	arm_rs_r10_t7_c23,
++	arm_rs_r11_t7_c23,
++	arm_rs_r12_t7_c23,
++	arm_rs_r13_t7_c23,
++	arm_rs_r14_t7_c23,
++	arm_rs_r15_t7_c23,
++	arm_rs_r0_t0_c24,
++	arm_rs_r1_t0_c24,
++	arm_rs_r2_t0_c24,
++	arm_rs_r3_t0_c24,
++	arm_rs_r4_t0_c24,
++	arm_rs_r5_t0_c24,
++	arm_rs_r6_t0_c24,
++	arm_rs_r7_t0_c24,
++	arm_rs_r8_t0_c24,
++	arm_rs_r9_t0_c24,
++	arm_rs_r10_t0_c24,
++	arm_rs_r11_t0_c24,
++	arm_rs_r12_t0_c24,
++	arm_rs_r13_t0_c24,
++	arm_rs_r14_t0_c24,
++	arm_rs_r15_t0_c24,
++	arm_rs_r0_t1_c24,
++	arm_rs_r1_t1_c24,
++	arm_rs_r2_t1_c24,
++	arm_rs_r3_t1_c24,
++	arm_rs_r4_t1_c24,
++	arm_rs_r5_t1_c24,
++	arm_rs_r6_t1_c24,
++	arm_rs_r7_t1_c24,
++	arm_rs_r8_t1_c24,
++	arm_rs_r9_t1_c24,
++	arm_rs_r10_t1_c24,
++	arm_rs_r11_t1_c24,
++	arm_rs_r12_t1_c24,
++	arm_rs_r13_t1_c24,
++	arm_rs_r14_t1_c24,
++	arm_rs_r15_t1_c24,
++	arm_rs_r0_t2_c24,
++	arm_rs_r1_t2_c24,
++	arm_rs_r2_t2_c24,
++	arm_rs_r3_t2_c24,
++	arm_rs_r4_t2_c24,
++	arm_rs_r5_t2_c24,
++	arm_rs_r6_t2_c24,
++	arm_rs_r7_t2_c24,
++	arm_rs_r8_t2_c24,
++	arm_rs_r9_t2_c24,
++	arm_rs_r10_t2_c24,
++	arm_rs_r11_t2_c24,
++	arm_rs_r12_t2_c24,
++	arm_rs_r13_t2_c24,
++	arm_rs_r14_t2_c24,
++	arm_rs_r15_t2_c24,
++	arm_rs_r0_t3_c24,
++	arm_rs_r1_t3_c24,
++	arm_rs_r2_t3_c24,
++	arm_rs_r3_t3_c24,
++	arm_rs_r4_t3_c24,
++	arm_rs_r5_t3_c24,
++	arm_rs_r6_t3_c24,
++	arm_rs_r7_t3_c24,
++	arm_rs_r8_t3_c24,
++	arm_rs_r9_t3_c24,
++	arm_rs_r10_t3_c24,
++	arm_rs_r11_t3_c24,
++	arm_rs_r12_t3_c24,
++	arm_rs_r13_t3_c24,
++	arm_rs_r14_t3_c24,
++	arm_rs_r15_t3_c24,
++	arm_rs_r0_t4_c24,
++	arm_rs_r1_t4_c24,
++	arm_rs_r2_t4_c24,
++	arm_rs_r3_t4_c24,
++	arm_rs_r4_t4_c24,
++	arm_rs_r5_t4_c24,
++	arm_rs_r6_t4_c24,
++	arm_rs_r7_t4_c24,
++	arm_rs_r8_t4_c24,
++	arm_rs_r9_t4_c24,
++	arm_rs_r10_t4_c24,
++	arm_rs_r11_t4_c24,
++	arm_rs_r12_t4_c24,
++	arm_rs_r13_t4_c24,
++	arm_rs_r14_t4_c24,
++	arm_rs_r15_t4_c24,
++	arm_rs_r0_t5_c24,
++	arm_rs_r1_t5_c24,
++	arm_rs_r2_t5_c24,
++	arm_rs_r3_t5_c24,
++	arm_rs_r4_t5_c24,
++	arm_rs_r5_t5_c24,
++	arm_rs_r6_t5_c24,
++	arm_rs_r7_t5_c24,
++	arm_rs_r8_t5_c24,
++	arm_rs_r9_t5_c24,
++	arm_rs_r10_t5_c24,
++	arm_rs_r11_t5_c24,
++	arm_rs_r12_t5_c24,
++	arm_rs_r13_t5_c24,
++	arm_rs_r14_t5_c24,
++	arm_rs_r15_t5_c24,
++	arm_rs_r0_t6_c24,
++	arm_rs_r1_t6_c24,
++	arm_rs_r2_t6_c24,
++	arm_rs_r3_t6_c24,
++	arm_rs_r4_t6_c24,
++	arm_rs_r5_t6_c24,
++	arm_rs_r6_t6_c24,
++	arm_rs_r7_t6_c24,
++	arm_rs_r8_t6_c24,
++	arm_rs_r9_t6_c24,
++	arm_rs_r10_t6_c24,
++	arm_rs_r11_t6_c24,
++	arm_rs_r12_t6_c24,
++	arm_rs_r13_t6_c24,
++	arm_rs_r14_t6_c24,
++	arm_rs_r15_t6_c24,
++	arm_rs_r0_t7_c24,
++	arm_rs_r1_t7_c24,
++	arm_rs_r2_t7_c24,
++	arm_rs_r3_t7_c24,
++	arm_rs_r4_t7_c24,
++	arm_rs_r5_t7_c24,
++	arm_rs_r6_t7_c24,
++	arm_rs_r7_t7_c24,
++	arm_rs_r8_t7_c24,
++	arm_rs_r9_t7_c24,
++	arm_rs_r10_t7_c24,
++	arm_rs_r11_t7_c24,
++	arm_rs_r12_t7_c24,
++	arm_rs_r13_t7_c24,
++	arm_rs_r14_t7_c24,
++	arm_rs_r15_t7_c24,
++	arm_rs_r0_t0_c25,
++	arm_rs_r1_t0_c25,
++	arm_rs_r2_t0_c25,
++	arm_rs_r3_t0_c25,
++	arm_rs_r4_t0_c25,
++	arm_rs_r5_t0_c25,
++	arm_rs_r6_t0_c25,
++	arm_rs_r7_t0_c25,
++	arm_rs_r8_t0_c25,
++	arm_rs_r9_t0_c25,
++	arm_rs_r10_t0_c25,
++	arm_rs_r11_t0_c25,
++	arm_rs_r12_t0_c25,
++	arm_rs_r13_t0_c25,
++	arm_rs_r14_t0_c25,
++	arm_rs_r15_t0_c25,
++	arm_rs_r0_t1_c25,
++	arm_rs_r1_t1_c25,
++	arm_rs_r2_t1_c25,
++	arm_rs_r3_t1_c25,
++	arm_rs_r4_t1_c25,
++	arm_rs_r5_t1_c25,
++	arm_rs_r6_t1_c25,
++	arm_rs_r7_t1_c25,
++	arm_rs_r8_t1_c25,
++	arm_rs_r9_t1_c25,
++	arm_rs_r10_t1_c25,
++	arm_rs_r11_t1_c25,
++	arm_rs_r12_t1_c25,
++	arm_rs_r13_t1_c25,
++	arm_rs_r14_t1_c25,
++	arm_rs_r15_t1_c25,
++	arm_rs_r0_t2_c25,
++	arm_rs_r1_t2_c25,
++	arm_rs_r2_t2_c25,
++	arm_rs_r3_t2_c25,
++	arm_rs_r4_t2_c25,
++	arm_rs_r5_t2_c25,
++	arm_rs_r6_t2_c25,
++	arm_rs_r7_t2_c25,
++	arm_rs_r8_t2_c25,
++	arm_rs_r9_t2_c25,
++	arm_rs_r10_t2_c25,
++	arm_rs_r11_t2_c25,
++	arm_rs_r12_t2_c25,
++	arm_rs_r13_t2_c25,
++	arm_rs_r14_t2_c25,
++	arm_rs_r15_t2_c25,
++	arm_rs_r0_t3_c25,
++	arm_rs_r1_t3_c25,
++	arm_rs_r2_t3_c25,
++	arm_rs_r3_t3_c25,
++	arm_rs_r4_t3_c25,
++	arm_rs_r5_t3_c25,
++	arm_rs_r6_t3_c25,
++	arm_rs_r7_t3_c25,
++	arm_rs_r8_t3_c25,
++	arm_rs_r9_t3_c25,
++	arm_rs_r10_t3_c25,
++	arm_rs_r11_t3_c25,
++	arm_rs_r12_t3_c25,
++	arm_rs_r13_t3_c25,
++	arm_rs_r14_t3_c25,
++	arm_rs_r15_t3_c25,
++	arm_rs_r0_t4_c25,
++	arm_rs_r1_t4_c25,
++	arm_rs_r2_t4_c25,
++	arm_rs_r3_t4_c25,
++	arm_rs_r4_t4_c25,
++	arm_rs_r5_t4_c25,
++	arm_rs_r6_t4_c25,
++	arm_rs_r7_t4_c25,
++	arm_rs_r8_t4_c25,
++	arm_rs_r9_t4_c25,
++	arm_rs_r10_t4_c25,
++	arm_rs_r11_t4_c25,
++	arm_rs_r12_t4_c25,
++	arm_rs_r13_t4_c25,
++	arm_rs_r14_t4_c25,
++	arm_rs_r15_t4_c25,
++	arm_rs_r0_t5_c25,
++	arm_rs_r1_t5_c25,
++	arm_rs_r2_t5_c25,
++	arm_rs_r3_t5_c25,
++	arm_rs_r4_t5_c25,
++	arm_rs_r5_t5_c25,
++	arm_rs_r6_t5_c25,
++	arm_rs_r7_t5_c25,
++	arm_rs_r8_t5_c25,
++	arm_rs_r9_t5_c25,
++	arm_rs_r10_t5_c25,
++	arm_rs_r11_t5_c25,
++	arm_rs_r12_t5_c25,
++	arm_rs_r13_t5_c25,
++	arm_rs_r14_t5_c25,
++	arm_rs_r15_t5_c25,
++	arm_rs_r0_t6_c25,
++	arm_rs_r1_t6_c25,
++	arm_rs_r2_t6_c25,
++	arm_rs_r3_t6_c25,
++	arm_rs_r4_t6_c25,
++	arm_rs_r5_t6_c25,
++	arm_rs_r6_t6_c25,
++	arm_rs_r7_t6_c25,
++	arm_rs_r8_t6_c25,
++	arm_rs_r9_t6_c25,
++	arm_rs_r10_t6_c25,
++	arm_rs_r11_t6_c25,
++	arm_rs_r12_t6_c25,
++	arm_rs_r13_t6_c25,
++	arm_rs_r14_t6_c25,
++	arm_rs_r15_t6_c25,
++	arm_rs_r0_t7_c25,
++	arm_rs_r1_t7_c25,
++	arm_rs_r2_t7_c25,
++	arm_rs_r3_t7_c25,
++	arm_rs_r4_t7_c25,
++	arm_rs_r5_t7_c25,
++	arm_rs_r6_t7_c25,
++	arm_rs_r7_t7_c25,
++	arm_rs_r8_t7_c25,
++	arm_rs_r9_t7_c25,
++	arm_rs_r10_t7_c25,
++	arm_rs_r11_t7_c25,
++	arm_rs_r12_t7_c25,
++	arm_rs_r13_t7_c25,
++	arm_rs_r14_t7_c25,
++	arm_rs_r15_t7_c25,
++	arm_rs_r0_t0_c26,
++	arm_rs_r1_t0_c26,
++	arm_rs_r2_t0_c26,
++	arm_rs_r3_t0_c26,
++	arm_rs_r4_t0_c26,
++	arm_rs_r5_t0_c26,
++	arm_rs_r6_t0_c26,
++	arm_rs_r7_t0_c26,
++	arm_rs_r8_t0_c26,
++	arm_rs_r9_t0_c26,
++	arm_rs_r10_t0_c26,
++	arm_rs_r11_t0_c26,
++	arm_rs_r12_t0_c26,
++	arm_rs_r13_t0_c26,
++	arm_rs_r14_t0_c26,
++	arm_rs_r15_t0_c26,
++	arm_rs_r0_t1_c26,
++	arm_rs_r1_t1_c26,
++	arm_rs_r2_t1_c26,
++	arm_rs_r3_t1_c26,
++	arm_rs_r4_t1_c26,
++	arm_rs_r5_t1_c26,
++	arm_rs_r6_t1_c26,
++	arm_rs_r7_t1_c26,
++	arm_rs_r8_t1_c26,
++	arm_rs_r9_t1_c26,
++	arm_rs_r10_t1_c26,
++	arm_rs_r11_t1_c26,
++	arm_rs_r12_t1_c26,
++	arm_rs_r13_t1_c26,
++	arm_rs_r14_t1_c26,
++	arm_rs_r15_t1_c26,
++	arm_rs_r0_t2_c26,
++	arm_rs_r1_t2_c26,
++	arm_rs_r2_t2_c26,
++	arm_rs_r3_t2_c26,
++	arm_rs_r4_t2_c26,
++	arm_rs_r5_t2_c26,
++	arm_rs_r6_t2_c26,
++	arm_rs_r7_t2_c26,
++	arm_rs_r8_t2_c26,
++	arm_rs_r9_t2_c26,
++	arm_rs_r10_t2_c26,
++	arm_rs_r11_t2_c26,
++	arm_rs_r12_t2_c26,
++	arm_rs_r13_t2_c26,
++	arm_rs_r14_t2_c26,
++	arm_rs_r15_t2_c26,
++	arm_rs_r0_t3_c26,
++	arm_rs_r1_t3_c26,
++	arm_rs_r2_t3_c26,
++	arm_rs_r3_t3_c26,
++	arm_rs_r4_t3_c26,
++	arm_rs_r5_t3_c26,
++	arm_rs_r6_t3_c26,
++	arm_rs_r7_t3_c26,
++	arm_rs_r8_t3_c26,
++	arm_rs_r9_t3_c26,
++	arm_rs_r10_t3_c26,
++	arm_rs_r11_t3_c26,
++	arm_rs_r12_t3_c26,
++	arm_rs_r13_t3_c26,
++	arm_rs_r14_t3_c26,
++	arm_rs_r15_t3_c26,
++	arm_rs_r0_t4_c26,
++	arm_rs_r1_t4_c26,
++	arm_rs_r2_t4_c26,
++	arm_rs_r3_t4_c26,
++	arm_rs_r4_t4_c26,
++	arm_rs_r5_t4_c26,
++	arm_rs_r6_t4_c26,
++	arm_rs_r7_t4_c26,
++	arm_rs_r8_t4_c26,
++	arm_rs_r9_t4_c26,
++	arm_rs_r10_t4_c26,
++	arm_rs_r11_t4_c26,
++	arm_rs_r12_t4_c26,
++	arm_rs_r13_t4_c26,
++	arm_rs_r14_t4_c26,
++	arm_rs_r15_t4_c26,
++	arm_rs_r0_t5_c26,
++	arm_rs_r1_t5_c26,
++	arm_rs_r2_t5_c26,
++	arm_rs_r3_t5_c26,
++	arm_rs_r4_t5_c26,
++	arm_rs_r5_t5_c26,
++	arm_rs_r6_t5_c26,
++	arm_rs_r7_t5_c26,
++	arm_rs_r8_t5_c26,
++	arm_rs_r9_t5_c26,
++	arm_rs_r10_t5_c26,
++	arm_rs_r11_t5_c26,
++	arm_rs_r12_t5_c26,
++	arm_rs_r13_t5_c26,
++	arm_rs_r14_t5_c26,
++	arm_rs_r15_t5_c26,
++	arm_rs_r0_t6_c26,
++	arm_rs_r1_t6_c26,
++	arm_rs_r2_t6_c26,
++	arm_rs_r3_t6_c26,
++	arm_rs_r4_t6_c26,
++	arm_rs_r5_t6_c26,
++	arm_rs_r6_t6_c26,
++	arm_rs_r7_t6_c26,
++	arm_rs_r8_t6_c26,
++	arm_rs_r9_t6_c26,
++	arm_rs_r10_t6_c26,
++	arm_rs_r11_t6_c26,
++	arm_rs_r12_t6_c26,
++	arm_rs_r13_t6_c26,
++	arm_rs_r14_t6_c26,
++	arm_rs_r15_t6_c26,
++	arm_rs_r0_t7_c26,
++	arm_rs_r1_t7_c26,
++	arm_rs_r2_t7_c26,
++	arm_rs_r3_t7_c26,
++	arm_rs_r4_t7_c26,
++	arm_rs_r5_t7_c26,
++	arm_rs_r6_t7_c26,
++	arm_rs_r7_t7_c26,
++	arm_rs_r8_t7_c26,
++	arm_rs_r9_t7_c26,
++	arm_rs_r10_t7_c26,
++	arm_rs_r11_t7_c26,
++	arm_rs_r12_t7_c26,
++	arm_rs_r13_t7_c26,
++	arm_rs_r14_t7_c26,
++	arm_rs_r15_t7_c26,
++	arm_rs_r0_t0_c27,
++	arm_rs_r1_t0_c27,
++	arm_rs_r2_t0_c27,
++	arm_rs_r3_t0_c27,
++	arm_rs_r4_t0_c27,
++	arm_rs_r5_t0_c27,
++	arm_rs_r6_t0_c27,
++	arm_rs_r7_t0_c27,
++	arm_rs_r8_t0_c27,
++	arm_rs_r9_t0_c27,
++	arm_rs_r10_t0_c27,
++	arm_rs_r11_t0_c27,
++	arm_rs_r12_t0_c27,
++	arm_rs_r13_t0_c27,
++	arm_rs_r14_t0_c27,
++	arm_rs_r15_t0_c27,
++	arm_rs_r0_t1_c27,
++	arm_rs_r1_t1_c27,
++	arm_rs_r2_t1_c27,
++	arm_rs_r3_t1_c27,
++	arm_rs_r4_t1_c27,
++	arm_rs_r5_t1_c27,
++	arm_rs_r6_t1_c27,
++	arm_rs_r7_t1_c27,
++	arm_rs_r8_t1_c27,
++	arm_rs_r9_t1_c27,
++	arm_rs_r10_t1_c27,
++	arm_rs_r11_t1_c27,
++	arm_rs_r12_t1_c27,
++	arm_rs_r13_t1_c27,
++	arm_rs_r14_t1_c27,
++	arm_rs_r15_t1_c27,
++	arm_rs_r0_t2_c27,
++	arm_rs_r1_t2_c27,
++	arm_rs_r2_t2_c27,
++	arm_rs_r3_t2_c27,
++	arm_rs_r4_t2_c27,
++	arm_rs_r5_t2_c27,
++	arm_rs_r6_t2_c27,
++	arm_rs_r7_t2_c27,
++	arm_rs_r8_t2_c27,
++	arm_rs_r9_t2_c27,
++	arm_rs_r10_t2_c27,
++	arm_rs_r11_t2_c27,
++	arm_rs_r12_t2_c27,
++	arm_rs_r13_t2_c27,
++	arm_rs_r14_t2_c27,
++	arm_rs_r15_t2_c27,
++	arm_rs_r0_t3_c27,
++	arm_rs_r1_t3_c27,
++	arm_rs_r2_t3_c27,
++	arm_rs_r3_t3_c27,
++	arm_rs_r4_t3_c27,
++	arm_rs_r5_t3_c27,
++	arm_rs_r6_t3_c27,
++	arm_rs_r7_t3_c27,
++	arm_rs_r8_t3_c27,
++	arm_rs_r9_t3_c27,
++	arm_rs_r10_t3_c27,
++	arm_rs_r11_t3_c27,
++	arm_rs_r12_t3_c27,
++	arm_rs_r13_t3_c27,
++	arm_rs_r14_t3_c27,
++	arm_rs_r15_t3_c27,
++	arm_rs_r0_t4_c27,
++	arm_rs_r1_t4_c27,
++	arm_rs_r2_t4_c27,
++	arm_rs_r3_t4_c27,
++	arm_rs_r4_t4_c27,
++	arm_rs_r5_t4_c27,
++	arm_rs_r6_t4_c27,
++	arm_rs_r7_t4_c27,
++	arm_rs_r8_t4_c27,
++	arm_rs_r9_t4_c27,
++	arm_rs_r10_t4_c27,
++	arm_rs_r11_t4_c27,
++	arm_rs_r12_t4_c27,
++	arm_rs_r13_t4_c27,
++	arm_rs_r14_t4_c27,
++	arm_rs_r15_t4_c27,
++	arm_rs_r0_t5_c27,
++	arm_rs_r1_t5_c27,
++	arm_rs_r2_t5_c27,
++	arm_rs_r3_t5_c27,
++	arm_rs_r4_t5_c27,
++	arm_rs_r5_t5_c27,
++	arm_rs_r6_t5_c27,
++	arm_rs_r7_t5_c27,
++	arm_rs_r8_t5_c27,
++	arm_rs_r9_t5_c27,
++	arm_rs_r10_t5_c27,
++	arm_rs_r11_t5_c27,
++	arm_rs_r12_t5_c27,
++	arm_rs_r13_t5_c27,
++	arm_rs_r14_t5_c27,
++	arm_rs_r15_t5_c27,
++	arm_rs_r0_t6_c27,
++	arm_rs_r1_t6_c27,
++	arm_rs_r2_t6_c27,
++	arm_rs_r3_t6_c27,
++	arm_rs_r4_t6_c27,
++	arm_rs_r5_t6_c27,
++	arm_rs_r6_t6_c27,
++	arm_rs_r7_t6_c27,
++	arm_rs_r8_t6_c27,
++	arm_rs_r9_t6_c27,
++	arm_rs_r10_t6_c27,
++	arm_rs_r11_t6_c27,
++	arm_rs_r12_t6_c27,
++	arm_rs_r13_t6_c27,
++	arm_rs_r14_t6_c27,
++	arm_rs_r15_t6_c27,
++	arm_rs_r0_t7_c27,
++	arm_rs_r1_t7_c27,
++	arm_rs_r2_t7_c27,
++	arm_rs_r3_t7_c27,
++	arm_rs_r4_t7_c27,
++	arm_rs_r5_t7_c27,
++	arm_rs_r6_t7_c27,
++	arm_rs_r7_t7_c27,
++	arm_rs_r8_t7_c27,
++	arm_rs_r9_t7_c27,
++	arm_rs_r10_t7_c27,
++	arm_rs_r11_t7_c27,
++	arm_rs_r12_t7_c27,
++	arm_rs_r13_t7_c27,
++	arm_rs_r14_t7_c27,
++	arm_rs_r15_t7_c27,
++	arm_rs_r0_t0_c28,
++	arm_rs_r1_t0_c28,
++	arm_rs_r2_t0_c28,
++	arm_rs_r3_t0_c28,
++	arm_rs_r4_t0_c28,
++	arm_rs_r5_t0_c28,
++	arm_rs_r6_t0_c28,
++	arm_rs_r7_t0_c28,
++	arm_rs_r8_t0_c28,
++	arm_rs_r9_t0_c28,
++	arm_rs_r10_t0_c28,
++	arm_rs_r11_t0_c28,
++	arm_rs_r12_t0_c28,
++	arm_rs_r13_t0_c28,
++	arm_rs_r14_t0_c28,
++	arm_rs_r15_t0_c28,
++	arm_rs_r0_t1_c28,
++	arm_rs_r1_t1_c28,
++	arm_rs_r2_t1_c28,
++	arm_rs_r3_t1_c28,
++	arm_rs_r4_t1_c28,
++	arm_rs_r5_t1_c28,
++	arm_rs_r6_t1_c28,
++	arm_rs_r7_t1_c28,
++	arm_rs_r8_t1_c28,
++	arm_rs_r9_t1_c28,
++	arm_rs_r10_t1_c28,
++	arm_rs_r11_t1_c28,
++	arm_rs_r12_t1_c28,
++	arm_rs_r13_t1_c28,
++	arm_rs_r14_t1_c28,
++	arm_rs_r15_t1_c28,
++	arm_rs_r0_t2_c28,
++	arm_rs_r1_t2_c28,
++	arm_rs_r2_t2_c28,
++	arm_rs_r3_t2_c28,
++	arm_rs_r4_t2_c28,
++	arm_rs_r5_t2_c28,
++	arm_rs_r6_t2_c28,
++	arm_rs_r7_t2_c28,
++	arm_rs_r8_t2_c28,
++	arm_rs_r9_t2_c28,
++	arm_rs_r10_t2_c28,
++	arm_rs_r11_t2_c28,
++	arm_rs_r12_t2_c28,
++	arm_rs_r13_t2_c28,
++	arm_rs_r14_t2_c28,
++	arm_rs_r15_t2_c28,
++	arm_rs_r0_t3_c28,
++	arm_rs_r1_t3_c28,
++	arm_rs_r2_t3_c28,
++	arm_rs_r3_t3_c28,
++	arm_rs_r4_t3_c28,
++	arm_rs_r5_t3_c28,
++	arm_rs_r6_t3_c28,
++	arm_rs_r7_t3_c28,
++	arm_rs_r8_t3_c28,
++	arm_rs_r9_t3_c28,
++	arm_rs_r10_t3_c28,
++	arm_rs_r11_t3_c28,
++	arm_rs_r12_t3_c28,
++	arm_rs_r13_t3_c28,
++	arm_rs_r14_t3_c28,
++	arm_rs_r15_t3_c28,
++	arm_rs_r0_t4_c28,
++	arm_rs_r1_t4_c28,
++	arm_rs_r2_t4_c28,
++	arm_rs_r3_t4_c28,
++	arm_rs_r4_t4_c28,
++	arm_rs_r5_t4_c28,
++	arm_rs_r6_t4_c28,
++	arm_rs_r7_t4_c28,
++	arm_rs_r8_t4_c28,
++	arm_rs_r9_t4_c28,
++	arm_rs_r10_t4_c28,
++	arm_rs_r11_t4_c28,
++	arm_rs_r12_t4_c28,
++	arm_rs_r13_t4_c28,
++	arm_rs_r14_t4_c28,
++	arm_rs_r15_t4_c28,
++	arm_rs_r0_t5_c28,
++	arm_rs_r1_t5_c28,
++	arm_rs_r2_t5_c28,
++	arm_rs_r3_t5_c28,
++	arm_rs_r4_t5_c28,
++	arm_rs_r5_t5_c28,
++	arm_rs_r6_t5_c28,
++	arm_rs_r7_t5_c28,
++	arm_rs_r8_t5_c28,
++	arm_rs_r9_t5_c28,
++	arm_rs_r10_t5_c28,
++	arm_rs_r11_t5_c28,
++	arm_rs_r12_t5_c28,
++	arm_rs_r13_t5_c28,
++	arm_rs_r14_t5_c28,
++	arm_rs_r15_t5_c28,
++	arm_rs_r0_t6_c28,
++	arm_rs_r1_t6_c28,
++	arm_rs_r2_t6_c28,
++	arm_rs_r3_t6_c28,
++	arm_rs_r4_t6_c28,
++	arm_rs_r5_t6_c28,
++	arm_rs_r6_t6_c28,
++	arm_rs_r7_t6_c28,
++	arm_rs_r8_t6_c28,
++	arm_rs_r9_t6_c28,
++	arm_rs_r10_t6_c28,
++	arm_rs_r11_t6_c28,
++	arm_rs_r12_t6_c28,
++	arm_rs_r13_t6_c28,
++	arm_rs_r14_t6_c28,
++	arm_rs_r15_t6_c28,
++	arm_rs_r0_t7_c28,
++	arm_rs_r1_t7_c28,
++	arm_rs_r2_t7_c28,
++	arm_rs_r3_t7_c28,
++	arm_rs_r4_t7_c28,
++	arm_rs_r5_t7_c28,
++	arm_rs_r6_t7_c28,
++	arm_rs_r7_t7_c28,
++	arm_rs_r8_t7_c28,
++	arm_rs_r9_t7_c28,
++	arm_rs_r10_t7_c28,
++	arm_rs_r11_t7_c28,
++	arm_rs_r12_t7_c28,
++	arm_rs_r13_t7_c28,
++	arm_rs_r14_t7_c28,
++	arm_rs_r15_t7_c28,
++	arm_rs_r0_t0_c29,
++	arm_rs_r1_t0_c29,
++	arm_rs_r2_t0_c29,
++	arm_rs_r3_t0_c29,
++	arm_rs_r4_t0_c29,
++	arm_rs_r5_t0_c29,
++	arm_rs_r6_t0_c29,
++	arm_rs_r7_t0_c29,
++	arm_rs_r8_t0_c29,
++	arm_rs_r9_t0_c29,
++	arm_rs_r10_t0_c29,
++	arm_rs_r11_t0_c29,
++	arm_rs_r12_t0_c29,
++	arm_rs_r13_t0_c29,
++	arm_rs_r14_t0_c29,
++	arm_rs_r15_t0_c29,
++	arm_rs_r0_t1_c29,
++	arm_rs_r1_t1_c29,
++	arm_rs_r2_t1_c29,
++	arm_rs_r3_t1_c29,
++	arm_rs_r4_t1_c29,
++	arm_rs_r5_t1_c29,
++	arm_rs_r6_t1_c29,
++	arm_rs_r7_t1_c29,
++	arm_rs_r8_t1_c29,
++	arm_rs_r9_t1_c29,
++	arm_rs_r10_t1_c29,
++	arm_rs_r11_t1_c29,
++	arm_rs_r12_t1_c29,
++	arm_rs_r13_t1_c29,
++	arm_rs_r14_t1_c29,
++	arm_rs_r15_t1_c29,
++	arm_rs_r0_t2_c29,
++	arm_rs_r1_t2_c29,
++	arm_rs_r2_t2_c29,
++	arm_rs_r3_t2_c29,
++	arm_rs_r4_t2_c29,
++	arm_rs_r5_t2_c29,
++	arm_rs_r6_t2_c29,
++	arm_rs_r7_t2_c29,
++	arm_rs_r8_t2_c29,
++	arm_rs_r9_t2_c29,
++	arm_rs_r10_t2_c29,
++	arm_rs_r11_t2_c29,
++	arm_rs_r12_t2_c29,
++	arm_rs_r13_t2_c29,
++	arm_rs_r14_t2_c29,
++	arm_rs_r15_t2_c29,
++	arm_rs_r0_t3_c29,
++	arm_rs_r1_t3_c29,
++	arm_rs_r2_t3_c29,
++	arm_rs_r3_t3_c29,
++	arm_rs_r4_t3_c29,
++	arm_rs_r5_t3_c29,
++	arm_rs_r6_t3_c29,
++	arm_rs_r7_t3_c29,
++	arm_rs_r8_t3_c29,
++	arm_rs_r9_t3_c29,
++	arm_rs_r10_t3_c29,
++	arm_rs_r11_t3_c29,
++	arm_rs_r12_t3_c29,
++	arm_rs_r13_t3_c29,
++	arm_rs_r14_t3_c29,
++	arm_rs_r15_t3_c29,
++	arm_rs_r0_t4_c29,
++	arm_rs_r1_t4_c29,
++	arm_rs_r2_t4_c29,
++	arm_rs_r3_t4_c29,
++	arm_rs_r4_t4_c29,
++	arm_rs_r5_t4_c29,
++	arm_rs_r6_t4_c29,
++	arm_rs_r7_t4_c29,
++	arm_rs_r8_t4_c29,
++	arm_rs_r9_t4_c29,
++	arm_rs_r10_t4_c29,
++	arm_rs_r11_t4_c29,
++	arm_rs_r12_t4_c29,
++	arm_rs_r13_t4_c29,
++	arm_rs_r14_t4_c29,
++	arm_rs_r15_t4_c29,
++	arm_rs_r0_t5_c29,
++	arm_rs_r1_t5_c29,
++	arm_rs_r2_t5_c29,
++	arm_rs_r3_t5_c29,
++	arm_rs_r4_t5_c29,
++	arm_rs_r5_t5_c29,
++	arm_rs_r6_t5_c29,
++	arm_rs_r7_t5_c29,
++	arm_rs_r8_t5_c29,
++	arm_rs_r9_t5_c29,
++	arm_rs_r10_t5_c29,
++	arm_rs_r11_t5_c29,
++	arm_rs_r12_t5_c29,
++	arm_rs_r13_t5_c29,
++	arm_rs_r14_t5_c29,
++	arm_rs_r15_t5_c29,
++	arm_rs_r0_t6_c29,
++	arm_rs_r1_t6_c29,
++	arm_rs_r2_t6_c29,
++	arm_rs_r3_t6_c29,
++	arm_rs_r4_t6_c29,
++	arm_rs_r5_t6_c29,
++	arm_rs_r6_t6_c29,
++	arm_rs_r7_t6_c29,
++	arm_rs_r8_t6_c29,
++	arm_rs_r9_t6_c29,
++	arm_rs_r10_t6_c29,
++	arm_rs_r11_t6_c29,
++	arm_rs_r12_t6_c29,
++	arm_rs_r13_t6_c29,
++	arm_rs_r14_t6_c29,
++	arm_rs_r15_t6_c29,
++	arm_rs_r0_t7_c29,
++	arm_rs_r1_t7_c29,
++	arm_rs_r2_t7_c29,
++	arm_rs_r3_t7_c29,
++	arm_rs_r4_t7_c29,
++	arm_rs_r5_t7_c29,
++	arm_rs_r6_t7_c29,
++	arm_rs_r7_t7_c29,
++	arm_rs_r8_t7_c29,
++	arm_rs_r9_t7_c29,
++	arm_rs_r10_t7_c29,
++	arm_rs_r11_t7_c29,
++	arm_rs_r12_t7_c29,
++	arm_rs_r13_t7_c29,
++	arm_rs_r14_t7_c29,
++	arm_rs_r15_t7_c29,
++	arm_rs_r0_t0_c30,
++	arm_rs_r1_t0_c30,
++	arm_rs_r2_t0_c30,
++	arm_rs_r3_t0_c30,
++	arm_rs_r4_t0_c30,
++	arm_rs_r5_t0_c30,
++	arm_rs_r6_t0_c30,
++	arm_rs_r7_t0_c30,
++	arm_rs_r8_t0_c30,
++	arm_rs_r9_t0_c30,
++	arm_rs_r10_t0_c30,
++	arm_rs_r11_t0_c30,
++	arm_rs_r12_t0_c30,
++	arm_rs_r13_t0_c30,
++	arm_rs_r14_t0_c30,
++	arm_rs_r15_t0_c30,
++	arm_rs_r0_t1_c30,
++	arm_rs_r1_t1_c30,
++	arm_rs_r2_t1_c30,
++	arm_rs_r3_t1_c30,
++	arm_rs_r4_t1_c30,
++	arm_rs_r5_t1_c30,
++	arm_rs_r6_t1_c30,
++	arm_rs_r7_t1_c30,
++	arm_rs_r8_t1_c30,
++	arm_rs_r9_t1_c30,
++	arm_rs_r10_t1_c30,
++	arm_rs_r11_t1_c30,
++	arm_rs_r12_t1_c30,
++	arm_rs_r13_t1_c30,
++	arm_rs_r14_t1_c30,
++	arm_rs_r15_t1_c30,
++	arm_rs_r0_t2_c30,
++	arm_rs_r1_t2_c30,
++	arm_rs_r2_t2_c30,
++	arm_rs_r3_t2_c30,
++	arm_rs_r4_t2_c30,
++	arm_rs_r5_t2_c30,
++	arm_rs_r6_t2_c30,
++	arm_rs_r7_t2_c30,
++	arm_rs_r8_t2_c30,
++	arm_rs_r9_t2_c30,
++	arm_rs_r10_t2_c30,
++	arm_rs_r11_t2_c30,
++	arm_rs_r12_t2_c30,
++	arm_rs_r13_t2_c30,
++	arm_rs_r14_t2_c30,
++	arm_rs_r15_t2_c30,
++	arm_rs_r0_t3_c30,
++	arm_rs_r1_t3_c30,
++	arm_rs_r2_t3_c30,
++	arm_rs_r3_t3_c30,
++	arm_rs_r4_t3_c30,
++	arm_rs_r5_t3_c30,
++	arm_rs_r6_t3_c30,
++	arm_rs_r7_t3_c30,
++	arm_rs_r8_t3_c30,
++	arm_rs_r9_t3_c30,
++	arm_rs_r10_t3_c30,
++	arm_rs_r11_t3_c30,
++	arm_rs_r12_t3_c30,
++	arm_rs_r13_t3_c30,
++	arm_rs_r14_t3_c30,
++	arm_rs_r15_t3_c30,
++	arm_rs_r0_t4_c30,
++	arm_rs_r1_t4_c30,
++	arm_rs_r2_t4_c30,
++	arm_rs_r3_t4_c30,
++	arm_rs_r4_t4_c30,
++	arm_rs_r5_t4_c30,
++	arm_rs_r6_t4_c30,
++	arm_rs_r7_t4_c30,
++	arm_rs_r8_t4_c30,
++	arm_rs_r9_t4_c30,
++	arm_rs_r10_t4_c30,
++	arm_rs_r11_t4_c30,
++	arm_rs_r12_t4_c30,
++	arm_rs_r13_t4_c30,
++	arm_rs_r14_t4_c30,
++	arm_rs_r15_t4_c30,
++	arm_rs_r0_t5_c30,
++	arm_rs_r1_t5_c30,
++	arm_rs_r2_t5_c30,
++	arm_rs_r3_t5_c30,
++	arm_rs_r4_t5_c30,
++	arm_rs_r5_t5_c30,
++	arm_rs_r6_t5_c30,
++	arm_rs_r7_t5_c30,
++	arm_rs_r8_t5_c30,
++	arm_rs_r9_t5_c30,
++	arm_rs_r10_t5_c30,
++	arm_rs_r11_t5_c30,
++	arm_rs_r12_t5_c30,
++	arm_rs_r13_t5_c30,
++	arm_rs_r14_t5_c30,
++	arm_rs_r15_t5_c30,
++	arm_rs_r0_t6_c30,
++	arm_rs_r1_t6_c30,
++	arm_rs_r2_t6_c30,
++	arm_rs_r3_t6_c30,
++	arm_rs_r4_t6_c30,
++	arm_rs_r5_t6_c30,
++	arm_rs_r6_t6_c30,
++	arm_rs_r7_t6_c30,
++	arm_rs_r8_t6_c30,
++	arm_rs_r9_t6_c30,
++	arm_rs_r10_t6_c30,
++	arm_rs_r11_t6_c30,
++	arm_rs_r12_t6_c30,
++	arm_rs_r13_t6_c30,
++	arm_rs_r14_t6_c30,
++	arm_rs_r15_t6_c30,
++	arm_rs_r0_t7_c30,
++	arm_rs_r1_t7_c30,
++	arm_rs_r2_t7_c30,
++	arm_rs_r3_t7_c30,
++	arm_rs_r4_t7_c30,
++	arm_rs_r5_t7_c30,
++	arm_rs_r6_t7_c30,
++	arm_rs_r7_t7_c30,
++	arm_rs_r8_t7_c30,
++	arm_rs_r9_t7_c30,
++	arm_rs_r10_t7_c30,
++	arm_rs_r11_t7_c30,
++	arm_rs_r12_t7_c30,
++	arm_rs_r13_t7_c30,
++	arm_rs_r14_t7_c30,
++	arm_rs_r15_t7_c30,
++	arm_rs_r0_t0_c31,
++	arm_rs_r1_t0_c31,
++	arm_rs_r2_t0_c31,
++	arm_rs_r3_t0_c31,
++	arm_rs_r4_t0_c31,
++	arm_rs_r5_t0_c31,
++	arm_rs_r6_t0_c31,
++	arm_rs_r7_t0_c31,
++	arm_rs_r8_t0_c31,
++	arm_rs_r9_t0_c31,
++	arm_rs_r10_t0_c31,
++	arm_rs_r11_t0_c31,
++	arm_rs_r12_t0_c31,
++	arm_rs_r13_t0_c31,
++	arm_rs_r14_t0_c31,
++	arm_rs_r15_t0_c31,
++	arm_rs_r0_t1_c31,
++	arm_rs_r1_t1_c31,
++	arm_rs_r2_t1_c31,
++	arm_rs_r3_t1_c31,
++	arm_rs_r4_t1_c31,
++	arm_rs_r5_t1_c31,
++	arm_rs_r6_t1_c31,
++	arm_rs_r7_t1_c31,
++	arm_rs_r8_t1_c31,
++	arm_rs_r9_t1_c31,
++	arm_rs_r10_t1_c31,
++	arm_rs_r11_t1_c31,
++	arm_rs_r12_t1_c31,
++	arm_rs_r13_t1_c31,
++	arm_rs_r14_t1_c31,
++	arm_rs_r15_t1_c31,
++	arm_rs_r0_t2_c31,
++	arm_rs_r1_t2_c31,
++	arm_rs_r2_t2_c31,
++	arm_rs_r3_t2_c31,
++	arm_rs_r4_t2_c31,
++	arm_rs_r5_t2_c31,
++	arm_rs_r6_t2_c31,
++	arm_rs_r7_t2_c31,
++	arm_rs_r8_t2_c31,
++	arm_rs_r9_t2_c31,
++	arm_rs_r10_t2_c31,
++	arm_rs_r11_t2_c31,
++	arm_rs_r12_t2_c31,
++	arm_rs_r13_t2_c31,
++	arm_rs_r14_t2_c31,
++	arm_rs_r15_t2_c31,
++	arm_rs_r0_t3_c31,
++	arm_rs_r1_t3_c31,
++	arm_rs_r2_t3_c31,
++	arm_rs_r3_t3_c31,
++	arm_rs_r4_t3_c31,
++	arm_rs_r5_t3_c31,
++	arm_rs_r6_t3_c31,
++	arm_rs_r7_t3_c31,
++	arm_rs_r8_t3_c31,
++	arm_rs_r9_t3_c31,
++	arm_rs_r10_t3_c31,
++	arm_rs_r11_t3_c31,
++	arm_rs_r12_t3_c31,
++	arm_rs_r13_t3_c31,
++	arm_rs_r14_t3_c31,
++	arm_rs_r15_t3_c31,
++	arm_rs_r0_t4_c31,
++	arm_rs_r1_t4_c31,
++	arm_rs_r2_t4_c31,
++	arm_rs_r3_t4_c31,
++	arm_rs_r4_t4_c31,
++	arm_rs_r5_t4_c31,
++	arm_rs_r6_t4_c31,
++	arm_rs_r7_t4_c31,
++	arm_rs_r8_t4_c31,
++	arm_rs_r9_t4_c31,
++	arm_rs_r10_t4_c31,
++	arm_rs_r11_t4_c31,
++	arm_rs_r12_t4_c31,
++	arm_rs_r13_t4_c31,
++	arm_rs_r14_t4_c31,
++	arm_rs_r15_t4_c31,
++	arm_rs_r0_t5_c31,
++	arm_rs_r1_t5_c31,
++	arm_rs_r2_t5_c31,
++	arm_rs_r3_t5_c31,
++	arm_rs_r4_t5_c31,
++	arm_rs_r5_t5_c31,
++	arm_rs_r6_t5_c31,
++	arm_rs_r7_t5_c31,
++	arm_rs_r8_t5_c31,
++	arm_rs_r9_t5_c31,
++	arm_rs_r10_t5_c31,
++	arm_rs_r11_t5_c31,
++	arm_rs_r12_t5_c31,
++	arm_rs_r13_t5_c31,
++	arm_rs_r14_t5_c31,
++	arm_rs_r15_t5_c31,
++	arm_rs_r0_t6_c31,
++	arm_rs_r1_t6_c31,
++	arm_rs_r2_t6_c31,
++	arm_rs_r3_t6_c31,
++	arm_rs_r4_t6_c31,
++	arm_rs_r5_t6_c31,
++	arm_rs_r6_t6_c31,
++	arm_rs_r7_t6_c31,
++	arm_rs_r8_t6_c31,
++	arm_rs_r9_t6_c31,
++	arm_rs_r10_t6_c31,
++	arm_rs_r11_t6_c31,
++	arm_rs_r12_t6_c31,
++	arm_rs_r13_t6_c31,
++	arm_rs_r14_t6_c31,
++	arm_rs_r15_t6_c31,
++	arm_rs_r0_t7_c31,
++	arm_rs_r1_t7_c31,
++	arm_rs_r2_t7_c31,
++	arm_rs_r3_t7_c31,
++	arm_rs_r4_t7_c31,
++	arm_rs_r5_t7_c31,
++	arm_rs_r6_t7_c31,
++	arm_rs_r7_t7_c31,
++	arm_rs_r8_t7_c31,
++	arm_rs_r9_t7_c31,
++	arm_rs_r10_t7_c31,
++	arm_rs_r11_t7_c31,
++	arm_rs_r12_t7_c31,
++	arm_rs_r13_t7_c31,
++	arm_rs_r14_t7_c31,
++	arm_rs_r15_t7_c31
++};
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r0.c gxemul-0.7.0/src/cpus/tmp_arm_r0.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r0.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r0.c	2022-10-18 16:37:22.086747400 +0000
+@@ -0,0 +1,3210 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0];
++}
++uint32_t arm_r_r1_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1];
++}
++uint32_t arm_r_r2_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2];
++}
++uint32_t arm_r_r3_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3];
++}
++uint32_t arm_r_r4_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4];
++}
++uint32_t arm_r_r5_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5];
++}
++uint32_t arm_r_r6_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6];
++}
++uint32_t arm_r_r7_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7];
++}
++uint32_t arm_r_r8_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8];
++}
++uint32_t arm_r_r9_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9];
++}
++uint32_t arm_r_r10_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10];
++}
++uint32_t arm_r_r11_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11];
++}
++uint32_t arm_r_r12_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12];
++}
++uint32_t arm_r_r13_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13];
++}
++uint32_t arm_r_r14_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14];
++}
++uint32_t arm_r_r15_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp;
++}
++uint32_t arm_r_r0_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r1_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r2_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r3_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r4_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r5_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r6_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r7_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r8_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r9_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r10_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r11_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r12_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r13_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r14_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return 0;
++}
++uint32_t arm_r_r15_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return 0;
++}
++uint32_t arm_r_r0_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r1_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r2_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r3_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r4_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r5_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r6_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r7_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r8_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r9_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r10_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r11_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r12_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r13_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r14_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r15_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp & 0x80000000? 0xffffffff : 0;
++}
++uint32_t arm_r_r0_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r1_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r2_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r3_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r4_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r5_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r6_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r7_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r8_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r9_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r10_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r11_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r12_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r13_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r14_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r15_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
++}
++uint32_t arm_r_r0_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 1;
++}
++uint32_t arm_r_r1_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 1;
++}
++uint32_t arm_r_r2_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 1;
++}
++uint32_t arm_r_r3_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 1;
++}
++uint32_t arm_r_r4_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 1;
++}
++uint32_t arm_r_r5_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 1;
++}
++uint32_t arm_r_r6_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 1;
++}
++uint32_t arm_r_r7_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 1;
++}
++uint32_t arm_r_r8_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 1;
++}
++uint32_t arm_r_r9_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 1;
++}
++uint32_t arm_r_r10_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 1;
++}
++uint32_t arm_r_r11_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 1;
++}
++uint32_t arm_r_r12_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 1;
++}
++uint32_t arm_r_r13_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 1;
++}
++uint32_t arm_r_r14_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 1;
++}
++uint32_t arm_r_r15_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 1;
++}
++uint32_t arm_r_r0_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[0] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 1;
++}
++uint32_t arm_r_r1_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 1;
++}
++uint32_t arm_r_r2_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 1;
++}
++uint32_t arm_r_r3_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 1;
++}
++uint32_t arm_r_r4_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 1;
++}
++uint32_t arm_r_r5_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 1;
++}
++uint32_t arm_r_r6_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 1;
++}
++uint32_t arm_r_r7_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 1;
++}
++uint32_t arm_r_r8_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 1;
++}
++uint32_t arm_r_r9_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 1;
++}
++uint32_t arm_r_r10_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 1;
++}
++uint32_t arm_r_r11_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 1;
++}
++uint32_t arm_r_r12_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 1;
++}
++uint32_t arm_r_r13_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 1;
++}
++uint32_t arm_r_r14_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 1;
++}
++uint32_t arm_r_r15_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 1;
++}
++uint32_t arm_r_r0_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[0]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 1;
++}
++uint32_t arm_r_r1_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 1;
++}
++uint32_t arm_r_r2_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 1;
++}
++uint32_t arm_r_r3_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 1;
++}
++uint32_t arm_r_r4_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 1;
++}
++uint32_t arm_r_r5_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 1;
++}
++uint32_t arm_r_r6_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 1;
++}
++uint32_t arm_r_r7_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 1;
++}
++uint32_t arm_r_r8_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 1;
++}
++uint32_t arm_r_r9_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 1;
++}
++uint32_t arm_r_r10_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 1;
++}
++uint32_t arm_r_r11_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 1;
++}
++uint32_t arm_r_r12_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 1;
++}
++uint32_t arm_r_r13_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 1;
++}
++uint32_t arm_r_r14_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 1;
++}
++uint32_t arm_r_r15_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 1;
++}
++uint32_t arm_r_r0_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[0]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r1_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r2_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r3_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r4_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r5_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r6_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r7_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r8_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r9_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r10_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r11_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r12_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r13_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r14_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r15_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 1; }
++}
++uint32_t arm_r_r0_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[0]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = 0;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x = (x<0)? 0xffffffff : 0;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r1_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r2_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r3_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r4_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r5_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r6_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r7_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r8_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r9_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r10_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r11_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r12_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r13_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r14_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r15_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
++}
++uint32_t arm_rs_r0_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 1;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[0] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 1;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[0]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r1.c gxemul-0.7.0/src/cpus/tmp_arm_r1.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r1.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r1.c	2022-10-18 16:37:22.086747400 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 2;
++}
++uint32_t arm_r_r1_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 2;
++}
++uint32_t arm_r_r2_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 2;
++}
++uint32_t arm_r_r3_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 2;
++}
++uint32_t arm_r_r4_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 2;
++}
++uint32_t arm_r_r5_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 2;
++}
++uint32_t arm_r_r6_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 2;
++}
++uint32_t arm_r_r7_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 2;
++}
++uint32_t arm_r_r8_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 2;
++}
++uint32_t arm_r_r9_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 2;
++}
++uint32_t arm_r_r10_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 2;
++}
++uint32_t arm_r_r11_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 2;
++}
++uint32_t arm_r_r12_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 2;
++}
++uint32_t arm_r_r13_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 2;
++}
++uint32_t arm_r_r14_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 2;
++}
++uint32_t arm_r_r15_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 2;
++}
++uint32_t arm_r_r0_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 2;
++}
++uint32_t arm_r_r1_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 2;
++}
++uint32_t arm_r_r2_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 2;
++}
++uint32_t arm_r_r3_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 2;
++}
++uint32_t arm_r_r4_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 2;
++}
++uint32_t arm_r_r5_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 2;
++}
++uint32_t arm_r_r6_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 2;
++}
++uint32_t arm_r_r7_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 2;
++}
++uint32_t arm_r_r8_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 2;
++}
++uint32_t arm_r_r9_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 2;
++}
++uint32_t arm_r_r10_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 2;
++}
++uint32_t arm_r_r11_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 2;
++}
++uint32_t arm_r_r12_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 2;
++}
++uint32_t arm_r_r13_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 2;
++}
++uint32_t arm_r_r14_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 2;
++}
++uint32_t arm_r_r15_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 2;
++}
++uint32_t arm_r_r0_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 2;
++}
++uint32_t arm_r_r1_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 2;
++}
++uint32_t arm_r_r2_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 2;
++}
++uint32_t arm_r_r3_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 2;
++}
++uint32_t arm_r_r4_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 2;
++}
++uint32_t arm_r_r5_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 2;
++}
++uint32_t arm_r_r6_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 2;
++}
++uint32_t arm_r_r7_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 2;
++}
++uint32_t arm_r_r8_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 2;
++}
++uint32_t arm_r_r9_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 2;
++}
++uint32_t arm_r_r10_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 2;
++}
++uint32_t arm_r_r11_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 2;
++}
++uint32_t arm_r_r12_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 2;
++}
++uint32_t arm_r_r13_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 2;
++}
++uint32_t arm_r_r14_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 2;
++}
++uint32_t arm_r_r15_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 2;
++}
++uint32_t arm_r_r0_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r1_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r2_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r3_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r4_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r5_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r6_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r7_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r8_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r9_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r10_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r11_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r12_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r13_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r14_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r15_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 2; }
++}
++uint32_t arm_r_r0_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 3;
++}
++uint32_t arm_r_r1_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 3;
++}
++uint32_t arm_r_r2_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 3;
++}
++uint32_t arm_r_r3_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 3;
++}
++uint32_t arm_r_r4_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 3;
++}
++uint32_t arm_r_r5_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 3;
++}
++uint32_t arm_r_r6_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 3;
++}
++uint32_t arm_r_r7_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 3;
++}
++uint32_t arm_r_r8_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 3;
++}
++uint32_t arm_r_r9_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 3;
++}
++uint32_t arm_r_r10_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 3;
++}
++uint32_t arm_r_r11_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 3;
++}
++uint32_t arm_r_r12_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 3;
++}
++uint32_t arm_r_r13_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 3;
++}
++uint32_t arm_r_r14_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 3;
++}
++uint32_t arm_r_r15_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 3;
++}
++uint32_t arm_r_r0_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[1] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 3;
++}
++uint32_t arm_r_r1_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 3;
++}
++uint32_t arm_r_r2_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 3;
++}
++uint32_t arm_r_r3_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 3;
++}
++uint32_t arm_r_r4_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 3;
++}
++uint32_t arm_r_r5_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 3;
++}
++uint32_t arm_r_r6_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 3;
++}
++uint32_t arm_r_r7_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 3;
++}
++uint32_t arm_r_r8_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 3;
++}
++uint32_t arm_r_r9_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 3;
++}
++uint32_t arm_r_r10_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 3;
++}
++uint32_t arm_r_r11_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 3;
++}
++uint32_t arm_r_r12_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 3;
++}
++uint32_t arm_r_r13_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 3;
++}
++uint32_t arm_r_r14_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 3;
++}
++uint32_t arm_r_r15_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 3;
++}
++uint32_t arm_r_r0_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[1]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 3;
++}
++uint32_t arm_r_r1_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 3;
++}
++uint32_t arm_r_r2_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 3;
++}
++uint32_t arm_r_r3_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 3;
++}
++uint32_t arm_r_r4_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 3;
++}
++uint32_t arm_r_r5_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 3;
++}
++uint32_t arm_r_r6_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 3;
++}
++uint32_t arm_r_r7_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 3;
++}
++uint32_t arm_r_r8_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 3;
++}
++uint32_t arm_r_r9_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 3;
++}
++uint32_t arm_r_r10_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 3;
++}
++uint32_t arm_r_r11_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 3;
++}
++uint32_t arm_r_r12_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 3;
++}
++uint32_t arm_r_r13_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 3;
++}
++uint32_t arm_r_r14_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 3;
++}
++uint32_t arm_r_r15_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 3;
++}
++uint32_t arm_r_r0_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[1]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r1_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r2_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r3_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r4_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r5_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r6_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r7_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r8_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r9_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r10_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r11_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r12_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r13_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r14_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r15_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 3; }
++}
++uint32_t arm_r_r0_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[1]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 2;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 2;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r1_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r2_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r3_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r4_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r5_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r6_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r7_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r8_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r9_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r10_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r11_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r12_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r13_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r14_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r15_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 2; }
++}
++uint32_t arm_rs_r0_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 3;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[1] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 3;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r1_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r2_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r3_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r4_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r5_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r6_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r7_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r8_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r9_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r10_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r11_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r12_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r13_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r14_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r15_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 3; }
++}
++uint32_t arm_rs_r0_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[1]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r2.c gxemul-0.7.0/src/cpus/tmp_arm_r2.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r2.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r2.c	2022-10-18 16:37:22.087748600 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 4;
++}
++uint32_t arm_r_r1_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 4;
++}
++uint32_t arm_r_r2_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 4;
++}
++uint32_t arm_r_r3_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 4;
++}
++uint32_t arm_r_r4_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 4;
++}
++uint32_t arm_r_r5_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 4;
++}
++uint32_t arm_r_r6_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 4;
++}
++uint32_t arm_r_r7_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 4;
++}
++uint32_t arm_r_r8_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 4;
++}
++uint32_t arm_r_r9_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 4;
++}
++uint32_t arm_r_r10_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 4;
++}
++uint32_t arm_r_r11_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 4;
++}
++uint32_t arm_r_r12_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 4;
++}
++uint32_t arm_r_r13_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 4;
++}
++uint32_t arm_r_r14_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 4;
++}
++uint32_t arm_r_r15_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 4;
++}
++uint32_t arm_r_r0_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 4;
++}
++uint32_t arm_r_r1_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 4;
++}
++uint32_t arm_r_r2_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 4;
++}
++uint32_t arm_r_r3_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 4;
++}
++uint32_t arm_r_r4_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 4;
++}
++uint32_t arm_r_r5_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 4;
++}
++uint32_t arm_r_r6_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 4;
++}
++uint32_t arm_r_r7_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 4;
++}
++uint32_t arm_r_r8_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 4;
++}
++uint32_t arm_r_r9_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 4;
++}
++uint32_t arm_r_r10_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 4;
++}
++uint32_t arm_r_r11_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 4;
++}
++uint32_t arm_r_r12_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 4;
++}
++uint32_t arm_r_r13_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 4;
++}
++uint32_t arm_r_r14_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 4;
++}
++uint32_t arm_r_r15_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 4;
++}
++uint32_t arm_r_r0_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 4;
++}
++uint32_t arm_r_r1_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 4;
++}
++uint32_t arm_r_r2_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 4;
++}
++uint32_t arm_r_r3_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 4;
++}
++uint32_t arm_r_r4_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 4;
++}
++uint32_t arm_r_r5_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 4;
++}
++uint32_t arm_r_r6_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 4;
++}
++uint32_t arm_r_r7_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 4;
++}
++uint32_t arm_r_r8_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 4;
++}
++uint32_t arm_r_r9_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 4;
++}
++uint32_t arm_r_r10_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 4;
++}
++uint32_t arm_r_r11_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 4;
++}
++uint32_t arm_r_r12_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 4;
++}
++uint32_t arm_r_r13_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 4;
++}
++uint32_t arm_r_r14_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 4;
++}
++uint32_t arm_r_r15_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 4;
++}
++uint32_t arm_r_r0_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r1_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r2_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r3_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r4_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r5_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r6_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r7_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r8_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r9_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r10_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r11_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r12_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r13_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r14_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r15_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 4; }
++}
++uint32_t arm_r_r0_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 5;
++}
++uint32_t arm_r_r1_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 5;
++}
++uint32_t arm_r_r2_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 5;
++}
++uint32_t arm_r_r3_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 5;
++}
++uint32_t arm_r_r4_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 5;
++}
++uint32_t arm_r_r5_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 5;
++}
++uint32_t arm_r_r6_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 5;
++}
++uint32_t arm_r_r7_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 5;
++}
++uint32_t arm_r_r8_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 5;
++}
++uint32_t arm_r_r9_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 5;
++}
++uint32_t arm_r_r10_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 5;
++}
++uint32_t arm_r_r11_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 5;
++}
++uint32_t arm_r_r12_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 5;
++}
++uint32_t arm_r_r13_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 5;
++}
++uint32_t arm_r_r14_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 5;
++}
++uint32_t arm_r_r15_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 5;
++}
++uint32_t arm_r_r0_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[2] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 5;
++}
++uint32_t arm_r_r1_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 5;
++}
++uint32_t arm_r_r2_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 5;
++}
++uint32_t arm_r_r3_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 5;
++}
++uint32_t arm_r_r4_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 5;
++}
++uint32_t arm_r_r5_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 5;
++}
++uint32_t arm_r_r6_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 5;
++}
++uint32_t arm_r_r7_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 5;
++}
++uint32_t arm_r_r8_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 5;
++}
++uint32_t arm_r_r9_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 5;
++}
++uint32_t arm_r_r10_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 5;
++}
++uint32_t arm_r_r11_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 5;
++}
++uint32_t arm_r_r12_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 5;
++}
++uint32_t arm_r_r13_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 5;
++}
++uint32_t arm_r_r14_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 5;
++}
++uint32_t arm_r_r15_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 5;
++}
++uint32_t arm_r_r0_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[2]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 5;
++}
++uint32_t arm_r_r1_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 5;
++}
++uint32_t arm_r_r2_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 5;
++}
++uint32_t arm_r_r3_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 5;
++}
++uint32_t arm_r_r4_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 5;
++}
++uint32_t arm_r_r5_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 5;
++}
++uint32_t arm_r_r6_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 5;
++}
++uint32_t arm_r_r7_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 5;
++}
++uint32_t arm_r_r8_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 5;
++}
++uint32_t arm_r_r9_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 5;
++}
++uint32_t arm_r_r10_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 5;
++}
++uint32_t arm_r_r11_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 5;
++}
++uint32_t arm_r_r12_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 5;
++}
++uint32_t arm_r_r13_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 5;
++}
++uint32_t arm_r_r14_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 5;
++}
++uint32_t arm_r_r15_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 5;
++}
++uint32_t arm_r_r0_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[2]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r1_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r2_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r3_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r4_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r5_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r6_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r7_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r8_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r9_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r10_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r11_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r12_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r13_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r14_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r15_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 5; }
++}
++uint32_t arm_r_r0_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[2]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 4;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 4;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r1_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r2_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r3_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r4_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r5_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r6_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r7_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r8_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r9_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r10_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r11_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r12_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r13_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r14_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r15_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 4; }
++}
++uint32_t arm_rs_r0_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 5;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[2] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 5;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r1_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r2_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r3_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r4_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r5_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r6_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r7_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r8_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r9_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r10_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r11_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r12_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r13_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r14_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r15_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 5; }
++}
++uint32_t arm_rs_r0_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[2]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r3.c gxemul-0.7.0/src/cpus/tmp_arm_r3.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r3.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r3.c	2022-10-18 16:37:22.088749100 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 6;
++}
++uint32_t arm_r_r1_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 6;
++}
++uint32_t arm_r_r2_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 6;
++}
++uint32_t arm_r_r3_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 6;
++}
++uint32_t arm_r_r4_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 6;
++}
++uint32_t arm_r_r5_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 6;
++}
++uint32_t arm_r_r6_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 6;
++}
++uint32_t arm_r_r7_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 6;
++}
++uint32_t arm_r_r8_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 6;
++}
++uint32_t arm_r_r9_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 6;
++}
++uint32_t arm_r_r10_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 6;
++}
++uint32_t arm_r_r11_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 6;
++}
++uint32_t arm_r_r12_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 6;
++}
++uint32_t arm_r_r13_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 6;
++}
++uint32_t arm_r_r14_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 6;
++}
++uint32_t arm_r_r15_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 6;
++}
++uint32_t arm_r_r0_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 6;
++}
++uint32_t arm_r_r1_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 6;
++}
++uint32_t arm_r_r2_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 6;
++}
++uint32_t arm_r_r3_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 6;
++}
++uint32_t arm_r_r4_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 6;
++}
++uint32_t arm_r_r5_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 6;
++}
++uint32_t arm_r_r6_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 6;
++}
++uint32_t arm_r_r7_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 6;
++}
++uint32_t arm_r_r8_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 6;
++}
++uint32_t arm_r_r9_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 6;
++}
++uint32_t arm_r_r10_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 6;
++}
++uint32_t arm_r_r11_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 6;
++}
++uint32_t arm_r_r12_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 6;
++}
++uint32_t arm_r_r13_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 6;
++}
++uint32_t arm_r_r14_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 6;
++}
++uint32_t arm_r_r15_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 6;
++}
++uint32_t arm_r_r0_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 6;
++}
++uint32_t arm_r_r1_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 6;
++}
++uint32_t arm_r_r2_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 6;
++}
++uint32_t arm_r_r3_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 6;
++}
++uint32_t arm_r_r4_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 6;
++}
++uint32_t arm_r_r5_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 6;
++}
++uint32_t arm_r_r6_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 6;
++}
++uint32_t arm_r_r7_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 6;
++}
++uint32_t arm_r_r8_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 6;
++}
++uint32_t arm_r_r9_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 6;
++}
++uint32_t arm_r_r10_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 6;
++}
++uint32_t arm_r_r11_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 6;
++}
++uint32_t arm_r_r12_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 6;
++}
++uint32_t arm_r_r13_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 6;
++}
++uint32_t arm_r_r14_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 6;
++}
++uint32_t arm_r_r15_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 6;
++}
++uint32_t arm_r_r0_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r1_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r2_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r3_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r4_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r5_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r6_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r7_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r8_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r9_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r10_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r11_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r12_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r13_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r14_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r15_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 6; }
++}
++uint32_t arm_r_r0_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 7;
++}
++uint32_t arm_r_r1_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 7;
++}
++uint32_t arm_r_r2_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 7;
++}
++uint32_t arm_r_r3_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 7;
++}
++uint32_t arm_r_r4_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 7;
++}
++uint32_t arm_r_r5_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 7;
++}
++uint32_t arm_r_r6_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 7;
++}
++uint32_t arm_r_r7_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 7;
++}
++uint32_t arm_r_r8_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 7;
++}
++uint32_t arm_r_r9_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 7;
++}
++uint32_t arm_r_r10_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 7;
++}
++uint32_t arm_r_r11_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 7;
++}
++uint32_t arm_r_r12_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 7;
++}
++uint32_t arm_r_r13_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 7;
++}
++uint32_t arm_r_r14_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 7;
++}
++uint32_t arm_r_r15_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 7;
++}
++uint32_t arm_r_r0_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[3] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 7;
++}
++uint32_t arm_r_r1_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 7;
++}
++uint32_t arm_r_r2_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 7;
++}
++uint32_t arm_r_r3_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 7;
++}
++uint32_t arm_r_r4_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 7;
++}
++uint32_t arm_r_r5_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 7;
++}
++uint32_t arm_r_r6_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 7;
++}
++uint32_t arm_r_r7_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 7;
++}
++uint32_t arm_r_r8_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 7;
++}
++uint32_t arm_r_r9_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 7;
++}
++uint32_t arm_r_r10_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 7;
++}
++uint32_t arm_r_r11_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 7;
++}
++uint32_t arm_r_r12_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 7;
++}
++uint32_t arm_r_r13_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 7;
++}
++uint32_t arm_r_r14_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 7;
++}
++uint32_t arm_r_r15_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 7;
++}
++uint32_t arm_r_r0_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[3]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 7;
++}
++uint32_t arm_r_r1_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 7;
++}
++uint32_t arm_r_r2_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 7;
++}
++uint32_t arm_r_r3_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 7;
++}
++uint32_t arm_r_r4_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 7;
++}
++uint32_t arm_r_r5_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 7;
++}
++uint32_t arm_r_r6_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 7;
++}
++uint32_t arm_r_r7_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 7;
++}
++uint32_t arm_r_r8_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 7;
++}
++uint32_t arm_r_r9_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 7;
++}
++uint32_t arm_r_r10_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 7;
++}
++uint32_t arm_r_r11_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 7;
++}
++uint32_t arm_r_r12_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 7;
++}
++uint32_t arm_r_r13_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 7;
++}
++uint32_t arm_r_r14_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 7;
++}
++uint32_t arm_r_r15_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 7;
++}
++uint32_t arm_r_r0_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[3]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r1_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r2_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r3_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r4_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r5_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r6_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r7_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r8_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r9_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r10_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r11_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r12_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r13_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r14_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r15_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 7; }
++}
++uint32_t arm_r_r0_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[3]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 6;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 6;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r1_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r2_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r3_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r4_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r5_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r6_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r7_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r8_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r9_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r10_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r11_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r12_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r13_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r14_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r15_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 6; }
++}
++uint32_t arm_rs_r0_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 7;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[3] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 7;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r1_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r2_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r3_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r4_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r5_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r6_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r7_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r8_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r9_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r10_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r11_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r12_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r13_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r14_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r15_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 7; }
++}
++uint32_t arm_rs_r0_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[3]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r4.c gxemul-0.7.0/src/cpus/tmp_arm_r4.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r4.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r4.c	2022-10-18 16:37:22.088749100 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 8;
++}
++uint32_t arm_r_r1_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 8;
++}
++uint32_t arm_r_r2_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 8;
++}
++uint32_t arm_r_r3_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 8;
++}
++uint32_t arm_r_r4_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 8;
++}
++uint32_t arm_r_r5_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 8;
++}
++uint32_t arm_r_r6_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 8;
++}
++uint32_t arm_r_r7_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 8;
++}
++uint32_t arm_r_r8_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 8;
++}
++uint32_t arm_r_r9_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 8;
++}
++uint32_t arm_r_r10_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 8;
++}
++uint32_t arm_r_r11_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 8;
++}
++uint32_t arm_r_r12_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 8;
++}
++uint32_t arm_r_r13_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 8;
++}
++uint32_t arm_r_r14_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 8;
++}
++uint32_t arm_r_r15_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 8;
++}
++uint32_t arm_r_r0_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 8;
++}
++uint32_t arm_r_r1_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 8;
++}
++uint32_t arm_r_r2_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 8;
++}
++uint32_t arm_r_r3_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 8;
++}
++uint32_t arm_r_r4_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 8;
++}
++uint32_t arm_r_r5_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 8;
++}
++uint32_t arm_r_r6_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 8;
++}
++uint32_t arm_r_r7_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 8;
++}
++uint32_t arm_r_r8_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 8;
++}
++uint32_t arm_r_r9_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 8;
++}
++uint32_t arm_r_r10_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 8;
++}
++uint32_t arm_r_r11_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 8;
++}
++uint32_t arm_r_r12_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 8;
++}
++uint32_t arm_r_r13_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 8;
++}
++uint32_t arm_r_r14_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 8;
++}
++uint32_t arm_r_r15_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 8;
++}
++uint32_t arm_r_r0_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 8;
++}
++uint32_t arm_r_r1_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 8;
++}
++uint32_t arm_r_r2_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 8;
++}
++uint32_t arm_r_r3_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 8;
++}
++uint32_t arm_r_r4_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 8;
++}
++uint32_t arm_r_r5_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 8;
++}
++uint32_t arm_r_r6_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 8;
++}
++uint32_t arm_r_r7_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 8;
++}
++uint32_t arm_r_r8_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 8;
++}
++uint32_t arm_r_r9_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 8;
++}
++uint32_t arm_r_r10_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 8;
++}
++uint32_t arm_r_r11_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 8;
++}
++uint32_t arm_r_r12_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 8;
++}
++uint32_t arm_r_r13_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 8;
++}
++uint32_t arm_r_r14_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 8;
++}
++uint32_t arm_r_r15_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 8;
++}
++uint32_t arm_r_r0_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r1_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r2_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r3_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r4_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r5_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r6_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r7_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r8_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r9_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r10_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r11_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r12_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r13_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r14_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r15_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 8; }
++}
++uint32_t arm_r_r0_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 9;
++}
++uint32_t arm_r_r1_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 9;
++}
++uint32_t arm_r_r2_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 9;
++}
++uint32_t arm_r_r3_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 9;
++}
++uint32_t arm_r_r4_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 9;
++}
++uint32_t arm_r_r5_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 9;
++}
++uint32_t arm_r_r6_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 9;
++}
++uint32_t arm_r_r7_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 9;
++}
++uint32_t arm_r_r8_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 9;
++}
++uint32_t arm_r_r9_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 9;
++}
++uint32_t arm_r_r10_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 9;
++}
++uint32_t arm_r_r11_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 9;
++}
++uint32_t arm_r_r12_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 9;
++}
++uint32_t arm_r_r13_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 9;
++}
++uint32_t arm_r_r14_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 9;
++}
++uint32_t arm_r_r15_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 9;
++}
++uint32_t arm_r_r0_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[4] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 9;
++}
++uint32_t arm_r_r1_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 9;
++}
++uint32_t arm_r_r2_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 9;
++}
++uint32_t arm_r_r3_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 9;
++}
++uint32_t arm_r_r4_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 9;
++}
++uint32_t arm_r_r5_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 9;
++}
++uint32_t arm_r_r6_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 9;
++}
++uint32_t arm_r_r7_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 9;
++}
++uint32_t arm_r_r8_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 9;
++}
++uint32_t arm_r_r9_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 9;
++}
++uint32_t arm_r_r10_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 9;
++}
++uint32_t arm_r_r11_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 9;
++}
++uint32_t arm_r_r12_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 9;
++}
++uint32_t arm_r_r13_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 9;
++}
++uint32_t arm_r_r14_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 9;
++}
++uint32_t arm_r_r15_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 9;
++}
++uint32_t arm_r_r0_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[4]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 9;
++}
++uint32_t arm_r_r1_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 9;
++}
++uint32_t arm_r_r2_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 9;
++}
++uint32_t arm_r_r3_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 9;
++}
++uint32_t arm_r_r4_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 9;
++}
++uint32_t arm_r_r5_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 9;
++}
++uint32_t arm_r_r6_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 9;
++}
++uint32_t arm_r_r7_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 9;
++}
++uint32_t arm_r_r8_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 9;
++}
++uint32_t arm_r_r9_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 9;
++}
++uint32_t arm_r_r10_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 9;
++}
++uint32_t arm_r_r11_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 9;
++}
++uint32_t arm_r_r12_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 9;
++}
++uint32_t arm_r_r13_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 9;
++}
++uint32_t arm_r_r14_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 9;
++}
++uint32_t arm_r_r15_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 9;
++}
++uint32_t arm_r_r0_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[4]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r1_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r2_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r3_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r4_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r5_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r6_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r7_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r8_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r9_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r10_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r11_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r12_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r13_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r14_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r15_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 9; }
++}
++uint32_t arm_r_r0_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[4]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 8;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 8;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r1_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r2_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r3_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r4_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r5_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r6_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r7_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r8_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r9_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r10_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r11_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r12_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r13_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r14_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r15_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 8; }
++}
++uint32_t arm_rs_r0_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 9;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[4] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 9;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r1_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r2_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r3_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r4_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r5_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r6_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r7_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r8_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r9_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r10_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r11_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r12_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r13_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r14_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r15_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 9; }
++}
++uint32_t arm_rs_r0_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[4]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r5.c gxemul-0.7.0/src/cpus/tmp_arm_r5.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r5.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r5.c	2022-10-18 16:37:22.089750000 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 10;
++}
++uint32_t arm_r_r1_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 10;
++}
++uint32_t arm_r_r2_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 10;
++}
++uint32_t arm_r_r3_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 10;
++}
++uint32_t arm_r_r4_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 10;
++}
++uint32_t arm_r_r5_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 10;
++}
++uint32_t arm_r_r6_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 10;
++}
++uint32_t arm_r_r7_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 10;
++}
++uint32_t arm_r_r8_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 10;
++}
++uint32_t arm_r_r9_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 10;
++}
++uint32_t arm_r_r10_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 10;
++}
++uint32_t arm_r_r11_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 10;
++}
++uint32_t arm_r_r12_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 10;
++}
++uint32_t arm_r_r13_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 10;
++}
++uint32_t arm_r_r14_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 10;
++}
++uint32_t arm_r_r15_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 10;
++}
++uint32_t arm_r_r0_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 10;
++}
++uint32_t arm_r_r1_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 10;
++}
++uint32_t arm_r_r2_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 10;
++}
++uint32_t arm_r_r3_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 10;
++}
++uint32_t arm_r_r4_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 10;
++}
++uint32_t arm_r_r5_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 10;
++}
++uint32_t arm_r_r6_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 10;
++}
++uint32_t arm_r_r7_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 10;
++}
++uint32_t arm_r_r8_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 10;
++}
++uint32_t arm_r_r9_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 10;
++}
++uint32_t arm_r_r10_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 10;
++}
++uint32_t arm_r_r11_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 10;
++}
++uint32_t arm_r_r12_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 10;
++}
++uint32_t arm_r_r13_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 10;
++}
++uint32_t arm_r_r14_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 10;
++}
++uint32_t arm_r_r15_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 10;
++}
++uint32_t arm_r_r0_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 10;
++}
++uint32_t arm_r_r1_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 10;
++}
++uint32_t arm_r_r2_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 10;
++}
++uint32_t arm_r_r3_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 10;
++}
++uint32_t arm_r_r4_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 10;
++}
++uint32_t arm_r_r5_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 10;
++}
++uint32_t arm_r_r6_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 10;
++}
++uint32_t arm_r_r7_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 10;
++}
++uint32_t arm_r_r8_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 10;
++}
++uint32_t arm_r_r9_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 10;
++}
++uint32_t arm_r_r10_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 10;
++}
++uint32_t arm_r_r11_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 10;
++}
++uint32_t arm_r_r12_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 10;
++}
++uint32_t arm_r_r13_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 10;
++}
++uint32_t arm_r_r14_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 10;
++}
++uint32_t arm_r_r15_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 10;
++}
++uint32_t arm_r_r0_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r1_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r2_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r3_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r4_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r5_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r6_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r7_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r8_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r9_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r10_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r11_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r12_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r13_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r14_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r15_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 10; }
++}
++uint32_t arm_r_r0_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 11;
++}
++uint32_t arm_r_r1_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 11;
++}
++uint32_t arm_r_r2_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 11;
++}
++uint32_t arm_r_r3_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 11;
++}
++uint32_t arm_r_r4_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 11;
++}
++uint32_t arm_r_r5_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 11;
++}
++uint32_t arm_r_r6_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 11;
++}
++uint32_t arm_r_r7_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 11;
++}
++uint32_t arm_r_r8_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 11;
++}
++uint32_t arm_r_r9_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 11;
++}
++uint32_t arm_r_r10_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 11;
++}
++uint32_t arm_r_r11_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 11;
++}
++uint32_t arm_r_r12_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 11;
++}
++uint32_t arm_r_r13_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 11;
++}
++uint32_t arm_r_r14_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 11;
++}
++uint32_t arm_r_r15_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 11;
++}
++uint32_t arm_r_r0_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[5] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 11;
++}
++uint32_t arm_r_r1_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 11;
++}
++uint32_t arm_r_r2_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 11;
++}
++uint32_t arm_r_r3_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 11;
++}
++uint32_t arm_r_r4_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 11;
++}
++uint32_t arm_r_r5_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 11;
++}
++uint32_t arm_r_r6_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 11;
++}
++uint32_t arm_r_r7_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 11;
++}
++uint32_t arm_r_r8_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 11;
++}
++uint32_t arm_r_r9_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 11;
++}
++uint32_t arm_r_r10_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 11;
++}
++uint32_t arm_r_r11_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 11;
++}
++uint32_t arm_r_r12_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 11;
++}
++uint32_t arm_r_r13_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 11;
++}
++uint32_t arm_r_r14_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 11;
++}
++uint32_t arm_r_r15_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 11;
++}
++uint32_t arm_r_r0_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[5]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 11;
++}
++uint32_t arm_r_r1_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 11;
++}
++uint32_t arm_r_r2_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 11;
++}
++uint32_t arm_r_r3_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 11;
++}
++uint32_t arm_r_r4_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 11;
++}
++uint32_t arm_r_r5_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 11;
++}
++uint32_t arm_r_r6_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 11;
++}
++uint32_t arm_r_r7_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 11;
++}
++uint32_t arm_r_r8_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 11;
++}
++uint32_t arm_r_r9_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 11;
++}
++uint32_t arm_r_r10_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 11;
++}
++uint32_t arm_r_r11_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 11;
++}
++uint32_t arm_r_r12_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 11;
++}
++uint32_t arm_r_r13_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 11;
++}
++uint32_t arm_r_r14_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 11;
++}
++uint32_t arm_r_r15_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 11;
++}
++uint32_t arm_r_r0_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[5]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r1_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r2_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r3_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r4_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r5_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r6_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r7_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r8_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r9_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r10_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r11_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r12_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r13_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r14_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r15_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 11; }
++}
++uint32_t arm_r_r0_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[5]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 10;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 10;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r1_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r2_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r3_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r4_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r5_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r6_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r7_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r8_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r9_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r10_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r11_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r12_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r13_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r14_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r15_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 10; }
++}
++uint32_t arm_rs_r0_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 11;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[5] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 11;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r1_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r2_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r3_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r4_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r5_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r6_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r7_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r8_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r9_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r10_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r11_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r12_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r13_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r14_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r15_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 11; }
++}
++uint32_t arm_rs_r0_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[5]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r6.c gxemul-0.7.0/src/cpus/tmp_arm_r6.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r6.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r6.c	2022-10-18 16:37:22.090751100 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 12;
++}
++uint32_t arm_r_r1_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 12;
++}
++uint32_t arm_r_r2_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 12;
++}
++uint32_t arm_r_r3_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 12;
++}
++uint32_t arm_r_r4_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 12;
++}
++uint32_t arm_r_r5_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 12;
++}
++uint32_t arm_r_r6_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 12;
++}
++uint32_t arm_r_r7_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 12;
++}
++uint32_t arm_r_r8_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 12;
++}
++uint32_t arm_r_r9_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 12;
++}
++uint32_t arm_r_r10_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 12;
++}
++uint32_t arm_r_r11_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 12;
++}
++uint32_t arm_r_r12_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 12;
++}
++uint32_t arm_r_r13_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 12;
++}
++uint32_t arm_r_r14_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 12;
++}
++uint32_t arm_r_r15_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 12;
++}
++uint32_t arm_r_r0_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 12;
++}
++uint32_t arm_r_r1_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 12;
++}
++uint32_t arm_r_r2_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 12;
++}
++uint32_t arm_r_r3_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 12;
++}
++uint32_t arm_r_r4_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 12;
++}
++uint32_t arm_r_r5_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 12;
++}
++uint32_t arm_r_r6_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 12;
++}
++uint32_t arm_r_r7_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 12;
++}
++uint32_t arm_r_r8_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 12;
++}
++uint32_t arm_r_r9_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 12;
++}
++uint32_t arm_r_r10_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 12;
++}
++uint32_t arm_r_r11_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 12;
++}
++uint32_t arm_r_r12_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 12;
++}
++uint32_t arm_r_r13_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 12;
++}
++uint32_t arm_r_r14_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 12;
++}
++uint32_t arm_r_r15_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 12;
++}
++uint32_t arm_r_r0_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 12;
++}
++uint32_t arm_r_r1_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 12;
++}
++uint32_t arm_r_r2_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 12;
++}
++uint32_t arm_r_r3_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 12;
++}
++uint32_t arm_r_r4_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 12;
++}
++uint32_t arm_r_r5_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 12;
++}
++uint32_t arm_r_r6_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 12;
++}
++uint32_t arm_r_r7_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 12;
++}
++uint32_t arm_r_r8_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 12;
++}
++uint32_t arm_r_r9_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 12;
++}
++uint32_t arm_r_r10_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 12;
++}
++uint32_t arm_r_r11_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 12;
++}
++uint32_t arm_r_r12_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 12;
++}
++uint32_t arm_r_r13_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 12;
++}
++uint32_t arm_r_r14_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 12;
++}
++uint32_t arm_r_r15_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 12;
++}
++uint32_t arm_r_r0_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r1_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r2_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r3_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r4_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r5_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r6_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r7_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r8_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r9_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r10_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r11_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r12_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r13_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r14_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r15_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 12; }
++}
++uint32_t arm_r_r0_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 13;
++}
++uint32_t arm_r_r1_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 13;
++}
++uint32_t arm_r_r2_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 13;
++}
++uint32_t arm_r_r3_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 13;
++}
++uint32_t arm_r_r4_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 13;
++}
++uint32_t arm_r_r5_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 13;
++}
++uint32_t arm_r_r6_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 13;
++}
++uint32_t arm_r_r7_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 13;
++}
++uint32_t arm_r_r8_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 13;
++}
++uint32_t arm_r_r9_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 13;
++}
++uint32_t arm_r_r10_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 13;
++}
++uint32_t arm_r_r11_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 13;
++}
++uint32_t arm_r_r12_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 13;
++}
++uint32_t arm_r_r13_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 13;
++}
++uint32_t arm_r_r14_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 13;
++}
++uint32_t arm_r_r15_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 13;
++}
++uint32_t arm_r_r0_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[6] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 13;
++}
++uint32_t arm_r_r1_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 13;
++}
++uint32_t arm_r_r2_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 13;
++}
++uint32_t arm_r_r3_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 13;
++}
++uint32_t arm_r_r4_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 13;
++}
++uint32_t arm_r_r5_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 13;
++}
++uint32_t arm_r_r6_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 13;
++}
++uint32_t arm_r_r7_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 13;
++}
++uint32_t arm_r_r8_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 13;
++}
++uint32_t arm_r_r9_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 13;
++}
++uint32_t arm_r_r10_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 13;
++}
++uint32_t arm_r_r11_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 13;
++}
++uint32_t arm_r_r12_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 13;
++}
++uint32_t arm_r_r13_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 13;
++}
++uint32_t arm_r_r14_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 13;
++}
++uint32_t arm_r_r15_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 13;
++}
++uint32_t arm_r_r0_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[6]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 13;
++}
++uint32_t arm_r_r1_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 13;
++}
++uint32_t arm_r_r2_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 13;
++}
++uint32_t arm_r_r3_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 13;
++}
++uint32_t arm_r_r4_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 13;
++}
++uint32_t arm_r_r5_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 13;
++}
++uint32_t arm_r_r6_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 13;
++}
++uint32_t arm_r_r7_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 13;
++}
++uint32_t arm_r_r8_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 13;
++}
++uint32_t arm_r_r9_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 13;
++}
++uint32_t arm_r_r10_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 13;
++}
++uint32_t arm_r_r11_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 13;
++}
++uint32_t arm_r_r12_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 13;
++}
++uint32_t arm_r_r13_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 13;
++}
++uint32_t arm_r_r14_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 13;
++}
++uint32_t arm_r_r15_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 13;
++}
++uint32_t arm_r_r0_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[6]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r1_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r2_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r3_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r4_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r5_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r6_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r7_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r8_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r9_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r10_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r11_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r12_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r13_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r14_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r15_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 13; }
++}
++uint32_t arm_r_r0_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[6]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 12;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 12;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r1_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r2_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r3_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r4_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r5_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r6_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r7_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r8_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r9_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r10_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r11_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r12_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r13_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r14_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r15_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 12; }
++}
++uint32_t arm_rs_r0_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 13;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[6] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 13;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r1_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r2_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r3_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r4_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r5_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r6_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r7_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r8_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r9_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r10_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r11_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r12_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r13_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r14_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r15_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 13; }
++}
++uint32_t arm_rs_r0_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[6]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r7.c gxemul-0.7.0/src/cpus/tmp_arm_r7.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r7.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r7.c	2022-10-18 16:37:22.091752400 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 14;
++}
++uint32_t arm_r_r1_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 14;
++}
++uint32_t arm_r_r2_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 14;
++}
++uint32_t arm_r_r3_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 14;
++}
++uint32_t arm_r_r4_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 14;
++}
++uint32_t arm_r_r5_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 14;
++}
++uint32_t arm_r_r6_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 14;
++}
++uint32_t arm_r_r7_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 14;
++}
++uint32_t arm_r_r8_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 14;
++}
++uint32_t arm_r_r9_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 14;
++}
++uint32_t arm_r_r10_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 14;
++}
++uint32_t arm_r_r11_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 14;
++}
++uint32_t arm_r_r12_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 14;
++}
++uint32_t arm_r_r13_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 14;
++}
++uint32_t arm_r_r14_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 14;
++}
++uint32_t arm_r_r15_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 14;
++}
++uint32_t arm_r_r0_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 14;
++}
++uint32_t arm_r_r1_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 14;
++}
++uint32_t arm_r_r2_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 14;
++}
++uint32_t arm_r_r3_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 14;
++}
++uint32_t arm_r_r4_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 14;
++}
++uint32_t arm_r_r5_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 14;
++}
++uint32_t arm_r_r6_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 14;
++}
++uint32_t arm_r_r7_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 14;
++}
++uint32_t arm_r_r8_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 14;
++}
++uint32_t arm_r_r9_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 14;
++}
++uint32_t arm_r_r10_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 14;
++}
++uint32_t arm_r_r11_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 14;
++}
++uint32_t arm_r_r12_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 14;
++}
++uint32_t arm_r_r13_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 14;
++}
++uint32_t arm_r_r14_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 14;
++}
++uint32_t arm_r_r15_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 14;
++}
++uint32_t arm_r_r0_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 14;
++}
++uint32_t arm_r_r1_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 14;
++}
++uint32_t arm_r_r2_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 14;
++}
++uint32_t arm_r_r3_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 14;
++}
++uint32_t arm_r_r4_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 14;
++}
++uint32_t arm_r_r5_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 14;
++}
++uint32_t arm_r_r6_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 14;
++}
++uint32_t arm_r_r7_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 14;
++}
++uint32_t arm_r_r8_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 14;
++}
++uint32_t arm_r_r9_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 14;
++}
++uint32_t arm_r_r10_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 14;
++}
++uint32_t arm_r_r11_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 14;
++}
++uint32_t arm_r_r12_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 14;
++}
++uint32_t arm_r_r13_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 14;
++}
++uint32_t arm_r_r14_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 14;
++}
++uint32_t arm_r_r15_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 14;
++}
++uint32_t arm_r_r0_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r1_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r2_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r3_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r4_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r5_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r6_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r7_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r8_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r9_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r10_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r11_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r12_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r13_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r14_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r15_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 14; }
++}
++uint32_t arm_r_r0_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 15;
++}
++uint32_t arm_r_r1_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 15;
++}
++uint32_t arm_r_r2_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 15;
++}
++uint32_t arm_r_r3_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 15;
++}
++uint32_t arm_r_r4_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 15;
++}
++uint32_t arm_r_r5_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 15;
++}
++uint32_t arm_r_r6_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 15;
++}
++uint32_t arm_r_r7_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 15;
++}
++uint32_t arm_r_r8_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 15;
++}
++uint32_t arm_r_r9_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 15;
++}
++uint32_t arm_r_r10_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 15;
++}
++uint32_t arm_r_r11_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 15;
++}
++uint32_t arm_r_r12_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 15;
++}
++uint32_t arm_r_r13_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 15;
++}
++uint32_t arm_r_r14_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 15;
++}
++uint32_t arm_r_r15_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 15;
++}
++uint32_t arm_r_r0_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[7] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 15;
++}
++uint32_t arm_r_r1_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 15;
++}
++uint32_t arm_r_r2_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 15;
++}
++uint32_t arm_r_r3_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 15;
++}
++uint32_t arm_r_r4_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 15;
++}
++uint32_t arm_r_r5_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 15;
++}
++uint32_t arm_r_r6_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 15;
++}
++uint32_t arm_r_r7_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 15;
++}
++uint32_t arm_r_r8_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 15;
++}
++uint32_t arm_r_r9_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 15;
++}
++uint32_t arm_r_r10_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 15;
++}
++uint32_t arm_r_r11_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 15;
++}
++uint32_t arm_r_r12_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 15;
++}
++uint32_t arm_r_r13_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 15;
++}
++uint32_t arm_r_r14_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 15;
++}
++uint32_t arm_r_r15_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 15;
++}
++uint32_t arm_r_r0_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[7]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 15;
++}
++uint32_t arm_r_r1_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 15;
++}
++uint32_t arm_r_r2_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 15;
++}
++uint32_t arm_r_r3_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 15;
++}
++uint32_t arm_r_r4_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 15;
++}
++uint32_t arm_r_r5_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 15;
++}
++uint32_t arm_r_r6_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 15;
++}
++uint32_t arm_r_r7_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 15;
++}
++uint32_t arm_r_r8_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 15;
++}
++uint32_t arm_r_r9_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 15;
++}
++uint32_t arm_r_r10_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 15;
++}
++uint32_t arm_r_r11_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 15;
++}
++uint32_t arm_r_r12_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 15;
++}
++uint32_t arm_r_r13_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 15;
++}
++uint32_t arm_r_r14_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 15;
++}
++uint32_t arm_r_r15_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 15;
++}
++uint32_t arm_r_r0_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[7]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r1_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r2_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r3_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r4_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r5_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r6_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r7_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r8_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r9_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r10_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r11_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r12_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r13_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r14_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r15_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 15; }
++}
++uint32_t arm_r_r0_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[7]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 14;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 14;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r1_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r2_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r3_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r4_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r5_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r6_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r7_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r8_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r9_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r10_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r11_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r12_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r13_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r14_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r15_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 14; }
++}
++uint32_t arm_rs_r0_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 15;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[7] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 15;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r1_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r2_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r3_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r4_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r5_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r6_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r7_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r8_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r9_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r10_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r11_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r12_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r13_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r14_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r15_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 15; }
++}
++uint32_t arm_rs_r0_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[7]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r8.c gxemul-0.7.0/src/cpus/tmp_arm_r8.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r8.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r8.c	2022-10-18 16:37:22.091752400 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 16;
++}
++uint32_t arm_r_r1_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 16;
++}
++uint32_t arm_r_r2_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 16;
++}
++uint32_t arm_r_r3_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 16;
++}
++uint32_t arm_r_r4_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 16;
++}
++uint32_t arm_r_r5_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 16;
++}
++uint32_t arm_r_r6_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 16;
++}
++uint32_t arm_r_r7_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 16;
++}
++uint32_t arm_r_r8_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 16;
++}
++uint32_t arm_r_r9_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 16;
++}
++uint32_t arm_r_r10_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 16;
++}
++uint32_t arm_r_r11_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 16;
++}
++uint32_t arm_r_r12_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 16;
++}
++uint32_t arm_r_r13_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 16;
++}
++uint32_t arm_r_r14_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 16;
++}
++uint32_t arm_r_r15_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 16;
++}
++uint32_t arm_r_r0_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 16;
++}
++uint32_t arm_r_r1_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 16;
++}
++uint32_t arm_r_r2_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 16;
++}
++uint32_t arm_r_r3_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 16;
++}
++uint32_t arm_r_r4_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 16;
++}
++uint32_t arm_r_r5_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 16;
++}
++uint32_t arm_r_r6_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 16;
++}
++uint32_t arm_r_r7_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 16;
++}
++uint32_t arm_r_r8_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 16;
++}
++uint32_t arm_r_r9_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 16;
++}
++uint32_t arm_r_r10_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 16;
++}
++uint32_t arm_r_r11_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 16;
++}
++uint32_t arm_r_r12_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 16;
++}
++uint32_t arm_r_r13_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 16;
++}
++uint32_t arm_r_r14_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 16;
++}
++uint32_t arm_r_r15_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 16;
++}
++uint32_t arm_r_r0_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 16;
++}
++uint32_t arm_r_r1_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 16;
++}
++uint32_t arm_r_r2_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 16;
++}
++uint32_t arm_r_r3_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 16;
++}
++uint32_t arm_r_r4_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 16;
++}
++uint32_t arm_r_r5_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 16;
++}
++uint32_t arm_r_r6_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 16;
++}
++uint32_t arm_r_r7_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 16;
++}
++uint32_t arm_r_r8_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 16;
++}
++uint32_t arm_r_r9_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 16;
++}
++uint32_t arm_r_r10_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 16;
++}
++uint32_t arm_r_r11_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 16;
++}
++uint32_t arm_r_r12_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 16;
++}
++uint32_t arm_r_r13_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 16;
++}
++uint32_t arm_r_r14_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 16;
++}
++uint32_t arm_r_r15_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 16;
++}
++uint32_t arm_r_r0_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r1_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r2_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r3_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r4_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r5_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r6_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r7_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r8_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r9_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r10_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r11_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r12_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r13_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r14_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r15_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 16; }
++}
++uint32_t arm_r_r0_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 17;
++}
++uint32_t arm_r_r1_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 17;
++}
++uint32_t arm_r_r2_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 17;
++}
++uint32_t arm_r_r3_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 17;
++}
++uint32_t arm_r_r4_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 17;
++}
++uint32_t arm_r_r5_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 17;
++}
++uint32_t arm_r_r6_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 17;
++}
++uint32_t arm_r_r7_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 17;
++}
++uint32_t arm_r_r8_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 17;
++}
++uint32_t arm_r_r9_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 17;
++}
++uint32_t arm_r_r10_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 17;
++}
++uint32_t arm_r_r11_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 17;
++}
++uint32_t arm_r_r12_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 17;
++}
++uint32_t arm_r_r13_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 17;
++}
++uint32_t arm_r_r14_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 17;
++}
++uint32_t arm_r_r15_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 17;
++}
++uint32_t arm_r_r0_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[8] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 17;
++}
++uint32_t arm_r_r1_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 17;
++}
++uint32_t arm_r_r2_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 17;
++}
++uint32_t arm_r_r3_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 17;
++}
++uint32_t arm_r_r4_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 17;
++}
++uint32_t arm_r_r5_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 17;
++}
++uint32_t arm_r_r6_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 17;
++}
++uint32_t arm_r_r7_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 17;
++}
++uint32_t arm_r_r8_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 17;
++}
++uint32_t arm_r_r9_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 17;
++}
++uint32_t arm_r_r10_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 17;
++}
++uint32_t arm_r_r11_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 17;
++}
++uint32_t arm_r_r12_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 17;
++}
++uint32_t arm_r_r13_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 17;
++}
++uint32_t arm_r_r14_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 17;
++}
++uint32_t arm_r_r15_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 17;
++}
++uint32_t arm_r_r0_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[8]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 17;
++}
++uint32_t arm_r_r1_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 17;
++}
++uint32_t arm_r_r2_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 17;
++}
++uint32_t arm_r_r3_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 17;
++}
++uint32_t arm_r_r4_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 17;
++}
++uint32_t arm_r_r5_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 17;
++}
++uint32_t arm_r_r6_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 17;
++}
++uint32_t arm_r_r7_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 17;
++}
++uint32_t arm_r_r8_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 17;
++}
++uint32_t arm_r_r9_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 17;
++}
++uint32_t arm_r_r10_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 17;
++}
++uint32_t arm_r_r11_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 17;
++}
++uint32_t arm_r_r12_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 17;
++}
++uint32_t arm_r_r13_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 17;
++}
++uint32_t arm_r_r14_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 17;
++}
++uint32_t arm_r_r15_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 17;
++}
++uint32_t arm_r_r0_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[8]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r1_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r2_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r3_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r4_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r5_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r6_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r7_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r8_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r9_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r10_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r11_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r12_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r13_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r14_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r15_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 17; }
++}
++uint32_t arm_r_r0_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[8]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 16;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 16;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r1_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r2_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r3_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r4_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r5_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r6_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r7_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r8_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r9_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r10_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r11_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r12_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r13_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r14_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r15_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 16; }
++}
++uint32_t arm_rs_r0_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 17;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[8] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 17;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r1_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r2_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r3_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r4_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r5_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r6_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r7_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r8_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r9_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r10_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r11_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r12_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r13_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r14_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r15_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 17; }
++}
++uint32_t arm_rs_r0_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[8]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r9.c gxemul-0.7.0/src/cpus/tmp_arm_r9.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r9.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_r9.c	2022-10-18 16:37:22.092752900 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 18;
++}
++uint32_t arm_r_r1_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 18;
++}
++uint32_t arm_r_r2_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 18;
++}
++uint32_t arm_r_r3_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 18;
++}
++uint32_t arm_r_r4_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 18;
++}
++uint32_t arm_r_r5_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 18;
++}
++uint32_t arm_r_r6_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 18;
++}
++uint32_t arm_r_r7_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 18;
++}
++uint32_t arm_r_r8_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 18;
++}
++uint32_t arm_r_r9_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 18;
++}
++uint32_t arm_r_r10_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 18;
++}
++uint32_t arm_r_r11_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 18;
++}
++uint32_t arm_r_r12_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 18;
++}
++uint32_t arm_r_r13_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 18;
++}
++uint32_t arm_r_r14_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 18;
++}
++uint32_t arm_r_r15_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 18;
++}
++uint32_t arm_r_r0_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 18;
++}
++uint32_t arm_r_r1_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 18;
++}
++uint32_t arm_r_r2_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 18;
++}
++uint32_t arm_r_r3_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 18;
++}
++uint32_t arm_r_r4_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 18;
++}
++uint32_t arm_r_r5_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 18;
++}
++uint32_t arm_r_r6_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 18;
++}
++uint32_t arm_r_r7_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 18;
++}
++uint32_t arm_r_r8_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 18;
++}
++uint32_t arm_r_r9_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 18;
++}
++uint32_t arm_r_r10_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 18;
++}
++uint32_t arm_r_r11_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 18;
++}
++uint32_t arm_r_r12_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 18;
++}
++uint32_t arm_r_r13_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 18;
++}
++uint32_t arm_r_r14_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 18;
++}
++uint32_t arm_r_r15_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 18;
++}
++uint32_t arm_r_r0_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 18;
++}
++uint32_t arm_r_r1_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 18;
++}
++uint32_t arm_r_r2_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 18;
++}
++uint32_t arm_r_r3_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 18;
++}
++uint32_t arm_r_r4_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 18;
++}
++uint32_t arm_r_r5_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 18;
++}
++uint32_t arm_r_r6_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 18;
++}
++uint32_t arm_r_r7_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 18;
++}
++uint32_t arm_r_r8_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 18;
++}
++uint32_t arm_r_r9_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 18;
++}
++uint32_t arm_r_r10_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 18;
++}
++uint32_t arm_r_r11_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 18;
++}
++uint32_t arm_r_r12_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 18;
++}
++uint32_t arm_r_r13_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 18;
++}
++uint32_t arm_r_r14_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 18;
++}
++uint32_t arm_r_r15_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 18;
++}
++uint32_t arm_r_r0_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r1_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r2_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r3_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r4_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r5_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r6_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r7_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r8_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r9_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r10_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r11_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r12_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r13_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r14_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r15_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 18; }
++}
++uint32_t arm_r_r0_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 19;
++}
++uint32_t arm_r_r1_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 19;
++}
++uint32_t arm_r_r2_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 19;
++}
++uint32_t arm_r_r3_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 19;
++}
++uint32_t arm_r_r4_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 19;
++}
++uint32_t arm_r_r5_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 19;
++}
++uint32_t arm_r_r6_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 19;
++}
++uint32_t arm_r_r7_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 19;
++}
++uint32_t arm_r_r8_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 19;
++}
++uint32_t arm_r_r9_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 19;
++}
++uint32_t arm_r_r10_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 19;
++}
++uint32_t arm_r_r11_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 19;
++}
++uint32_t arm_r_r12_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 19;
++}
++uint32_t arm_r_r13_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 19;
++}
++uint32_t arm_r_r14_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 19;
++}
++uint32_t arm_r_r15_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 19;
++}
++uint32_t arm_r_r0_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[9] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 19;
++}
++uint32_t arm_r_r1_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 19;
++}
++uint32_t arm_r_r2_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 19;
++}
++uint32_t arm_r_r3_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 19;
++}
++uint32_t arm_r_r4_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 19;
++}
++uint32_t arm_r_r5_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 19;
++}
++uint32_t arm_r_r6_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 19;
++}
++uint32_t arm_r_r7_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 19;
++}
++uint32_t arm_r_r8_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 19;
++}
++uint32_t arm_r_r9_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 19;
++}
++uint32_t arm_r_r10_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 19;
++}
++uint32_t arm_r_r11_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 19;
++}
++uint32_t arm_r_r12_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 19;
++}
++uint32_t arm_r_r13_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 19;
++}
++uint32_t arm_r_r14_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 19;
++}
++uint32_t arm_r_r15_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 19;
++}
++uint32_t arm_r_r0_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[9]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 19;
++}
++uint32_t arm_r_r1_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 19;
++}
++uint32_t arm_r_r2_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 19;
++}
++uint32_t arm_r_r3_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 19;
++}
++uint32_t arm_r_r4_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 19;
++}
++uint32_t arm_r_r5_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 19;
++}
++uint32_t arm_r_r6_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 19;
++}
++uint32_t arm_r_r7_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 19;
++}
++uint32_t arm_r_r8_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 19;
++}
++uint32_t arm_r_r9_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 19;
++}
++uint32_t arm_r_r10_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 19;
++}
++uint32_t arm_r_r11_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 19;
++}
++uint32_t arm_r_r12_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 19;
++}
++uint32_t arm_r_r13_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 19;
++}
++uint32_t arm_r_r14_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 19;
++}
++uint32_t arm_r_r15_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 19;
++}
++uint32_t arm_r_r0_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[9]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r1_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r2_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r3_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r4_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r5_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r6_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r7_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r8_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r9_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r10_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r11_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r12_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r13_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r14_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r15_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 19; }
++}
++uint32_t arm_r_r0_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[9]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 18;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 18;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r1_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r2_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r3_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r4_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r5_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r6_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r7_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r8_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r9_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r10_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r11_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r12_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r13_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r14_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r15_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 18; }
++}
++uint32_t arm_rs_r0_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 19;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[9] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 19;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r1_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r2_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r3_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r4_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r5_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r6_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r7_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r8_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r9_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r10_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r11_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r12_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r13_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r14_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r15_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 19; }
++}
++uint32_t arm_rs_r0_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[9]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_ra.c gxemul-0.7.0/src/cpus/tmp_arm_ra.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_ra.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_ra.c	2022-10-18 16:37:22.093753900 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 20;
++}
++uint32_t arm_r_r1_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 20;
++}
++uint32_t arm_r_r2_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 20;
++}
++uint32_t arm_r_r3_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 20;
++}
++uint32_t arm_r_r4_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 20;
++}
++uint32_t arm_r_r5_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 20;
++}
++uint32_t arm_r_r6_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 20;
++}
++uint32_t arm_r_r7_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 20;
++}
++uint32_t arm_r_r8_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 20;
++}
++uint32_t arm_r_r9_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 20;
++}
++uint32_t arm_r_r10_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 20;
++}
++uint32_t arm_r_r11_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 20;
++}
++uint32_t arm_r_r12_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 20;
++}
++uint32_t arm_r_r13_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 20;
++}
++uint32_t arm_r_r14_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 20;
++}
++uint32_t arm_r_r15_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 20;
++}
++uint32_t arm_r_r0_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 20;
++}
++uint32_t arm_r_r1_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 20;
++}
++uint32_t arm_r_r2_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 20;
++}
++uint32_t arm_r_r3_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 20;
++}
++uint32_t arm_r_r4_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 20;
++}
++uint32_t arm_r_r5_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 20;
++}
++uint32_t arm_r_r6_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 20;
++}
++uint32_t arm_r_r7_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 20;
++}
++uint32_t arm_r_r8_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 20;
++}
++uint32_t arm_r_r9_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 20;
++}
++uint32_t arm_r_r10_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 20;
++}
++uint32_t arm_r_r11_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 20;
++}
++uint32_t arm_r_r12_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 20;
++}
++uint32_t arm_r_r13_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 20;
++}
++uint32_t arm_r_r14_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 20;
++}
++uint32_t arm_r_r15_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 20;
++}
++uint32_t arm_r_r0_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 20;
++}
++uint32_t arm_r_r1_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 20;
++}
++uint32_t arm_r_r2_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 20;
++}
++uint32_t arm_r_r3_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 20;
++}
++uint32_t arm_r_r4_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 20;
++}
++uint32_t arm_r_r5_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 20;
++}
++uint32_t arm_r_r6_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 20;
++}
++uint32_t arm_r_r7_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 20;
++}
++uint32_t arm_r_r8_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 20;
++}
++uint32_t arm_r_r9_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 20;
++}
++uint32_t arm_r_r10_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 20;
++}
++uint32_t arm_r_r11_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 20;
++}
++uint32_t arm_r_r12_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 20;
++}
++uint32_t arm_r_r13_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 20;
++}
++uint32_t arm_r_r14_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 20;
++}
++uint32_t arm_r_r15_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 20;
++}
++uint32_t arm_r_r0_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r1_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r2_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r3_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r4_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r5_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r6_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r7_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r8_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r9_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r10_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r11_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r12_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r13_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r14_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r15_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 20; }
++}
++uint32_t arm_r_r0_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 21;
++}
++uint32_t arm_r_r1_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 21;
++}
++uint32_t arm_r_r2_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 21;
++}
++uint32_t arm_r_r3_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 21;
++}
++uint32_t arm_r_r4_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 21;
++}
++uint32_t arm_r_r5_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 21;
++}
++uint32_t arm_r_r6_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 21;
++}
++uint32_t arm_r_r7_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 21;
++}
++uint32_t arm_r_r8_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 21;
++}
++uint32_t arm_r_r9_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 21;
++}
++uint32_t arm_r_r10_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 21;
++}
++uint32_t arm_r_r11_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 21;
++}
++uint32_t arm_r_r12_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 21;
++}
++uint32_t arm_r_r13_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 21;
++}
++uint32_t arm_r_r14_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 21;
++}
++uint32_t arm_r_r15_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 21;
++}
++uint32_t arm_r_r0_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[10] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 21;
++}
++uint32_t arm_r_r1_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 21;
++}
++uint32_t arm_r_r2_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 21;
++}
++uint32_t arm_r_r3_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 21;
++}
++uint32_t arm_r_r4_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 21;
++}
++uint32_t arm_r_r5_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 21;
++}
++uint32_t arm_r_r6_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 21;
++}
++uint32_t arm_r_r7_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 21;
++}
++uint32_t arm_r_r8_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 21;
++}
++uint32_t arm_r_r9_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 21;
++}
++uint32_t arm_r_r10_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 21;
++}
++uint32_t arm_r_r11_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 21;
++}
++uint32_t arm_r_r12_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 21;
++}
++uint32_t arm_r_r13_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 21;
++}
++uint32_t arm_r_r14_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 21;
++}
++uint32_t arm_r_r15_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 21;
++}
++uint32_t arm_r_r0_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[10]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 21;
++}
++uint32_t arm_r_r1_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 21;
++}
++uint32_t arm_r_r2_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 21;
++}
++uint32_t arm_r_r3_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 21;
++}
++uint32_t arm_r_r4_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 21;
++}
++uint32_t arm_r_r5_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 21;
++}
++uint32_t arm_r_r6_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 21;
++}
++uint32_t arm_r_r7_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 21;
++}
++uint32_t arm_r_r8_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 21;
++}
++uint32_t arm_r_r9_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 21;
++}
++uint32_t arm_r_r10_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 21;
++}
++uint32_t arm_r_r11_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 21;
++}
++uint32_t arm_r_r12_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 21;
++}
++uint32_t arm_r_r13_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 21;
++}
++uint32_t arm_r_r14_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 21;
++}
++uint32_t arm_r_r15_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 21;
++}
++uint32_t arm_r_r0_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[10]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r1_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r2_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r3_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r4_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r5_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r6_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r7_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r8_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r9_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r10_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r11_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r12_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r13_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r14_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r15_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 21; }
++}
++uint32_t arm_r_r0_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[10]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 20;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 20;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r1_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r2_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r3_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r4_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r5_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r6_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r7_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r8_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r9_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r10_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r11_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r12_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r13_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r14_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r15_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 20; }
++}
++uint32_t arm_rs_r0_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 21;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[10] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 21;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r1_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r2_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r3_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r4_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r5_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r6_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r7_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r8_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r9_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r10_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r11_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r12_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r13_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r14_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r15_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 21; }
++}
++uint32_t arm_rs_r0_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[10]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rb.c gxemul-0.7.0/src/cpus/tmp_arm_rb.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rb.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_rb.c	2022-10-18 16:37:22.093753900 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 22;
++}
++uint32_t arm_r_r1_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 22;
++}
++uint32_t arm_r_r2_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 22;
++}
++uint32_t arm_r_r3_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 22;
++}
++uint32_t arm_r_r4_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 22;
++}
++uint32_t arm_r_r5_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 22;
++}
++uint32_t arm_r_r6_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 22;
++}
++uint32_t arm_r_r7_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 22;
++}
++uint32_t arm_r_r8_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 22;
++}
++uint32_t arm_r_r9_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 22;
++}
++uint32_t arm_r_r10_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 22;
++}
++uint32_t arm_r_r11_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 22;
++}
++uint32_t arm_r_r12_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 22;
++}
++uint32_t arm_r_r13_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 22;
++}
++uint32_t arm_r_r14_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 22;
++}
++uint32_t arm_r_r15_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 22;
++}
++uint32_t arm_r_r0_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 22;
++}
++uint32_t arm_r_r1_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 22;
++}
++uint32_t arm_r_r2_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 22;
++}
++uint32_t arm_r_r3_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 22;
++}
++uint32_t arm_r_r4_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 22;
++}
++uint32_t arm_r_r5_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 22;
++}
++uint32_t arm_r_r6_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 22;
++}
++uint32_t arm_r_r7_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 22;
++}
++uint32_t arm_r_r8_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 22;
++}
++uint32_t arm_r_r9_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 22;
++}
++uint32_t arm_r_r10_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 22;
++}
++uint32_t arm_r_r11_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 22;
++}
++uint32_t arm_r_r12_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 22;
++}
++uint32_t arm_r_r13_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 22;
++}
++uint32_t arm_r_r14_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 22;
++}
++uint32_t arm_r_r15_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 22;
++}
++uint32_t arm_r_r0_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 22;
++}
++uint32_t arm_r_r1_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 22;
++}
++uint32_t arm_r_r2_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 22;
++}
++uint32_t arm_r_r3_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 22;
++}
++uint32_t arm_r_r4_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 22;
++}
++uint32_t arm_r_r5_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 22;
++}
++uint32_t arm_r_r6_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 22;
++}
++uint32_t arm_r_r7_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 22;
++}
++uint32_t arm_r_r8_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 22;
++}
++uint32_t arm_r_r9_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 22;
++}
++uint32_t arm_r_r10_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 22;
++}
++uint32_t arm_r_r11_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 22;
++}
++uint32_t arm_r_r12_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 22;
++}
++uint32_t arm_r_r13_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 22;
++}
++uint32_t arm_r_r14_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 22;
++}
++uint32_t arm_r_r15_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 22;
++}
++uint32_t arm_r_r0_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r1_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r2_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r3_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r4_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r5_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r6_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r7_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r8_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r9_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r10_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r11_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r12_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r13_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r14_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r15_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 22; }
++}
++uint32_t arm_r_r0_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 23;
++}
++uint32_t arm_r_r1_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 23;
++}
++uint32_t arm_r_r2_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 23;
++}
++uint32_t arm_r_r3_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 23;
++}
++uint32_t arm_r_r4_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 23;
++}
++uint32_t arm_r_r5_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 23;
++}
++uint32_t arm_r_r6_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 23;
++}
++uint32_t arm_r_r7_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 23;
++}
++uint32_t arm_r_r8_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 23;
++}
++uint32_t arm_r_r9_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 23;
++}
++uint32_t arm_r_r10_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 23;
++}
++uint32_t arm_r_r11_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 23;
++}
++uint32_t arm_r_r12_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 23;
++}
++uint32_t arm_r_r13_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 23;
++}
++uint32_t arm_r_r14_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 23;
++}
++uint32_t arm_r_r15_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 23;
++}
++uint32_t arm_r_r0_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[11] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 23;
++}
++uint32_t arm_r_r1_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 23;
++}
++uint32_t arm_r_r2_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 23;
++}
++uint32_t arm_r_r3_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 23;
++}
++uint32_t arm_r_r4_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 23;
++}
++uint32_t arm_r_r5_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 23;
++}
++uint32_t arm_r_r6_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 23;
++}
++uint32_t arm_r_r7_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 23;
++}
++uint32_t arm_r_r8_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 23;
++}
++uint32_t arm_r_r9_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 23;
++}
++uint32_t arm_r_r10_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 23;
++}
++uint32_t arm_r_r11_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 23;
++}
++uint32_t arm_r_r12_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 23;
++}
++uint32_t arm_r_r13_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 23;
++}
++uint32_t arm_r_r14_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 23;
++}
++uint32_t arm_r_r15_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 23;
++}
++uint32_t arm_r_r0_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[11]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 23;
++}
++uint32_t arm_r_r1_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 23;
++}
++uint32_t arm_r_r2_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 23;
++}
++uint32_t arm_r_r3_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 23;
++}
++uint32_t arm_r_r4_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 23;
++}
++uint32_t arm_r_r5_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 23;
++}
++uint32_t arm_r_r6_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 23;
++}
++uint32_t arm_r_r7_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 23;
++}
++uint32_t arm_r_r8_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 23;
++}
++uint32_t arm_r_r9_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 23;
++}
++uint32_t arm_r_r10_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 23;
++}
++uint32_t arm_r_r11_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 23;
++}
++uint32_t arm_r_r12_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 23;
++}
++uint32_t arm_r_r13_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 23;
++}
++uint32_t arm_r_r14_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 23;
++}
++uint32_t arm_r_r15_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 23;
++}
++uint32_t arm_r_r0_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[11]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r1_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r2_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r3_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r4_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r5_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r6_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r7_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r8_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r9_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r10_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r11_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r12_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r13_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r14_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r15_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 23; }
++}
++uint32_t arm_r_r0_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[11]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 22;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 22;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r1_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r2_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r3_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r4_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r5_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r6_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r7_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r8_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r9_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r10_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r11_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r12_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r13_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r14_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r15_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 22; }
++}
++uint32_t arm_rs_r0_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x200)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 23;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[11] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 23;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r1_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r2_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r3_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r4_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r5_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r6_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r7_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r8_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r9_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r10_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r11_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r12_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r13_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r14_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r15_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x400000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 23; }
++}
++uint32_t arm_rs_r0_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[11]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rc.c gxemul-0.7.0/src/cpus/tmp_arm_rc.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rc.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_rc.c	2022-10-18 16:37:22.094755000 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 24;
++}
++uint32_t arm_r_r1_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 24;
++}
++uint32_t arm_r_r2_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 24;
++}
++uint32_t arm_r_r3_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 24;
++}
++uint32_t arm_r_r4_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 24;
++}
++uint32_t arm_r_r5_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 24;
++}
++uint32_t arm_r_r6_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 24;
++}
++uint32_t arm_r_r7_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 24;
++}
++uint32_t arm_r_r8_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 24;
++}
++uint32_t arm_r_r9_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 24;
++}
++uint32_t arm_r_r10_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 24;
++}
++uint32_t arm_r_r11_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 24;
++}
++uint32_t arm_r_r12_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 24;
++}
++uint32_t arm_r_r13_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 24;
++}
++uint32_t arm_r_r14_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 24;
++}
++uint32_t arm_r_r15_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 24;
++}
++uint32_t arm_r_r0_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 24;
++}
++uint32_t arm_r_r1_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 24;
++}
++uint32_t arm_r_r2_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 24;
++}
++uint32_t arm_r_r3_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 24;
++}
++uint32_t arm_r_r4_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 24;
++}
++uint32_t arm_r_r5_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 24;
++}
++uint32_t arm_r_r6_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 24;
++}
++uint32_t arm_r_r7_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 24;
++}
++uint32_t arm_r_r8_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 24;
++}
++uint32_t arm_r_r9_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 24;
++}
++uint32_t arm_r_r10_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 24;
++}
++uint32_t arm_r_r11_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 24;
++}
++uint32_t arm_r_r12_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 24;
++}
++uint32_t arm_r_r13_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 24;
++}
++uint32_t arm_r_r14_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 24;
++}
++uint32_t arm_r_r15_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 24;
++}
++uint32_t arm_r_r0_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 24;
++}
++uint32_t arm_r_r1_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 24;
++}
++uint32_t arm_r_r2_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 24;
++}
++uint32_t arm_r_r3_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 24;
++}
++uint32_t arm_r_r4_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 24;
++}
++uint32_t arm_r_r5_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 24;
++}
++uint32_t arm_r_r6_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 24;
++}
++uint32_t arm_r_r7_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 24;
++}
++uint32_t arm_r_r8_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 24;
++}
++uint32_t arm_r_r9_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 24;
++}
++uint32_t arm_r_r10_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 24;
++}
++uint32_t arm_r_r11_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 24;
++}
++uint32_t arm_r_r12_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 24;
++}
++uint32_t arm_r_r13_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 24;
++}
++uint32_t arm_r_r14_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 24;
++}
++uint32_t arm_r_r15_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 24;
++}
++uint32_t arm_r_r0_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r1_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r2_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r3_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r4_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r5_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r6_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r7_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r8_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r9_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r10_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r11_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r12_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r13_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r14_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r15_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 24; }
++}
++uint32_t arm_r_r0_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 25;
++}
++uint32_t arm_r_r1_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 25;
++}
++uint32_t arm_r_r2_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 25;
++}
++uint32_t arm_r_r3_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 25;
++}
++uint32_t arm_r_r4_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 25;
++}
++uint32_t arm_r_r5_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 25;
++}
++uint32_t arm_r_r6_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 25;
++}
++uint32_t arm_r_r7_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 25;
++}
++uint32_t arm_r_r8_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 25;
++}
++uint32_t arm_r_r9_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 25;
++}
++uint32_t arm_r_r10_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 25;
++}
++uint32_t arm_r_r11_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 25;
++}
++uint32_t arm_r_r12_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 25;
++}
++uint32_t arm_r_r13_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 25;
++}
++uint32_t arm_r_r14_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 25;
++}
++uint32_t arm_r_r15_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 25;
++}
++uint32_t arm_r_r0_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[12] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 25;
++}
++uint32_t arm_r_r1_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 25;
++}
++uint32_t arm_r_r2_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 25;
++}
++uint32_t arm_r_r3_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 25;
++}
++uint32_t arm_r_r4_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 25;
++}
++uint32_t arm_r_r5_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 25;
++}
++uint32_t arm_r_r6_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 25;
++}
++uint32_t arm_r_r7_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 25;
++}
++uint32_t arm_r_r8_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 25;
++}
++uint32_t arm_r_r9_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 25;
++}
++uint32_t arm_r_r10_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 25;
++}
++uint32_t arm_r_r11_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 25;
++}
++uint32_t arm_r_r12_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 25;
++}
++uint32_t arm_r_r13_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 25;
++}
++uint32_t arm_r_r14_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 25;
++}
++uint32_t arm_r_r15_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 25;
++}
++uint32_t arm_r_r0_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[12]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 25;
++}
++uint32_t arm_r_r1_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 25;
++}
++uint32_t arm_r_r2_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 25;
++}
++uint32_t arm_r_r3_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 25;
++}
++uint32_t arm_r_r4_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 25;
++}
++uint32_t arm_r_r5_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 25;
++}
++uint32_t arm_r_r6_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 25;
++}
++uint32_t arm_r_r7_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 25;
++}
++uint32_t arm_r_r8_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 25;
++}
++uint32_t arm_r_r9_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 25;
++}
++uint32_t arm_r_r10_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 25;
++}
++uint32_t arm_r_r11_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 25;
++}
++uint32_t arm_r_r12_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 25;
++}
++uint32_t arm_r_r13_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 25;
++}
++uint32_t arm_r_r14_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 25;
++}
++uint32_t arm_r_r15_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 25;
++}
++uint32_t arm_r_r0_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[12]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r1_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r2_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r3_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r4_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r5_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r6_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r7_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r8_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r9_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r10_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r11_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r12_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r13_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r14_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r15_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 25; }
++}
++uint32_t arm_r_r0_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[12]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x100)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 24;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 24;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r1_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r2_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r3_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r4_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r5_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r6_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r7_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r8_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r9_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r10_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r11_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r12_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r13_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r14_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r15_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x800000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 24; }
++}
++uint32_t arm_rs_r0_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x80)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 25;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[12] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 25;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r1_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r2_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r3_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r4_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r5_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r6_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r7_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r8_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r9_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r10_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r11_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r12_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r13_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r14_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r15_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x1000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 25; }
++}
++uint32_t arm_rs_r0_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[12]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rd.c gxemul-0.7.0/src/cpus/tmp_arm_rd.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rd.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_rd.c	2022-10-18 16:37:22.095755700 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 26;
++}
++uint32_t arm_r_r1_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 26;
++}
++uint32_t arm_r_r2_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 26;
++}
++uint32_t arm_r_r3_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 26;
++}
++uint32_t arm_r_r4_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 26;
++}
++uint32_t arm_r_r5_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 26;
++}
++uint32_t arm_r_r6_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 26;
++}
++uint32_t arm_r_r7_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 26;
++}
++uint32_t arm_r_r8_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 26;
++}
++uint32_t arm_r_r9_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 26;
++}
++uint32_t arm_r_r10_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 26;
++}
++uint32_t arm_r_r11_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 26;
++}
++uint32_t arm_r_r12_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 26;
++}
++uint32_t arm_r_r13_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 26;
++}
++uint32_t arm_r_r14_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 26;
++}
++uint32_t arm_r_r15_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 26;
++}
++uint32_t arm_r_r0_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 26;
++}
++uint32_t arm_r_r1_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 26;
++}
++uint32_t arm_r_r2_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 26;
++}
++uint32_t arm_r_r3_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 26;
++}
++uint32_t arm_r_r4_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 26;
++}
++uint32_t arm_r_r5_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 26;
++}
++uint32_t arm_r_r6_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 26;
++}
++uint32_t arm_r_r7_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 26;
++}
++uint32_t arm_r_r8_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 26;
++}
++uint32_t arm_r_r9_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 26;
++}
++uint32_t arm_r_r10_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 26;
++}
++uint32_t arm_r_r11_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 26;
++}
++uint32_t arm_r_r12_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 26;
++}
++uint32_t arm_r_r13_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 26;
++}
++uint32_t arm_r_r14_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 26;
++}
++uint32_t arm_r_r15_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 26;
++}
++uint32_t arm_r_r0_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 26;
++}
++uint32_t arm_r_r1_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 26;
++}
++uint32_t arm_r_r2_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 26;
++}
++uint32_t arm_r_r3_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 26;
++}
++uint32_t arm_r_r4_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 26;
++}
++uint32_t arm_r_r5_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 26;
++}
++uint32_t arm_r_r6_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 26;
++}
++uint32_t arm_r_r7_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 26;
++}
++uint32_t arm_r_r8_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 26;
++}
++uint32_t arm_r_r9_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 26;
++}
++uint32_t arm_r_r10_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 26;
++}
++uint32_t arm_r_r11_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 26;
++}
++uint32_t arm_r_r12_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 26;
++}
++uint32_t arm_r_r13_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 26;
++}
++uint32_t arm_r_r14_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 26;
++}
++uint32_t arm_r_r15_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 26;
++}
++uint32_t arm_r_r0_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r1_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r2_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r3_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r4_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r5_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r6_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r7_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r8_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r9_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r10_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r11_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r12_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r13_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r14_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r15_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 26; }
++}
++uint32_t arm_r_r0_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 27;
++}
++uint32_t arm_r_r1_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 27;
++}
++uint32_t arm_r_r2_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 27;
++}
++uint32_t arm_r_r3_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 27;
++}
++uint32_t arm_r_r4_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 27;
++}
++uint32_t arm_r_r5_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 27;
++}
++uint32_t arm_r_r6_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 27;
++}
++uint32_t arm_r_r7_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 27;
++}
++uint32_t arm_r_r8_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 27;
++}
++uint32_t arm_r_r9_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 27;
++}
++uint32_t arm_r_r10_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 27;
++}
++uint32_t arm_r_r11_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 27;
++}
++uint32_t arm_r_r12_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 27;
++}
++uint32_t arm_r_r13_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 27;
++}
++uint32_t arm_r_r14_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 27;
++}
++uint32_t arm_r_r15_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 27;
++}
++uint32_t arm_r_r0_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[13] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 27;
++}
++uint32_t arm_r_r1_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 27;
++}
++uint32_t arm_r_r2_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 27;
++}
++uint32_t arm_r_r3_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 27;
++}
++uint32_t arm_r_r4_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 27;
++}
++uint32_t arm_r_r5_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 27;
++}
++uint32_t arm_r_r6_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 27;
++}
++uint32_t arm_r_r7_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 27;
++}
++uint32_t arm_r_r8_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 27;
++}
++uint32_t arm_r_r9_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 27;
++}
++uint32_t arm_r_r10_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 27;
++}
++uint32_t arm_r_r11_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 27;
++}
++uint32_t arm_r_r12_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 27;
++}
++uint32_t arm_r_r13_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 27;
++}
++uint32_t arm_r_r14_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 27;
++}
++uint32_t arm_r_r15_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 27;
++}
++uint32_t arm_r_r0_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[13]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 27;
++}
++uint32_t arm_r_r1_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 27;
++}
++uint32_t arm_r_r2_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 27;
++}
++uint32_t arm_r_r3_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 27;
++}
++uint32_t arm_r_r4_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 27;
++}
++uint32_t arm_r_r5_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 27;
++}
++uint32_t arm_r_r6_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 27;
++}
++uint32_t arm_r_r7_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 27;
++}
++uint32_t arm_r_r8_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 27;
++}
++uint32_t arm_r_r9_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 27;
++}
++uint32_t arm_r_r10_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 27;
++}
++uint32_t arm_r_r11_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 27;
++}
++uint32_t arm_r_r12_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 27;
++}
++uint32_t arm_r_r13_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 27;
++}
++uint32_t arm_r_r14_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 27;
++}
++uint32_t arm_r_r15_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 27;
++}
++uint32_t arm_r_r0_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[13]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r1_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r2_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r3_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r4_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r5_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r6_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r7_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r8_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r9_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r10_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r11_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r12_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r13_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r14_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r15_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 27; }
++}
++uint32_t arm_r_r0_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[13]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 26;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 26;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r1_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r2_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r3_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r4_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r5_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r6_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r7_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r8_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r9_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r10_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r11_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r12_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r13_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r14_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r15_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 26; }
++}
++uint32_t arm_rs_r0_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 27;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[13] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 27;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r1_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r2_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r3_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r4_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r5_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r6_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r7_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r8_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r9_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r10_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r11_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r12_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r13_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r14_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r15_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 27; }
++}
++uint32_t arm_rs_r0_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[13]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_re.c gxemul-0.7.0/src/cpus/tmp_arm_re.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_re.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_re.c	2022-10-18 16:37:22.095755700 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 28;
++}
++uint32_t arm_r_r1_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 28;
++}
++uint32_t arm_r_r2_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 28;
++}
++uint32_t arm_r_r3_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 28;
++}
++uint32_t arm_r_r4_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 28;
++}
++uint32_t arm_r_r5_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 28;
++}
++uint32_t arm_r_r6_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 28;
++}
++uint32_t arm_r_r7_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 28;
++}
++uint32_t arm_r_r8_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 28;
++}
++uint32_t arm_r_r9_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 28;
++}
++uint32_t arm_r_r10_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 28;
++}
++uint32_t arm_r_r11_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 28;
++}
++uint32_t arm_r_r12_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 28;
++}
++uint32_t arm_r_r13_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 28;
++}
++uint32_t arm_r_r14_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 28;
++}
++uint32_t arm_r_r15_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 28;
++}
++uint32_t arm_r_r0_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 28;
++}
++uint32_t arm_r_r1_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 28;
++}
++uint32_t arm_r_r2_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 28;
++}
++uint32_t arm_r_r3_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 28;
++}
++uint32_t arm_r_r4_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 28;
++}
++uint32_t arm_r_r5_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 28;
++}
++uint32_t arm_r_r6_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 28;
++}
++uint32_t arm_r_r7_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 28;
++}
++uint32_t arm_r_r8_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 28;
++}
++uint32_t arm_r_r9_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 28;
++}
++uint32_t arm_r_r10_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 28;
++}
++uint32_t arm_r_r11_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 28;
++}
++uint32_t arm_r_r12_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 28;
++}
++uint32_t arm_r_r13_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 28;
++}
++uint32_t arm_r_r14_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 28;
++}
++uint32_t arm_r_r15_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 28;
++}
++uint32_t arm_r_r0_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 28;
++}
++uint32_t arm_r_r1_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 28;
++}
++uint32_t arm_r_r2_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 28;
++}
++uint32_t arm_r_r3_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 28;
++}
++uint32_t arm_r_r4_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 28;
++}
++uint32_t arm_r_r5_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 28;
++}
++uint32_t arm_r_r6_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 28;
++}
++uint32_t arm_r_r7_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 28;
++}
++uint32_t arm_r_r8_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 28;
++}
++uint32_t arm_r_r9_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 28;
++}
++uint32_t arm_r_r10_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 28;
++}
++uint32_t arm_r_r11_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 28;
++}
++uint32_t arm_r_r12_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 28;
++}
++uint32_t arm_r_r13_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 28;
++}
++uint32_t arm_r_r14_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 28;
++}
++uint32_t arm_r_r15_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 28;
++}
++uint32_t arm_r_r0_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r1_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r2_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r3_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r4_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r5_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r6_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r7_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r8_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r9_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r10_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r11_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r12_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r13_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r14_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r15_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 28; }
++}
++uint32_t arm_r_r0_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 29;
++}
++uint32_t arm_r_r1_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 29;
++}
++uint32_t arm_r_r2_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 29;
++}
++uint32_t arm_r_r3_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 29;
++}
++uint32_t arm_r_r4_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 29;
++}
++uint32_t arm_r_r5_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 29;
++}
++uint32_t arm_r_r6_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 29;
++}
++uint32_t arm_r_r7_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 29;
++}
++uint32_t arm_r_r8_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 29;
++}
++uint32_t arm_r_r9_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 29;
++}
++uint32_t arm_r_r10_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 29;
++}
++uint32_t arm_r_r11_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 29;
++}
++uint32_t arm_r_r12_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 29;
++}
++uint32_t arm_r_r13_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 29;
++}
++uint32_t arm_r_r14_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 29;
++}
++uint32_t arm_r_r15_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 29;
++}
++uint32_t arm_r_r0_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[14] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 29;
++}
++uint32_t arm_r_r1_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 29;
++}
++uint32_t arm_r_r2_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 29;
++}
++uint32_t arm_r_r3_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 29;
++}
++uint32_t arm_r_r4_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 29;
++}
++uint32_t arm_r_r5_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 29;
++}
++uint32_t arm_r_r6_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 29;
++}
++uint32_t arm_r_r7_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 29;
++}
++uint32_t arm_r_r8_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 29;
++}
++uint32_t arm_r_r9_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 29;
++}
++uint32_t arm_r_r10_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 29;
++}
++uint32_t arm_r_r11_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 29;
++}
++uint32_t arm_r_r12_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 29;
++}
++uint32_t arm_r_r13_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 29;
++}
++uint32_t arm_r_r14_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 29;
++}
++uint32_t arm_r_r15_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 29;
++}
++uint32_t arm_r_r0_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[14]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 29;
++}
++uint32_t arm_r_r1_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 29;
++}
++uint32_t arm_r_r2_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 29;
++}
++uint32_t arm_r_r3_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 29;
++}
++uint32_t arm_r_r4_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 29;
++}
++uint32_t arm_r_r5_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 29;
++}
++uint32_t arm_r_r6_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 29;
++}
++uint32_t arm_r_r7_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 29;
++}
++uint32_t arm_r_r8_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 29;
++}
++uint32_t arm_r_r9_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 29;
++}
++uint32_t arm_r_r10_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 29;
++}
++uint32_t arm_r_r11_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 29;
++}
++uint32_t arm_r_r12_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 29;
++}
++uint32_t arm_r_r13_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 29;
++}
++uint32_t arm_r_r14_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 29;
++}
++uint32_t arm_r_r15_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 29;
++}
++uint32_t arm_r_r0_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[14]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r1_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r2_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r3_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r4_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r5_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r6_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r7_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r8_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r9_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r10_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r11_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r12_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r13_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r14_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r15_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 29; }
++}
++uint32_t arm_r_r0_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[14]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 28;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 28;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r1_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r2_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r3_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r4_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r5_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r6_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r7_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r8_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r9_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r10_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r11_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r12_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r13_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r14_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r15_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 28; }
++}
++uint32_t arm_rs_r0_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x8)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 29;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[14] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 29;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r1_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r2_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r3_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r4_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r5_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r6_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r7_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r8_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r9_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r10_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r11_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r12_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r13_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r14_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r15_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x10000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 29; }
++}
++uint32_t arm_rs_r0_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[14]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rf.c gxemul-0.7.0/src/cpus/tmp_arm_rf.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rf.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_rf.c	2022-10-18 16:37:22.096756400 +0000
+@@ -0,0 +1,3338 @@
++/*
++ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include "cpu.h"
++#include "misc.h"
++
++
++uint32_t arm_r_r0_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 30;
++}
++uint32_t arm_r_r1_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 30;
++}
++uint32_t arm_r_r2_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 30;
++}
++uint32_t arm_r_r3_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 30;
++}
++uint32_t arm_r_r4_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 30;
++}
++uint32_t arm_r_r5_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 30;
++}
++uint32_t arm_r_r6_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 30;
++}
++uint32_t arm_r_r7_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 30;
++}
++uint32_t arm_r_r8_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 30;
++}
++uint32_t arm_r_r9_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 30;
++}
++uint32_t arm_r_r10_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 30;
++}
++uint32_t arm_r_r11_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 30;
++}
++uint32_t arm_r_r12_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 30;
++}
++uint32_t arm_r_r13_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 30;
++}
++uint32_t arm_r_r14_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 30;
++}
++uint32_t arm_r_r15_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 30;
++}
++uint32_t arm_r_r0_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 30;
++}
++uint32_t arm_r_r1_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 30;
++}
++uint32_t arm_r_r2_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 30;
++}
++uint32_t arm_r_r3_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 30;
++}
++uint32_t arm_r_r4_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 30;
++}
++uint32_t arm_r_r5_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 30;
++}
++uint32_t arm_r_r6_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 30;
++}
++uint32_t arm_r_r7_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 30;
++}
++uint32_t arm_r_r8_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 30;
++}
++uint32_t arm_r_r9_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 30;
++}
++uint32_t arm_r_r10_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 30;
++}
++uint32_t arm_r_r11_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 30;
++}
++uint32_t arm_r_r12_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 30;
++}
++uint32_t arm_r_r13_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 30;
++}
++uint32_t arm_r_r14_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 30;
++}
++uint32_t arm_r_r15_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 30;
++}
++uint32_t arm_r_r0_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 30;
++}
++uint32_t arm_r_r1_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 30;
++}
++uint32_t arm_r_r2_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 30;
++}
++uint32_t arm_r_r3_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 30;
++}
++uint32_t arm_r_r4_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 30;
++}
++uint32_t arm_r_r5_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 30;
++}
++uint32_t arm_r_r6_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 30;
++}
++uint32_t arm_r_r7_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 30;
++}
++uint32_t arm_r_r8_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 30;
++}
++uint32_t arm_r_r9_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 30;
++}
++uint32_t arm_r_r10_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 30;
++}
++uint32_t arm_r_r11_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 30;
++}
++uint32_t arm_r_r12_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 30;
++}
++uint32_t arm_r_r13_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 30;
++}
++uint32_t arm_r_r14_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 30;
++}
++uint32_t arm_r_r15_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 30;
++}
++uint32_t arm_r_r0_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r1_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r2_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r3_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r4_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r5_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r6_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r7_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r8_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r9_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r10_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r11_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r12_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r13_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r14_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r15_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 30; }
++}
++uint32_t arm_r_r0_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r0_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] << 31;
++}
++uint32_t arm_r_r1_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] << 31;
++}
++uint32_t arm_r_r2_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] << 31;
++}
++uint32_t arm_r_r3_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] << 31;
++}
++uint32_t arm_r_r4_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] << 31;
++}
++uint32_t arm_r_r5_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] << 31;
++}
++uint32_t arm_r_r6_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] << 31;
++}
++uint32_t arm_r_r7_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] << 31;
++}
++uint32_t arm_r_r8_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] << 31;
++}
++uint32_t arm_r_r9_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] << 31;
++}
++uint32_t arm_r_r10_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] << 31;
++}
++uint32_t arm_r_r11_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] << 31;
++}
++uint32_t arm_r_r12_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] << 31;
++}
++uint32_t arm_r_r13_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] << 31;
++}
++uint32_t arm_r_r14_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] << 31;
++}
++uint32_t arm_r_r15_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp << 31;
++}
++uint32_t arm_r_r0_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[0];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r1_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[1];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r2_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[2];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r3_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[3];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r4_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[4];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r5_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[5];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r6_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[6];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r7_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[7];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r8_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[8];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r9_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[9];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r10_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[10];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r11_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[11];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r12_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[12];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r13_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[13];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r14_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =cpu->cd.arm.r[14];
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r15_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y = cpu->cd.arm.r[15] & 255;
++  uint32_t x =tmp;
++if (y > 31) return 0; else x <<= y;
++return x; }
++}
++uint32_t arm_r_r0_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[0] >> 31;
++}
++uint32_t arm_r_r1_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[1] >> 31;
++}
++uint32_t arm_r_r2_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[2] >> 31;
++}
++uint32_t arm_r_r3_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[3] >> 31;
++}
++uint32_t arm_r_r4_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[4] >> 31;
++}
++uint32_t arm_r_r5_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[5] >> 31;
++}
++uint32_t arm_r_r6_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[6] >> 31;
++}
++uint32_t arm_r_r7_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[7] >> 31;
++}
++uint32_t arm_r_r8_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[8] >> 31;
++}
++uint32_t arm_r_r9_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[9] >> 31;
++}
++uint32_t arm_r_r10_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[10] >> 31;
++}
++uint32_t arm_r_r11_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[11] >> 31;
++}
++uint32_t arm_r_r12_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[12] >> 31;
++}
++uint32_t arm_r_r13_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[13] >> 31;
++}
++uint32_t arm_r_r14_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	return cpu->cd.arm.r[14] >> 31;
++}
++uint32_t arm_r_r15_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++	return tmp >> 31;
++}
++uint32_t arm_r_r0_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r1_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r2_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r3_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r4_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r5_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r6_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r7_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r8_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r9_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r10_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r11_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r12_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r13_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r14_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r15_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t y=cpu->cd.arm.r[15]&255;
++uint32_t x=tmp; if (y>=32) return 0;
++return x >> y; } }
++uint32_t arm_r_r0_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[0] >> 31;
++}
++uint32_t arm_r_r1_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[1] >> 31;
++}
++uint32_t arm_r_r2_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[2] >> 31;
++}
++uint32_t arm_r_r3_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[3] >> 31;
++}
++uint32_t arm_r_r4_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[4] >> 31;
++}
++uint32_t arm_r_r5_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[5] >> 31;
++}
++uint32_t arm_r_r6_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[6] >> 31;
++}
++uint32_t arm_r_r7_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[7] >> 31;
++}
++uint32_t arm_r_r8_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[8] >> 31;
++}
++uint32_t arm_r_r9_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[9] >> 31;
++}
++uint32_t arm_r_r10_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[10] >> 31;
++}
++uint32_t arm_r_r11_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[11] >> 31;
++}
++uint32_t arm_r_r12_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[12] >> 31;
++}
++uint32_t arm_r_r13_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[13] >> 31;
++}
++uint32_t arm_r_r14_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++return (int32_t)cpu->cd.arm.r[14] >> 31;
++}
++uint32_t arm_r_r15_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++return (int32_t)tmp >> 31;
++}
++uint32_t arm_r_r0_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r1_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r2_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r3_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r4_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r5_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r6_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r7_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r8_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r9_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r10_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r11_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r12_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r13_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r14_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r15_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t y=cpu->cd.arm.r[15]&255;
++int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
++return (int32_t)x >> y; } }
++uint32_t arm_r_r0_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r1_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r2_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r3_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r4_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r5_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r6_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r7_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r8_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r9_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r10_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r11_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r12_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r13_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r14_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r15_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x=tmp; x |= (x << 32); return x >> 31; }
++}
++uint32_t arm_r_r0_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r1_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r2_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r3_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r4_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r5_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r6_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r7_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r8_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r9_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r10_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r11_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r12_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r13_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r14_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
++uint32_t arm_r_r15_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int y=cpu->cd.arm.r[15]&31;
++uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
++uint32_t arm_rs_r0_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x4)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 30;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 30;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r1_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r2_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r3_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r4_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r5_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r6_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r7_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r8_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r9_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r10_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r11_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r12_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r13_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r14_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r15_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x20000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 30; }
++}
++uint32_t arm_rs_r0_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r1_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r2_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r3_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r4_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r5_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r6_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r7_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r8_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r9_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r10_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r11_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r12_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r13_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r14_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r15_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x2)
++	cpu->cd.arm.flags |= ARM_F_C;
++x <<= 31;
++ return x; }
++}
++uint32_t arm_rs_r0_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r1_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r2_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r3_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r4_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r5_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r6_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r7_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r8_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r9_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r10_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r11_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r12_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r13_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r14_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r15_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++  uint32_t y = cpu->cd.arm.r[15] & 255;
++  if (y != 0) {
++    cpu->cd.arm.flags &= ~ARM_F_C;
++    if (y >= 32) return 0;
++    x <<= (y - 1);
++    if (x & 0x80000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++    x <<= 1;
++ }
++ return x; }
++}
++uint32_t arm_rs_r0_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r1_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r2_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r3_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r4_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r5_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r6_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r7_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r8_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r9_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r10_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r11_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r12_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r13_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r14_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r15_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r0_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint32_t x = tmp,y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=32;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r0_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r1_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r2_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r3_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r4_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r5_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r6_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r7_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r8_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r9_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r10_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r11_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r12_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r13_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r14_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14];
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r15_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++x >>= 31;
++ return x; }
++}
++uint32_t arm_rs_r0_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r1_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r2_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r3_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r4_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r5_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r6_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r7_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r8_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r9_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r10_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r11_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r12_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r13_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r14_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r15_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ int32_t x = tmp,y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if(y>31) y=31;
++y--; x >>= y;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return (int32_t)x >> 1; }
++}
++uint32_t arm_rs_r0_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r1_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r2_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r3_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r4_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r5_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r6_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r7_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r8_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r9_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r10_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r11_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r12_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r13_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r14_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r15_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; x |= (x << 32);
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 0x40000000)
++	cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 31; }
++}
++uint32_t arm_rs_r0_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r1_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r2_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r3_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r4_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r5_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r6_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r7_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r8_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r9_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r10_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r11_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r12_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r13_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r14_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
++uint32_t arm_rs_r15_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
++	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
++	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
++	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
++	    ARM_INSTR_ALIGNMENT_SHIFT);
++	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
++{ uint64_t x = tmp; int y=cpu->cd.arm.r[15]&255;
++if(y==0) return x;
++y --; y &= 31; x >>= y;
++cpu->cd.arm.flags &= ~ARM_F_C;
++if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
++ return x >> 1; }
++}
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_tail.c gxemul-0.7.0/src/cpus/tmp_arm_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_arm_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_arm_tail.c	2022-10-18 16:37:22.097757300 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF arm_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES arm_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF arm_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC arm_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE arm_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE arm_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW arm_memory_rw
++#define MEM_ARM
++#include "memory_rw.c"
++#undef MEM_ARM
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC arm_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC arm_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS arm_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) arm_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_arm_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF arm_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS arm32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void arm32_instr_ ## n(struct cpu *cpu, \
++	struct arm_instr_call *ic)
++#define instr(n) arm32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY arm32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC arm32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE arm32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE arm32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC arm32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC arm32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS arm32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) arm32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_arm_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 arm32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF arm32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(arm,"ARM")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_i960_head.c gxemul-0.7.0/src/cpus/tmp_i960_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_i960_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_i960_head.c	2022-10-18 16:37:22.097757300 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES I960_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH i960
++#define DYNTRANS_I960
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N I960_L2N
++#define DYNTRANS_L3N I960_L3N
++#if !defined(I960_L2N) || !defined(I960_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE i960_l2_64_table
++#define DYNTRANS_L3_64_TABLE i960_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC i960_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE I960_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT I960_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE i960_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY i960_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR I960_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY I960_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE i960_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE i960_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS i960_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC i960_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS i960_combine_instructions
++#define DISASSEMBLE i960_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_i960_instr.c */
++#define instr(n) i960_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) i96032_instr_ ## n
++
++#endif
++
++
++#define X(n) void i960_instr_ ## n(struct cpu *cpu, \
++ struct i960_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.i960.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct i960_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_i960_tail.c gxemul-0.7.0/src/cpus/tmp_i960_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_i960_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_i960_tail.c	2022-10-18 16:37:22.098758300 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF i960_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES i960_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF i960_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC i960_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE i960_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE i960_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW i960_memory_rw
++#define MEM_I960
++#include "memory_rw.c"
++#undef MEM_I960
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC i960_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC i960_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS i960_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) i960_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_i960_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF i960_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS i96032_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void i96032_instr_ ## n(struct cpu *cpu, \
++	struct i960_instr_call *ic)
++#define instr(n) i96032_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY i96032_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC i96032_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE i96032_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE i96032_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC i96032_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC i96032_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS i96032_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) i96032_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_i960_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS i960_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 i96032_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF i96032_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(i960,"I960")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_bcnd.c gxemul-0.7.0/src/cpus/tmp_m88k_bcnd.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_bcnd.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_m88k_bcnd.c	2022-10-18 16:37:22.099759300 +0000
+@@ -0,0 +1,512 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++
++X(bcnd_gt0)
++{
++	if ((int32_t)reg(ic->arg[0]) > 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_eq0)
++{
++	if ((int32_t)reg(ic->arg[0]) == 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_ge0)
++{
++	if ((int32_t)reg(ic->arg[0]) >= 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_not_maxneg_nor_zero)
++{
++	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL && (int32_t)reg(ic->arg[0]) != 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_not_maxneg)
++{
++	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_maxneg)
++{
++	if ((uint32_t)reg(ic->arg[0]) == 0x80000000UL) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_lt0)
++{
++	if ((int32_t)reg(ic->arg[0]) < 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_ne0)
++{
++	if ((int32_t)reg(ic->arg[0]) != 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_le0)
++{
++	if ((int32_t)reg(ic->arg[0]) <= 0) {
++		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
++		quick_pc_to_pointers(cpu);
++	}
++}
++
++
++X(bcnd_n_gt0)
++{
++	int cond = (int32_t)reg(ic->arg[0]) > 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_eq0)
++{
++	int cond = (int32_t)reg(ic->arg[0]) == 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_ge0)
++{
++	int cond = (int32_t)reg(ic->arg[0]) >= 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_not_maxneg_nor_zero)
++{
++	int cond = (uint32_t)reg(ic->arg[0]) != 0x80000000UL && (int32_t)reg(ic->arg[0]) != 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_not_maxneg)
++{
++	int cond = (uint32_t)reg(ic->arg[0]) != 0x80000000UL;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_maxneg)
++{
++	int cond = (uint32_t)reg(ic->arg[0]) == 0x80000000UL;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_lt0)
++{
++	int cond = (int32_t)reg(ic->arg[0]) < 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_ne0)
++{
++	int cond = (int32_t)reg(ic->arg[0]) != 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_n_le0)
++{
++	int cond = (int32_t)reg(ic->arg[0]) <= 0;
++	SYNCH_PC;
++	if (cond)
++		cpu->cd.m88k.delay_target = (cpu->pc
++			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
++			+ ic->arg[2];
++	else
++		cpu->cd.m88k.delay_target = cpu->pc + 8;
++	cpu->delay_slot = TO_BE_DELAYED;
++	ic[1].f(cpu, ic+1);
++	cpu->n_translated_instrs ++;
++	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
++		cpu->delay_slot = NOT_DELAYED;
++		if (cond) {
++			cpu->pc = cpu->cd.m88k.delay_target;
++			quick_pc_to_pointers(cpu);
++		} else
++			cpu->cd.m88k.next_ic ++;
++	} else
++		cpu->delay_slot = NOT_DELAYED;
++}
++
++
++X(bcnd_samepage_gt0)
++{
++	if ((int32_t)reg(ic->arg[0]) > 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_eq0)
++{
++	if ((int32_t)reg(ic->arg[0]) == 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_ge0)
++{
++	if ((int32_t)reg(ic->arg[0]) >= 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_not_maxneg_nor_zero)
++{
++	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL && (int32_t)reg(ic->arg[0]) != 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_not_maxneg)
++{
++	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_maxneg)
++{
++	if ((uint32_t)reg(ic->arg[0]) == 0x80000000UL) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_lt0)
++{
++	if ((int32_t)reg(ic->arg[0]) < 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_ne0)
++{
++	if ((int32_t)reg(ic->arg[0]) != 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++X(bcnd_samepage_le0)
++{
++	if ((int32_t)reg(ic->arg[0]) <= 0) {
++		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
++	}
++}
++
++
++
++void (*m88k_bcnd[32 * 2 * 2])(struct cpu *, struct m88k_instr_call *) = {
++NULL,
++m88k_instr_bcnd_gt0,
++m88k_instr_bcnd_eq0,
++m88k_instr_bcnd_ge0,
++NULL,
++m88k_instr_bcnd_not_maxneg_nor_zero,
++NULL,
++m88k_instr_bcnd_not_maxneg,
++m88k_instr_bcnd_maxneg,
++NULL,
++NULL,
++NULL,
++m88k_instr_bcnd_lt0,
++m88k_instr_bcnd_ne0,
++m88k_instr_bcnd_le0,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++m88k_instr_bcnd_n_gt0,
++m88k_instr_bcnd_n_eq0,
++m88k_instr_bcnd_n_ge0,
++NULL,
++m88k_instr_bcnd_n_not_maxneg_nor_zero,
++NULL,
++m88k_instr_bcnd_n_not_maxneg,
++m88k_instr_bcnd_n_maxneg,
++NULL,
++NULL,
++NULL,
++m88k_instr_bcnd_n_lt0,
++m88k_instr_bcnd_n_ne0,
++m88k_instr_bcnd_n_le0,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++m88k_instr_bcnd_samepage_gt0,
++m88k_instr_bcnd_samepage_eq0,
++m88k_instr_bcnd_samepage_ge0,
++NULL,
++m88k_instr_bcnd_samepage_not_maxneg_nor_zero,
++NULL,
++m88k_instr_bcnd_samepage_not_maxneg,
++m88k_instr_bcnd_samepage_maxneg,
++NULL,
++NULL,
++NULL,
++m88k_instr_bcnd_samepage_lt0,
++m88k_instr_bcnd_samepage_ne0,
++m88k_instr_bcnd_samepage_le0,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL,
++NULL };
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_head.c gxemul-0.7.0/src/cpus/tmp_m88k_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_m88k_head.c	2022-10-18 16:37:22.099759300 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES M88K_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH m88k
++#define DYNTRANS_M88K
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N M88K_L2N
++#define DYNTRANS_L3N M88K_L3N
++#if !defined(M88K_L2N) || !defined(M88K_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE m88k_l2_64_table
++#define DYNTRANS_L3_64_TABLE m88k_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC m88k_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE M88K_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT M88K_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE m88k_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY m88k_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR M88K_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY M88K_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE m88k_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE m88k_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS m88k_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC m88k_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS m88k_combine_instructions
++#define DISASSEMBLE m88k_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_m88k_instr.c */
++#define instr(n) m88k_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) m88k32_instr_ ## n
++
++#endif
++
++
++#define X(n) void m88k_instr_ ## n(struct cpu *cpu, \
++ struct m88k_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.m88k.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct m88k_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_loadstore.c gxemul-0.7.0/src/cpus/tmp_m88k_loadstore.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_loadstore.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_m88k_loadstore.c	2022-10-18 16:37:22.100760000 +0000
+@@ -0,0 +1,4250 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_1_le
++#define LS_GENERIC_N m88k_generic_ld_u_1
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le
++#define LS_GENERIC_N m88k_generic_ld_u_2
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le
++#define LS_GENERIC_N m88k_generic_ld_u_4
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le
++#define LS_GENERIC_N m88k_generic_ld_u_8
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_1_le
++#define LS_GENERIC_N m88k_generic_st_1
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le
++#define LS_GENERIC_N m88k_generic_st_2
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le
++#define LS_GENERIC_N m88k_generic_st_4
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le
++#define LS_GENERIC_N m88k_generic_st_8
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_1_le
++#define LS_GENERIC_N m88k_generic_ld_1
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le
++#define LS_GENERIC_N m88k_generic_ld_2
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le
++#define LS_GENERIC_N m88k_generic_ld_4
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le
++#define LS_GENERIC_N m88k_generic_ld_8
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be
++#define LS_GENERIC_N m88k_generic_ld_u_2
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be
++#define LS_GENERIC_N m88k_generic_ld_u_4
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be
++#define LS_GENERIC_N m88k_generic_ld_u_8
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be
++#define LS_GENERIC_N m88k_generic_st_2
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be
++#define LS_GENERIC_N m88k_generic_st_4
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be
++#define LS_GENERIC_N m88k_generic_st_8
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be
++#define LS_GENERIC_N m88k_generic_ld_2
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be
++#define LS_GENERIC_N m88k_generic_ld_4
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be
++#define LS_GENERIC_N m88k_generic_ld_8
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_1_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_1_regofs
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_1_le_regofs
++#define LS_GENERIC_N m88k_generic_st_1_regofs
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_regofs
++#define LS_GENERIC_N m88k_generic_st_2_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_regofs
++#define LS_GENERIC_N m88k_generic_st_4_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_regofs
++#define LS_GENERIC_N m88k_generic_st_8_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_1_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_1_regofs
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_regofs
++#define LS_GENERIC_N m88k_generic_st_2_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_regofs
++#define LS_GENERIC_N m88k_generic_st_4_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_regofs
++#define LS_GENERIC_N m88k_generic_st_8_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_scaled_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_1_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_1_usr_regofs
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_1_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_1_usr_regofs
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_2_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_4_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_8_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_1_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_1_usr_regofs
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_2_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_4_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_8_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_scaled_usr_regofs
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_1_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_1_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_1_le_nopcsync
++#define LS_GENERIC_N m88k_generic_st_1_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_1_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_1_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_1_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_1_regofs_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_1_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_1_regofs_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_1_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_1_regofs_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_scaled_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_1_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_1_usr_regofs_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_1_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_1_usr_regofs_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_1_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_1_usr_regofs_nopcsync
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_le_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_2_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_4_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_u_8_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_STORE
++#define LS_N m88k_instr_st_2_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_4_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_STORE
++#define LS_N m88k_instr_st_8_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#define LS_LOAD
++#define LS_N m88k_instr_ld_2_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs_nopcsync
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_4_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs_nopcsync
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#define LS_LOAD
++#define LS_N m88k_instr_ld_8_be_scaled_usr_regofs_nopcsync
++#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs_nopcsync
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#define LS_SCALED
++#define LS_USR
++#define LS_REGOFS
++#define LS_NO_PC_SYNC
++#include "cpu_m88k_instr_loadstore.c"
++#undef LS_NO_PC_SYNC
++#undef LS_REGOFS
++#undef LS_USR
++#undef LS_SCALED
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++
++
++void (*m88k_loadstore[512])(struct cpu *, struct m88k_instr_call *) = {
++	m88k_instr_ld_u_1_le,
++	m88k_instr_ld_u_2_le,
++	m88k_instr_ld_u_4_le,
++	m88k_instr_ld_u_8_le,
++	m88k_instr_st_1_le,
++	m88k_instr_st_2_le,
++	m88k_instr_st_4_le,
++	m88k_instr_st_8_le,
++	m88k_instr_ld_1_le,
++	m88k_instr_ld_2_le,
++	m88k_instr_ld_4_le,
++	m88k_instr_ld_8_le,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le,
++	m88k_instr_ld_u_2_be,
++	m88k_instr_ld_u_4_be,
++	m88k_instr_ld_u_8_be,
++	m88k_instr_st_1_le,
++	m88k_instr_st_2_be,
++	m88k_instr_st_4_be,
++	m88k_instr_st_8_be,
++	m88k_instr_ld_1_le,
++	m88k_instr_ld_2_be,
++	m88k_instr_ld_4_be,
++	m88k_instr_ld_8_be,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_regofs,
++	m88k_instr_ld_u_2_le_regofs,
++	m88k_instr_ld_u_4_le_regofs,
++	m88k_instr_ld_u_8_le_regofs,
++	m88k_instr_st_1_le_regofs,
++	m88k_instr_st_2_le_regofs,
++	m88k_instr_st_4_le_regofs,
++	m88k_instr_st_8_le_regofs,
++	m88k_instr_ld_1_le_regofs,
++	m88k_instr_ld_2_le_regofs,
++	m88k_instr_ld_4_le_regofs,
++	m88k_instr_ld_8_le_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_regofs,
++	m88k_instr_ld_u_2_be_regofs,
++	m88k_instr_ld_u_4_be_regofs,
++	m88k_instr_ld_u_8_be_regofs,
++	m88k_instr_st_1_le_regofs,
++	m88k_instr_st_2_be_regofs,
++	m88k_instr_st_4_be_regofs,
++	m88k_instr_st_8_be_regofs,
++	m88k_instr_ld_1_le_regofs,
++	m88k_instr_ld_2_be_regofs,
++	m88k_instr_ld_4_be_regofs,
++	m88k_instr_ld_8_be_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_le_scaled_regofs,
++	m88k_instr_ld_u_4_le_scaled_regofs,
++	m88k_instr_ld_u_8_le_scaled_regofs,
++	NULL,
++	m88k_instr_st_2_le_scaled_regofs,
++	m88k_instr_st_4_le_scaled_regofs,
++	m88k_instr_st_8_le_scaled_regofs,
++	NULL,
++	m88k_instr_ld_2_le_scaled_regofs,
++	m88k_instr_ld_4_le_scaled_regofs,
++	m88k_instr_ld_8_le_scaled_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_be_scaled_regofs,
++	m88k_instr_ld_u_4_be_scaled_regofs,
++	m88k_instr_ld_u_8_be_scaled_regofs,
++	NULL,
++	m88k_instr_st_2_be_scaled_regofs,
++	m88k_instr_st_4_be_scaled_regofs,
++	m88k_instr_st_8_be_scaled_regofs,
++	NULL,
++	m88k_instr_ld_2_be_scaled_regofs,
++	m88k_instr_ld_4_be_scaled_regofs,
++	m88k_instr_ld_8_be_scaled_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_usr_regofs,
++	m88k_instr_ld_u_2_le_usr_regofs,
++	m88k_instr_ld_u_4_le_usr_regofs,
++	m88k_instr_ld_u_8_le_usr_regofs,
++	m88k_instr_st_1_le_usr_regofs,
++	m88k_instr_st_2_le_usr_regofs,
++	m88k_instr_st_4_le_usr_regofs,
++	m88k_instr_st_8_le_usr_regofs,
++	m88k_instr_ld_1_le_usr_regofs,
++	m88k_instr_ld_2_le_usr_regofs,
++	m88k_instr_ld_4_le_usr_regofs,
++	m88k_instr_ld_8_le_usr_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_usr_regofs,
++	m88k_instr_ld_u_2_be_usr_regofs,
++	m88k_instr_ld_u_4_be_usr_regofs,
++	m88k_instr_ld_u_8_be_usr_regofs,
++	m88k_instr_st_1_le_usr_regofs,
++	m88k_instr_st_2_be_usr_regofs,
++	m88k_instr_st_4_be_usr_regofs,
++	m88k_instr_st_8_be_usr_regofs,
++	m88k_instr_ld_1_le_usr_regofs,
++	m88k_instr_ld_2_be_usr_regofs,
++	m88k_instr_ld_4_be_usr_regofs,
++	m88k_instr_ld_8_be_usr_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_le_scaled_usr_regofs,
++	m88k_instr_ld_u_4_le_scaled_usr_regofs,
++	m88k_instr_ld_u_8_le_scaled_usr_regofs,
++	NULL,
++	m88k_instr_st_2_le_scaled_usr_regofs,
++	m88k_instr_st_4_le_scaled_usr_regofs,
++	m88k_instr_st_8_le_scaled_usr_regofs,
++	NULL,
++	m88k_instr_ld_2_le_scaled_usr_regofs,
++	m88k_instr_ld_4_le_scaled_usr_regofs,
++	m88k_instr_ld_8_le_scaled_usr_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_be_scaled_usr_regofs,
++	m88k_instr_ld_u_4_be_scaled_usr_regofs,
++	m88k_instr_ld_u_8_be_scaled_usr_regofs,
++	NULL,
++	m88k_instr_st_2_be_scaled_usr_regofs,
++	m88k_instr_st_4_be_scaled_usr_regofs,
++	m88k_instr_st_8_be_scaled_usr_regofs,
++	NULL,
++	m88k_instr_ld_2_be_scaled_usr_regofs,
++	m88k_instr_ld_4_be_scaled_usr_regofs,
++	m88k_instr_ld_8_be_scaled_usr_regofs,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_nopcsync,
++	m88k_instr_ld_u_2_le_nopcsync,
++	m88k_instr_ld_u_4_le_nopcsync,
++	m88k_instr_ld_u_8_le_nopcsync,
++	m88k_instr_st_1_le_nopcsync,
++	m88k_instr_st_2_le_nopcsync,
++	m88k_instr_st_4_le_nopcsync,
++	m88k_instr_st_8_le_nopcsync,
++	m88k_instr_ld_1_le_nopcsync,
++	m88k_instr_ld_2_le_nopcsync,
++	m88k_instr_ld_4_le_nopcsync,
++	m88k_instr_ld_8_le_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_nopcsync,
++	m88k_instr_ld_u_2_be_nopcsync,
++	m88k_instr_ld_u_4_be_nopcsync,
++	m88k_instr_ld_u_8_be_nopcsync,
++	m88k_instr_st_1_le_nopcsync,
++	m88k_instr_st_2_be_nopcsync,
++	m88k_instr_st_4_be_nopcsync,
++	m88k_instr_st_8_be_nopcsync,
++	m88k_instr_ld_1_le_nopcsync,
++	m88k_instr_ld_2_be_nopcsync,
++	m88k_instr_ld_4_be_nopcsync,
++	m88k_instr_ld_8_be_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_regofs_nopcsync,
++	m88k_instr_ld_u_2_le_regofs_nopcsync,
++	m88k_instr_ld_u_4_le_regofs_nopcsync,
++	m88k_instr_ld_u_8_le_regofs_nopcsync,
++	m88k_instr_st_1_le_regofs_nopcsync,
++	m88k_instr_st_2_le_regofs_nopcsync,
++	m88k_instr_st_4_le_regofs_nopcsync,
++	m88k_instr_st_8_le_regofs_nopcsync,
++	m88k_instr_ld_1_le_regofs_nopcsync,
++	m88k_instr_ld_2_le_regofs_nopcsync,
++	m88k_instr_ld_4_le_regofs_nopcsync,
++	m88k_instr_ld_8_le_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_regofs_nopcsync,
++	m88k_instr_ld_u_2_be_regofs_nopcsync,
++	m88k_instr_ld_u_4_be_regofs_nopcsync,
++	m88k_instr_ld_u_8_be_regofs_nopcsync,
++	m88k_instr_st_1_le_regofs_nopcsync,
++	m88k_instr_st_2_be_regofs_nopcsync,
++	m88k_instr_st_4_be_regofs_nopcsync,
++	m88k_instr_st_8_be_regofs_nopcsync,
++	m88k_instr_ld_1_le_regofs_nopcsync,
++	m88k_instr_ld_2_be_regofs_nopcsync,
++	m88k_instr_ld_4_be_regofs_nopcsync,
++	m88k_instr_ld_8_be_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_le_scaled_regofs_nopcsync,
++	m88k_instr_ld_u_4_le_scaled_regofs_nopcsync,
++	m88k_instr_ld_u_8_le_scaled_regofs_nopcsync,
++	NULL,
++	m88k_instr_st_2_le_scaled_regofs_nopcsync,
++	m88k_instr_st_4_le_scaled_regofs_nopcsync,
++	m88k_instr_st_8_le_scaled_regofs_nopcsync,
++	NULL,
++	m88k_instr_ld_2_le_scaled_regofs_nopcsync,
++	m88k_instr_ld_4_le_scaled_regofs_nopcsync,
++	m88k_instr_ld_8_le_scaled_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_be_scaled_regofs_nopcsync,
++	m88k_instr_ld_u_4_be_scaled_regofs_nopcsync,
++	m88k_instr_ld_u_8_be_scaled_regofs_nopcsync,
++	NULL,
++	m88k_instr_st_2_be_scaled_regofs_nopcsync,
++	m88k_instr_st_4_be_scaled_regofs_nopcsync,
++	m88k_instr_st_8_be_scaled_regofs_nopcsync,
++	NULL,
++	m88k_instr_ld_2_be_scaled_regofs_nopcsync,
++	m88k_instr_ld_4_be_scaled_regofs_nopcsync,
++	m88k_instr_ld_8_be_scaled_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_usr_regofs_nopcsync,
++	m88k_instr_ld_u_2_le_usr_regofs_nopcsync,
++	m88k_instr_ld_u_4_le_usr_regofs_nopcsync,
++	m88k_instr_ld_u_8_le_usr_regofs_nopcsync,
++	m88k_instr_st_1_le_usr_regofs_nopcsync,
++	m88k_instr_st_2_le_usr_regofs_nopcsync,
++	m88k_instr_st_4_le_usr_regofs_nopcsync,
++	m88k_instr_st_8_le_usr_regofs_nopcsync,
++	m88k_instr_ld_1_le_usr_regofs_nopcsync,
++	m88k_instr_ld_2_le_usr_regofs_nopcsync,
++	m88k_instr_ld_4_le_usr_regofs_nopcsync,
++	m88k_instr_ld_8_le_usr_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_1_le_usr_regofs_nopcsync,
++	m88k_instr_ld_u_2_be_usr_regofs_nopcsync,
++	m88k_instr_ld_u_4_be_usr_regofs_nopcsync,
++	m88k_instr_ld_u_8_be_usr_regofs_nopcsync,
++	m88k_instr_st_1_le_usr_regofs_nopcsync,
++	m88k_instr_st_2_be_usr_regofs_nopcsync,
++	m88k_instr_st_4_be_usr_regofs_nopcsync,
++	m88k_instr_st_8_be_usr_regofs_nopcsync,
++	m88k_instr_ld_1_le_usr_regofs_nopcsync,
++	m88k_instr_ld_2_be_usr_regofs_nopcsync,
++	m88k_instr_ld_4_be_usr_regofs_nopcsync,
++	m88k_instr_ld_8_be_usr_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_le_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_u_4_le_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_u_8_le_scaled_usr_regofs_nopcsync,
++	NULL,
++	m88k_instr_st_2_le_scaled_usr_regofs_nopcsync,
++	m88k_instr_st_4_le_scaled_usr_regofs_nopcsync,
++	m88k_instr_st_8_le_scaled_usr_regofs_nopcsync,
++	NULL,
++	m88k_instr_ld_2_le_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_4_le_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_8_le_scaled_usr_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	NULL,
++	m88k_instr_ld_u_2_be_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_u_4_be_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_u_8_be_scaled_usr_regofs_nopcsync,
++	NULL,
++	m88k_instr_st_2_be_scaled_usr_regofs_nopcsync,
++	m88k_instr_st_4_be_scaled_usr_regofs_nopcsync,
++	m88k_instr_st_8_be_scaled_usr_regofs_nopcsync,
++	NULL,
++	m88k_instr_ld_2_be_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_4_be_scaled_usr_regofs_nopcsync,
++	m88k_instr_ld_8_be_scaled_usr_regofs_nopcsync,
++	NULL,
++	NULL,
++	NULL,
++	NULL };
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_tail.c gxemul-0.7.0/src/cpus/tmp_m88k_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_m88k_tail.c	2022-10-18 16:37:22.102762000 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF m88k_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES m88k_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF m88k_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC m88k_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE m88k_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE m88k_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW m88k_memory_rw
++#define MEM_M88K
++#include "memory_rw.c"
++#undef MEM_M88K
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC m88k_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC m88k_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS m88k_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) m88k_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_m88k_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF m88k_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS m88k32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void m88k32_instr_ ## n(struct cpu *cpu, \
++	struct m88k_instr_call *ic)
++#define instr(n) m88k32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY m88k32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC m88k32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE m88k32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE m88k32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC m88k32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC m88k32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS m88k32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) m88k32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_m88k_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS m88k_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 m88k32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF m88k32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(m88k,"M88K")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_head.c gxemul-0.7.0/src/cpus/tmp_mips_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_mips_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_mips_head.c	2022-10-18 16:37:22.102762000 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES MIPS_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH mips
++#define DYNTRANS_MIPS
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N MIPS_L2N
++#define DYNTRANS_L3N MIPS_L3N
++#if !defined(MIPS_L2N) || !defined(MIPS_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE mips_l2_64_table
++#define DYNTRANS_L3_64_TABLE mips_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC mips_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE MIPS_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT MIPS_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE mips_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY mips_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR MIPS_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY MIPS_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE mips_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE mips_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS mips_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC mips_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS mips_combine_instructions
++#define DISASSEMBLE mips_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_mips_instr.c */
++#define instr(n) mips_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) mips32_instr_ ## n
++
++#endif
++
++
++#define X(n) void mips_instr_ ## n(struct cpu *cpu, \
++ struct mips_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.mips.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct mips_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore.c gxemul-0.7.0/src/cpus/tmp_mips_loadstore.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_mips_loadstore.c	2022-10-18 16:37:22.103762900 +0000
+@@ -0,0 +1,825 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu1_le
++#define LS_GENERIC_N mips_generic_lu1
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l1_le
++#define LS_GENERIC_N mips_generic_l1
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu2_le
++#define LS_GENERIC_N mips_generic_lu2
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l2_le
++#define LS_GENERIC_N mips_generic_l2
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu4_le
++#define LS_GENERIC_N mips_generic_lu4
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l4_le
++#define LS_GENERIC_N mips_generic_l4
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu8_le
++#define LS_GENERIC_N mips_generic_lu8
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l8_le
++#define LS_GENERIC_N mips_generic_l8
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s1_le
++#define LS_GENERIC_N mips_generic_s1
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s2_le
++#define LS_GENERIC_N mips_generic_s2
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s4_le
++#define LS_GENERIC_N mips_generic_s4
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s8_le
++#define LS_GENERIC_N mips_generic_s8
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu2_be
++#define LS_GENERIC_N mips_generic_lu2
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l2_be
++#define LS_GENERIC_N mips_generic_l2
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu4_be
++#define LS_GENERIC_N mips_generic_lu4
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l4_be
++#define LS_GENERIC_N mips_generic_l4
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_lu8_be
++#define LS_GENERIC_N mips_generic_lu8
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_LOAD
++#define LS_N mips_instr_l8_be
++#define LS_GENERIC_N mips_generic_l8
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s2_be
++#define LS_GENERIC_N mips_generic_s2
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s4_be
++#define LS_GENERIC_N mips_generic_s4
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++#define LS_STORE
++#define LS_N mips_instr_s8_be
++#define LS_GENERIC_N mips_generic_s8
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu1_le
++#define LS_GENERIC_N mips32_generic_lu1
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l1_le
++#define LS_GENERIC_N mips32_generic_l1
++#define LS_1
++#define LS_SIZE 1
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu2_le
++#define LS_GENERIC_N mips32_generic_lu2
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l2_le
++#define LS_GENERIC_N mips32_generic_l2
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu4_le
++#define LS_GENERIC_N mips32_generic_lu4
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l4_le
++#define LS_GENERIC_N mips32_generic_l4
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu8_le
++#define LS_GENERIC_N mips32_generic_lu8
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l8_le
++#define LS_GENERIC_N mips32_generic_l8
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s1_le
++#define LS_GENERIC_N mips32_generic_s1
++#define LS_1
++#define LS_SIZE 1
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_1
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s2_le
++#define LS_GENERIC_N mips32_generic_s2
++#define LS_2
++#define LS_SIZE 2
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s4_le
++#define LS_GENERIC_N mips32_generic_s4
++#define LS_4
++#define LS_SIZE 4
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s8_le
++#define LS_GENERIC_N mips32_generic_s8
++#define LS_8
++#define LS_SIZE 8
++#define LS_LE
++#define LS_INCLUDE_GENERIC
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_INCLUDE_GENERIC
++#undef LS_LE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu2_be
++#define LS_GENERIC_N mips32_generic_lu2
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l2_be
++#define LS_GENERIC_N mips32_generic_l2
++#define LS_2
++#define LS_SIZE 2
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu4_be
++#define LS_GENERIC_N mips32_generic_lu4
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l4_be
++#define LS_GENERIC_N mips32_generic_l4
++#define LS_4
++#define LS_SIZE 4
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_lu8_be
++#define LS_GENERIC_N mips32_generic_lu8
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_LOAD
++#define LS_N mips32_instr_l8_be
++#define LS_GENERIC_N mips32_generic_l8
++#define LS_8
++#define LS_SIZE 8
++#define LS_SIGNED
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIGNED
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_LOAD
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s2_be
++#define LS_GENERIC_N mips32_generic_s2
++#define LS_2
++#define LS_SIZE 2
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_2
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s4_be
++#define LS_GENERIC_N mips32_generic_s4
++#define LS_4
++#define LS_SIZE 4
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_4
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifdef MODE32
++#define LS_STORE
++#define LS_N mips32_instr_s8_be
++#define LS_GENERIC_N mips32_generic_s8
++#define LS_8
++#define LS_SIZE 8
++#define LS_BE
++#include "cpu_mips_instr_loadstore.c"
++#undef LS_BE
++#undef LS_SIZE
++#undef LS_8
++#undef LS_GENERIC_N
++#undef LS_N
++#undef LS_STORE
++#endif
++#ifndef MODE32
++
++
++void (*mips_loadstore[32])(struct cpu *, struct mips_instr_call *) = {
++	mips_instr_lu1_le,
++	mips_instr_l1_le,
++	mips_instr_lu2_le,
++	mips_instr_l2_le,
++	mips_instr_lu4_le,
++	mips_instr_l4_le,
++	mips_instr_lu8_le,
++	mips_instr_l8_le,
++	mips_instr_s1_le,
++	mips_instr_invalid,
++	mips_instr_s2_le,
++	mips_instr_invalid,
++	mips_instr_s4_le,
++	mips_instr_invalid,
++	mips_instr_s8_le,
++	mips_instr_invalid,
++	mips_instr_lu1_le,
++	mips_instr_l1_le,
++	mips_instr_lu2_be,
++	mips_instr_l2_be,
++	mips_instr_lu4_be,
++	mips_instr_l4_be,
++	mips_instr_lu8_be,
++	mips_instr_l8_be,
++	mips_instr_s1_le,
++	mips_instr_invalid,
++	mips_instr_s2_be,
++	mips_instr_invalid,
++	mips_instr_s4_be,
++	mips_instr_invalid,
++	mips_instr_s8_be,
++	mips_instr_invalid };
++#endif
++#ifdef MODE32
++
++
++void (*mips32_loadstore[32])(struct cpu *, struct mips_instr_call *) = {
++	mips32_instr_lu1_le,
++	mips32_instr_l1_le,
++	mips32_instr_lu2_le,
++	mips32_instr_l2_le,
++	mips32_instr_lu4_le,
++	mips32_instr_l4_le,
++	mips32_instr_lu8_le,
++	mips32_instr_l8_le,
++	mips32_instr_s1_le,
++	mips32_instr_invalid,
++	mips32_instr_s2_le,
++	mips32_instr_invalid,
++	mips32_instr_s4_le,
++	mips32_instr_invalid,
++	mips32_instr_s8_le,
++	mips32_instr_invalid,
++	mips32_instr_lu1_le,
++	mips32_instr_l1_le,
++	mips32_instr_lu2_be,
++	mips32_instr_l2_be,
++	mips32_instr_lu4_be,
++	mips32_instr_l4_be,
++	mips32_instr_lu8_be,
++	mips32_instr_l8_be,
++	mips32_instr_s1_le,
++	mips32_instr_invalid,
++	mips32_instr_s2_be,
++	mips32_instr_invalid,
++	mips32_instr_s4_be,
++	mips32_instr_invalid,
++	mips32_instr_s8_be,
++	mips32_instr_invalid };
++#endif
++#ifndef MODE32
++
++
++void (*mips_loadstore_generic[16])(struct cpu *, struct mips_instr_call *) = {
++	mips_generic_lu1,
++	mips_generic_l1,
++	mips_generic_lu2,
++	mips_generic_l2,
++	mips_generic_lu4,
++	mips_generic_l4,
++	mips_generic_lu8,
++	mips_generic_l8,
++	mips_generic_s1,
++	mips_instr_invalid,
++	mips_generic_s2,
++	mips_instr_invalid,
++	mips_generic_s4,
++	mips_instr_invalid,
++	mips_generic_s8,
++	mips_instr_invalid };
++#endif
++#ifdef MODE32
++
++
++void (*mips32_loadstore_generic[16])(struct cpu *, struct mips_instr_call *) = {
++	mips32_generic_lu1,
++	mips32_generic_l1,
++	mips32_generic_lu2,
++	mips32_generic_l2,
++	mips32_generic_lu4,
++	mips32_generic_l4,
++	mips32_generic_lu8,
++	mips32_generic_l8,
++	mips32_generic_s1,
++	mips32_instr_invalid,
++	mips32_generic_s2,
++	mips32_instr_invalid,
++	mips32_generic_s4,
++	mips32_instr_invalid,
++	mips32_generic_s8,
++	mips32_instr_invalid };
++#endif
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore_multi.c gxemul-0.7.0/src/cpus/tmp_mips_loadstore_multi.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore_multi.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_mips_loadstore_multi.c	2022-10-18 16:37:22.105764600 +0000
+@@ -0,0 +1,1267 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#ifdef MODE32
++X(multi_lw_2_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#else
++X(multi_lw_2_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_3_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#else
++X(multi_lw_3_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_4_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#else
++X(multi_lw_4_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_5_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r4 = page[addr4];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	r4 = LE32_TO_HOST(r4);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#else
++X(multi_lw_5_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips_loadstore[5](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r4 = page[addr4];
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	r4 = LE32_TO_HOST(r4);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_2_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#else
++X(multi_sw_2_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_3_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#else
++X(multi_sw_3_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_4_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#else
++X(multi_sw_4_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_5_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r4 = reg(ic[4].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	r4 = LE32_TO_HOST(r4);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	page[addr4] = r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#else
++X(multi_sw_5_le)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips_loadstore[12](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r4 = reg(ic[4].arg[0]);
++	r0 = LE32_TO_HOST(r0);
++	r1 = LE32_TO_HOST(r1);
++	r2 = LE32_TO_HOST(r2);
++	r3 = LE32_TO_HOST(r3);
++	r4 = LE32_TO_HOST(r4);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	page[addr4] = r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_2_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#else
++X(multi_lw_2_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_3_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#else
++X(multi_lw_3_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_4_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#else
++X(multi_lw_4_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#endif
++
++#ifdef MODE32
++X(multi_lw_5_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_load[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r4 = page[addr4];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	r4 = BE32_TO_HOST(r4);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#else
++X(multi_lw_5_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_load[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips_loadstore[21](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = page[addr0];
++	r1 = page[addr1];
++	r2 = page[addr2];
++	r3 = page[addr3];
++	r4 = page[addr4];
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	r4 = BE32_TO_HOST(r4);
++	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
++	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
++	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
++	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
++	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_2_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#else
++X(multi_sw_2_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff)) {
++		mips_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	cpu->n_translated_instrs += 1;
++	cpu->cd.mips.next_ic += 1;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_3_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#else
++X(multi_sw_3_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
++		mips_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	cpu->n_translated_instrs += 2;
++	cpu->cd.mips.next_ic += 2;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_4_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#else
++X(multi_sw_4_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
++		mips_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	cpu->n_translated_instrs += 3;
++	cpu->cd.mips.next_ic += 3;
++}
++#endif
++
++#ifdef MODE32
++X(multi_sw_5_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	uint32_t index0 = addr0 >> 12;
++	page = (uint32_t *) cpu->cd.mips.host_store[index0];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips32_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r4 = reg(ic[4].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	r4 = BE32_TO_HOST(r4);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	page[addr4] = r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#else
++X(multi_sw_5_be)
++{
++	uint32_t *page;
++	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
++	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
++	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
++	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
++	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
++	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
++	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
++	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
++	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
++	uint32_t x1, x2, x3;
++	struct DYNTRANS_L2_64_TABLE *l2;
++	struct DYNTRANS_L3_64_TABLE *l3;
++	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
++	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
++	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
++	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
++	l3 = l2->l3[x2];
++	page = (uint32_t *) l3->host_store[x3];
++	if (cpu->delay_slot ||
++	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
++	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
++		mips_loadstore[28](cpu, ic);
++		return;
++	}
++	addr0 = (addr0 >> 2) & 0x3ff;
++	addr1 = (addr1 >> 2) & 0x3ff;
++	addr2 = (addr2 >> 2) & 0x3ff;
++	addr3 = (addr3 >> 2) & 0x3ff;
++	addr4 = (addr4 >> 2) & 0x3ff;
++	r0 = reg(ic[0].arg[0]);
++	r1 = reg(ic[1].arg[0]);
++	r2 = reg(ic[2].arg[0]);
++	r3 = reg(ic[3].arg[0]);
++	r4 = reg(ic[4].arg[0]);
++	r0 = BE32_TO_HOST(r0);
++	r1 = BE32_TO_HOST(r1);
++	r2 = BE32_TO_HOST(r2);
++	r3 = BE32_TO_HOST(r3);
++	r4 = BE32_TO_HOST(r4);
++	page[addr0] = r0;
++	page[addr1] = r1;
++	page[addr2] = r2;
++	page[addr3] = r3;
++	page[addr4] = r4;
++	cpu->n_translated_instrs += 4;
++	cpu->cd.mips.next_ic += 4;
++}
++#endif
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_tail.c gxemul-0.7.0/src/cpus/tmp_mips_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_mips_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_mips_tail.c	2022-10-18 16:37:22.106765500 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF mips_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES mips_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF mips_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC mips_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE mips_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE mips_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW mips_memory_rw
++#define MEM_MIPS
++#include "memory_rw.c"
++#undef MEM_MIPS
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC mips_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC mips_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS mips_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) mips_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_mips_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF mips_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS mips32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void mips32_instr_ ## n(struct cpu *cpu, \
++	struct mips_instr_call *ic)
++#define instr(n) mips32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY mips32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC mips32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE mips32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE mips32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC mips32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC mips32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS mips32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) mips32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_mips_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS mips_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 mips32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF mips32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(mips,"MIPS")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_ppc_head.c gxemul-0.7.0/src/cpus/tmp_ppc_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_ppc_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_ppc_head.c	2022-10-18 16:37:22.107766300 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES PPC_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH ppc
++#define DYNTRANS_PPC
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N PPC_L2N
++#define DYNTRANS_L3N PPC_L3N
++#if !defined(PPC_L2N) || !defined(PPC_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE ppc_l2_64_table
++#define DYNTRANS_L3_64_TABLE ppc_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC ppc_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE PPC_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT PPC_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE ppc_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY ppc_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR PPC_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY PPC_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE ppc_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE ppc_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS ppc_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC ppc_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS ppc_combine_instructions
++#define DISASSEMBLE ppc_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_ppc_instr.c */
++#define instr(n) ppc_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) ppc32_instr_ ## n
++
++#endif
++
++
++#define X(n) void ppc_instr_ ## n(struct cpu *cpu, \
++ struct ppc_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.ppc.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct ppc_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_ppc_loadstore.c gxemul-0.7.0/src/cpus/tmp_ppc_loadstore.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_ppc_loadstore.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_ppc_loadstore.c	2022-10-18 16:37:22.108767400 +0000
+@@ -0,0 +1,2063 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#ifndef MODE32
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_stb
++#define LS_N ppc_instr_stb
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_sth
++#define LS_N ppc_instr_sth
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_stw
++#define LS_N ppc_instr_stw
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_std
++#define LS_N ppc_instr_std
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lba
++#define LS_N ppc_instr_lba
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lha
++#define LS_N ppc_instr_lha
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lwa
++#define LS_N ppc_instr_lwa
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lbz
++#define LS_N ppc_instr_lbz
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lhz
++#define LS_N ppc_instr_lhz
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lwz
++#define LS_N ppc_instr_lwz
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_ldz
++#define LS_N ppc_instr_ld
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_stb
++#define LS_N ppc_instr_stb_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_sth
++#define LS_N ppc_instr_sth_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_stw
++#define LS_N ppc_instr_stw_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_std
++#define LS_N ppc_instr_std_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_lba
++#define LS_N ppc_instr_lba_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_lha
++#define LS_N ppc_instr_lha_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_lwa
++#define LS_N ppc_instr_lwa_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_lbz
++#define LS_N ppc_instr_lbz_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_lhz
++#define LS_N ppc_instr_lhz_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_lwz
++#define LS_N ppc_instr_lwz_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc_generic_ldz
++#define LS_N ppc_instr_ld_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stbu
++#define LS_N ppc_instr_stbu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_sthu
++#define LS_N ppc_instr_sthu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stwu
++#define LS_N ppc_instr_stwu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stdu
++#define LS_N ppc_instr_stdu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lbau
++#define LS_N ppc_instr_lbau
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lhau
++#define LS_N ppc_instr_lhau
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lwau
++#define LS_N ppc_instr_lwau
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lbzu
++#define LS_N ppc_instr_lbzu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lhzu
++#define LS_N ppc_instr_lhzu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lwzu
++#define LS_N ppc_instr_lwzu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_ldzu
++#define LS_N ppc_instr_ldu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stbu
++#define LS_N ppc_instr_stbu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_sthu
++#define LS_N ppc_instr_sthu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stwu
++#define LS_N ppc_instr_stwu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stdu
++#define LS_N ppc_instr_stdu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lbau
++#define LS_N ppc_instr_lbau_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lhau
++#define LS_N ppc_instr_lhau_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lwau
++#define LS_N ppc_instr_lwau_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lbzu
++#define LS_N ppc_instr_lbzu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lhzu
++#define LS_N ppc_instr_lhzu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lwzu
++#define LS_N ppc_instr_lwzu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_ldzu
++#define LS_N ppc_instr_ldu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_INDEXED
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_stbx
++#define LS_N ppc_instr_stbx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_sthx
++#define LS_N ppc_instr_sthx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_stwx
++#define LS_N ppc_instr_stwx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_GENERIC_N ppc_generic_stdx
++#define LS_N ppc_instr_stdx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lbax
++#define LS_N ppc_instr_lbax
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lhax
++#define LS_N ppc_instr_lhax
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lwax
++#define LS_N ppc_instr_lwax
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lbzx
++#define LS_N ppc_instr_lbzx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lhzx
++#define LS_N ppc_instr_lhzx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_lwzx
++#define LS_N ppc_instr_lwzx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc_generic_ldzx
++#define LS_N ppc_instr_ldx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stbux
++#define LS_N ppc_instr_stbux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_sthux
++#define LS_N ppc_instr_sthux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stwux
++#define LS_N ppc_instr_stwux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_stdux
++#define LS_N ppc_instr_stdux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lbaux
++#define LS_N ppc_instr_lbaux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lhaux
++#define LS_N ppc_instr_lhaux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lwaux
++#define LS_N ppc_instr_lwaux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lbzux
++#define LS_N ppc_instr_lbzux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lhzux
++#define LS_N ppc_instr_lhzux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_lwzux
++#define LS_N ppc_instr_lwzux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc_generic_ldzux
++#define LS_N ppc_instr_ldux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_INDEXED
++
++
++void (*ppc_loadstore[64])(struct cpu *, struct ppc_instr_call *) = {
++	ppc_instr_stb,
++	ppc_instr_sth,
++	ppc_instr_stw,
++	ppc_instr_std,
++	ppc_instr_stb,
++	ppc_instr_sth,
++	ppc_instr_stw,
++	ppc_instr_std,
++	ppc_instr_lba,
++	ppc_instr_lha,
++	ppc_instr_lwa,
++	ppc_instr_invalid,
++	ppc_instr_lbz,
++	ppc_instr_lhz,
++	ppc_instr_lwz,
++	ppc_instr_ld,
++	ppc_instr_stb_0,
++	ppc_instr_sth_0,
++	ppc_instr_stw_0,
++	ppc_instr_std_0,
++	ppc_instr_stb_0,
++	ppc_instr_sth_0,
++	ppc_instr_stw_0,
++	ppc_instr_std_0,
++	ppc_instr_lba_0,
++	ppc_instr_lha_0,
++	ppc_instr_lwa_0,
++	ppc_instr_invalid,
++	ppc_instr_lbz_0,
++	ppc_instr_lhz_0,
++	ppc_instr_lwz_0,
++	ppc_instr_ld_0,
++	ppc_instr_stbu,
++	ppc_instr_sthu,
++	ppc_instr_stwu,
++	ppc_instr_stdu,
++	ppc_instr_stbu,
++	ppc_instr_sthu,
++	ppc_instr_stwu,
++	ppc_instr_stdu,
++	ppc_instr_lbau,
++	ppc_instr_lhau,
++	ppc_instr_lwau,
++	ppc_instr_invalid,
++	ppc_instr_lbzu,
++	ppc_instr_lhzu,
++	ppc_instr_lwzu,
++	ppc_instr_ldu,
++	ppc_instr_stbu_0,
++	ppc_instr_sthu_0,
++	ppc_instr_stwu_0,
++	ppc_instr_stdu_0,
++	ppc_instr_stbu_0,
++	ppc_instr_sthu_0,
++	ppc_instr_stwu_0,
++	ppc_instr_stdu_0,
++	ppc_instr_lbau_0,
++	ppc_instr_lhau_0,
++	ppc_instr_lwau_0,
++	ppc_instr_invalid,
++	ppc_instr_lbzu_0,
++	ppc_instr_lhzu_0,
++	ppc_instr_lwzu_0,
++	ppc_instr_ldu_0
++};
++
++
++
++void (*ppc_loadstore_indexed[32])(struct cpu *, struct ppc_instr_call *) = {
++	ppc_instr_stbx,
++	ppc_instr_sthx,
++	ppc_instr_stwx,
++	ppc_instr_stdx,
++	ppc_instr_stbx,
++	ppc_instr_sthx,
++	ppc_instr_stwx,
++	ppc_instr_stdx,
++	ppc_instr_lbax,
++	ppc_instr_lhax,
++	ppc_instr_lwax,
++	ppc_instr_invalid,
++	ppc_instr_lbzx,
++	ppc_instr_lhzx,
++	ppc_instr_lwzx,
++	ppc_instr_ldx,
++	ppc_instr_stbux,
++	ppc_instr_sthux,
++	ppc_instr_stwux,
++	ppc_instr_stdux,
++	ppc_instr_stbux,
++	ppc_instr_sthux,
++	ppc_instr_stwux,
++	ppc_instr_stdux,
++	ppc_instr_lbaux,
++	ppc_instr_lhaux,
++	ppc_instr_lwaux,
++	ppc_instr_invalid,
++	ppc_instr_lbzux,
++	ppc_instr_lhzux,
++	ppc_instr_lwzux,
++	ppc_instr_ldux
++};
++
++#define LS_BYTEREVERSE
++#define LS_INDEXED
++#define LS_SIZE 2
++#define LS_H
++#define LS_GENERIC_N ppc_generic_lhbrx
++#define LS_N ppc_instr_lhbrx
++#define LS_LOAD
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_LOAD
++#undef LS_N
++#undef LS_GENERIC_N
++#define LS_GENERIC_N ppc_generic_sthbrx
++#define LS_N ppc_instr_sthbrx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#define LS_SIZE 4
++#define LS_W
++#define LS_GENERIC_N ppc_generic_lwbrx
++#define LS_N ppc_instr_lwbrx
++#define LS_LOAD
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_LOAD
++#undef LS_N
++#undef LS_GENERIC_N
++#define LS_GENERIC_N ppc_generic_stwbrx
++#define LS_N ppc_instr_stwbrx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_INDEXED
++#undef LS_BYTEREVERSE
++#endif
++#ifdef MODE32
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_stb
++#define LS_N ppc32_instr_stb
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_sth
++#define LS_N ppc32_instr_sth
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_stw
++#define LS_N ppc32_instr_stw
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_std
++#define LS_N ppc32_instr_std
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lba
++#define LS_N ppc32_instr_lba
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lha
++#define LS_N ppc32_instr_lha
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lwa
++#define LS_N ppc32_instr_lwa
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lbz
++#define LS_N ppc32_instr_lbz
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lhz
++#define LS_N ppc32_instr_lhz
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lwz
++#define LS_N ppc32_instr_lwz
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_ldz
++#define LS_N ppc32_instr_ld
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_stb
++#define LS_N ppc32_instr_stb_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_sth
++#define LS_N ppc32_instr_sth_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_stw
++#define LS_N ppc32_instr_stw_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_std
++#define LS_N ppc32_instr_std_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_lba
++#define LS_N ppc32_instr_lba_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_lha
++#define LS_N ppc32_instr_lha_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_lwa
++#define LS_N ppc32_instr_lwa_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_lbz
++#define LS_N ppc32_instr_lbz_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_lhz
++#define LS_N ppc32_instr_lhz_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_lwz
++#define LS_N ppc32_instr_lwz_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_GENERIC_N ppc32_generic_ldz
++#define LS_N ppc32_instr_ld_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stbu
++#define LS_N ppc32_instr_stbu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_sthu
++#define LS_N ppc32_instr_sthu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stwu
++#define LS_N ppc32_instr_stwu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stdu
++#define LS_N ppc32_instr_stdu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lbau
++#define LS_N ppc32_instr_lbau
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lhau
++#define LS_N ppc32_instr_lhau
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lwau
++#define LS_N ppc32_instr_lwau
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lbzu
++#define LS_N ppc32_instr_lbzu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lhzu
++#define LS_N ppc32_instr_lhzu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lwzu
++#define LS_N ppc32_instr_lwzu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_ldzu
++#define LS_N ppc32_instr_ldu
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stbu
++#define LS_N ppc32_instr_stbu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_sthu
++#define LS_N ppc32_instr_sthu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stwu
++#define LS_N ppc32_instr_stwu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stdu
++#define LS_N ppc32_instr_stdu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lbau
++#define LS_N ppc32_instr_lbau_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lhau
++#define LS_N ppc32_instr_lhau_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lwau
++#define LS_N ppc32_instr_lwau_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_IGNOREOFS
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lbzu
++#define LS_N ppc32_instr_lbzu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lhzu
++#define LS_N ppc32_instr_lhzu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lwzu
++#define LS_N ppc32_instr_lwzu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_IGNOREOFS
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_ldzu
++#define LS_N ppc32_instr_ldu_0
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_IGNOREOFS
++#define LS_INDEXED
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_stbx
++#define LS_N ppc32_instr_stbx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_sthx
++#define LS_N ppc32_instr_sthx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_stwx
++#define LS_N ppc32_instr_stwx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_GENERIC_N ppc32_generic_stdx
++#define LS_N ppc32_instr_stdx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lbax
++#define LS_N ppc32_instr_lbax
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lhax
++#define LS_N ppc32_instr_lhax
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lwax
++#define LS_N ppc32_instr_lwax
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lbzx
++#define LS_N ppc32_instr_lbzx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lhzx
++#define LS_N ppc32_instr_lhzx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_lwzx
++#define LS_N ppc32_instr_lwzx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_GENERIC_N ppc32_generic_ldzx
++#define LS_N ppc32_instr_ldx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stbux
++#define LS_N ppc32_instr_stbux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_sthux
++#define LS_N ppc32_instr_sthux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stwux
++#define LS_N ppc32_instr_stwux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_stdux
++#define LS_N ppc32_instr_stdux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_B
++#define LS_SIZE 1
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lbaux
++#define LS_N ppc32_instr_lbaux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_H
++#define LS_SIZE 2
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lhaux
++#define LS_N ppc32_instr_lhaux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_W
++#define LS_SIZE 4
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lwaux
++#define LS_N ppc32_instr_lwaux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#define LS_B
++#define LS_SIZE 1
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lbzux
++#define LS_N ppc32_instr_lbzux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_B
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_H
++#define LS_SIZE 2
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lhzux
++#define LS_N ppc32_instr_lhzux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_W
++#define LS_SIZE 4
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_lwzux
++#define LS_N ppc32_instr_lwzux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#define LS_D
++#define LS_SIZE 8
++#define LS_ZERO
++#define LS_LOAD
++#define LS_UPDATE
++#define LS_GENERIC_N ppc32_generic_ldzux
++#define LS_N ppc32_instr_ldux
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_D
++#undef LS_SIZE
++#undef LS_LOAD
++#undef LS_UPDATE
++#undef LS_ZERO
++#undef LS_INDEXED
++
++
++void (*ppc32_loadstore[64])(struct cpu *, struct ppc_instr_call *) = {
++	ppc32_instr_stb,
++	ppc32_instr_sth,
++	ppc32_instr_stw,
++	ppc32_instr_std,
++	ppc32_instr_stb,
++	ppc32_instr_sth,
++	ppc32_instr_stw,
++	ppc32_instr_std,
++	ppc32_instr_lba,
++	ppc32_instr_lha,
++	ppc32_instr_lwa,
++	ppc32_instr_invalid,
++	ppc32_instr_lbz,
++	ppc32_instr_lhz,
++	ppc32_instr_lwz,
++	ppc32_instr_ld,
++	ppc32_instr_stb_0,
++	ppc32_instr_sth_0,
++	ppc32_instr_stw_0,
++	ppc32_instr_std_0,
++	ppc32_instr_stb_0,
++	ppc32_instr_sth_0,
++	ppc32_instr_stw_0,
++	ppc32_instr_std_0,
++	ppc32_instr_lba_0,
++	ppc32_instr_lha_0,
++	ppc32_instr_lwa_0,
++	ppc32_instr_invalid,
++	ppc32_instr_lbz_0,
++	ppc32_instr_lhz_0,
++	ppc32_instr_lwz_0,
++	ppc32_instr_ld_0,
++	ppc32_instr_stbu,
++	ppc32_instr_sthu,
++	ppc32_instr_stwu,
++	ppc32_instr_stdu,
++	ppc32_instr_stbu,
++	ppc32_instr_sthu,
++	ppc32_instr_stwu,
++	ppc32_instr_stdu,
++	ppc32_instr_lbau,
++	ppc32_instr_lhau,
++	ppc32_instr_lwau,
++	ppc32_instr_invalid,
++	ppc32_instr_lbzu,
++	ppc32_instr_lhzu,
++	ppc32_instr_lwzu,
++	ppc32_instr_ldu,
++	ppc32_instr_stbu_0,
++	ppc32_instr_sthu_0,
++	ppc32_instr_stwu_0,
++	ppc32_instr_stdu_0,
++	ppc32_instr_stbu_0,
++	ppc32_instr_sthu_0,
++	ppc32_instr_stwu_0,
++	ppc32_instr_stdu_0,
++	ppc32_instr_lbau_0,
++	ppc32_instr_lhau_0,
++	ppc32_instr_lwau_0,
++	ppc32_instr_invalid,
++	ppc32_instr_lbzu_0,
++	ppc32_instr_lhzu_0,
++	ppc32_instr_lwzu_0,
++	ppc32_instr_ldu_0
++};
++
++
++
++void (*ppc32_loadstore_indexed[32])(struct cpu *, struct ppc_instr_call *) = {
++	ppc32_instr_stbx,
++	ppc32_instr_sthx,
++	ppc32_instr_stwx,
++	ppc32_instr_stdx,
++	ppc32_instr_stbx,
++	ppc32_instr_sthx,
++	ppc32_instr_stwx,
++	ppc32_instr_stdx,
++	ppc32_instr_lbax,
++	ppc32_instr_lhax,
++	ppc32_instr_lwax,
++	ppc32_instr_invalid,
++	ppc32_instr_lbzx,
++	ppc32_instr_lhzx,
++	ppc32_instr_lwzx,
++	ppc32_instr_ldx,
++	ppc32_instr_stbux,
++	ppc32_instr_sthux,
++	ppc32_instr_stwux,
++	ppc32_instr_stdux,
++	ppc32_instr_stbux,
++	ppc32_instr_sthux,
++	ppc32_instr_stwux,
++	ppc32_instr_stdux,
++	ppc32_instr_lbaux,
++	ppc32_instr_lhaux,
++	ppc32_instr_lwaux,
++	ppc32_instr_invalid,
++	ppc32_instr_lbzux,
++	ppc32_instr_lhzux,
++	ppc32_instr_lwzux,
++	ppc32_instr_ldux
++};
++
++#define LS_BYTEREVERSE
++#define LS_INDEXED
++#define LS_SIZE 2
++#define LS_H
++#define LS_GENERIC_N ppc32_generic_lhbrx
++#define LS_N ppc32_instr_lhbrx
++#define LS_LOAD
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_LOAD
++#undef LS_N
++#undef LS_GENERIC_N
++#define LS_GENERIC_N ppc32_generic_sthbrx
++#define LS_N ppc32_instr_sthbrx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_H
++#undef LS_SIZE
++#define LS_SIZE 4
++#define LS_W
++#define LS_GENERIC_N ppc32_generic_lwbrx
++#define LS_N ppc32_instr_lwbrx
++#define LS_LOAD
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_LOAD
++#undef LS_N
++#undef LS_GENERIC_N
++#define LS_GENERIC_N ppc32_generic_stwbrx
++#define LS_N ppc32_instr_stwbrx
++#include "cpu_ppc_instr_loadstore.c"
++#undef LS_N
++#undef LS_GENERIC_N
++#undef LS_W
++#undef LS_SIZE
++#undef LS_INDEXED
++#undef LS_BYTEREVERSE
++#endif
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_ppc_tail.c gxemul-0.7.0/src/cpus/tmp_ppc_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_ppc_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_ppc_tail.c	2022-10-18 16:37:22.108767400 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF ppc_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES ppc_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF ppc_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC ppc_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE ppc_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE ppc_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW ppc_memory_rw
++#define MEM_PPC
++#include "memory_rw.c"
++#undef MEM_PPC
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC ppc_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC ppc_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS ppc_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) ppc_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_ppc_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF ppc_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS ppc32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void ppc32_instr_ ## n(struct cpu *cpu, \
++	struct ppc_instr_call *ic)
++#define instr(n) ppc32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY ppc32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC ppc32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE ppc32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE ppc32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC ppc32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC ppc32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS ppc32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) ppc32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_ppc_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS ppc_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 ppc32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF ppc32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(ppc,"PPC")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_riscv_head.c gxemul-0.7.0/src/cpus/tmp_riscv_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_riscv_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_riscv_head.c	2022-10-18 16:37:22.109768200 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES RISCV_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH riscv
++#define DYNTRANS_RISCV
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N RISCV_L2N
++#define DYNTRANS_L3N RISCV_L3N
++#if !defined(RISCV_L2N) || !defined(RISCV_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE riscv_l2_64_table
++#define DYNTRANS_L3_64_TABLE riscv_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC riscv_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE RISCV_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT RISCV_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE riscv_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY riscv_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR RISCV_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY RISCV_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE riscv_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE riscv_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS riscv_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC riscv_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS riscv_combine_instructions
++#define DISASSEMBLE riscv_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_riscv_instr.c */
++#define instr(n) riscv_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) riscv32_instr_ ## n
++
++#endif
++
++
++#define X(n) void riscv_instr_ ## n(struct cpu *cpu, \
++ struct riscv_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.riscv.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct riscv_instr_call nothing_call = { instr(nothing), {0,0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_riscv_tail.c gxemul-0.7.0/src/cpus/tmp_riscv_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_riscv_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_riscv_tail.c	2022-10-18 16:37:22.110770500 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF riscv_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES riscv_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF riscv_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC riscv_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE riscv_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE riscv_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW riscv_memory_rw
++#define MEM_RISCV
++#include "memory_rw.c"
++#undef MEM_RISCV
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC riscv_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC riscv_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS riscv_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) riscv_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_riscv_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF riscv_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS riscv32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void riscv32_instr_ ## n(struct cpu *cpu, \
++	struct riscv_instr_call *ic)
++#define instr(n) riscv32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY riscv32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC riscv32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE riscv32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE riscv32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC riscv32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC riscv32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS riscv32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) riscv32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_riscv_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS riscv_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 riscv32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF riscv32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(riscv,"RISCV")
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_sh_head.c gxemul-0.7.0/src/cpus/tmp_sh_head.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_sh_head.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_sh_head.c	2022-10-18 16:37:22.110770500 +0000
+@@ -0,0 +1,67 @@
++
++/*  AUTOMATICALLY GENERATED! Do not edit.  */
++
++#include <assert.h>
++#include "debugger.h"
++#define DYNTRANS_MAX_VPH_TLB_ENTRIES SH_MAX_VPH_TLB_ENTRIES
++#define DYNTRANS_ARCH sh
++#define DYNTRANS_SH
++#ifndef DYNTRANS_32
++#define DYNTRANS_L2N SH_L2N
++#define DYNTRANS_L3N SH_L3N
++#if !defined(SH_L2N) || !defined(SH_L3N)
++#error arch_L2N, and arch_L3N must be defined for this arch!
++#endif
++#define DYNTRANS_L2_64_TABLE sh_l2_64_table
++#define DYNTRANS_L3_64_TABLE sh_l3_64_table
++#endif
++#ifndef DYNTRANS_PAGESIZE
++#define DYNTRANS_PAGESIZE 4096
++#endif
++#define DYNTRANS_IC sh_instr_call
++#define DYNTRANS_IC_ENTRIES_PER_PAGE SH_IC_ENTRIES_PER_PAGE
++#define DYNTRANS_INSTR_ALIGNMENT_SHIFT SH_INSTR_ALIGNMENT_SHIFT
++#define DYNTRANS_TC_PHYSPAGE sh_tc_physpage
++#define DYNTRANS_INVALIDATE_TLB_ENTRY sh_invalidate_tlb_entry
++#define DYNTRANS_ADDR_TO_PAGENR SH_ADDR_TO_PAGENR
++#define DYNTRANS_PC_TO_IC_ENTRY SH_PC_TO_IC_ENTRY
++#define DYNTRANS_TC_ALLOCATE sh_tc_allocate_default_page
++#define DYNTRANS_TC_PHYSPAGE sh_tc_physpage
++#define DYNTRANS_PC_TO_POINTERS sh_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC sh_pc_to_pointers_generic
++#define COMBINE_INSTRUCTIONS sh_combine_instructions
++#define DISASSEMBLE sh_cpu_disassemble_instr
++
++extern bool single_step;
++extern bool about_to_enter_single_step;
++extern int single_step_breakpoint;
++extern int old_quiet_mode;
++extern int quiet_mode;
++
++/* instr uses the same names as in cpu_sh_instr.c */
++#define instr(n) sh_instr_ ## n
++
++#ifdef DYNTRANS_DUALMODE_32
++#define instr32(n) sh32_instr_ ## n
++
++#endif
++
++
++#define X(n) void sh_instr_ ## n(struct cpu *cpu, \
++ struct sh_instr_call *ic)
++
++/*
++ *  nothing:  Do nothing.
++ *
++ *  The difference between this function and a "nop" instruction is that
++ *  this function does not increase the program counter.  It is used to "get out" of running in translated
++ *  mode.
++ */
++X(nothing)
++{
++	cpu->cd.sh.next_ic --;
++	cpu->ninstrs --;
++}
++
++static struct sh_instr_call nothing_call = { instr(nothing), {0,0} };
++
+diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_sh_tail.c gxemul-0.7.0/src/cpus/tmp_sh_tail.c
+--- gxemul-0.7.0.orig/src/cpus/tmp_sh_tail.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/cpus/tmp_sh_tail.c	2022-10-18 16:37:22.111770200 +0000
+@@ -0,0 +1,132 @@
++
++/*
++ *  AUTOMATICALLY GENERATED! Do not edit.
++ */
++
++extern size_t dyntrans_cache_size;
++#ifdef DYNTRANS_32
++#define MODE32
++#endif
++#define DYNTRANS_FUNCTION_TRACE_DEF sh_cpu_functioncall_trace
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_FUNCTION_TRACE_DEF
++
++#define DYNTRANS_INIT_TABLES sh_cpu_init_tables
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INIT_TABLES
++
++#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF sh_tc_allocate_default_page
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
++
++#define DYNTRANS_INVAL_ENTRY
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC sh_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE sh_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE sh_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define MEMORY_RW sh_memory_rw
++#define MEM_SH
++#include "memory_rw.c"
++#undef MEM_SH
++#undef MEMORY_RW
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC sh_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC sh_pc_to_pointers_generic
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#define COMBINE_INSTRUCTIONS sh_combine_instructions
++#ifndef DYNTRANS_32
++#define reg(x) (*((uint64_t *)(x)))
++#define MODE_uint_t uint64_t
++#define MODE_int_t int64_t
++#else
++#define reg(x) (*((uint32_t *)(x)))
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#endif
++#define COMBINE(n) sh_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_sh_instr.c"
++
++#define DYNTRANS_RUN_INSTR_DEF sh_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#ifdef DYNTRANS_DUALMODE_32
++#undef COMBINE_INSTRUCTIONS
++#define COMBINE_INSTRUCTIONS sh32_combine_instructions
++#undef X
++#undef instr
++#undef reg
++#define X(n) void sh32_instr_ ## n(struct cpu *cpu, \
++	struct sh_instr_call *ic)
++#define instr(n) sh32_instr_ ## n
++#ifdef HOST_LITTLE_ENDIAN
++#define reg(x) ( *((uint32_t *)(x)) )
++#else
++#define reg(x) ( *((uint32_t *)(x)+1) )
++#endif
++#define MODE32
++#undef MODE_uint_t
++#undef MODE_int_t
++#define MODE_uint_t uint32_t
++#define MODE_int_t int32_t
++#define DYNTRANS_INVAL_ENTRY
++#undef DYNTRANS_INVALIDATE_TLB_ENTRY
++#define DYNTRANS_INVALIDATE_TLB_ENTRY sh32_invalidate_tlb_entry
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVAL_ENTRY
++
++#define DYNTRANS_INVALIDATE_TC sh32_invalidate_translation_caches
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC
++
++#define DYNTRANS_INVALIDATE_TC_CODE sh32_invalidate_code_translation
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_INVALIDATE_TC_CODE
++
++#define DYNTRANS_UPDATE_TRANSLATION_TABLE sh32_update_translation_table
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
++
++#define DYNTRANS_PC_TO_POINTERS_FUNC sh32_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS_GENERIC sh32_pc_to_pointers_generic
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS sh32_pc_to_pointers
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_PC_TO_POINTERS_FUNC
++
++#undef DYNTRANS_PC_TO_POINTERS_GENERIC
++
++#undef COMBINE
++#define COMBINE(n) sh32_combine_ ## n
++#include "quick_pc_to_pointers.h"
++#include "cpu_sh_instr.c"
++
++#undef DYNTRANS_PC_TO_POINTERS
++#define DYNTRANS_PC_TO_POINTERS sh_pc_to_pointers
++#define DYNTRANS_PC_TO_POINTERS32 sh32_pc_to_pointers
++
++#define DYNTRANS_RUN_INSTR_DEF sh32_run_instr
++#include "cpu_dyntrans.c"
++#undef DYNTRANS_RUN_INSTR_DEF
++
++#endif /*  DYNTRANS_DUALMODE_32  */
++
++
++CPU_FAMILY_INIT(sh,"SH")
++
diff --git a/patches/gxemul/generated2.patch b/patches/gxemul/generated2.patch
new file mode 100644
index 00000000..0f6cd92c
--- /dev/null
+++ b/patches/gxemul/generated2.patch
@@ -0,0 +1,267 @@
+diff -Nru -x '*.c' gxemul-0.7.0.orig/src/include/ppc_spr_strings.h gxemul-0.7.0/src/include/ppc_spr_strings.h
+--- gxemul-0.7.0.orig/src/include/ppc_spr_strings.h	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/include/ppc_spr_strings.h	2022-10-18 17:02:38.378538100 +0000
+@@ -0,0 +1,263 @@
++/*
++ *  AUTOMATICALLY GENERATED from ppc_spr.h! Do not edit.
++ */
++
++static const char *ppc_spr_names[1024] = {
++ "mq", "xer", "(unknown)", "(unknown)",
++ "rtcu_r", "rtcl_r", "(unknown)", "(unknown)",
++ "lr", "ctr", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "dsisr", "dar",
++ "rtcu_w", "rtcl_w", "dec", "(unknown)",
++ "(unknown)", "sdr1", "srr0", "srr1",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "eie", "eid", "nri", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "vrsave", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "sprg0", "sprg1", "sprg2", "sprg3",
++ "sprg4", "sprg5", "sprg6", "sprg7",
++ "asr", "(unknown)", "ear", "(unknown)",
++ "tbl", "tbu", "(unknown)", "pvr",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "hsprg0", "hsprg1", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "hdec", "hior",
++ "rmor", "hrmor", "hsrr0", "hsrr1",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "ibat0u", "ibat0l", "ibat1u", "ibat1l",
++ "ibat2u", "ibat2l", "ibat3u", "ibat3l",
++ "dbat0u", "dbat0l", "dbat1u", "dbat1l",
++ "dbat2u", "dbat2l", "dbat3u", "dbat3l",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "ibat4u", "dc_adr", "dc_dat", "ibat5l",
++ "ibat6u", "ibat6l", "ibat7u", "ibat7l",
++ "dbat4u", "dbat4l", "dbat5u", "dbat5l",
++ "dbat6u", "dbat6l", "dbat7u", "dbat7l",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "mi_ctr", "(unknown)", "mi_ap", "mi_epn",
++ "(unknown)", "mi_twc", "mi_rpn", "(unknown)",
++ "md_ctr", "m_casid", "md_ap", "md_epn",
++ "m_twb", "md_twc", "md_rpn", "md_tw",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "mi_cam", "mi_ram0", "mi_ram1", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "md_cam", "md_ram0", "md_ram1", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "ummcr2", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "ummcr0", "(unknown)", "(unknown)", "usia",
++ "ummcr1", "(unknown)", "(unknown)", "(unknown)",
++ "mmcr2", "pmc5", "pmc6", "ccr0",
++ "iac3", "iac4", "dvc1", "dvc2",
++ "mmcr0", "pmc1", "pmc2", "sia",
++ "su0r", "pmc3", "pmc4", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "dmiss", "dcmp", "hash1", "hash2",
++ "tlbmiss", "ptehi", "ptelo", "(unknown)",
++ "tsr", "(unknown)", "tcr", "pit",
++ "(unknown)", "(unknown)", "srr2", "srr3",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "(unknown)", "(unknown)", "(unknown)", "(unknown)",
++ "hid0", "hid1", "iabr", "hid2",
++ "iac1", "dabr", "msscr0", "dac2",
++ "l2pm", "l2cr", "dccr", "iccr",
++ "thrm1", "thrm2", "fpecr", "pir"
++};
++
diff --git a/patches/gxemul/generated3.patch b/patches/gxemul/generated3.patch
new file mode 100644
index 00000000..d9214fba
--- /dev/null
+++ b/patches/gxemul/generated3.patch
@@ -0,0 +1,889 @@
+diff -Nru gxemul-0.7.0.orig/src/devices/fonts/font8x10.c gxemul-0.7.0/src/devices/fonts/font8x10.c
+--- gxemul-0.7.0.orig/src/devices/fonts/font8x10.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/devices/fonts/font8x10.c	2022-10-18 18:07:23.530031700 +0000
+@@ -0,0 +1,258 @@
++unsigned char font8x10[] = {
++	0,0,0,0,0,0,0,0,0,0,
++	126,129,165,165,129,129,189,153,129,126,
++	126,255,219,219,255,255,195,231,255,126,
++	108,254,254,124,124,56,56,16,16,0,
++	0,0,16,56,124,254,124,56,16,0,
++	56,124,124,56,124,254,254,124,56,124,
++	16,16,56,56,124,254,254,124,56,124,
++	0,0,0,24,60,60,24,0,0,0,
++	255,255,255,231,195,195,231,255,255,255,
++	0,0,60,102,66,66,102,60,0,0,
++	255,255,195,153,189,189,153,195,255,255,
++	0,15,7,15,125,204,204,204,120,0,
++	0,60,102,102,102,60,24,126,24,0,
++	63,51,63,48,48,48,112,240,224,0,
++	127,99,127,99,99,99,103,230,192,0,
++	0,219,126,60,231,231,60,126,219,0,
++	0,0,128,224,248,254,248,224,128,0,
++	0,0,2,14,62,254,62,14,2,0,
++	24,24,60,126,24,24,126,60,24,24,
++	102,102,102,102,102,102,0,102,102,0,
++	127,219,219,219,123,27,27,27,27,0,
++	60,102,48,108,198,108,24,204,120,0,
++	0,0,0,0,0,126,126,126,126,0,
++	24,24,60,126,24,24,126,60,24,255,
++	24,24,60,60,126,24,24,24,24,24,
++	24,24,24,24,24,126,60,60,24,24,
++	0,0,0,0,24,12,254,12,24,0,
++	0,0,0,0,48,96,254,96,48,0,
++	0,0,0,0,192,192,192,192,254,0,
++	0,0,0,0,36,102,255,102,36,0,
++	0,24,24,60,60,126,126,255,255,0,
++	0,255,255,126,126,60,60,24,24,0,
++	0,0,0,0,0,0,0,0,0,0,
++	48,120,120,120,48,48,0,48,48,0,
++	108,108,108,40,0,0,0,0,0,0,
++	108,108,254,108,108,108,254,108,108,0,
++	24,126,216,216,124,54,54,252,48,0,
++	198,204,12,24,56,48,96,102,198,0,
++	56,108,108,56,48,118,220,204,118,0,
++	224,224,96,96,192,0,0,0,0,0,
++	12,24,48,48,48,48,48,24,12,0,
++	96,48,24,24,24,24,24,48,96,0,
++	0,0,198,108,56,254,56,108,198,0,
++	0,0,0,48,48,252,48,48,0,0,
++	0,0,0,0,112,112,48,48,96,0,
++	0,0,0,0,0,254,0,0,0,0,
++	0,0,0,0,0,0,0,48,48,0,
++	0,12,12,24,24,48,48,96,96,0,
++	124,198,206,222,214,246,230,198,124,0,
++	48,112,48,48,48,48,48,48,252,0,
++	124,198,198,6,12,56,96,198,254,0,
++	124,198,198,6,60,6,198,198,124,0,
++	12,12,28,60,108,204,254,12,30,0,
++	254,192,192,252,6,6,6,198,124,0,
++	28,48,96,192,252,198,198,198,124,0,
++	254,198,6,12,12,24,24,24,24,0,
++	124,198,198,198,124,198,198,198,124,0,
++	124,198,198,198,126,6,12,24,112,0,
++	0,0,0,48,48,0,0,48,48,0,
++	0,0,48,48,0,0,48,48,96,0,
++	0,0,24,48,96,192,96,48,24,0,
++	0,0,0,0,252,0,0,252,0,0,
++	0,0,96,48,24,12,24,48,96,0,
++	124,198,198,6,12,24,24,0,24,0,
++	124,198,206,218,214,222,192,198,124,0,
++	56,124,198,198,198,254,198,198,198,0,
++	252,102,102,102,124,102,102,102,252,0,
++	60,102,192,192,192,192,192,102,60,0,
++	248,108,102,102,102,102,102,108,248,0,
++	254,98,96,104,120,104,96,98,254,0,
++	254,98,96,104,120,104,96,96,240,0,
++	60,102,192,192,192,206,198,102,60,0,
++	198,198,198,198,254,198,198,198,198,0,
++	60,24,24,24,24,24,24,24,60,0,
++	30,12,12,12,12,12,204,204,120,0,
++	230,102,108,108,120,108,108,102,230,0,
++	240,96,96,96,96,96,98,102,254,0,
++	198,238,254,254,214,198,198,198,198,0,
++	198,230,230,246,222,206,206,198,198,0,
++	56,108,198,198,198,198,198,108,56,0,
++	252,102,102,102,124,96,96,96,240,0,
++	124,198,198,198,198,198,206,124,14,0,
++	252,102,102,102,120,108,108,102,230,0,
++	124,198,192,96,56,12,6,198,124,0,
++	126,90,24,24,24,24,24,24,60,0,
++	198,198,198,198,198,198,198,198,124,0,
++	102,102,102,102,102,102,102,60,24,0,
++	198,198,198,198,198,214,254,238,198,0,
++	198,198,108,56,16,56,108,198,198,0,
++	204,204,204,204,120,48,48,48,120,0,
++	254,198,140,24,48,96,194,198,254,0,
++	30,24,24,24,24,24,24,24,30,0,
++	0,96,96,48,48,24,24,12,12,0,
++	240,48,48,48,48,48,48,48,240,0,
++	16,56,108,198,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,255,
++	48,48,24,0,0,0,0,0,0,0,
++	0,0,0,120,12,124,204,204,118,0,
++	224,96,96,124,102,102,102,102,220,0,
++	0,0,0,124,198,192,192,198,124,0,
++	28,12,12,124,204,204,204,204,118,0,
++	0,0,0,124,198,254,192,192,124,0,
++	56,108,96,240,96,96,96,96,240,0,
++	0,0,0,118,204,204,124,12,204,120,
++	224,96,96,108,118,102,102,102,230,0,
++	48,48,0,112,48,48,48,48,120,0,
++	12,12,0,12,12,12,12,204,204,120,
++	224,96,96,102,108,120,120,108,230,0,
++	112,48,48,48,48,48,48,48,120,0,
++	0,0,0,204,254,254,214,214,214,0,
++	0,0,0,220,230,198,198,198,198,0,
++	0,0,0,124,198,198,198,198,124,0,
++	0,0,0,220,102,102,102,124,96,240,
++	0,0,0,118,204,204,204,124,12,30,
++	0,0,0,220,118,102,96,96,240,0,
++	0,0,0,124,198,112,28,198,124,0,
++	32,96,96,252,96,96,96,108,56,0,
++	0,0,0,204,204,204,204,204,118,0,
++	0,0,0,198,198,198,198,108,56,0,
++	0,0,0,198,214,214,254,254,108,0,
++	0,0,0,198,108,56,56,108,198,0,
++	0,0,0,198,198,198,126,6,6,252,
++	0,0,0,254,140,24,48,98,254,0,
++	14,24,24,24,112,24,24,24,14,0,
++	24,24,24,24,0,24,24,24,24,0,
++	224,48,48,48,28,48,48,48,224,0,
++	118,220,0,0,0,0,0,0,0,0,
++	0,0,0,16,56,108,198,198,254,0,
++	124,198,192,192,192,198,124,12,6,60,
++	0,204,0,204,204,204,204,204,118,0,
++	0,14,0,124,198,254,192,192,124,0,
++	60,102,0,60,6,62,102,102,63,0,
++	0,204,0,120,12,124,204,204,118,0,
++	0,112,0,120,12,124,204,204,118,0,
++	48,48,0,120,12,124,204,204,118,0,
++	0,0,0,126,192,192,192,126,6,60,
++	60,102,0,60,102,126,96,96,60,0,
++	204,0,0,124,198,254,192,192,124,0,
++	0,112,0,124,198,254,192,192,124,0,
++	0,204,0,112,48,48,48,48,120,0,
++	56,108,0,56,24,24,24,24,60,0,
++	0,224,0,112,48,48,48,48,120,0,
++	198,0,56,108,198,254,198,198,198,0,
++	48,48,0,120,204,252,204,204,204,0,
++	28,0,252,96,96,120,96,96,252,0,
++	0,0,0,126,27,126,216,216,127,0,
++	62,108,204,204,254,204,204,204,206,0,
++	56,108,0,124,198,198,198,198,124,0,
++	0,198,0,124,198,198,198,198,124,0,
++	0,112,0,124,198,198,198,198,124,0,
++	120,204,0,204,204,204,204,204,118,0,
++	0,112,0,204,204,204,204,204,118,0,
++	0,198,0,198,198,198,126,6,6,252,
++	198,56,108,198,198,198,198,108,56,0,
++	198,0,198,198,198,198,198,198,124,0,
++	24,24,126,192,192,192,192,126,24,24,
++	56,108,100,96,248,96,96,230,252,0,
++	204,204,120,48,252,48,252,48,48,0,
++	248,204,204,204,250,198,207,198,199,0,
++	14,27,24,24,60,24,24,24,216,112,
++	0,28,0,120,12,124,204,204,118,0,
++	0,56,0,112,48,48,48,48,120,0,
++	0,28,0,124,198,198,198,198,124,0,
++	0,28,0,204,204,204,204,204,118,0,
++	112,254,28,0,220,230,198,198,198,0,
++	254,0,198,230,246,254,222,206,198,0,
++	60,108,108,108,62,0,126,0,0,0,
++	56,108,108,108,56,0,124,0,0,0,
++	48,0,48,48,96,192,198,198,124,0,
++	0,0,0,0,254,192,192,0,0,0,
++	0,0,0,0,254,6,6,0,0,0,
++	195,198,204,216,62,123,195,6,12,15,
++	195,198,204,217,51,103,205,15,3,3,
++	24,24,0,24,24,60,60,60,24,0,
++	0,0,0,51,102,204,102,51,0,0,
++	0,0,0,204,102,51,102,204,0,0,
++	34,136,34,136,34,136,34,136,34,136,
++	85,170,85,170,85,170,85,170,85,170,
++	219,119,219,238,219,119,219,238,219,119,
++	24,24,24,24,24,24,24,24,24,24,
++	24,24,24,24,24,248,24,24,24,24,
++	24,24,24,248,24,248,24,24,24,24,
++	54,54,54,54,54,246,54,54,54,54,
++	0,0,0,0,0,254,54,54,54,54,
++	0,0,0,248,24,248,24,24,24,24,
++	54,54,54,246,6,246,54,54,54,54,
++	54,54,54,54,54,54,54,54,54,54,
++	0,0,0,254,6,246,54,54,54,54,
++	54,54,54,246,6,254,0,0,0,0,
++	54,54,54,54,54,254,0,0,0,0,
++	24,24,24,248,24,248,0,0,0,0,
++	0,0,0,0,0,248,24,24,24,24,
++	24,24,24,24,24,31,0,0,0,0,
++	24,24,24,24,24,255,0,0,0,0,
++	0,0,0,0,0,255,24,24,24,24,
++	24,24,24,24,24,31,24,24,24,24,
++	0,0,0,0,0,255,0,0,0,0,
++	24,24,24,24,24,255,24,24,24,24,
++	24,24,24,31,24,31,24,24,24,24,
++	54,54,54,54,54,55,54,54,54,54,
++	54,54,54,55,48,63,0,0,0,0,
++	0,0,0,63,48,55,54,54,54,54,
++	54,54,54,247,0,255,0,0,0,0,
++	0,0,0,255,0,247,54,54,54,54,
++	54,54,54,55,48,55,54,54,54,54,
++	0,0,0,255,0,255,0,0,0,0,
++	54,54,54,247,0,247,54,54,54,54,
++	24,24,24,255,0,255,0,0,0,0,
++	54,54,54,54,54,255,0,0,0,0,
++	0,0,0,255,0,255,24,24,24,24,
++	0,0,0,0,0,255,54,54,54,54,
++	54,54,54,54,54,63,0,0,0,0,
++	24,24,24,31,24,31,0,0,0,0,
++	0,0,0,31,24,31,24,24,24,24,
++	0,0,0,0,0,63,54,54,54,54,
++	54,54,54,54,54,255,54,54,54,54,
++	24,24,24,255,24,255,24,24,24,24,
++	24,24,24,24,24,248,0,0,0,0,
++	0,0,0,0,0,31,24,24,24,24,
++	255,255,255,255,255,255,255,255,255,255,
++	0,0,0,0,0,255,255,255,255,255,
++	240,240,240,240,240,240,240,240,240,240,
++	15,15,15,15,15,15,15,15,15,15,
++	255,255,255,255,255,0,0,0,0,0,
++	0,0,0,118,220,216,204,220,118,0,
++	0,124,198,198,220,198,198,220,192,192,
++	254,102,100,96,96,96,96,96,240,0,
++	254,108,108,108,108,108,108,108,238,0,
++	254,198,96,48,24,48,96,198,254,0,
++	0,0,0,127,204,204,204,204,120,0,
++	0,0,0,102,102,102,118,108,96,192,
++	0,0,0,118,220,24,24,24,24,0,
++	60,24,126,219,219,219,126,24,60,0,
++	56,108,198,198,254,198,198,108,56,0,
++	56,108,198,198,198,108,108,108,238,0,
++	28,50,48,24,124,204,204,204,120,0,
++	0,0,0,118,219,219,219,110,0,0,
++	3,6,124,207,219,219,243,62,96,192,
++	0,0,28,48,96,124,96,48,28,0,
++	0,0,124,198,198,198,198,198,198,0,
++	0,0,0,254,0,254,0,254,0,0,
++	0,0,48,48,252,48,48,0,252,0,
++	96,48,24,12,24,48,96,0,254,0,
++	12,24,48,96,48,24,12,0,254,0,
++	14,27,27,24,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,216,216,112,
++	0,0,48,48,0,252,0,48,48,0,
++	0,0,0,118,220,0,118,220,0,0,
++	56,108,108,108,56,0,0,0,0,0,
++	0,0,0,0,24,24,0,0,0,0,
++	0,0,0,0,0,24,0,0,0,0,
++	15,12,12,12,236,108,108,52,60,28,
++	120,108,108,108,108,108,0,0,0,0,
++	112,216,24,112,192,248,0,0,0,0,
++	0,0,0,60,60,60,60,0,0,0,
++	0,0,0,0,0,0,0,0,0,0
++};
+diff -Nru gxemul-0.7.0.orig/src/devices/fonts/font8x16.c gxemul-0.7.0/src/devices/fonts/font8x16.c
+--- gxemul-0.7.0.orig/src/devices/fonts/font8x16.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/devices/fonts/font8x16.c	2022-10-18 18:07:23.555054400 +0000
+@@ -0,0 +1,412 @@
++unsigned char font8x16[] = {
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,126,129,
++	165,129,129,189,153,129,129,126,0,0,
++	0,0,0,0,126,255,219,255,255,195,
++	231,255,255,126,0,0,0,0,0,0,
++	0,0,108,254,254,254,254,124,56,16,
++	0,0,0,0,0,0,0,0,16,56,
++	124,254,124,56,16,0,0,0,0,0,
++	0,0,0,24,60,60,231,231,231,24,
++	24,60,0,0,0,0,0,0,0,24,
++	60,126,255,255,126,24,24,60,0,0,
++	0,0,0,0,0,0,0,0,24,60,
++	60,24,0,0,0,0,0,0,255,255,
++	255,255,255,255,231,195,195,231,255,255,
++	255,255,255,255,0,0,0,0,0,60,
++	102,66,66,102,60,0,0,0,0,0,
++	255,255,255,255,255,195,153,189,189,153,
++	195,255,255,255,255,255,0,0,30,14,
++	26,50,120,204,204,204,204,120,0,0,
++	0,0,0,0,60,102,102,102,102,60,
++	24,126,24,24,0,0,0,0,0,0,
++	63,51,63,48,48,48,48,112,240,224,
++	0,0,0,0,0,0,127,99,127,99,
++	99,99,99,103,231,230,192,0,0,0,
++	0,0,0,24,24,219,60,231,60,219,
++	24,24,0,0,0,0,0,128,192,224,
++	240,248,254,248,240,224,192,128,0,0,
++	0,0,0,2,6,14,30,62,254,62,
++	30,14,6,2,0,0,0,0,0,0,
++	24,60,126,24,24,24,126,60,24,0,
++	0,0,0,0,0,0,102,102,102,102,
++	102,102,102,0,102,102,0,0,0,0,
++	0,0,127,219,219,219,123,27,27,27,
++	27,27,0,0,0,0,0,124,198,96,
++	56,108,198,198,108,56,12,198,124,0,
++	0,0,0,0,0,0,0,0,0,0,
++	254,254,254,254,0,0,0,0,0,0,
++	24,60,126,24,24,24,126,60,24,126,
++	0,0,0,0,0,0,24,60,126,24,
++	24,24,24,24,24,24,0,0,0,0,
++	0,0,24,24,24,24,24,24,24,126,
++	60,24,0,0,0,0,0,0,0,0,
++	0,24,12,254,12,24,0,0,0,0,
++	0,0,0,0,0,0,0,48,96,254,
++	96,48,0,0,0,0,0,0,0,0,
++	0,0,0,0,192,192,192,254,0,0,
++	0,0,0,0,0,0,0,0,0,40,
++	108,254,108,40,0,0,0,0,0,0,
++	0,0,0,0,16,56,56,124,124,254,
++	254,0,0,0,0,0,0,0,0,0,
++	254,254,124,124,56,56,16,0,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	24,60,60,60,24,24,24,0,24,24,
++	0,0,0,0,0,102,102,102,36,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,108,108,254,108,108,108,254,
++	108,108,0,0,0,0,0,24,24,124,
++	198,194,192,124,6,134,198,124,24,24,
++	0,0,0,0,0,0,194,198,12,24,
++	48,96,198,134,0,0,0,0,0,0,
++	56,108,108,56,118,220,204,204,204,118,
++	0,0,0,0,0,48,48,48,96,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,12,24,48,48,48,48,48,48,
++	24,12,0,0,0,0,0,0,48,24,
++	12,12,12,12,12,12,24,48,0,0,
++	0,0,0,0,0,0,0,102,60,255,
++	60,102,0,0,0,0,0,0,0,0,
++	0,0,0,24,24,126,24,24,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,24,24,24,48,0,0,0,
++	0,0,0,0,0,0,0,126,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,24,24,0,0,
++	0,0,0,0,0,0,2,6,12,24,
++	48,96,192,128,0,0,0,0,0,0,
++	124,198,198,206,222,246,230,198,198,124,
++	0,0,0,0,0,0,24,56,120,24,
++	24,24,24,24,24,126,0,0,0,0,
++	0,0,124,198,6,12,24,48,96,192,
++	198,254,0,0,0,0,0,0,124,198,
++	6,6,60,6,6,6,198,124,0,0,
++	0,0,0,0,12,28,60,108,204,254,
++	12,12,12,30,0,0,0,0,0,0,
++	254,192,192,192,252,6,6,6,198,124,
++	0,0,0,0,0,0,56,96,192,192,
++	252,198,198,198,198,124,0,0,0,0,
++	0,0,254,198,6,6,12,24,48,48,
++	48,48,0,0,0,0,0,0,124,198,
++	198,198,124,198,198,198,198,124,0,0,
++	0,0,0,0,124,198,198,198,126,6,
++	6,6,12,120,0,0,0,0,0,0,
++	0,0,24,24,0,0,0,24,24,0,
++	0,0,0,0,0,0,0,0,24,24,
++	0,0,0,24,24,48,0,0,0,0,
++	0,0,0,6,12,24,48,96,48,24,
++	12,6,0,0,0,0,0,0,0,0,
++	0,126,0,0,126,0,0,0,0,0,
++	0,0,0,0,0,96,48,24,12,6,
++	12,24,48,96,0,0,0,0,0,0,
++	124,198,198,12,24,24,24,0,24,24,
++	0,0,0,0,0,0,124,198,198,198,
++	222,222,222,220,192,124,0,0,0,0,
++	0,0,16,56,108,198,198,254,198,198,
++	198,198,0,0,0,0,0,0,252,102,
++	102,102,124,102,102,102,102,252,0,0,
++	0,0,0,0,60,102,194,192,192,192,
++	192,194,102,60,0,0,0,0,0,0,
++	248,108,102,102,102,102,102,102,108,248,
++	0,0,0,0,0,0,254,102,98,104,
++	120,104,96,98,102,254,0,0,0,0,
++	0,0,254,102,98,104,120,104,96,96,
++	96,240,0,0,0,0,0,0,60,102,
++	194,192,192,222,198,198,102,58,0,0,
++	0,0,0,0,198,198,198,198,254,198,
++	198,198,198,198,0,0,0,0,0,0,
++	60,24,24,24,24,24,24,24,24,60,
++	0,0,0,0,0,0,30,12,12,12,
++	12,12,204,204,204,120,0,0,0,0,
++	0,0,230,102,102,108,120,120,108,102,
++	102,230,0,0,0,0,0,0,240,96,
++	96,96,96,96,96,98,102,254,0,0,
++	0,0,0,0,198,238,254,254,214,198,
++	198,198,198,198,0,0,0,0,0,0,
++	198,230,246,254,222,206,198,198,198,198,
++	0,0,0,0,0,0,124,198,198,198,
++	198,198,198,198,198,124,0,0,0,0,
++	0,0,252,102,102,102,124,96,96,96,
++	96,240,0,0,0,0,0,0,124,198,
++	198,198,198,198,198,214,222,124,12,14,
++	0,0,0,0,252,102,102,102,124,108,
++	102,102,102,230,0,0,0,0,0,0,
++	124,198,198,96,56,12,6,198,198,124,
++	0,0,0,0,0,0,126,126,90,24,
++	24,24,24,24,24,60,0,0,0,0,
++	0,0,198,198,198,198,198,198,198,198,
++	198,124,0,0,0,0,0,0,198,198,
++	198,198,198,198,198,108,56,16,0,0,
++	0,0,0,0,198,198,198,198,214,214,
++	214,254,238,108,0,0,0,0,0,0,
++	198,198,108,124,56,56,124,108,198,198,
++	0,0,0,0,0,0,102,102,102,102,
++	60,24,24,24,24,60,0,0,0,0,
++	0,0,254,198,134,12,24,48,96,194,
++	198,254,0,0,0,0,0,0,60,48,
++	48,48,48,48,48,48,48,60,0,0,
++	0,0,0,0,0,128,192,224,112,56,
++	28,14,6,2,0,0,0,0,0,0,
++	60,12,12,12,12,12,12,12,12,60,
++	0,0,0,0,16,56,108,198,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,255,0,0,48,48,24,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,120,12,124,
++	204,204,204,118,0,0,0,0,0,0,
++	224,96,96,120,108,102,102,102,102,124,
++	0,0,0,0,0,0,0,0,0,124,
++	198,192,192,192,198,124,0,0,0,0,
++	0,0,28,12,12,60,108,204,204,204,
++	204,118,0,0,0,0,0,0,0,0,
++	0,124,198,254,192,192,198,124,0,0,
++	0,0,0,0,56,108,100,96,240,96,
++	96,96,96,240,0,0,0,0,0,0,
++	0,0,0,118,204,204,204,204,204,124,
++	12,204,120,0,0,0,224,96,96,108,
++	118,102,102,102,102,230,0,0,0,0,
++	0,0,24,24,0,56,24,24,24,24,
++	24,60,0,0,0,0,0,0,6,6,
++	0,14,6,6,6,6,6,6,102,102,
++	60,0,0,0,224,96,96,102,108,120,
++	120,108,102,230,0,0,0,0,0,0,
++	56,24,24,24,24,24,24,24,24,60,
++	0,0,0,0,0,0,0,0,0,236,
++	254,214,214,214,214,198,0,0,0,0,
++	0,0,0,0,0,220,102,102,102,102,
++	102,102,0,0,0,0,0,0,0,0,
++	0,124,198,198,198,198,198,124,0,0,
++	0,0,0,0,0,0,0,220,102,102,
++	102,102,102,124,96,96,240,0,0,0,
++	0,0,0,118,204,204,204,204,204,124,
++	12,12,30,0,0,0,0,0,0,220,
++	118,102,96,96,96,240,0,0,0,0,
++	0,0,0,0,0,124,198,96,56,12,
++	198,124,0,0,0,0,0,0,16,48,
++	48,252,48,48,48,48,54,28,0,0,
++	0,0,0,0,0,0,0,204,204,204,
++	204,204,204,118,0,0,0,0,0,0,
++	0,0,0,198,198,198,198,108,56,16,
++	0,0,0,0,0,0,0,0,0,198,
++	198,214,214,214,254,108,0,0,0,0,
++	0,0,0,0,0,198,108,56,56,56,
++	108,198,0,0,0,0,0,0,0,0,
++	0,198,198,198,198,198,198,126,6,12,
++	248,0,0,0,0,0,0,254,204,24,
++	48,96,198,254,0,0,0,0,0,0,
++	14,24,24,24,112,24,24,24,24,14,
++	0,0,0,0,0,0,24,24,24,24,
++	0,24,24,24,24,24,0,0,0,0,
++	0,0,112,24,24,24,14,24,24,24,
++	24,112,0,0,0,0,0,0,118,220,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,16,56,108,198,
++	198,198,254,0,0,0,0,0,0,0,
++	60,102,194,192,192,192,194,102,60,12,
++	6,124,0,0,0,0,204,0,0,204,
++	204,204,204,204,204,118,0,0,0,0,
++	0,12,24,48,0,124,198,254,192,192,
++	198,124,0,0,0,0,0,16,56,108,
++	0,120,12,124,204,204,204,118,0,0,
++	0,0,0,0,204,0,0,120,12,124,
++	204,204,204,118,0,0,0,0,0,96,
++	48,24,0,120,12,124,204,204,204,118,
++	0,0,0,0,0,56,108,56,0,120,
++	12,124,204,204,204,118,0,0,0,0,
++	0,0,0,0,60,102,96,96,102,60,
++	12,6,60,0,0,0,0,16,56,108,
++	0,124,198,254,192,192,198,124,0,0,
++	0,0,0,0,198,0,0,124,198,254,
++	192,192,198,124,0,0,0,0,0,96,
++	48,24,0,124,198,254,192,192,198,124,
++	0,0,0,0,0,0,102,0,0,56,
++	24,24,24,24,24,60,0,0,0,0,
++	0,24,60,102,0,56,24,24,24,24,
++	24,60,0,0,0,0,0,96,48,24,
++	0,56,24,24,24,24,24,60,0,0,
++	0,0,0,198,0,16,56,108,198,198,
++	254,198,198,198,0,0,0,0,56,108,
++	56,0,56,108,198,198,254,198,198,198,
++	0,0,0,0,24,48,96,0,254,102,
++	96,124,96,96,102,254,0,0,0,0,
++	0,0,0,0,108,254,178,50,126,216,
++	216,110,0,0,0,0,0,0,62,108,
++	204,204,254,204,204,204,204,206,0,0,
++	0,0,0,16,56,108,0,124,198,198,
++	198,198,198,124,0,0,0,0,0,0,
++	198,0,0,124,198,198,198,198,198,124,
++	0,0,0,0,0,96,48,24,0,124,
++	198,198,198,198,198,124,0,0,0,0,
++	0,48,120,204,0,204,204,204,204,204,
++	204,118,0,0,0,0,0,96,48,24,
++	0,204,204,204,204,204,204,118,0,0,
++	0,0,0,198,198,0,0,198,198,198,
++	198,198,198,126,6,12,120,0,198,198,
++	0,124,198,198,198,198,198,198,198,124,
++	0,0,0,0,198,198,0,198,198,198,
++	198,198,198,198,198,124,0,0,0,0,
++	0,24,24,60,102,96,96,96,102,60,
++	24,24,0,0,0,0,0,56,108,100,
++	96,240,96,96,96,96,230,252,0,0,
++	0,0,0,0,102,102,60,24,126,24,
++	126,24,24,24,0,0,0,0,0,248,
++	204,204,248,196,204,222,204,204,204,198,
++	0,0,0,0,0,14,27,24,24,24,
++	126,24,24,24,24,24,216,112,0,0,
++	0,24,48,96,0,120,12,124,204,204,
++	204,118,0,0,0,0,0,12,24,48,
++	0,56,24,24,24,24,24,60,0,0,
++	0,0,0,24,48,96,0,124,198,198,
++	198,198,198,124,0,0,0,0,0,24,
++	48,96,0,204,204,204,204,204,204,118,
++	0,0,0,0,0,0,118,220,0,220,
++	102,102,102,102,102,102,0,0,0,0,
++	118,220,0,198,230,246,254,222,206,198,
++	198,198,0,0,0,0,0,60,108,108,
++	62,0,126,0,0,0,0,0,0,0,
++	0,0,0,56,108,108,56,0,124,0,
++	0,0,0,0,0,0,0,0,0,0,
++	48,48,0,48,48,96,192,198,198,124,
++	0,0,0,0,0,0,0,0,0,0,
++	254,192,192,192,192,0,0,0,0,0,
++	0,0,0,0,0,0,254,6,6,6,
++	6,0,0,0,0,0,0,192,192,194,
++	198,204,24,48,96,220,134,12,24,62,
++	0,0,0,192,192,194,198,204,24,48,
++	102,206,158,62,6,6,0,0,0,0,
++	24,24,0,24,24,24,60,60,60,24,
++	0,0,0,0,0,0,0,0,0,54,
++	108,216,108,54,0,0,0,0,0,0,
++	0,0,0,0,0,216,108,54,108,216,
++	0,0,0,0,0,0,17,68,17,68,
++	17,68,17,68,17,68,17,68,17,68,
++	17,68,85,170,85,170,85,170,85,170,
++	85,170,85,170,85,170,85,170,221,119,
++	221,119,221,119,221,119,221,119,221,119,
++	221,119,221,119,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,248,24,24,
++	24,24,24,24,24,24,24,24,24,24,
++	24,248,24,248,24,24,24,24,24,24,
++	24,24,54,54,54,54,54,54,54,246,
++	54,54,54,54,54,54,54,54,0,0,
++	0,0,0,0,0,254,54,54,54,54,
++	54,54,54,54,0,0,0,0,0,248,
++	24,248,24,24,24,24,24,24,24,24,
++	54,54,54,54,54,246,6,246,54,54,
++	54,54,54,54,54,54,54,54,54,54,
++	54,54,54,54,54,54,54,54,54,54,
++	54,54,0,0,0,0,0,254,6,246,
++	54,54,54,54,54,54,54,54,54,54,
++	54,54,54,246,6,254,0,0,0,0,
++	0,0,0,0,54,54,54,54,54,54,
++	54,254,0,0,0,0,0,0,0,0,
++	24,24,24,24,24,248,24,248,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,248,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,24,24,31,
++	0,0,0,0,0,0,0,0,24,24,
++	24,24,24,24,24,255,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,255,24,24,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,31,24,24,
++	24,24,24,24,24,24,0,0,0,0,
++	0,0,0,255,0,0,0,0,0,0,
++	0,0,24,24,24,24,24,24,24,255,
++	24,24,24,24,24,24,24,24,24,24,
++	24,24,24,31,24,31,24,24,24,24,
++	24,24,24,24,54,54,54,54,54,54,
++	54,55,54,54,54,54,54,54,54,54,
++	54,54,54,54,54,55,48,63,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,63,48,55,54,54,54,54,54,54,
++	54,54,54,54,54,54,54,247,0,255,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,255,0,247,54,54,54,54,
++	54,54,54,54,54,54,54,54,54,55,
++	48,55,54,54,54,54,54,54,54,54,
++	0,0,0,0,0,255,0,255,0,0,
++	0,0,0,0,0,0,54,54,54,54,
++	54,247,0,247,54,54,54,54,54,54,
++	54,54,24,24,24,24,24,255,0,255,
++	0,0,0,0,0,0,0,0,54,54,
++	54,54,54,54,54,255,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,255,
++	0,255,24,24,24,24,24,24,24,24,
++	0,0,0,0,0,0,0,255,54,54,
++	54,54,54,54,54,54,54,54,54,54,
++	54,54,54,63,0,0,0,0,0,0,
++	0,0,24,24,24,24,24,31,24,31,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,31,24,31,24,24,24,24,
++	24,24,24,24,0,0,0,0,0,0,
++	0,63,54,54,54,54,54,54,54,54,
++	54,54,54,54,54,54,54,255,54,54,
++	54,54,54,54,54,54,24,24,24,24,
++	24,255,24,255,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,24,24,248,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,31,24,24,24,24,
++	24,24,24,24,255,255,255,255,255,255,
++	255,255,255,255,255,255,255,255,255,255,
++	0,0,0,0,0,0,0,255,255,255,
++	255,255,255,255,255,255,240,240,240,240,
++	240,240,240,240,240,240,240,240,240,240,
++	240,240,15,15,15,15,15,15,15,15,
++	15,15,15,15,15,15,15,15,255,255,
++	255,255,255,255,255,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,118,
++	220,216,216,216,220,118,0,0,0,0,
++	0,0,120,204,204,204,216,204,198,198,
++	198,204,0,0,0,0,0,0,254,198,
++	198,192,192,192,192,192,192,192,0,0,
++	0,0,0,0,0,0,254,108,108,108,
++	108,108,108,108,0,0,0,0,0,0,
++	0,254,198,96,48,24,48,96,198,254,
++	0,0,0,0,0,0,0,0,0,126,
++	216,216,216,216,216,112,0,0,0,0,
++	0,0,0,0,102,102,102,102,102,124,
++	96,96,192,0,0,0,0,0,0,0,
++	118,220,24,24,24,24,24,24,0,0,
++	0,0,0,0,0,126,24,60,102,102,
++	102,60,24,126,0,0,0,0,0,0,
++	0,56,108,198,198,254,198,198,108,56,
++	0,0,0,0,0,0,56,108,198,198,
++	198,108,108,108,108,238,0,0,0,0,
++	0,0,30,48,24,12,62,102,102,102,
++	102,60,0,0,0,0,0,0,0,0,
++	0,126,219,219,219,126,0,0,0,0,
++	0,0,0,0,0,3,6,126,219,219,
++	243,126,96,192,0,0,0,0,0,0,
++	30,48,96,96,126,96,96,96,48,30,
++	0,0,0,0,0,0,0,124,198,198,
++	198,198,198,198,198,198,0,0,0,0,
++	0,0,0,0,254,0,0,254,0,0,
++	254,0,0,0,0,0,0,0,0,0,
++	24,24,126,24,24,0,0,255,0,0,
++	0,0,0,0,0,48,24,12,6,12,
++	24,48,0,126,0,0,0,0,0,0,
++	0,12,24,48,96,48,24,12,0,126,
++	0,0,0,0,0,0,14,27,27,27,
++	24,24,24,24,24,24,24,24,24,24,
++	24,24,24,24,24,24,24,24,216,216,
++	216,112,0,0,0,0,0,0,0,0,
++	24,24,0,126,0,24,24,0,0,0,
++	0,0,0,0,0,0,0,118,220,0,
++	118,220,0,0,0,0,0,0,0,56,
++	108,108,56,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,24,24,0,0,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,24,0,
++	0,0,0,0,0,0,0,15,12,12,
++	12,12,12,236,108,108,60,28,0,0,
++	0,0,0,216,108,108,108,108,108,0,
++	0,0,0,0,0,0,0,0,0,112,
++	216,48,96,200,248,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,124,124,
++	124,124,124,124,124,0,0,0,0,0,
++	0,0,0,0,0,0,0,0,0,0,
++	0,0,0,0,0,0
++};
+diff -Nru gxemul-0.7.0.orig/src/devices/fonts/font8x8.c gxemul-0.7.0/src/devices/fonts/font8x8.c
+--- gxemul-0.7.0.orig/src/devices/fonts/font8x8.c	1970-01-01 00:00:00.000000000 +0000
++++ gxemul-0.7.0/src/devices/fonts/font8x8.c	2022-10-18 18:07:23.505008700 +0000
+@@ -0,0 +1,207 @@
++unsigned char font8x8[] = {
++	0,0,0,0,0,0,0,0,126,129,
++	165,129,189,153,129,126,126,255,219,255,
++	195,231,255,126,108,254,254,254,124,56,
++	16,0,16,56,124,254,124,56,16,0,
++	56,124,56,254,254,214,16,56,16,56,
++	124,254,254,124,16,56,0,0,24,60,
++	60,24,0,0,255,255,231,195,195,231,
++	255,255,60,102,195,195,195,195,102,60,
++	255,195,153,189,189,153,195,255,31,7,
++	13,121,205,204,204,120,60,102,102,102,
++	60,24,126,24,56,60,54,50,52,112,
++	240,224,127,99,127,99,99,103,230,192,
++	24,219,60,231,231,60,219,24,128,224,
++	248,254,248,224,128,0,2,14,62,254,
++	62,14,2,0,24,60,126,24,24,126,
++	60,24,102,102,102,102,102,0,102,0,
++	127,219,219,123,27,27,27,0,126,195,
++	252,102,102,63,195,126,0,0,126,126,
++	126,0,0,0,24,60,126,24,126,60,
++	24,255,24,60,126,24,24,24,24,0,
++	24,24,24,24,126,60,24,0,0,24,
++	12,254,12,24,0,0,0,48,96,254,
++	96,48,0,0,0,0,96,96,96,126,
++	0,0,0,36,102,255,102,36,0,0,
++	0,16,56,124,254,254,0,0,0,254,
++	254,124,56,16,0,0,0,0,0,0,
++	0,0,0,0,24,60,60,24,24,0,
++	24,0,108,108,108,0,0,0,0,0,
++	108,108,254,108,254,108,108,0,48,124,
++	192,124,6,252,48,0,0,198,204,24,
++	48,102,198,0,56,108,56,118,220,206,
++	123,0,96,96,192,0,0,0,0,0,
++	24,48,96,96,96,48,24,0,48,24,
++	12,12,12,24,48,0,0,108,56,254,
++	56,108,0,0,0,48,48,252,48,48,
++	0,0,0,0,0,0,0,48,48,96,
++	0,0,0,252,0,0,0,0,0,0,
++	0,0,0,24,24,0,6,12,24,48,
++	96,192,128,0,124,206,222,246,230,198,
++	124,0,48,112,176,48,48,48,252,0,
++	120,204,12,56,96,192,252,0,120,204,
++	12,56,12,204,120,0,28,60,108,204,
++	254,12,30,0,252,192,248,12,12,204,
++	120,0,120,204,192,248,204,204,120,0,
++	252,204,12,24,48,48,48,0,120,204,
++	204,120,204,204,120,0,120,204,204,124,
++	12,204,120,0,0,48,48,0,0,48,
++	48,0,0,48,48,0,0,48,48,96,
++	24,48,96,192,96,48,24,0,0,0,
++	126,0,0,126,0,0,48,24,12,6,
++	12,24,48,0,60,102,6,12,24,0,
++	24,0,124,198,222,222,222,192,126,0,
++	48,120,204,204,252,204,204,0,252,102,
++	102,124,102,102,252,0,60,102,192,192,
++	192,102,60,0,248,108,102,102,102,108,
++	248,0,254,98,104,120,104,98,254,0,
++	254,98,104,120,104,96,240,0,60,102,
++	192,192,206,102,62,0,204,204,204,252,
++	204,204,204,0,120,48,48,48,48,48,
++	120,0,30,12,12,12,204,204,120,0,
++	230,108,120,112,120,108,230,0,240,96,
++	96,96,98,102,254,0,198,238,254,214,
++	198,198,198,0,198,230,246,222,206,198,
++	198,0,56,108,198,198,198,108,56,0,
++	252,102,102,124,96,96,240,0,120,204,
++	204,204,220,120,28,0,252,102,102,124,
++	108,102,230,0,120,204,192,120,12,204,
++	120,0,252,180,48,48,48,48,120,0,
++	204,204,204,204,204,204,120,0,204,204,
++	204,204,204,120,48,0,198,198,198,214,
++	254,254,198,0,198,198,108,56,56,108,
++	198,0,204,204,204,120,48,48,120,0,
++	252,204,152,48,100,204,252,0,120,96,
++	96,96,96,96,120,0,192,96,48,24,
++	12,6,2,0,120,24,24,24,24,24,
++	120,0,16,56,108,198,0,0,0,0,
++	0,0,0,0,0,0,0,255,48,48,
++	24,0,0,0,0,0,0,0,120,12,
++	124,204,118,0,224,96,96,124,102,102,
++	252,0,0,0,120,204,192,204,120,0,
++	28,12,12,124,204,204,126,0,0,0,
++	120,204,252,192,120,0,56,108,96,248,
++	96,96,240,0,0,0,118,204,204,124,
++	12,248,224,96,108,118,102,102,230,0,
++	48,0,112,48,48,48,120,0,12,0,
++	28,12,12,204,204,120,224,96,102,108,
++	120,108,230,0,112,48,48,48,48,48,
++	120,0,0,0,204,254,254,214,198,0,
++	0,0,248,204,204,204,204,0,0,0,
++	120,204,204,204,120,0,0,0,220,102,
++	102,124,96,240,0,0,118,204,204,124,
++	12,30,0,0,220,118,96,96,240,0,
++	0,0,124,192,124,6,252,0,16,48,
++	124,48,48,54,28,0,0,0,204,204,
++	204,204,118,0,0,0,198,198,198,124,
++	56,0,0,0,198,214,254,254,108,0,
++	0,0,198,108,56,108,198,0,0,0,
++	204,204,204,124,12,248,0,0,252,152,
++	48,100,252,0,28,48,48,224,48,48,
++	28,0,24,24,24,0,24,24,24,0,
++	224,48,48,28,48,48,224,0,118,220,
++	0,0,0,0,0,0,16,56,108,108,
++	198,198,254,0,120,204,192,204,120,24,
++	12,120,0,204,0,204,204,204,126,0,
++	28,0,120,204,252,192,120,0,126,195,
++	60,6,62,102,63,0,204,0,120,12,
++	124,204,126,0,224,0,120,12,124,204,
++	126,0,48,48,120,12,124,204,126,0,
++	0,0,120,192,192,120,12,56,126,195,
++	60,102,126,96,60,0,204,0,120,204,
++	252,192,120,0,224,0,120,204,252,192,
++	120,0,204,0,112,48,48,48,120,0,
++	124,198,56,24,24,24,60,0,224,0,
++	112,48,48,48,120,0,198,56,108,198,
++	254,198,198,0,48,48,0,120,204,252,
++	204,0,28,0,252,96,120,96,252,0,
++	0,0,127,12,127,204,127,0,62,108,
++	204,254,204,204,206,0,120,204,0,120,
++	204,204,120,0,0,204,0,120,204,204,
++	120,0,0,224,0,120,204,204,120,0,
++	120,204,0,204,204,204,126,0,0,224,
++	0,204,204,204,126,0,0,204,0,204,
++	204,124,12,248,195,24,60,102,102,60,
++	24,0,204,0,204,204,204,204,120,0,
++	24,24,126,192,192,126,24,24,56,108,
++	100,240,96,230,252,0,204,204,120,252,
++	48,252,48,48,248,204,204,250,198,207,
++	198,199,14,27,24,60,24,24,216,112,
++	28,0,120,12,124,204,126,0,56,0,
++	112,48,48,48,120,0,0,28,0,120,
++	204,204,120,0,0,28,0,204,204,204,
++	126,0,0,248,0,248,204,204,204,0,
++	252,0,204,236,252,220,204,0,60,108,
++	108,62,0,126,0,0,56,108,108,56,
++	0,124,0,0,48,0,48,96,192,204,
++	120,0,0,0,0,252,192,192,0,0,
++	0,0,0,252,12,12,0,0,195,198,
++	204,222,51,102,204,15,195,198,204,219,
++	55,111,207,3,24,24,0,24,24,24,
++	24,0,0,51,102,204,102,51,0,0,
++	0,204,102,51,102,204,0,0,34,136,
++	34,136,34,136,34,136,85,170,85,170,
++	85,170,85,170,219,119,219,238,219,119,
++	219,238,24,24,24,24,24,24,24,24,
++	24,24,24,24,248,24,24,24,24,24,
++	248,24,248,24,24,24,54,54,54,54,
++	246,54,54,54,0,0,0,0,254,54,
++	54,54,0,0,248,24,248,24,24,24,
++	54,54,246,6,246,54,54,54,54,54,
++	54,54,54,54,54,54,0,0,254,6,
++	246,54,54,54,54,54,246,6,254,0,
++	0,0,54,54,54,54,254,0,0,0,
++	24,24,248,24,248,0,0,0,0,0,
++	0,0,248,24,24,24,24,24,24,24,
++	31,0,0,0,24,24,24,24,255,0,
++	0,0,0,0,0,0,255,24,24,24,
++	24,24,24,24,31,24,24,24,0,0,
++	0,0,255,0,0,0,24,24,24,24,
++	255,24,24,24,24,24,31,24,31,24,
++	24,24,54,54,54,54,55,54,54,54,
++	54,54,55,48,63,0,0,0,0,0,
++	63,48,55,54,54,54,54,54,247,0,
++	255,0,0,0,0,0,255,0,247,54,
++	54,54,54,54,55,48,55,54,54,54,
++	0,0,255,0,255,0,0,0,54,54,
++	247,0,247,54,54,54,24,24,255,0,
++	255,0,0,0,54,54,54,54,255,0,
++	0,0,0,0,255,0,255,24,24,24,
++	0,0,0,0,255,54,54,54,54,54,
++	54,54,63,0,0,0,24,24,31,24,
++	31,0,0,0,0,0,31,24,31,24,
++	24,24,0,0,0,0,63,54,54,54,
++	54,54,54,54,255,54,54,54,24,24,
++	255,24,255,24,24,24,24,24,24,24,
++	248,0,0,0,0,0,0,0,31,24,
++	24,24,255,255,255,255,255,255,255,255,
++	0,0,0,0,255,255,255,255,240,240,
++	240,240,240,240,240,240,15,15,15,15,
++	15,15,15,15,255,255,255,255,0,0,
++	0,0,0,0,118,220,200,220,118,0,
++	0,120,204,248,204,248,192,192,0,252,
++	204,192,192,192,192,0,0,254,108,108,
++	108,108,108,0,252,204,96,48,96,204,
++	252,0,0,0,126,216,216,216,112,0,
++	0,102,102,102,102,124,96,192,0,118,
++	220,24,24,24,24,0,252,48,120,204,
++	204,120,48,252,56,108,198,254,198,108,
++	56,0,56,108,198,198,108,108,238,0,
++	28,48,24,124,204,204,120,0,0,0,
++	126,219,219,126,0,0,6,12,126,219,
++	219,126,96,192,60,96,192,252,192,96,
++	60,0,120,204,204,204,204,204,204,0,
++	0,252,0,252,0,252,0,0,48,48,
++	252,48,48,0,252,0,96,48,24,48,
++	96,0,252,0,24,48,96,48,24,0,
++	252,0,14,27,27,24,24,24,24,24,
++	24,24,24,24,24,216,216,112,48,48,
++	0,252,0,48,48,0,0,118,220,0,
++	118,220,0,0,56,108,108,56,0,0,
++	0,0,0,0,0,24,24,0,0,0,
++	0,0,0,0,24,0,0,0,15,12,
++	12,12,236,108,60,28,120,108,108,108,
++	108,0,0,0,112,24,48,96,120,0,
++	0,0,0,0,60,60,60,60,0,0,
++	0,0,0,0,0,0,0,0
++};
diff --git a/patches/htop-3.3.0.local.patch b/patches/htop-3.3.0.local.patch
new file mode 100644
index 00000000..dc5c1360
--- /dev/null
+++ b/patches/htop-3.3.0.local.patch
@@ -0,0 +1,26 @@
+diff -ru htop-3.3.0.orig/unsupported/UnsupportedProcessTable.c htop-3.3.0/unsupported/UnsupportedProcessTable.c
+--- htop-3.3.0.orig/unsupported/UnsupportedProcessTable.c       2024-01-01 02:08:46.000000000 +0100
++++ htop-3.3.0/unsupported/UnsupportedProcessTable.c    2024-03-20 14:02:08.294139220 +0100
+@@ -48,11 +48,6 @@
+    Process_updateCmdline(proc, "<unsupported architecture>", 0, 0);
+    Process_updateExe(proc, "/path/to/executable");
+
+-   const Settings* settings = proc->host->settings;
+-   if (settings->ss->flags & PROCESS_FLAG_CWD) {
+-      free_and_xStrdup(&proc->procCwd, "/current/working/directory");
+-   }
+-
+    proc->super.updated = true;
+
+    proc->state = RUNNING;
+diff -ru htop-3.3.0.orig/unsupported/UnsupportedProcess.h htop-3.3.0/unsupported/UnsupportedProcess.h
+--- htop-3.3.0.orig/unsupported/UnsupportedProcess.h	2023-05-16 18:41:42.000000000 +0200
++++ htop-3.3.0/unsupported/UnsupportedProcess.h	2024-03-20 13:53:11.556451796 +0100
+@@ -8,6 +8,7 @@
+ */
+ 
+ #include "Machine.h"
++#include "Process.h"
+ 
+ 
+ typedef struct UnsupportedProcess_ {
diff --git a/patches/imagemagick-7.0.9-12.local.patch b/patches/imagemagick-7.1.1-21_pre.local.patch
index abc7d617..081c1fa0 100644
--- a/patches/imagemagick-7.0.9-12.local.patch
+++ b/patches/imagemagick-7.1.1-21_pre.local.patch
@@ -1,24 +1,7 @@
---- ImageMagick-7.0.9-12/configure.orig	2019-12-28 16:36:23.721685562 +0000
-+++ ImageMagick-7.0.9-12/configure	2019-12-28 16:36:28.661685403 +0000
-@@ -3622,7 +3622,7 @@
- for ac_dir in config "$srcdir"/config; do
-   if test -f "$ac_dir/install-sh"; then
-     ac_aux_dir=$ac_dir
--    ac_install_sh="$SHELL $ac_pwd/$ac_aux_dir/install-sh -c"
-+    ac_install_sh="$ac_aux_dir/install-sh -c"
-     break
-   elif test -f "$ac_dir/install.sh"; then
-     ac_aux_dir=$ac_dir
-@@ -4566,7 +4566,7 @@
- 
- MAGICK_VERSION=7.0.9-12
- 
--MAGICK_GIT_REVISION=16588:7fdd47e:20191226
-+MAGICK_GIT_REVISION=0::20191228
- 
- 
- # Substitute library versioning
-@@ -18287,6 +18287,16 @@
+diff -ru ImageMagick-7.1.0-51.orig/configure ImageMagick-7.1.0-51/configure
+--- ImageMagick-7.1.0-51.orig/configure	2022-10-16 17:54:02.000000000 +0200
++++ ImageMagick-7.1.0-51/configure	2022-11-05 22:37:15.089499439 +0100
+@@ -18236,6 +18236,15 @@
    dynamic_linker='GNU/Linux ld.so'
    ;;
  
@@ -28,14 +11,13 @@
 +  need_version=no
 +  library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext'
 +  soname_spec='$libname$release$shared_ext$major'
-+  finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
 +  shlibpath_var=LD_LIBRARY_PATH
 +  ;;
 +
  netbsd*)
    version_type=sunos
    need_lib_prefix=no
-@@ -22252,6 +22262,16 @@
+@@ -22765,6 +22775,15 @@
    dynamic_linker='GNU/Linux ld.so'
    ;;
  
@@ -45,7 +27,6 @@
 +  need_version=no
 +  library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext'
 +  soname_spec='$libname$release$shared_ext$major'
-+  finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
 +  shlibpath_var=LD_LIBRARY_PATH
 +  ;;
 +
diff --git a/patches/indent-2.2.12.local.patch b/patches/indent-2.2.12.local.patch
deleted file mode 100644
index c384344f..00000000
--- a/patches/indent-2.2.12.local.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -ru indent-2.2.12.orig/Makefile.in indent-2.2.12/Makefile.in
---- indent-2.2.12.orig/Makefile.in	2020-11-15 00:08:42.898242760 +0100
-+++ indent-2.2.12/Makefile.in	2020-11-15 09:33:23.686422521 +0100
-@@ -378,7 +378,7 @@
- top_builddir = @top_builddir@
- top_srcdir = @top_srcdir@
- AUTOMAKE_OPTIONS = no-texinfo.tex
--SUBDIRS = intl src doc po man regression
-+SUBDIRS = intl src doc po man
- BUILT_SOURCES = 
- DISTFILES = $(DIST_COMMON:README=README.md) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
- EXTRA_DIST = README.md \
diff --git a/patches/indent-2.2.13.local.patch b/patches/indent-2.2.13.local.patch
new file mode 100644
index 00000000..1b17d372
--- /dev/null
+++ b/patches/indent-2.2.13.local.patch
@@ -0,0 +1,12 @@
+diff -ru indent-2.2.13.orig/Makefile.in indent-2.2.13/Makefile.in
+--- indent-2.2.13.orig/Makefile.in	2023-01-26 10:52:31.000000000 +0100
++++ indent-2.2.13/Makefile.in	2023-03-21 18:19:33.457352230 +0100
+@@ -336,7 +336,7 @@
+ top_builddir = @top_builddir@
+ top_srcdir = @top_srcdir@
+ AUTOMAKE_OPTIONS = no-texinfo.tex
+-SUBDIRS = src doc po man regression
++SUBDIRS = src doc po man
+ BUILT_SOURCES = 
+ DISTFILES = $(DIST_COMMON:README=README.md) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ EXTRA_DIST = README.md \
diff --git a/patches/lame-3.100.local.patch b/patches/lame-3.100.local.patch
new file mode 100644
index 00000000..dc5c9e21
--- /dev/null
+++ b/patches/lame-3.100.local.patch
@@ -0,0 +1,9 @@
+diff -ru lame-3.100.orig/include/libmp3lame.sym lame-3.100/include/libmp3lame.sym
+--- lame-3.100.orig/include/libmp3lame.sym	2017-09-06 21:33:35.000000000 +0200
++++ lame-3.100/include/libmp3lame.sym	2024-02-21 16:08:37.072412949 +0100
+@@ -1,5 +1,4 @@
+ lame_init
+-lame_init_old
+ lame_set_num_samples
+ lame_get_num_samples
+ lame_set_in_samplerate
diff --git a/patches/ldns-1.7.0.local.patch b/patches/ldns-1.7.0.local.patch
deleted file mode 100644
index 5a53d0bd..00000000
--- a/patches/ldns-1.7.0.local.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-diff -ru ldns-1.7.0.orig/dnssec.c ldns-1.7.0/dnssec.c
---- ldns-1.7.0.orig/dnssec.c	2016-12-20 11:48:22.000000000 +0100
-+++ ldns-1.7.0/dnssec.c	2022-03-04 03:18:52.759678825 +0100
-@@ -375,7 +375,7 @@
- 		BN_free(Y);
- 		return NULL;
- 	}
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- #ifndef S_SPLINT_S
- 	dsa->p = P;
- 	dsa->q = Q;
-@@ -461,7 +461,7 @@
- 		BN_free(modulus);
- 		return NULL;
- 	}
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- #ifndef S_SPLINT_S
- 	rsa->n = modulus;
- 	rsa->e = exponent;
-diff -ru ldns-1.7.0.orig/host2str.c ldns-1.7.0/host2str.c
---- ldns-1.7.0.orig/host2str.c	2016-12-20 11:48:22.000000000 +0100
-+++ ldns-1.7.0/host2str.c	2022-03-04 03:18:52.759678825 +0100
-@@ -2040,7 +2040,7 @@
- 					const BIGNUM *n=NULL, *e=NULL, *d=NULL,
- 						*p=NULL, *q=NULL, *dmp1=NULL,
- 						*dmq1=NULL, *iqmp=NULL;
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- 					n = rsa->n;
- 					e = rsa->e;
- 					d = rsa->d;
-@@ -2092,7 +2092,7 @@
- 				if(1) {
- 					const BIGNUM *p=NULL, *q=NULL, *g=NULL,
- 						*priv_key=NULL, *pub_key=NULL;
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- #ifndef S_SPLINT_S
- 					p = dsa->p;
- 					q = dsa->q;
-diff -ru ldns-1.7.0.orig/keys.c ldns-1.7.0/keys.c
---- ldns-1.7.0.orig/keys.c	2016-12-20 11:48:22.000000000 +0100
-+++ ldns-1.7.0/keys.c	2022-03-04 03:18:52.759678825 +0100
-@@ -898,7 +898,7 @@
- 	}
- #endif /* splint */
- 
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- # ifndef S_SPLINT_S
- 	rsa->n = n;
- 	rsa->e = e;
-@@ -1018,7 +1018,7 @@
- 	}
- #endif /* splint */
- 
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- # ifndef S_SPLINT_S
- 	dsa->p = p;
- 	dsa->q = q;
-@@ -1713,7 +1713,7 @@
- 	if (!k) {
- 		return false;
- 	}
--#if OPENSSL_VERSION_NUMBER < 0x10100000 || defined(HAVE_LIBRESSL)
-+#if OPENSSL_VERSION_NUMBER < 0x10100000 || LIBRESSL_VERSION_NUMBER < 0x3050000fL
- 	n = k->n;
- 	e = k->e;
- #else
-Only in ldns-1.7.0: ldns-1.7.0.local.patch
-diff -ru ldns-1.7.0.orig/Makefile.in ldns-1.7.0/Makefile.in
---- ldns-1.7.0.orig/Makefile.in	2016-12-20 11:48:22.000000000 +0100
-+++ ldns-1.7.0/Makefile.in	2022-03-04 03:19:09.959679170 +0100
-@@ -148,7 +148,7 @@
- 	fi
- 
- drill/drill: $(DRILL_LOBJS) $(LIB)
--	$(LINK_EXE) $(DRILL_LOBJS) $(LIBS) $(LIBSSL_LIBS) -lldns -o drill/drill
-+	$(LINK_EXE) $(DRILL_LOBJS) $(LIBS) $(LIBSSL_LIBS) -L./lib -lldns -o drill/drill
- 
- drill/drill.1: $(srcdir)/drill/drill.1.in
- 	$(edit) $(srcdir)/drill/drill.1.in > drill/drill.1
-@@ -179,21 +179,21 @@
- 	fi
- 
- $(EXAMPLE_PROGS):
--	$(LINK_EXE) $@.lo $(LIBS) -lldns -o $@
-+	$(LINK_EXE) $@.lo $(LIBS) -L./lib -lldns -o $@
- 
- $(TESTNS):
--	$(LINK_EXE) $(TESTNS_LOBJS) $(LIBS) -lldns -o $(TESTNS)
-+	$(LINK_EXE) $(TESTNS_LOBJS) $(LIBS) -L./lib -lldns -o $(TESTNS)
- 
- $(LDNS_DPA):
--	$(LINK_EXE) $(LDNS_DPA_LOBJS) $(LIBS) $(LIBPCAP_LIBS) -lldns \
-+	$(LINK_EXE) $(LDNS_DPA_LOBJS) $(LIBS) $(LIBPCAP_LIBS) -L./lib -lldns \
- 		 -o $(LDNS_DPA)
- 
- $(LDNS_DANE):
--	$(LINK_EXE) $(LDNS_DANE_LOBJS) $(LIBS) $(LIBSSL_SSL_LIBS) -lldns \
-+	$(LINK_EXE) $(LDNS_DANE_LOBJS) $(LIBS) $(LIBSSL_SSL_LIBS) -L./lib -lldns \
- 		 -o $(LDNS_DANE)
- 
- $(EX_SSL_PROGS):
--	$(LINK_EXE) $@.lo $(LIBS) $(LIBSSL_LIBS) -lldns -o $@
-+	$(LINK_EXE) $@.lo $(LIBS) $(LIBSSL_LIBS) -L./lib -lldns -o $@
- 
- examples/ldns-dane.1: $(srcdir)/examples/ldns-dane.1.in
- 	$(edit) $(srcdir)/examples/ldns-dane.1.in > examples/ldns-dane.1
-@@ -228,14 +228,14 @@
- 
- linktest: $(srcdir)/linktest.c libldns.la
- 	$(COMP_LIB) $(LIBSSL_CPPFLAGS) -c $(srcdir)/linktest.c -o linktest.lo
--	$(LINK_EXE) linktest.lo $(LIBS) $(LIBSSL_LIBS) -lldns -o linktest
-+	$(LINK_EXE) linktest.lo $(LIBS) $(LIBSSL_LIBS) -L./lib -lldns -o linktest
- 
- lib: libldns.la
- 
- lib-export-all: libldns.la-export-all
- 
- libldns.la: $(LDNS_ALL_LOBJS)
--	$(LINK_LIB) $(LIBSSL_LDFLAGS) $(LIBSSL_LIBS) -export-symbols-regex '^(ldns_|b32_[pn]to[pn]|mktime_from_utc|qsort_rr_compare_nsec3)' -o libldns.la $(LDNS_ALL_LOBJS) -rpath $(libdir) $(RUNTIME_PATH)
-+	$(LINK_LIB) $(LIBSSL_LDFLAGS) -export-symbols-regex '^(ldns_|b32_[pn]to[pn]|mktime_from_utc|qsort_rr_compare_nsec3)' -o libldns.la $(LDNS_ALL_LOBJS) $(LIBSSL_LIBS) -rpath $(libdir) $(RUNTIME_PATH)
- 
- libldns.la-export-all: $(LDNS_ALL_LOBJS)
- 	$(LINK_LIB) -o libldns.la $(LDNS_ALL_LOBJS) -rpath $(libdir) $(RUNTIME_PATH)
diff --git a/patches/ldns-1.8.3.local.patch b/patches/ldns-1.8.3.local.patch
new file mode 100644
index 00000000..ef089e47
--- /dev/null
+++ b/patches/ldns-1.8.3.local.patch
@@ -0,0 +1,75 @@
+diff -ru ldns-1.8.3.orig/Makefile.in ldns-1.8.3/Makefile.in
+--- ldns-1.8.3.orig/Makefile.in	2023-09-14 16:27:42.808302266 +0200
++++ ldns-1.8.3/Makefile.in	2023-09-14 16:24:26.011635647 +0200
+@@ -27,6 +27,7 @@
+ pyldnsx_uninst	= @PYLDNSXUNINST@
+ libtool		= @libtool@
+ CONFIG_FILES	= @CONFIG_FILES@
++top_builddir	= @top_builddir@
+ 
+ LDNS_TRUST_ANCHOR_FILE = @LDNS_TRUST_ANCHOR_FILE@
+ DEFAULT_CAFILE = @DEFAULT_CAFILE@
+@@ -119,7 +120,7 @@
+ COMP_LIB	= $(LIBTOOL) --mode=compile $(CC) $(CPPFLAGS) $(CFLAGS)
+ LINK		= $(CC) $(CFLAGS) $(LDFLAGS) $(LIBS)
+ LINK_LIB	= $(LIBTOOL) --mode=link $(CC) $(CFLAGS) $(LDFLAGS) $(LIBS) -version-info $(version_info) -no-undefined
+-LINK_EXE	= $(LIBTOOL) --mode=link $(CC) $(CFLAGS) $(LDFLAGS) $(LIBSSL_LDFLAGS)
++LINK_EXE	= $(LIBTOOL) --mode=link $(CC) $(CFLAGS) $(LDFLAGS)
+ 
+ .PHONY:	clean realclean docclean manpages doc lint all lib pyldns test
+ .PHONY: install uninstall install-doc uninstall-doc uninstall-pyldns
+@@ -168,7 +169,7 @@
+ 	fi
+ 
+ drill/drill: $(DRILL_LOBJS) $(LIB) $(LIBLOBJS)
+-	$(LINK_EXE) $(DRILL_LOBJS) $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o drill/drill
++	$(LINK_EXE) $(DRILL_LOBJS) $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) -o drill/drill $(top_builddir)/libldns.la
+ 
+ drill/drill.1: $(srcdir)/drill/drill.1.in
+ 	$(edit) $(srcdir)/drill/drill.1.in > drill/drill.1
+@@ -200,23 +201,23 @@
+ 
+ # Need LIBSSL_LIBS
+ $(EXAMPLE_PROGS):
+-	$(LINK_EXE) $@.lo $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o $@
++	$(LINK_EXE) $@.lo $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o $@ $(top_builddir)/libldns.la
+ 
+ # Need LIBSSL_LIBS
+ $(TESTNS):
+-	$(LINK_EXE) $(TESTNS_LOBJS) $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o $(TESTNS)
++	$(LINK_EXE) $(TESTNS_LOBJS) $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o $(TESTNS) $(top_builddir)/libldns.la
+ 
+ # Need LIBSSL_LIBS
+ $(LDNS_DPA):
+ 	$(LINK_EXE) $(LDNS_DPA_LOBJS) $(LIBLOBJS) $(LIB) $(LIBPCAP_LIBS) $(LIBSSL_LIBS) $(LIBS) \
+-		 -o $(LDNS_DPA)
++		 -o $(LDNS_DPA) $(top_builddir)/libldns.la
+ 
+ $(LDNS_DANE):
+ 	$(LINK_EXE) $(LDNS_DANE_LOBJS) $(LIBLOBJS) $(LIB) $(LIBSSL_SSL_LIBS) $(LIBS) \
+-		 -o $(LDNS_DANE)
++		 -o $(LDNS_DANE) $(top_builddir)/libldns.la
+ 
+ $(EX_SSL_PROGS):
+-	$(LINK_EXE) $@.lo $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o $@
++	$(LINK_EXE) $@.lo $(LIBLOBJS) $(LIB) $(LIBSSL_LIBS) $(LIBS) -o $@ $(top_builddir)/libldns.la
+ 
+ examples/ldns-dane.1: $(srcdir)/examples/ldns-dane.1.in
+ 	$(edit) $(srcdir)/examples/ldns-dane.1.in > examples/ldns-dane.1
+@@ -251,14 +252,14 @@
+ 
+ linktest: $(srcdir)/linktest.c libldns.la
+ 	$(COMP_LIB) $(LIBSSL_CPPFLAGS) -c $(srcdir)/linktest.c -o linktest.lo
+-	$(LINK_EXE) linktest.lo $(LIB) $(LIBSSL_LIBS) $(LIBS) -o linktest
++	$(LINK_EXE) linktest.lo $(LIB) $(LIBSSL_LIBS) $(LIBS) -o linktest $(top_builddir)/libldns.la
+ 
+ lib: libldns.la
+ 
+ lib-export-all: libldns.la-export-all
+ 
+ libldns.la: $(LDNS_ALL_LOBJS)
+-	$(LINK_LIB) $(LIBSSL_LDFLAGS) $(LIBSSL_LIBS) -export-symbols-regex '^(ldns_|b32_[pn]to[pn]|mktime_from_utc|qsort_rr_compare_nsec3)' -o libldns.la $(LDNS_ALL_LOBJS) -rpath $(libdir) $(RUNTIME_PATH)
++	$(LINK_LIB) $(LIBSSL_LIBS) -export-symbols-regex '^(ldns_|b32_[pn]to[pn]|mktime_from_utc|qsort_rr_compare_nsec3)' -o libldns.la $(LDNS_ALL_LOBJS) -rpath $(libdir) $(RUNTIME_PATH)
+ 
+ libldns.la-export-all: $(LDNS_ALL_LOBJS)
+ 	$(LINK_LIB) -o libldns.la $(LDNS_ALL_LOBJS) -rpath $(libdir) $(RUNTIME_PATH)
diff --git a/patches/libao-1.2.0.local.patch b/patches/libao-1.2.0.local.patch
new file mode 100644
index 00000000..97a9ee54
--- /dev/null
+++ b/patches/libao-1.2.0.local.patch
@@ -0,0 +1,88 @@
+diff -ru libao-1.2.0.orig/src/ao_wmm.c libao-1.2.0/src/ao_wmm.c
+--- libao-1.2.0.orig/src/ao_wmm.c	2012-02-14 00:46:06.000000000 +0000
++++ libao-1.2.0/src/ao_wmm.c	2022-08-26 14:17:15.193852800 +0000
+@@ -31,9 +31,7 @@
+ #define _CRT_SECURE_NO_DEPRECATE
+ 
+ #include <windows.h>
+-#include <mmreg.h>
+ #include <mmsystem.h>
+-#include <ksmedia.h>
+ 
+ #include <stdlib.h>
+ #include <string.h>
+@@ -41,6 +39,47 @@
+ #include <stdarg.h>
+ #include <stdio.h>
+ 
++#define waveOutGetErrorText waveOutGetErrorTextA
++#define waveOutGetDevCaps waveOutGetDevCapsA
++
++#ifndef WAVE_MAPPER
++#define WAVE_MAPPER ((unsigned int)-1)
++#endif
++
++#ifndef WAVE_FORMAT_EXTENSIBLE
++#define WAVE_FORMAT_EXTENSIBLE 0xFFFE
++#endif
++
++#ifndef WAVE_ALLOWSYNC
++#define WAVE_ALLOWSYNC 0x0002
++#endif
++
++#ifndef CALLBACK_NULL
++#define CALLBACK_NULL (unsigned int)(0x00000000)
++#endif
++
++typedef struct {
++	WAVEFORMATEX Format;
++	union {
++		WORD wValidBitsPerSample;
++		WORD wSamplesPerBlock;
++		WORD wReserved;
++	} Samples;
++	DWORD dwChannelMask;
++	GUID SubFormat;
++} WAVEFORMATEXTENSIBLE,*PWAVEFORMATEXTENSIBLE;
++
++typedef struct tagWAVEOUTCAPSA {
++	WORD wMid;
++	WORD wPid;
++	UINT vDriverVersion;
++	CHAR szPname[32];
++	DWORD dwFormats;
++	WORD wChannels;
++	WORD wReserved1;
++	DWORD dwSupport;
++} WAVEOUTCAPS;
++
+ #ifndef KSDATAFORMAT_SUBTYPE_PCM
+ #define KSDATAFORMAT_SUBTYPE_PCM (GUID) {0x00000001,0x0000,0x0010,{0x80,0x00,0x00,0xaa,0x00,0x38,0x9b,0x71}}
+ #endif
+@@ -339,7 +378,7 @@
+       unsigned int ms = (internal->msPerBlock>>1)+1;
+       if (wait_all) ms *= n;
+       adebug("sleep for %ums wait on %d blocks\n",ms, internal->sent_blocks);
+-      Sleep(ms);
++      usleep(ms * 1000);
+     }
+   }
+ 
+@@ -558,7 +597,7 @@
+     const int idx = _ao_get_free_block(device);
+ 
+     if (idx == -1) {
+-      Sleep(internal->msPerBlock);
++      usleep(internal->msPerBlock * 1000);
+       continue;
+     }
+ 
+@@ -572,7 +611,7 @@
+     }
+ 
+     /* Do copy */
+-    CopyMemory((char*)internal->wh[idx].wh.lpData
++    memcpy((char*)internal->wh[idx].wh.lpData
+ 	       + internal->wh[idx].count,
+ 	       output_samples, n);
+ 
diff --git a/patches/libao-1.2.0_pre.local.patch b/patches/libao-1.2.0_pre.local.patch
new file mode 100644
index 00000000..7434fd69
--- /dev/null
+++ b/patches/libao-1.2.0_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru libao-1.2.0.orig/configure libao-1.2.0/configure
+--- libao-1.2.0.orig/configure	2014-01-27 17:10:36.000000000 +0000
++++ libao-1.2.0/configure	2022-08-26 14:36:45.678689200 +0000
+@@ -12333,7 +12333,7 @@
+ 
+ 
+ 
+-have_wmm="no"
++have_wmm="yes"
+ # Check whether --enable-wmm was given.
+ if test "${enable_wmm+set}" = set; then :
+   enableval=$enable_wmm;
diff --git a/patches/libarchive-3.6.1_pre.local.patch b/patches/libarchive-3.7.3_pre.local.patch
index 00141a21..f8f71eb5 100644
--- a/patches/libarchive-3.6.1_pre.local.patch
+++ b/patches/libarchive-3.7.3_pre.local.patch
@@ -1,7 +1,7 @@
-diff -ru libarchive-3.4.2.orig/configure libarchive-3.4.2/configure
---- libarchive-3.4.2.orig/configure	2020-02-11 23:58:01.000000000 +0100
-+++ libarchive-3.4.2/configure	2020-04-11 15:58:45.493648584 +0200
-@@ -12062,6 +12062,16 @@
+diff -ru libarchive-3.7.2.orig/configure libarchive-3.7.2/configure
+--- libarchive-3.7.2.orig/configure	2023-09-12 00:05:34.000000000 +0200
++++ libarchive-3.7.2/configure	2024-02-26 13:44:22.491965148 +0100
+@@ -12906,6 +12906,15 @@
    dynamic_linker='NetBSD ld.elf_so'
    ;;
  
@@ -11,10 +11,10 @@ diff -ru libarchive-3.4.2.orig/configure libarchive-3.4.2/configure
 +  need_version=no
 +  library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext'
 +  soname_spec='$libname$release$shared_ext$major'
-+  finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
 +  shlibpath_var=LD_LIBRARY_PATH
 +  ;;
 +
  netbsd*)
    version_type=sunos
    need_lib_prefix=no
+
diff --git a/patches/libassuan-2.5.4_pre.local.patch b/patches/libassuan-2.5.4_pre.local.patch
deleted file mode 100644
index d6529b87..00000000
--- a/patches/libassuan-2.5.4_pre.local.patch
+++ /dev/null
@@ -1,17 +0,0 @@
-diff -ru a/src/libassuan-config.in b/src/libassuan-config.in
---- a/src/libassuan-config.in	2018-10-25 05:20:28.000000000 -0400
-+++ b/src/libassuan-config.in	2020-03-11 18:47:54.410306584 -0400
-@@ -131,13 +131,5 @@
- fi
- 
- if test "$echo_libs" = "yes"; then
--    if test "@libdir@" != "/usr/lib" ; then
--      libdirs="-L@libdir@"
--      for i in $lib $extralibs ; do
--	if test "$i" = "-L@libdir@" ; then
--	  libdirs=""
--	fi
--      done
--    fi
-     echo $libdirs $lib $extralibs
- fi
diff --git a/patches/libassuan-2.5.5_pre.local.patch b/patches/libassuan-2.5.5_pre.local.patch
new file mode 100644
index 00000000..d141edaf
--- /dev/null
+++ b/patches/libassuan-2.5.5_pre.local.patch
@@ -0,0 +1,9 @@
+--- libassuan-2.5.5/src/libassuan-config.in.orig	2018-10-25 11:20:28.000000000 +0200
++++ libassuan-2.5.5/src/libassuan-config.in	2022-12-27 11:09:39.104865932 +0100
+@@ -139,5 +139,5 @@
+ 	fi
+       done
+     fi
+-    echo $libdirs $lib $extralibs
++    echo $lib $extralibs
+ fi
diff --git a/patches/libflac-1.4.3_pre.local.patch b/patches/libflac-1.4.3_pre.local.patch
new file mode 100644
index 00000000..b0aee98f
--- /dev/null
+++ b/patches/libflac-1.4.3_pre.local.patch
@@ -0,0 +1,17 @@
+diff -ru flac-1.4.3.orig/configure flac-1.4.3/configure
+--- flac-1.4.3.orig/configure	2023-06-22 10:50:43.581743622 +0200
++++ flac-1.4.3/configure	2023-06-26 21:27:46.664311640 +0200
+@@ -21401,13 +21401,6 @@
+ 
+ 
+ if test x$ac_cv_c_compiler_gnu = xyes -o x$xiph_cv_c_compiler_clang = xyes ; then
+-		if test "x${ax_enable_debug}" = "xno"
+-then :
+-
+-		CFLAGS="-O3 -funroll-loops $CFLAGS"
+-		CXXFLAGS="-O3 $CXXFLAGS"
+-
+-fi
+ 
+ 	CFLAGS="$CFLAGS -Wall -Wextra -Wstrict-prototypes -Wmissing-prototypes -Waggregate-return -Wcast-align -Wnested-externs -Wshadow -Wundef -Wmissing-declarations -Winline " # -Wcast-qual -Wbad-function-cast -Wwrite-strings -Wconversion
+ 	CXXFLAGS="$CXXFLAGS -Wall -Wextra -Wcast-align -Wshadow -Wwrite-strings -Wctor-dtor-privacy -Wnon-virtual-dtor -Wreorder -Wsign-promo -Wundef " # -Wcast-qual -Wbad-function-cast -Wwrite-strings -Woverloaded-virtual -Wmissing-declarations
diff --git a/patches/libgcrypt-1.10.3.local.patch b/patches/libgcrypt-1.10.3.local.patch
new file mode 100644
index 00000000..a36eab46
--- /dev/null
+++ b/patches/libgcrypt-1.10.3.local.patch
@@ -0,0 +1,12 @@
+diff -ru libgcrypt-1.10.3.orig/src/secmem.c libgcrypt-1.10.3/src/secmem.c
+--- libgcrypt-1.10.3.orig/src/secmem.c	2023-10-19 09:53:31.000000000 +0200
++++ libgcrypt-1.10.3/src/secmem.c	2024-03-05 19:49:33.587573245 +0100
+@@ -279,8 +279,6 @@
+ static void
+ print_warn (void)
+ {
+-  if (!no_warning)
+-    log_info (_("Warning: using insecure memory!\n"));
+ }
+ 
+ 
diff --git a/patches/libgcrypt-1.10.3_pre.local.patch b/patches/libgcrypt-1.10.3_pre.local.patch
new file mode 100644
index 00000000..f6ff4bf9
--- /dev/null
+++ b/patches/libgcrypt-1.10.3_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru libgcrypt-1.10.2.orig/configure libgcrypt-1.10.2/configure
+--- libgcrypt-1.10.2.orig/configure	2023-04-06 21:07:18.000000000 +0200
++++ libgcrypt-1.10.2/configure	2023-08-24 17:01:02.087595041 +0200
+@@ -15552,7 +15552,7 @@
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for GPG Error - version >= $min_gpg_error_version" >&5
+ $as_echo_n "checking for GPG Error - version >= $min_gpg_error_version... " >&6; }
+   if test $ok = yes; then
+-    GPG_ERROR_CFLAGS=`$GPG_ERROR_CONFIG --cflags`
++    GPG_ERROR_CFLAGS=``
+     GPG_ERROR_LIBS=`$GPG_ERROR_CONFIG --libs`
+     if test -z "$GPGRT_CONFIG"; then
+       GPG_ERROR_MT_CFLAGS=`$GPG_ERROR_CONFIG --mt --cflags 2>/dev/null`
diff --git a/patches/libressl-3.4.3.local.patch b/patches/libressl-3.4.3.local.patch
deleted file mode 100644
index 77dab2ec..00000000
--- a/patches/libressl-3.4.3.local.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-diff -ru libressl-3.3.3.orig/man/Makefile.in libressl-3.3.3/man/Makefile.in
---- libressl-3.3.3.orig/man/Makefile.in	2021-05-02 03:16:44.000000000 +0200
-+++ libressl-3.3.3/man/Makefile.in	2021-05-25 00:42:17.424322609 +0200
-@@ -3438,14 +3438,6 @@
- @ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/LHASH_DOALL_ARG_FN_TYPE.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/LHASH_DOALL_FN_TYPE.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/LHASH_HASH_FN_TYPE.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_delete.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_doall.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_doall_arg.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_error.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_free.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_insert.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_new.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_<type>_retrieve.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_delete.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_doall.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	ln -sf "lh_new.3" "$(DESTDIR)$(mandir)/man3/lh_doall_arg.3"
-@@ -6068,14 +6060,6 @@
- @ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/LHASH_DOALL_ARG_FN_TYPE.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/LHASH_DOALL_FN_TYPE.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/LHASH_HASH_FN_TYPE.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_delete.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_doall.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_doall_arg.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_error.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_free.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_insert.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_new.3"
--@ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_<type>_retrieve.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_delete.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_doall.3"
- @ENABLE_LIBTLS_ONLY_FALSE@	-rm -f "$(DESTDIR)$(mandir)/man3/lh_doall_arg.3"
diff --git a/patches/libressl-3.9.1.local.patch b/patches/libressl-3.9.1.local.patch
new file mode 100644
index 00000000..8235cc0c
--- /dev/null
+++ b/patches/libressl-3.9.1.local.patch
@@ -0,0 +1,19 @@
+diff -ru libressl-3.7.1.orig/crypto/compat/arc4random_linux.h libressl-3.7.1/crypto/compat/arc4random_linux.h
+--- libressl-3.7.1.orig/crypto/compat/arc4random_linux.h	2023-05-14 00:44:53.716886970 +0200
++++ libressl-3.7.1/crypto/compat/arc4random_linux.h	2023-05-14 00:44:32.052886839 +0200
+@@ -27,6 +27,7 @@
+ 
+ #include <pthread.h>
+ #include <signal.h>
++#include <stdio.h>
+ 
+ static pthread_mutex_t arc4random_mtx = PTHREAD_MUTEX_INITIALIZER;
+ #define _ARC4_LOCK()   pthread_mutex_lock(&arc4random_mtx)
+@@ -43,6 +44,7 @@
+ static inline void
+ _getentropy_fail(void)
+ {
++	fprintf(stderr, "Couldn't obtain randomness from getentropy\n");
+ 	raise(SIGKILL);
+ }
+ 
diff --git a/patches/libsasl2-2.1.28_pre.local.patch b/patches/libsasl2-2.1.28_pre.local.patch
new file mode 100644
index 00000000..b6571c2d
--- /dev/null
+++ b/patches/libsasl2-2.1.28_pre.local.patch
@@ -0,0 +1,11 @@
+diff -ru cyrus-sasl-2.1.28.orig/include/Makefile.in cyrus-sasl-2.1.28/include/Makefile.in
+--- cyrus-sasl-2.1.28.orig/include/Makefile.in	2022-02-18 22:53:55.000000000 +0100
++++ cyrus-sasl-2.1.28/include/Makefile.in	2024-01-14 22:34:08.569689272 +0100
+@@ -802,6 +802,7 @@
+ 
+ makemd5$(BUILD_EXEEXT) $(makemd5_OBJECTS): CC=$(CC_FOR_BUILD)
+ makemd5$(BUILD_EXEEXT) $(makemd5_OBJECTS): CFLAGS=$(CFLAGS_FOR_BUILD)
++makemd5$(BUILD_EXEEXT) $(makemd5_OBJECTS): CPPFLAGS=$(CPPFLAGS_FOR_BUILD)
+ makemd5$(BUILD_EXEEXT): LDFLAGS=$(LDFLAGS_FOR_BUILD)
+ 
+ md5global.h: makemd5$(BUILD_EXEEXT) Makefile
diff --git a/patches/libsndfile-1.0.28.local.patch b/patches/libsndfile-1.2.0.local.patch
index 708ae2c7..708ae2c7 100644
--- a/patches/libsndfile-1.0.28.local.patch
+++ b/patches/libsndfile-1.2.0.local.patch
diff --git a/patches/libssh-0.10.6.local.patch b/patches/libssh-0.10.6.local.patch
new file mode 100644
index 00000000..e2525540
--- /dev/null
+++ b/patches/libssh-0.10.6.local.patch
@@ -0,0 +1,10 @@
+diff -ru libssh-0.10.6.orig/libssh.pc.cmake libssh-0.10.6/libssh.pc.cmake
+--- libssh-0.10.6.orig/libssh.pc.cmake	2022-11-18 16:16:47.000000000 +0100
++++ libssh-0.10.6/libssh.pc.cmake	2023-12-19 14:32:21.461084477 +0100
+@@ -6,5 +6,5 @@
+ Name: @PROJECT_NAME@
+ Description: The SSH Library
+ Version: @PROJECT_VERSION@
+-Libs: -L${libdir} -lssh
++Libs: -lssh
+ Cflags: -I${includedir}
diff --git a/patches/libtasn1-4.18.0_pre.local.patch b/patches/libtasn1-4.19.0_pre.local.patch
index 9f7f4eda..9f7f4eda 100644
--- a/patches/libtasn1-4.18.0_pre.local.patch
+++ b/patches/libtasn1-4.19.0_pre.local.patch
diff --git a/patches/libxslt-1.1.35.local.patch b/patches/libxslt-1.1.35.local.patch
deleted file mode 100644
index 1cf25319..00000000
--- a/patches/libxslt-1.1.35.local.patch
+++ /dev/null
@@ -1,15 +0,0 @@
-diff -ru libxslt-1.1.32.orig/Makefile.in libxslt-1.1.32/Makefile.in
---- libxslt-1.1.32.orig/Makefile.in	2017-11-02 21:34:22.000000000 +0100
-+++ libxslt-1.1.32/Makefile.in	2018-08-04 15:15:09.283854093 +0200
-@@ -415,10 +415,7 @@
- SUBDIRS = \
- 	libxslt \
- 	libexslt \
--	xsltproc \
--	doc \
--	$(PYTHON_SUBDIR) \
--	tests
-+	xsltproc
- 
- DIST_SUBDIRS = libxslt libexslt xsltproc python doc tests
- confexecdir = $(libdir)
diff --git a/patches/libxslt-1.1.39.local.patch b/patches/libxslt-1.1.39.local.patch
new file mode 100644
index 00000000..ccafaf1e
--- /dev/null
+++ b/patches/libxslt-1.1.39.local.patch
@@ -0,0 +1,12 @@
+diff -ru libxslt-1.1.37.orig/Makefile.in libxslt-1.1.37/Makefile.in
+--- libxslt-1.1.37.orig/Makefile.in	2022-12-10 12:03:50.891594062 +0100
++++ libxslt-1.1.37/Makefile.in	2022-12-10 12:05:46.048683627 +0100
+@@ -427,7 +427,7 @@
+ top_builddir = @top_builddir@
+ top_srcdir = @top_srcdir@
+ ACLOCAL_AMFLAGS = -I m4
+-SUBDIRS = libxslt libexslt xsltproc doc tests $(am__append_1)
++SUBDIRS = libxslt libexslt xsltproc $(am__append_1)
+ DIST_SUBDIRS = libxslt libexslt xsltproc python doc tests
+ confexecdir = $(libdir)
+ confexec_DATA = xsltConf.sh
diff --git a/patches/libxslt-1.1.35_pre.local.patch b/patches/libxslt-1.1.39_pre.local.patch
index 08be2163..08be2163 100644
--- a/patches/libxslt-1.1.35_pre.local.patch
+++ b/patches/libxslt-1.1.39_pre.local.patch
diff --git a/patches/libz/CVE-2022-37434.patch b/patches/libz/CVE-2022-37434.patch
new file mode 100644
index 00000000..b6f5e2e3
--- /dev/null
+++ b/patches/libz/CVE-2022-37434.patch
@@ -0,0 +1,15 @@
+diff -ru libz-1.2.8.2015.12.26.orig/inflate.c libz-1.2.8.2015.12.26/inflate.c
+--- libz-1.2.8.2015.12.26.orig/inflate.c	2015-12-21 23:37:02.000000000 +0100
++++ libz-1.2.8.2015.12.26/inflate.c	2022-10-27 11:32:39.403516533 +0200
+@@ -595,8 +595,9 @@
+                 if (copy > have) copy = have;
+                 if (copy) {
+                     if (state->head != NULL &&
+-                        state->head->extra != NULL) {
+-                        len = state->head->extra_len - state->length;
++                        state->head->extra != NULL &&
++                        (len = state->head->extra_max - state->length) <
++                            state->head->extra_max) {
+                         memcpy(state->head->extra + len, next,
+                                len + copy > state->head->extra_max ?
+                                state->head->extra_max - len : copy);
diff --git a/patches/libz_minipix b/patches/libz_minipix
new file mode 120000
index 00000000..1ac1b5ef
--- /dev/null
+++ b/patches/libz_minipix
@@ -0,0 +1 @@
+libz
\ No newline at end of file
diff --git a/patches/libzip_host-1.7.1.local.patch b/patches/libzip_host-1.7.1.local.patch
new file mode 100644
index 00000000..ae48c057
--- /dev/null
+++ b/patches/libzip_host-1.7.1.local.patch
@@ -0,0 +1,12 @@
+diff -ru libzip-1.7.1.orig/lib/zip_crypto_openssl.c libzip-1.7.1/lib/zip_crypto_openssl.c
+--- libzip-1.7.1.orig/lib/zip_crypto_openssl.c	2020-06-13 12:12:26.000000000 +0200
++++ libzip-1.7.1/lib/zip_crypto_openssl.c	2022-11-04 12:32:54.040171710 +0100
+@@ -39,7 +39,7 @@
+ 
+ #include <openssl/rand.h>
+ 
+-#if OPENSSL_VERSION_NUMBER < 0x1010000fL || defined(LIBRESSL_VERSION_NUMBER)
++#if OPENSSL_VERSION_NUMBER < 0x1010000fL || (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
+ #define USE_OPENSSL_1_0_API
+ #endif
+ 
diff --git a/patches/lighttpd-1.4.64.local.patch b/patches/lighttpd-1.4.76.local.patch
index 50a2ce94..50a2ce94 100644
--- a/patches/lighttpd-1.4.64.local.patch
+++ b/patches/lighttpd-1.4.76.local.patch
diff --git a/patches/lighttpd-1.4.76_pre.local.patch b/patches/lighttpd-1.4.76_pre.local.patch
new file mode 100644
index 00000000..55360673
--- /dev/null
+++ b/patches/lighttpd-1.4.76_pre.local.patch
@@ -0,0 +1,23 @@
+diff -ru lighttpd-1.4.76.orig/configure.ac lighttpd-1.4.76/configure.ac
+--- lighttpd-1.4.76.orig/configure.ac	2024-04-11 07:30:19.000000000 +0200
++++ lighttpd-1.4.76/configure.ac	2024-04-18 12:53:43.846262167 +0200
+@@ -61,7 +61,6 @@
+ 
+ dnl Checks for programs.
+ AC_PROG_CC
+-AC_PROG_CC_C99
+ AX_PROG_CC_FOR_BUILD
+ LT_PATH_LD
+ AC_PROG_INSTALL
+diff -ru lighttpd-1.4.76.orig/src/Makefile.am lighttpd-1.4.76/src/Makefile.am
+--- lighttpd-1.4.76.orig/src/Makefile.am	2024-04-11 07:30:19.000000000 +0200
++++ lighttpd-1.4.76/src/Makefile.am	2024-04-18 12:45:07.642508927 +0200
+@@ -107,7 +107,7 @@
+ lib_LTLIBRARIES += liblightcomp.la
+ liblightcomp_la_SOURCES=$(common_src)
+ liblightcomp_la_CFLAGS=$(AM_CFLAGS) $(LIBEV_CFLAGS)
+-liblightcomp_la_LDFLAGS = $(common_ldflags) --export-all-symbols
++liblightcomp_la_LDFLAGS = $(common_ldflags)
+ liblightcomp_la_LIBADD = $(PCRE_LIB) $(CRYPTO_LIB) $(FAM_LIBS) $(LIBEV_LIBS) $(ATTR_LIB) $(WS2_32_LIB)
+ common_libadd = liblightcomp.la
+ if !LIGHTTPD_STATIC
diff --git a/patches/llvm_host/llvm-0001-Add-Musl-MuslEABI-and-Musl-EABIHF-triples.patch b/patches/llvm_host/llvm-0001-Add-Musl-MuslEABI-and-Musl-EABIHF-triples.patch
deleted file mode 100644
index c1dfc5bd..00000000
--- a/patches/llvm_host/llvm-0001-Add-Musl-MuslEABI-and-Musl-EABIHF-triples.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 1cec99f6d53d442d8a8c9d2ed9f4a58f8fdc6412 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Thu, 18 Feb 2016 08:30:07 +0100
-Subject: [PATCH 1/3] Add Musl, MuslEABI and Musl EABIHF triples
-
----
- include/llvm/ADT/Triple.h           | 11 +++++++++++
- lib/Support/Triple.cpp              |  7 +++++++
- lib/Target/ARM/ARMSubtarget.h       |  3 +++
- lib/Target/ARM/ARMTargetMachine.cpp |  2 ++
- 4 files changed, 23 insertions(+)
-
-diff --git a/include/llvm/ADT/Triple.h b/include/llvm/ADT/Triple.h
-index e01db0a..2fc4fc1 100644
---- a/include/llvm/ADT/Triple.h
-+++ b/include/llvm/ADT/Triple.h
-@@ -174,6 +174,10 @@ public:
-     EABIHF,
-     Android,
- 
-+    Musl,
-+    MuslEABI,
-+    MuslEABIHF,
-+
-     MSVC,
-     Itanium,
-     Cygnus,
-@@ -544,6 +548,13 @@ public:
-   /// Tests whether the target is Android
-   bool isAndroid() const { return getEnvironment() == Triple::Android; }
- 
-+  /// Tests whether the target is musl libc
-+  bool isMusl() const {
-+    return getEnvironment() == Triple::Musl ||
-+           getEnvironment() == Triple::MuslEABI ||
-+           getEnvironment() == Triple::MuslEABIHF;
-+  }
-+
-   /// @}
-   /// @name Mutators
-   /// @{
-diff --git a/lib/Support/Triple.cpp b/lib/Support/Triple.cpp
-index 11afcf7..d90a06a 100644
---- a/lib/Support/Triple.cpp
-+++ b/lib/Support/Triple.cpp
-@@ -199,6 +199,9 @@ const char *Triple::getEnvironmentTypeName(EnvironmentType Kind) {
-   case CODE16: return "code16";
-   case EABI: return "eabi";
-   case EABIHF: return "eabihf";
-+  case Musl: return "musl";
-+  case MuslEABIHF: return "muslgnueabihf";
-+  case MuslEABI: return "muslgnueabi";
-   case Android: return "android";
-   case MSVC: return "msvc";
-   case Itanium: return "itanium";
-@@ -454,6 +457,9 @@ static Triple::EnvironmentType parseEnvironment(StringRef EnvironmentName) {
-     .StartsWith("code16", Triple::CODE16)
-     .StartsWith("gnu", Triple::GNU)
-     .StartsWith("android", Triple::Android)
-+    .StartsWith("muslgnueabihf", Triple::MuslEABIHF)
-+    .StartsWith("muslgnueabi", Triple::MuslEABI)
-+    .StartsWith("musl", Triple::Musl)
-     .StartsWith("msvc", Triple::MSVC)
-     .StartsWith("itanium", Triple::Itanium)
-     .StartsWith("cygnus", Triple::Cygnus)
-@@ -1431,6 +1437,7 @@ StringRef Triple::getARMCPUForArch(StringRef MArch) const {
-     switch (getEnvironment()) {
-     case llvm::Triple::EABIHF:
-     case llvm::Triple::GNUEABIHF:
-+    case llvm::Triple::MuslEABIHF:
-       return "arm1176jzf-s";
-     default:
-       return "arm7tdmi";
-diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
-index 4d54e57..7ed7ab7 100644
---- a/lib/Target/ARM/ARMSubtarget.h
-+++ b/lib/Target/ARM/ARMSubtarget.h
-@@ -405,8 +405,10 @@ public:
-   bool isTargetEHABICompatible() const {
-     return (TargetTriple.getEnvironment() == Triple::EABI ||
-             TargetTriple.getEnvironment() == Triple::GNUEABI ||
-+	    TargetTriple.getEnvironment() == Triple::MuslEABI ||
-             TargetTriple.getEnvironment() == Triple::EABIHF ||
-             TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
-+	    TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
-             isTargetAndroid()) &&
-            !isTargetDarwin() && !isTargetWindows();
-   }
-@@ -415,6 +417,7 @@ public:
-     // FIXME: this is invalid for WindowsCE
-     return TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
-            TargetTriple.getEnvironment() == Triple::EABIHF ||
-+	   TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
-            isTargetWindows() || isAAPCS16_ABI();
-   }
-   bool isTargetAndroid() const { return TargetTriple.isAndroid(); }
-diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
-index fca1901..25f5cf9 100644
---- a/lib/Target/ARM/ARMTargetMachine.cpp
-+++ b/lib/Target/ARM/ARMTargetMachine.cpp
-@@ -101,6 +101,8 @@ computeTargetABI(const Triple &TT, StringRef CPU,
-     case llvm::Triple::GNUEABIHF:
-     case llvm::Triple::EABIHF:
-     case llvm::Triple::EABI:
-+    case llvm::Triple::MuslEABI:
-+    case llvm::Triple::MuslEABIHF:
-       TargetABI = ARMBaseTargetMachine::ARM_ABI_AAPCS;
-       break;
-     case llvm::Triple::GNU:
--- 
-2.7.3
-
diff --git a/patches/llvm_host/llvm-0002-Fix-build-with-musl-libc.patch b/patches/llvm_host/llvm-0002-Fix-build-with-musl-libc.patch
deleted file mode 100644
index 1a690808..00000000
--- a/patches/llvm_host/llvm-0002-Fix-build-with-musl-libc.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5c571082fdaf61f6df19d9b7137dc26d71334058 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Thu, 18 Feb 2016 10:33:04 +0100
-Subject: [PATCH 2/3] Fix build with musl libc
-
-On musl libc the fopen64 and fopen are the same thing, but for
-compatibility they have a `#define fopen64 fopen`. Same applies for
-fseek64, fstat64, fstatvfs64, ftello64, lstat64, stat64 and tmpfile64.
----
- include/llvm/Analysis/TargetLibraryInfo.h | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/include/llvm/Analysis/TargetLibraryInfo.h b/include/llvm/Analysis/TargetLibraryInfo.h
-index 7becdf0..7f14427 100644
---- a/include/llvm/Analysis/TargetLibraryInfo.h
-+++ b/include/llvm/Analysis/TargetLibraryInfo.h
-@@ -18,6 +18,15 @@
- #include "llvm/IR/Module.h"
- #include "llvm/Pass.h"
- 
-+#undef fopen64
-+#undef fseeko64
-+#undef fstat64
-+#undef fstatvfs64
-+#undef ftello64
-+#undef lstat64
-+#undef stat64
-+#undef tmpfile64
-+
- namespace llvm {
- /// VecDesc - Describes a possible vectorization of a function.
- /// Function 'VectorFnName' is equivalent to 'ScalarFnName' vectorized
--- 
-2.7.3
-
diff --git a/patches/llvm_host/llvm-0003-Fix-DynamicLibrary-to-build-with-musl-libc.patch b/patches/llvm_host/llvm-0003-Fix-DynamicLibrary-to-build-with-musl-libc.patch
deleted file mode 100644
index d5d7f07b..00000000
--- a/patches/llvm_host/llvm-0003-Fix-DynamicLibrary-to-build-with-musl-libc.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From d12ecb83d01dcb580dd94f4d57828f33d3eb4c35 Mon Sep 17 00:00:00 2001
-From: Natanael Copa <ncopa@alpinelinux.org>
-Date: Thu, 18 Feb 2016 15:33:21 +0100
-Subject: [PATCH 3/3] Fix DynamicLibrary to build with musl libc
-
-stdin/out/err is part of the libc and not the kernel so we check for the
-specific libc that does the unexpected instead of linux.
-
-This is needed for making it build with musl libc.
----
- lib/Support/DynamicLibrary.cpp | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/lib/Support/DynamicLibrary.cpp b/lib/Support/DynamicLibrary.cpp
-index 9a7aeb5..0c1c8f8 100644
---- a/lib/Support/DynamicLibrary.cpp
-+++ b/lib/Support/DynamicLibrary.cpp
-@@ -140,10 +140,10 @@ void* DynamicLibrary::SearchForAddressOfSymbol(const char *symbolName) {
- #define EXPLICIT_SYMBOL(SYM) \
-    if (!strcmp(symbolName, #SYM)) return &SYM
- 
--// On linux we have a weird situation. The stderr/out/in symbols are both
-+// On GNU libc we have a weird situation. The stderr/out/in symbols are both
- // macros and global variables because of standards requirements. So, we
- // boldly use the EXPLICIT_SYMBOL macro without checking for a #define first.
--#if defined(__linux__) and !defined(__ANDROID__)
-+#if defined(__GLIBC__)
-   {
-     EXPLICIT_SYMBOL(stderr);
-     EXPLICIT_SYMBOL(stdout);
--- 
-2.7.3
-
diff --git a/patches/llvm_host/llvm-0004-Fix-ScalarEvolutionExpander-step-scaling-bug.patch b/patches/llvm_host/llvm-0004-Fix-ScalarEvolutionExpander-step-scaling-bug.patch
deleted file mode 100644
index 9945bf35..00000000
--- a/patches/llvm_host/llvm-0004-Fix-ScalarEvolutionExpander-step-scaling-bug.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From c8ce9e59a883f452bc538b5f16fb83649472dc3e Mon Sep 17 00:00:00 2001
-From: Keno Fischer <kfischer@college.harvard.edu>
-Date: Wed, 13 Jul 2016 01:28:12 +0000
-Subject: [PATCH] Fix ScalarEvolutionExpander step scaling bug
-
-The expandAddRecExprLiterally function incorrectly transforms
-`[Start + Step * X]` into `Step * [Start + X]` instead of the correct
-transform of `[Step * X] + Start`.
-
-This caused https://github.com/JuliaLang/julia/issues/14704#issuecomment-174126219
-due to what appeared to be sufficiently complicated loop interactions.
-
-Patch by Jameson Nash (jameson@juliacomputing.com).
-
-Reviewers: sanjoy
-Differential Revision: http://reviews.llvm.org/D16505
-
-git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275239 91177308-0d34-0410-b5e6-96231b3b80d8
-
-Alpine maintainer notes:
-This patch replaces deps/patches/llvm-3.7.1_3.patch from Julia.
----
- lib/Analysis/ScalarEvolutionExpander.cpp           |  7 ++++
- .../ScalarEvolution/incorrect-offset-scaling.ll    | 48 ++++++++++++++++++++++
- 2 files changed, 55 insertions(+)
- create mode 100644 test/Analysis/ScalarEvolution/incorrect-offset-scaling.ll
-
-diff --git a/lib/Analysis/ScalarEvolutionExpander.cpp b/lib/Analysis/ScalarEvolutionExpander.cpp
-index 7716435..77e4ec7 100644
---- a/lib/Analysis/ScalarEvolutionExpander.cpp
-+++ b/lib/Analysis/ScalarEvolutionExpander.cpp
-@@ -1288,6 +1288,13 @@ Value *SCEVExpander::expandAddRecExprLiterally(const SCEVAddRecExpr *S) {
-   if (!SE.dominates(Step, L->getHeader())) {
-     PostLoopScale = Step;
-     Step = SE.getConstant(Normalized->getType(), 1);
-+    if (!Start->isZero()) {
-+        // The normalization below assumes that Start is constant zero, so if
-+        // it isn't re-associate Start to PostLoopOffset.
-+        assert(!PostLoopOffset && "Start not-null but PostLoopOffset set?");
-+        PostLoopOffset = Start;
-+        Start = SE.getConstant(Normalized->getType(), 0);
-+    }
-     Normalized =
-       cast<SCEVAddRecExpr>(SE.getAddRecExpr(
-                              Start, Step, Normalized->getLoop(),
-diff --git a/test/Analysis/ScalarEvolution/incorrect-offset-scaling.ll b/test/Analysis/ScalarEvolution/incorrect-offset-scaling.ll
-new file mode 100644
-index 0000000..7ffb093
---- /dev/null
-+++ b/test/Analysis/ScalarEvolution/incorrect-offset-scaling.ll
-@@ -0,0 +1,48 @@
-+; RUN: opt -S -loop-reduce < %s | FileCheck %s
-+
-+target triple = "x86_64-unknown-unknown"
-+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-+
-+define void @incorrect_offset_scaling(i64, i64*) {
-+top:
-+  br label %L
-+
-+L:                                                ; preds = %idxend.10, %idxend, %L2, %top
-+  br i1 undef, label %L, label %L1
-+
-+L1:                                               ; preds = %L1.preheader, %L2
-+  %r13 = phi i64 [ %r1, %L2 ], [ 1, %L ]
-+; CHECK:  %lsr.iv = phi i64 [ 0, %L{{[^ ]+}} ], [ %lsr.iv.next, %L2 ]
-+; CHECK-NOT:  %lsr.iv = phi i64 [ -1, %L{{[^ ]+}} ], [ %lsr.iv.next, %L2 ]
-+; CHECK:  br
-+  %r0 = add i64 %r13, -1
-+  br label %idxend.8
-+
-+L2:                                               ; preds = %idxend.8
-+  %r1 = add i64 %r13, 1
-+  br i1 undef, label %L, label %L1
-+
-+if6:                                              ; preds = %idxend.8
-+  %r2 = add i64 %0, -1
-+  %r3 = load i64, i64* %1, align 8
-+; CHECK-NOT:  %r2
-+; CHECK:  %r3 = load i64
-+  br label %ib
-+
-+idxend.8:                                         ; preds = %L1
-+  br i1 undef, label %if6, label %L2
-+
-+ib:                                               ; preds = %if6
-+  %r4 = mul i64 %r3, %r0
-+  %r5 = add i64 %r2, %r4
-+  %r6 = icmp ult i64 %r5, undef
-+; CHECK  %2 = mul i64 %lsr.iv, %r3
-+; CHECK  %3 = add i64 %1, -1
-+; CHECK  %4 = add i64 %0, %r3
-+; CHECK  %r6
-+  %r7 = getelementptr i64, i64* undef, i64 %r5
-+  store i64 1, i64* %r7, align 8
-+; CHECK  %5 = mul i64 %lsr.iv, %r3
-+; CHECK  %6 = add i64 %5, -1
-+  br label %L
-+}
diff --git a/patches/llvm_host/llvm-0005-optimize-store-of-bitcast-from-vector-to-aggregate.patch b/patches/llvm_host/llvm-0005-optimize-store-of-bitcast-from-vector-to-aggregate.patch
deleted file mode 100644
index 7f891b66..00000000
--- a/patches/llvm_host/llvm-0005-optimize-store-of-bitcast-from-vector-to-aggregate.patch
+++ /dev/null
@@ -1,181 +0,0 @@
-From 1ca1fcaa5b4c75a65a202badfd5df8240a36ca0f Mon Sep 17 00:00:00 2001
-From: "Arch D. Robison" <arch.robison@intel.com>
-Date: Mon, 25 Apr 2016 22:22:39 +0000
-Subject: [PATCH] Optimize store of "bitcast" from vector to aggregate.
-
-This patch is what was the "instcombine" portion of D14185, with an additional
-test added (see julia_pseudovec in test/Transforms/InstCombine/insert-val-extract-elem.ll).
-The patch causes instcombine to replace sequences of extractelement-insertvalue-store
-that act essentially like a bitcast followed by a store.
-
-Differential review: http://reviews.llvm.org/D14260
-
-git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267482 91177308-0d34-0410-b5e6-96231b3b80d8
-
-Alpine maintainer notes:
-  - Updated for llvm 3.8.1.
-  - This patch replaces llvm-D14260.patch from Julia.
----
- .../InstCombine/InstCombineLoadStoreAlloca.cpp     | 60 ++++++++++++++++++
- .../InstCombine/insert-val-extract-elem.ll         | 74 ++++++++++++++++++++++
- 2 files changed, 134 insertions(+)
- create mode 100644 test/Transforms/InstCombine/insert-val-extract-elem.ll
-
-diff --git a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
-index 96f0908..0ee6045 100644
---- a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
-+++ b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
-@@ -913,6 +913,61 @@ Instruction *InstCombiner::visitLoadInst(LoadInst &LI) {
-   return nullptr;
- }
- 
-+/// \brief Look for extractelement/insertvalue sequence that acts like a bitcast.
-+///
-+/// \returns underlying value that was "cast", or nullptr otherwise.
-+///
-+/// For example, if we have:
-+///
-+///     %E0 = extractelement <2 x double> %U, i32 0
-+///     %V0 = insertvalue [2 x double] undef, double %E0, 0
-+///     %E1 = extractelement <2 x double> %U, i32 1
-+///     %V1 = insertvalue [2 x double] %V0, double %E1, 1
-+///
-+/// and the layout of a <2 x double> is isomorphic to a [2 x double],
-+/// then %V1 can be safely approximated by a conceptual "bitcast" of %U.
-+/// Note that %U may contain non-undef values where %V1 has undef.
-+static Value *likeBitCastFromVector(InstCombiner &IC, Value *V) {
-+  Value *U = nullptr;
-+  while (auto *IV = dyn_cast<InsertValueInst>(V)) {
-+    auto *E = dyn_cast<ExtractElementInst>(IV->getInsertedValueOperand());
-+    if (!E)
-+      return nullptr;
-+    auto *W = E->getVectorOperand();
-+    if (!U)
-+      U = W;
-+    else if (U != W)
-+      return nullptr;
-+    auto *CI = dyn_cast<ConstantInt>(E->getIndexOperand());
-+    if (!CI || IV->getNumIndices() != 1 || CI->getZExtValue() != *IV->idx_begin())
-+      return nullptr;
-+    V = IV->getAggregateOperand();
-+  }
-+  if (!isa<UndefValue>(V) ||!U)
-+    return nullptr;
-+
-+  auto *UT = cast<VectorType>(U->getType());
-+  auto *VT = V->getType();
-+  // Check that types UT and VT are bitwise isomorphic.
-+  const auto &DL = IC.getDataLayout();
-+  if (DL.getTypeStoreSizeInBits(UT) != DL.getTypeStoreSizeInBits(VT)) {
-+    return nullptr;
-+  }
-+  if (auto *AT = dyn_cast<ArrayType>(VT)) {
-+    if (AT->getNumElements() != UT->getNumElements())
-+      return nullptr;
-+  } else {
-+    auto *ST = cast<StructType>(VT);
-+    if (ST->getNumElements() != UT->getNumElements())
-+      return nullptr;
-+    for (const auto *EltT : ST->elements()) {
-+      if (EltT != UT->getElementType())
-+        return nullptr;
-+    }
-+  }
-+  return U;
-+}
-+
- /// \brief Combine stores to match the type of value being stored.
- ///
- /// The core idea here is that the memory does not have any intrinsic type and
-@@ -924,6 +979,11 @@
-     return true;
-   }
-
-+  if (Value *U = likeBitCastFromVector(IC, V)) {
-+    combineStoreToNewValue(IC, SI, U);
-+    return true;
-+  }
-+
-   // FIXME: We should also canonicalize loads of vectors when their elements are
-   // cast to other types.
-   return false;
-diff --git a/test/Transforms/InstCombine/insert-val-extract-elem.ll b/test/Transforms/InstCombine/insert-val-extract-elem.ll
-new file mode 100644
-index 0000000..db7b403
---- /dev/null
-+++ b/test/Transforms/InstCombine/insert-val-extract-elem.ll
-@@ -0,0 +1,74 @@
-+; RUN: opt -S -instcombine %s | FileCheck %s
-+
-+; CHECK-LABEL: julia_2xdouble
-+; CHECK-NOT: insertvalue
-+; CHECK-NOT: extractelement
-+; CHECK: store <2 x double>
-+define void @julia_2xdouble([2 x double]* sret, <2 x double>*) {
-+top:
-+  %x = load <2 x double>, <2 x double>* %1
-+  %x0 = extractelement <2 x double> %x, i32 0
-+  %i0 = insertvalue [2 x double] undef, double %x0, 0
-+  %x1 = extractelement <2 x double> %x, i32 1
-+  %i1 = insertvalue [2 x double] %i0, double %x1, 1
-+  store [2 x double] %i1, [2 x double]* %0, align 4
-+  ret void
-+}
-+
-+; Test with two inserts to the same index
-+; CHECK-LABEL: julia_2xi64
-+; CHECK-NOT: insertvalue
-+; CHECK-NOT: extractelement
-+; CHECK: store <2 x i64>
-+define void @julia_2xi64([2 x i64]* sret, <2 x i64>*) {
-+top:
-+  %x = load <2 x i64>, <2 x i64>* %1
-+  %x0 = extractelement <2 x i64> %x, i32 1
-+  %i0 = insertvalue [2 x i64] undef, i64 %x0, 0
-+  %x1 = extractelement <2 x i64> %x, i32 1
-+  %i1 = insertvalue [2 x i64] %i0, i64 %x1, 1
-+  %x2 = extractelement <2 x i64> %x, i32 0
-+  %i2 = insertvalue [2 x i64] %i1, i64 %x2, 0
-+  store [2 x i64] %i2, [2 x i64]* %0, align 4
-+  ret void
-+}
-+
-+; CHECK-LABEL: julia_4xfloat
-+; CHECK-NOT: insertvalue
-+; CHECK-NOT: extractelement
-+; CHECK: store <4 x float>
-+define void @julia_4xfloat([4 x float]* sret, <4 x float>*) {
-+top:
-+  %x = load <4 x float>, <4 x float>* %1
-+  %x0 = extractelement <4 x float> %x, i32 0
-+  %i0 = insertvalue [4 x float] undef, float %x0, 0
-+  %x1 = extractelement <4 x float> %x, i32 1
-+  %i1 = insertvalue [4 x float] %i0, float %x1, 1
-+  %x2 = extractelement <4 x float> %x, i32 2
-+  %i2 = insertvalue [4 x float] %i1, float %x2, 2
-+  %x3 = extractelement <4 x float> %x, i32 3
-+  %i3 = insertvalue [4 x float] %i2, float %x3, 3
-+  store [4 x float] %i3, [4 x float]* %0, align 4
-+  ret void
-+}
-+
-+%pseudovec = type { float, float, float, float }
-+
-+; CHECK-LABEL: julia_pseudovec
-+; CHECK-NOT: insertvalue
-+; CHECK-NOT: extractelement
-+; CHECK: store <4 x float>
-+define void @julia_pseudovec(%pseudovec* sret, <4 x float>*) {
-+top:
-+  %x = load <4 x float>, <4 x float>* %1
-+  %x0 = extractelement <4 x float> %x, i32 0
-+  %i0 = insertvalue %pseudovec undef, float %x0, 0
-+  %x1 = extractelement <4 x float> %x, i32 1
-+  %i1 = insertvalue %pseudovec %i0, float %x1, 1
-+  %x2 = extractelement <4 x float> %x, i32 2
-+  %i2 = insertvalue %pseudovec %i1, float %x2, 2
-+  %x3 = extractelement <4 x float> %x, i32 3
-+  %i3 = insertvalue %pseudovec %i2, float %x3, 3
-+  store %pseudovec %i3, %pseudovec* %0, align 4
-+  ret void
-+}
diff --git a/patches/llvm_host/llvm-0006-clone-every-functions-debug-info.patch b/patches/llvm_host/llvm-0006-clone-every-functions-debug-info.patch
deleted file mode 100644
index 567ddcad..00000000
--- a/patches/llvm_host/llvm-0006-clone-every-functions-debug-info.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From 11adcc4de0797c83e61ae0240927f0bafcf041a9 Mon Sep 17 00:00:00 2001
-From: Keno Fischer <kfischer@college.harvard.edu>
-Date: Sat, 13 Feb 2016 02:04:29 +0000
-Subject: [PATCH] [Cloning] Clone every Function's Debug Info
-
-Summary:
-Export the CloneDebugInfoMetadata utility, which clones all debug info
-associated with a function into the first module. Also use this function
-in CloneModule on each function we clone (the CloneFunction entrypoint
-already does this).
-
-Without this, cloning a module will lead to DI quality regressions,
-especially since r252219 reversed the Function <-> DISubprogram edge
-(before we could get lucky and have this edge preserved if the
-DISubprogram itself was, e.g. due to location metadata).
-
-This was verified to fix missing debug information in julia and
-a unittest to verify the new behavior is included.
-
-Patch by Yichao Yu! Thanks!
-
-Reviewers: loladiro, pcc
-Differential Revision: http://reviews.llvm.org/D17165
-
-git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260791 91177308-0d34-0410-b5e6-96231b3b80d8
-
-Alpine maintainer notes:
-  - Corresponds to llvm-D17165-D18583.patch in Julia.
----
- include/llvm/Transforms/Utils/Cloning.h |  5 +++++
- lib/Transforms/Utils/CloneFunction.cpp  |  4 ++--
- lib/Transforms/Utils/CloneModule.cpp    |  1 +
- unittests/Transforms/Utils/Cloning.cpp  | 25 +++++++++++++++++++++++++
- 4 files changed, 33 insertions(+), 2 deletions(-)
-
-diff --git a/include/llvm/Transforms/Utils/Cloning.h b/include/llvm/Transforms/Utils/Cloning.h
-index 4f006f2..0bae2bd 100644
---- a/include/llvm/Transforms/Utils/Cloning.h
-+++ b/include/llvm/Transforms/Utils/Cloning.h
-@@ -130,6 +130,11 @@ Function *CloneFunction(const Function *F, ValueToValueMapTy &VMap,
-                         bool ModuleLevelChanges,
-                         ClonedCodeInfo *CodeInfo = nullptr);
- 
-+/// Clone the module-level debug info associated with OldFunc. The cloned data
-+/// will point to NewFunc instead.
-+void CloneDebugInfoMetadata(Function *NewFunc, const Function *OldFunc,
-+                            ValueToValueMapTy &VMap);
-+
- /// Clone OldFunc into NewFunc, transforming the old arguments into references
- /// to VMap values.  Note that if NewFunc already has basic blocks, the ones
- /// cloned into it will be added to the end of the function.  This function
-diff --git a/lib/Transforms/Utils/CloneFunction.cpp b/lib/Transforms/Utils/CloneFunction.cpp
-index 6454afb..8b5692a 100644
---- a/lib/Transforms/Utils/CloneFunction.cpp
-+++ b/lib/Transforms/Utils/CloneFunction.cpp
-@@ -187,8 +187,8 @@ static void AddOperand(DICompileUnit *CU, DISubprogramArray SPs,
- 
- // Clone the module-level debug info associated with OldFunc. The cloned data
- // will point to NewFunc instead.
--static void CloneDebugInfoMetadata(Function *NewFunc, const Function *OldFunc,
--                            ValueToValueMapTy &VMap) {
-+void llvm::CloneDebugInfoMetadata(Function *NewFunc, const Function *OldFunc,
-+                                  ValueToValueMapTy &VMap) {
-   DebugInfoFinder Finder;
-   Finder.processModule(*OldFunc->getParent());
- 
-diff --git a/lib/Transforms/Utils/CloneModule.cpp b/lib/Transforms/Utils/CloneModule.cpp
-index 53de62a..b16a02a 100644
---- a/lib/Transforms/Utils/CloneModule.cpp
-+++ b/lib/Transforms/Utils/CloneModule.cpp
-@@ -136,6 +136,7 @@ std::unique_ptr<Module> llvm::CloneModule(
-         VMap[&*J] = &*DestI++;
-       }
- 
-+      CloneDebugInfoMetadata(F, &*I, VMap);
-       SmallVector<ReturnInst*, 8> Returns;  // Ignore returns cloned.
-       CloneFunctionInto(F, &*I, VMap, /*ModuleLevelChanges=*/true, Returns);
-     }
-diff --git a/unittests/Transforms/Utils/Cloning.cpp b/unittests/Transforms/Utils/Cloning.cpp
-index 25e322e..b761e4e 100644
---- a/unittests/Transforms/Utils/Cloning.cpp
-+++ b/unittests/Transforms/Utils/Cloning.cpp
-@@ -423,6 +423,7 @@ class CloneModule : public ::testing::Test {
-   void SetupModule() { OldM = new Module("", C); }
- 
-   void CreateOldModule() {
-+    DIBuilder DBuilder(*OldM);
-     IRBuilder<> IBuilder(C);
- 
-     auto *FuncType = FunctionType::get(Type::getVoidTy(C), false);
-@@ -431,9 +432,25 @@ class CloneModule : public ::testing::Test {
-     auto *F =
-         Function::Create(FuncType, GlobalValue::PrivateLinkage, "f", OldM);
-     F->setPersonalityFn(PersFn);
-+
-+    // Create debug info
-+    auto *File = DBuilder.createFile("filename.c", "/file/dir/");
-+    DITypeRefArray ParamTypes = DBuilder.getOrCreateTypeArray(None);
-+    DISubroutineType *DFuncType = DBuilder.createSubroutineType(ParamTypes);
-+    auto *CU =
-+        DBuilder.createCompileUnit(dwarf::DW_LANG_C99, "filename.c",
-+                                   "/file/dir", "CloneModule", false, "", 0);
-+    // Function DI
-+    auto *Subprogram = DBuilder.createFunction(CU, "f", "f", File, 4, DFuncType,
-+                                               true, true, 3, 0, false);
-+    F->setSubprogram(Subprogram);
-+
-     auto *Entry = BasicBlock::Create(C, "", F);
-     IBuilder.SetInsertPoint(Entry);
-     IBuilder.CreateRetVoid();
-+
-+    // Finalize the debug info
-+    DBuilder.finalize();
-   }
- 
-   void CreateNewModule() { NewM = llvm::CloneModule(OldM).release(); }
-@@ -447,4 +464,12 @@ TEST_F(CloneModule, Verify) {
-   EXPECT_FALSE(verifyModule(*NewM));
- }
- 
-+TEST_F(CloneModule, Subprogram) {
-+  Function *NewF = NewM->getFunction("f");
-+  DISubprogram *SP = NewF->getSubprogram();
-+  EXPECT_TRUE(SP != nullptr);
-+  EXPECT_EQ(SP->getName(), "f");
-+  EXPECT_EQ(SP->getFile()->getFilename(), "filename.c");
-+  EXPECT_EQ(SP->getLine(), (unsigned)4);
-+}
- }
diff --git a/patches/llvm_host/llvm-0007-reduce-complexity-of-debug-info-clonning-and-fix-correctness.patch b/patches/llvm_host/llvm-0007-reduce-complexity-of-debug-info-clonning-and-fix-correctness.patch
deleted file mode 100644
index 0930c28e..00000000
--- a/patches/llvm_host/llvm-0007-reduce-complexity-of-debug-info-clonning-and-fix-correctness.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From af289e04413504c3bdc252e08c3fe17bf7ea6dc8 Mon Sep 17 00:00:00 2001
-From: Peter Collingbourne <peter@pcc.me.uk>
-Date: Wed, 30 Mar 2016 22:05:13 +0000
-Subject: [PATCH] Cloning: Reduce complexity of debug info cloning and fix
- correctness issue.
-
-Commit r260791 contained an error in that it would introduce a cross-module
-reference in the old module. It also introduced O(N^2) complexity in the
-module cloner by requiring the entire module to be visited for each function.
-Fix both of these problems by avoiding use of the CloneDebugInfoMetadata
-function (which is only designed to do intra-module cloning) and cloning
-function-attached metadata in the same way that we clone all other metadata.
-
-Differential Revision: http://reviews.llvm.org/D18583
-
-git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264935 91177308-0d34-0410-b5e6-96231b3b80d8
-
-Alpine maintainer notes:
-  - Corresponds to llvm-D17165-D18583.patch in Julia.
----
- include/llvm/Transforms/Utils/Cloning.h |  5 -----
- lib/Transforms/Utils/CloneFunction.cpp  | 13 +++++++++++--
- lib/Transforms/Utils/CloneModule.cpp    |  1 -
- unittests/Transforms/Utils/Cloning.cpp  |  6 ++++++
- 4 files changed, 17 insertions(+), 8 deletions(-)
-
-diff --git a/include/llvm/Transforms/Utils/Cloning.h b/include/llvm/Transforms/Utils/Cloning.h
-index 0bae2bd..4f006f2 100644
---- a/include/llvm/Transforms/Utils/Cloning.h
-+++ b/include/llvm/Transforms/Utils/Cloning.h
-@@ -130,11 +130,6 @@ Function *CloneFunction(const Function *F, ValueToValueMapTy &VMap,
-                         bool ModuleLevelChanges,
-                         ClonedCodeInfo *CodeInfo = nullptr);
- 
--/// Clone the module-level debug info associated with OldFunc. The cloned data
--/// will point to NewFunc instead.
--void CloneDebugInfoMetadata(Function *NewFunc, const Function *OldFunc,
--                            ValueToValueMapTy &VMap);
--
- /// Clone OldFunc into NewFunc, transforming the old arguments into references
- /// to VMap values.  Note that if NewFunc already has basic blocks, the ones
- /// cloned into it will be added to the end of the function.  This function
-diff --git a/lib/Transforms/Utils/CloneFunction.cpp b/lib/Transforms/Utils/CloneFunction.cpp
-index 05b0a17..8e1715a 100644
---- a/lib/Transforms/Utils/CloneFunction.cpp
-+++ b/lib/Transforms/Utils/CloneFunction.cpp
-@@ -119,6 +119,15 @@ void llvm::CloneFunctionInto(Function *NewFunc, const Function *OldFunc,
-           .addAttributes(NewFunc->getContext(), AttributeSet::FunctionIndex,
-                          OldAttrs.getFnAttributes()));
- 
-+  SmallVector<std::pair<unsigned, MDNode *>, 1> MDs;
-+  OldFunc->getAllMetadata(MDs);
-+  for (auto MD : MDs)
-+    NewFunc->setMetadata(
-+        MD.first,
-+        MapMetadata(MD.second, VMap,
-+                    ModuleLevelChanges ? RF_None : RF_NoModuleLevelChanges,
-+                    TypeMapper, Materializer));
-+
-   // Loop over all of the basic blocks in the function, cloning them as
-   // appropriate.  Note that we save BE this way in order to handle cloning of
-   // recursive functions into themselves.
-@@ -187,8 +196,8 @@ static void AddOperand(DICompileUnit *CU, DISubprogramArray SPs,
- 
- // Clone the module-level debug info associated with OldFunc. The cloned data
- // will point to NewFunc instead.
--void llvm::CloneDebugInfoMetadata(Function *NewFunc, const Function *OldFunc,
--                                  ValueToValueMapTy &VMap) {
-+static void CloneDebugInfoMetadata(Function *NewFunc, const Function *OldFunc,
-+                                   ValueToValueMapTy &VMap) {
-   DebugInfoFinder Finder;
-   Finder.processModule(*OldFunc->getParent());
- 
-diff --git a/lib/Transforms/Utils/CloneModule.cpp b/lib/Transforms/Utils/CloneModule.cpp
-index 494e275..929f51b 100644
---- a/lib/Transforms/Utils/CloneModule.cpp
-+++ b/lib/Transforms/Utils/CloneModule.cpp
-@@ -138,7 +138,6 @@ std::unique_ptr<Module> llvm::CloneModule(
-         VMap[&*J] = &*DestI++;
-       }
- 
--      CloneDebugInfoMetadata(F, &*I, VMap);
-       SmallVector<ReturnInst*, 8> Returns;  // Ignore returns cloned.
-       CloneFunctionInto(F, &*I, VMap, /*ModuleLevelChanges=*/true, Returns);
-     }
-diff --git a/unittests/Transforms/Utils/Cloning.cpp b/unittests/Transforms/Utils/Cloning.cpp
-index b761e4e..f06a20f 100644
---- a/unittests/Transforms/Utils/Cloning.cpp
-+++ b/unittests/Transforms/Utils/Cloning.cpp
-@@ -464,6 +464,12 @@ TEST_F(CloneModule, Verify) {
-   EXPECT_FALSE(verifyModule(*NewM));
- }
- 
-+TEST_F(CloneModule, OldModuleUnchanged) {
-+  DebugInfoFinder Finder;
-+  Finder.processModule(*OldM);
-+  EXPECT_EQ(1U, Finder.subprogram_count());
-+}
-+
- TEST_F(CloneModule, Subprogram) {
-   Function *NewF = NewM->getFunction("f");
-   DISubprogram *SP = NewF->getSubprogram();
diff --git a/patches/llvm_host/llvm-0008-dont-widen-metadata-on-store-to-load-forwarding.patch b/patches/llvm_host/llvm-0008-dont-widen-metadata-on-store-to-load-forwarding.patch
deleted file mode 100644
index b66584dc..00000000
--- a/patches/llvm_host/llvm-0008-dont-widen-metadata-on-store-to-load-forwarding.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 3c80c2658022201214241e9229ac35097cc476d2 Mon Sep 17 00:00:00 2001
-From: Eli Friedman <eli.friedman@gmail.com>
-Date: Thu, 16 Jun 2016 02:33:42 +0000
-Subject: [PATCH] [InstCombine] Don't widen metadata on store-to-load
- forwarding
-
-The original check for load CSE or store-to-load forwarding is wrong
-when the forwarded stored value happened to be a load.
-
-Ref https://github.com/JuliaLang/julia/issues/16894
-
-Differential Revision: http://reviews.llvm.org/D21271
-
-Patch by Yichao Yu!
-
-git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272868 91177308-0d34-0410-b5e6-96231b3b80d8
-
-Alpine maintainer notes:
-  - Updated for llvm 3.8.1.
-  - Corresponds to llvm-D21271-instcombine-tbaa-3.8.patch in Julia.
----
- include/llvm/Analysis/Loads.h                           |  3 ++-
- lib/Analysis/Loads.cpp                                  |  5 ++++-
- .../InstCombine/InstCombineLoadStoreAlloca.cpp          |  6 ++++--
- test/Transforms/InstCombine/tbaa-store-to-load.ll       | 17 +++++++++++++++++
- 4 files changed, 27 insertions(+), 4 deletions(-)
- create mode 100644 test/Transforms/InstCombine/tbaa-store-to-load.ll
-
-diff --git a/include/llvm/Analysis/Loads.h b/include/llvm/Analysis/Loads.h
-index e5bd0c8..9d24b7b 100644
---- a/include/llvm/Analysis/Loads.h
-+++ b/include/llvm/Analysis/Loads.h
-@@ -82,7 +82,8 @@ Value *FindAvailableLoadedValue(LoadInst *Load, BasicBlock *ScanBB,
-                                 BasicBlock::iterator &ScanFrom,
-                                 unsigned MaxInstsToScan = DefMaxInstsToScan,
-                                 AliasAnalysis *AA = nullptr,
--                                AAMDNodes *AATags = nullptr);
-+                                AAMDNodes *AATags = nullptr,
-+                                bool *IsLoadCSE = nullptr);
- 
- }
- 
-diff --git a/lib/Analysis/Loads.cpp b/lib/Analysis/Loads.cpp
-index dce243c..7d3fd59 100644
---- a/lib/Analysis/Loads.cpp
-+++ b/lib/Analysis/Loads.cpp
-@@ -322,7 +322,8 @@ llvm::DefMaxInstsToScan("available-load-scan-limit", cl::init(6), cl::Hidden,
- Value *llvm::FindAvailableLoadedValue(LoadInst *Load, BasicBlock *ScanBB,
-                                       BasicBlock::iterator &ScanFrom,
-                                       unsigned MaxInstsToScan,
--                                      AliasAnalysis *AA, AAMDNodes *AATags) {
-+                                      AliasAnalysis *AA, AAMDNodes *AATags,
-+                                      bool *IsLoadCSE) {
-   if (MaxInstsToScan == 0)
-     MaxInstsToScan = ~0U;
- 
-@@ -374,6 +375,8 @@ Value *llvm::FindAvailableLoadedValue(LoadInst *Load, BasicBlock *ScanBB,
- 
-         if (AATags)
-           LI->getAAMetadata(*AATags);
-+        if (IsLoadCSE)
-+            *IsLoadCSE = true;
-         return LI;
-       }
- 
-diff --git a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
-index 6a5d5a6..d312983 100644
---- a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
-+++ b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
-@@ -800,10 +800,12 @@ Instruction *InstCombiner::visitLoadInst(LoadInst &LI) {
-   // separated by a few arithmetic operations.
-   BasicBlock::iterator BBI(LI);
-   AAMDNodes AATags;
-+  bool IsLoadCSE = false;
-   if (Value *AvailableVal =
-       FindAvailableLoadedValue(Op, LI.getParent(), BBI,
--                               DefMaxInstsToScan, AA, &AATags)) {
--    if (LoadInst *NLI = dyn_cast<LoadInst>(AvailableVal)) {
-+                               DefMaxInstsToScan, AA, &AATags, &IsLoadCSE)) {
-+    if (IsLoadCSE) {
-+      LoadInst *NLI = cast<LoadInst>(AvailableVal);
-       unsigned KnownIDs[] = {
-           LLVMContext::MD_tbaa,            LLVMContext::MD_alias_scope,
-           LLVMContext::MD_noalias, LLVMContext::MD_range,
-diff --git a/test/Transforms/InstCombine/tbaa-store-to-load.ll b/test/Transforms/InstCombine/tbaa-store-to-load.ll
-new file mode 100644
-index 0000000..707be73
---- /dev/null
-+++ b/test/Transforms/InstCombine/tbaa-store-to-load.ll
-@@ -0,0 +1,17 @@
-+; RUN: opt -S -instcombine < %s 2>&1 | FileCheck %s
-+
-+define i64 @f(i64* %p1, i64* %p2) {
-+top:
-+  ; check that the tbaa is preserved
-+  ; CHECK-LABEL: @f(
-+  ; CHECK: %v1 = load i64, i64* %p1, align 8, !tbaa !0
-+  ; CHECK: store i64 %v1, i64* %p2, align 8
-+  ; CHECK: ret i64 %v1
-+  %v1 = load i64, i64* %p1, align 8, !tbaa !0
-+  store i64 %v1, i64* %p2, align 8
-+  %v2 = load i64, i64* %p2, align 8
-+  ret i64 %v2
-+}
-+
-+!0 = !{!1, !1, i64 0}
-+!1 = !{!"load_tbaa"}
diff --git a/patches/llvm_host/llvm-0009-nm-workaround.patch b/patches/llvm_host/llvm-0009-nm-workaround.patch
deleted file mode 100644
index 5755e57f..00000000
--- a/patches/llvm_host/llvm-0009-nm-workaround.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From https://llvm.org/bugs/show_bug.cgi?id=24115
-
-diff --git a/tools/llvm-nm/llvm-nm.cpp b/tools/llvm-nm/llvm-nm.cpp
-index e7ee312..b9e4779 100644
---- a/tools/llvm-nm/llvm-nm.cpp
-+++ b/tools/llvm-nm/llvm-nm.cpp
-@@ -486,7 +486,7 @@ static void sortAndPrintSymbolList(SymbolicFile &Obj, bool printName,
-                                    std::string ArchiveName,
-                                    std::string ArchitectureName) {
-   if (!NoSort) {
--    std::function<bool(const NMSymbol &, const NMSymbol &)> Cmp;
-+    bool (*Cmp)(const NMSymbol &, const NMSymbol &);
-     if (NumericSort)
-       Cmp = compareSymbolAddress;
-     else if (SizeSort)
-@@ -495,8 +495,9 @@ static void sortAndPrintSymbolList(SymbolicFile &Obj, bool printName,
-       Cmp = compareSymbolName;
- 
-     if (ReverseSort)
--      Cmp = [=](const NMSymbol &A, const NMSymbol &B) { return Cmp(B, A); };
--    std::sort(SymbolList.begin(), SymbolList.end(), Cmp);
-+      std::sort(SymbolList.begin(), SymbolList.end(), [=](const NMSymbol &A, const NMSymbol &B) { return Cmp(B, A); });
-+    else
-+      std::sort(SymbolList.begin(), SymbolList.end(), Cmp);
-   }
- 
-   if (!PrintFileName) {
diff --git a/patches/mailutils-3.15.local.patch b/patches/mailutils-3.15.local.patch
new file mode 100644
index 00000000..d5d8d82c
--- /dev/null
+++ b/patches/mailutils-3.15.local.patch
@@ -0,0 +1,122 @@
+diff -ru mailutils-3.15.orig/libproto/dotmail/tests/Makefile.in mailutils-3.15/libproto/dotmail/tests/Makefile.in
+--- mailutils-3.15.orig/libproto/dotmail/tests/Makefile.in      2022-04-17 20:20:43.000000000 +0200
++++ mailutils-3.15/libproto/dotmail/tests/Makefile.in   2024-03-10 22:14:03.620481168 +0100
+@@ -997,7 +997,7 @@
+  -I$(top_srcdir)\
+  -I$(top_srcdir)/libmailutils/tests
+
+-LDADD = -L$(top_builddir)/libmailutils/tests -lmu_tesh $(MU_LIB_DOTMAIL) $(MU_LIB_MAILUTILS)
++LDADD = $(top_builddir)/libmailutils/tests/libmu_tesh.la $(MU_LIB_DOTMAIL) $(MU_LIB_MAILUTILS)
+ all: all-am
+
+ .SUFFIXES:
+diff -ru mailutils-3.15.orig/libproto/maildir/tests/Makefile.in mailutils-3.15/libproto/maildir/tests/Makefile.in
+--- mailutils-3.15.orig/libproto/maildir/tests/Makefile.in      2022-04-17 20:20:43.000000000 +0200
++++ mailutils-3.15/libproto/maildir/tests/Makefile.in   2024-03-10 22:14:47.727147523 +0100
+@@ -997,7 +997,7 @@
+  -I$(top_srcdir)\
+  -I$(top_srcdir)/libmailutils/tests
+
+-LDADD = -L$(top_builddir)/libmailutils/tests -lmu_tesh $(MU_LIB_MAILDIR) $(MU_LIB_MAILUTILS)
++LDADD = $(top_builddir)/libmailutils/tests/libmu_tesh.la $(MU_LIB_MAILDIR) $(MU_LIB_MAILUTILS)
+ all: all-am
+
+ .SUFFIXES:
+diff -ru mailutils-3.15.orig/libproto/mbox/tests/Makefile.in mailutils-3.15/libproto/mbox/tests/Makefile.in
+--- mailutils-3.15.orig/libproto/mbox/tests/Makefile.in 2022-04-17 20:20:44.000000000 +0200
++++ mailutils-3.15/libproto/mbox/tests/Makefile.in      2024-03-10 22:15:24.401533471 +0100
+@@ -996,7 +996,7 @@
+  -I$(top_srcdir)\
+  -I$(top_srcdir)/libmailutils/tests
+
+-LDADD = -L$(top_builddir)/libmailutils/tests -lmu_tesh $(MU_LIB_MBOX) $(MU_LIB_MAILUTILS)
++LDADD = $(top_builddir)/libmailutils/tests/libmu_tesh.la $(MU_LIB_MBOX) $(MU_LIB_MAILUTILS)
+ all: all-am
+
+ .SUFFIXES:
+diff -ru mailutils-3.15.orig/libproto/mh/tests/Makefile.in mailutils-3.15/libproto/mh/tests/Makefile.in
+--- mailutils-3.15.orig/libproto/mh/tests/Makefile.in   2022-04-17 20:20:44.000000000 +0200
++++ mailutils-3.15/libproto/mh/tests/Makefile.in        2024-03-10 22:13:10.660481552 +0100
+@@ -996,7 +996,7 @@
+  -I$(top_srcdir)\
+  -I$(top_srcdir)/libmailutils/tests
+
+-LDADD = -L$(top_builddir)/libmailutils/tests -lmu_tesh $(MU_LIB_MH) $(MU_LIB_MAILUTILS)
++LDADD = $(top_builddir)/libmailutils/tests/libmu_tesh.la $(MU_LIB_MH) $(MU_LIB_MAILUTILS)
+ all: all-am
+
+ .SUFFIXES:
+diff -ru mailutils-3.15.orig/mda/lmtpd/Makefile.in mailutils-3.15/mda/lmtpd/Makefile.in
+--- mailutils-3.15.orig/mda/lmtpd/Makefile.in   2022-04-17 20:20:45.000000000 +0200
++++ mailutils-3.15/mda/lmtpd/Makefile.in        2024-02-17 13:45:54.067803997 +0100
+@@ -1013,6 +1013,7 @@
+ lmtpd_LDADD = \
+  ../lib/libmda.a\
+  $(top_builddir)/lib/libmuscript.a\
++ $(MU_TCPWRAP_LIBRARIES)\
+  $(MU_APP_LIBRARIES)\
+  $(MU_LIB_SIEVE)\
+  $(MU_LIB_MAILBOX)\
+@@ -1027,7 +1028,6 @@
+  @GUILE_LIBS@\
+  @PYTHON_LIBS@\
+  @DBMLIBS@\
+- $(MU_TCPWRAP_LIBRARIES)\
+  $(MU_COMMON_LIBRARIES)
+
+ all: all-recursive
+diff -ru mailutils-3.15.orig/imap4d/Makefile.in mailutils-3.15/imap4d/Makefile.in
+--- mailutils-3.15.orig/imap4d/Makefile.in	2022-04-17 20:20:36.000000000 +0200
++++ mailutils-3.15/imap4d/Makefile.in	2024-02-17 13:07:06.986978253 +0100
+@@ -1059,8 +1059,8 @@
+  util.c
+ 
+ imap4d_LDADD = $(MU_APP_LIBRARIES) $(MU_LIB_LOCAL_MAILBOX) \
+-	$(MU_LIB_AUTH) $(MU_AUTHLIBS) $(MU_LIB_MAILUTILS) \
+-	@SERV_AUTHLIBS@ $(MU_COMMON_LIBRARIES) $(MU_TCPWRAP_LIBRARIES) \
++	$(MU_TCPWRAP_LIBRARIES) $(MU_LIB_AUTH) $(MU_AUTHLIBS) \
++	@SERV_AUTHLIBS@ $(MU_COMMON_LIBRARIES) $(MU_LIB_MAILUTILS) \
+ 	$(am__append_1)
+ all: all-recursive
+ 
+diff -ru mailutils-3.15.orig/lib/Makefile.in mailutils-3.15/lib/Makefile.in
+--- mailutils-3.15.orig/lib/Makefile.in	2022-04-17 20:20:37.000000000 +0200
++++ mailutils-3.15/lib/Makefile.in	2024-02-17 13:08:38.956977595 +0100
+@@ -1031,7 +1031,7 @@
+ noinst_LIBRARIES = libmuscript.a libmutcpwrap.a
+ libmuaux_la_SOURCES = mailcap.c manlock.c mdecode.c signal.c strexit.c \
+ 	mu_umaxtostr.c mu_umaxtostr.h $(am__append_3) $(am__append_4)
+-libmuaux_la_LIBADD = gnu/libgnu.la
++libmuaux_la_LIBADD = gnu/libgnu.la ../libmailutils/libmailutils.la
+ libmuaux_la_LDFLAGS = -version-info @VI_CURRENT@:@VI_REVISION@:@VI_AGE@
+ libmutcpwrap_a_SOURCES = tcpwrap.c
+ noinst_HEADERS = \
+diff -ru mailutils-3.15.orig/mu/libexec/Makefile.in mailutils-3.15/mu/libexec/Makefile.in
+--- mailutils-3.15.orig/mu/libexec/Makefile.in	2022-04-17 20:20:48.000000000 +0200
++++ mailutils-3.15/mu/libexec/Makefile.in	2024-02-17 13:07:57.013644547 +0100
+@@ -1195,7 +1195,7 @@
+  $(MU_APP_LIBRARIES)\
+  $(MU_LIB_MAILUTILS)\
+  @READLINE_LIBS@\
+- $(MU_COMMON_LIBRARIES)
++ $(MU_COMMON_LIBRARIES) ../../libmailutils/libmailutils.la
+ 
+ LDADD = $(MU_APP_LIBRARIES) $(MUTOOL_LIBRARIES_TAIL)
+ AM_CPPFLAGS = \
+diff -ru mailutils-3.15.orig/pop3d/Makefile.in mailutils-3.15/pop3d/Makefile.in
+--- mailutils-3.15.orig/pop3d/Makefile.in	2022-04-17 20:20:48.000000000 +0200
++++ mailutils-3.15/pop3d/Makefile.in	2024-02-17 13:07:39.963644684 +0100
+@@ -1033,11 +1033,11 @@
+  $(MU_LIB_LOCAL_MAILBOX)\
+  $(MU_LIB_AUTH)\
+  $(MU_AUTHLIBS) \
+- $(MU_LIB_MAILUTILS)\
+  $(MU_COMMON_LIBRARIES)\
+  $(LIBMU_DBM)\
+  @DBMLIBS@\
+- $(MU_TCPWRAP_LIBRARIES)
++ $(MU_TCPWRAP_LIBRARIES)\
++ $(MU_LIB_MAILUTILS)
+ 
+ popauth_SOURCES = popauth.c
+ popauth_LDADD = \
diff --git a/patches/mailutils-3.4.local.patch b/patches/mailutils-3.4.local.patch
deleted file mode 100644
index 85148894..00000000
--- a/patches/mailutils-3.4.local.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-diff -ru mailutils-3.4.orig/imap4d/Makefile.in mailutils-3.4/imap4d/Makefile.in
---- mailutils-3.4.orig/imap4d/Makefile.in	2017-11-02 12:21:12.000000000 +0100
-+++ mailutils-3.4/imap4d/Makefile.in	2018-05-21 13:21:33.429204950 +0200
-@@ -1048,8 +1048,9 @@
-  ${MU_LIB_MAILDIR}\
-  ${MU_LIB_AUTH}\
-  @MU_AUTHLIBS@ \
-+ @MU_TCPWRAP_LIBRARIES@\
-  ${MU_LIB_MAILUTILS}\
-- @SERV_AUTHLIBS@ @MU_COMMON_LIBRARIES@ @MU_TCPWRAP_LIBRARIES@
-+ @SERV_AUTHLIBS@ @MU_COMMON_LIBRARIES@
- 
- imap4d_DEPENDENCIES = \
-  @MU_AUTHLIBS_DEPENDENCY@\
-diff -ru mailutils-3.4.orig/lib/Makefile.in mailutils-3.4/lib/Makefile.in
---- mailutils-3.4.orig/lib/Makefile.in	2017-11-02 12:21:13.000000000 +0100
-+++ mailutils-3.4/lib/Makefile.in	2018-05-21 13:30:13.216744220 +0200
-@@ -183,7 +183,7 @@
-   }
- am__installdirs = "$(DESTDIR)$(libdir)" "$(DESTDIR)$(lispdir)"
- LTLIBRARIES = $(lib_LTLIBRARIES)
--libmuaux_la_DEPENDENCIES = gnu/libgnu.la
-+libmuaux_la_DEPENDENCIES = gnu/libgnu.la ../libmailutils/libmailutils.la
- am_libmuaux_la_OBJECTS = daemon.lo mailcap.lo manlock.lo signal.lo \
- 	strexit.lo mu_umaxtostr.lo
- libmuaux_la_OBJECTS = $(am_libmuaux_la_OBJECTS)
-@@ -1019,7 +1019,7 @@
-  mu_umaxtostr.c\
-  mu_umaxtostr.h
- 
--libmuaux_la_LIBADD = gnu/libgnu.la
-+libmuaux_la_LIBADD = gnu/libgnu.la ../libmailutils/libmailutils.la
- libmuaux_la_LDFLAGS = -version-info @VI_CURRENT@:@VI_REVISION@:@VI_AGE@
- libmutcpwrap_a_SOURCES = tcpwrap.c
- noinst_HEADERS = \
-diff -ru mailutils-3.4.orig/maidag/Makefile.in mailutils-3.4/maidag/Makefile.in
---- mailutils-3.4.orig/maidag/Makefile.in	2017-11-02 12:21:19.000000000 +0100
-+++ mailutils-3.4/maidag/Makefile.in	2018-05-21 13:25:16.403865751 +0200
-@@ -1022,6 +1022,7 @@
-  ${MU_LIB_AUTH}\
-  ${MU_LIB_MAILER}\
-  @MU_AUTHLIBS@\
-+ @MU_TCPWRAP_LIBRARIES@\
-  ${MU_LIB_MAILUTILS} \
-  @MU_COMMON_LIBRARIES@\
-  @LIBMU_SCM@\
-@@ -1030,8 +1031,7 @@
-  $(LIBMU_DBM)\
-  @GUILE_LIBS@\
-  @PYTHON_LIBS@\
-- @DBMLIBS@\
-- @MU_TCPWRAP_LIBRARIES@
-+ @DBMLIBS@
- 
- AM_CPPFLAGS = -I${top_srcdir} @MU_APP_COMMON_INCLUDES@ @GUILE_INCLUDES@ \
-  @PYTHON_INCLUDES@
-diff -ru mailutils-3.4.orig/pop3d/Makefile.in mailutils-3.4/pop3d/Makefile.in
---- mailutils-3.4.orig/pop3d/Makefile.in	2017-11-02 12:21:22.000000000 +0100
-+++ mailutils-3.4/pop3d/Makefile.in	2018-05-21 13:25:05.807995953 +0200
-@@ -1019,11 +1019,11 @@
-  ${MU_LIB_MAILDIR}\
-  ${MU_LIB_AUTH}\
-  @MU_AUTHLIBS@ \
-+ @MU_TCPWRAP_LIBRARIES@\
-  ${MU_LIB_MAILUTILS}\
-  @MU_COMMON_LIBRARIES@\
-  ${LIBMU_DBM}\
-- @DBMLIBS@\
-- @MU_TCPWRAP_LIBRARIES@
-+ @DBMLIBS@
- 
- popauth_SOURCES = popauth.c
- popauth_LDADD = \
diff --git a/patches/mandoc-1.14.5_pre.local.patch b/patches/mandoc-1.14.5_pre.local.patch
deleted file mode 100644
index 1d193e6f..00000000
--- a/patches/mandoc-1.14.5_pre.local.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-diff -Nru mandoc-1.14.5.orig/configure mandoc-1.14.5/configure
---- mandoc-1.14.5.orig/configure	2020-06-02 12:36:34.215963438 +0200
-+++ mandoc-1.14.5/configure	2020-06-02 13:35:04.100931431 +0200
-@@ -41,7 +41,7 @@
- OSNAME=
- UTF8_LOCALE=
- 
--CC=`printf "all:\\n\\t@echo \\\$(CC)\\n" | env -i make -sf -`
-+CC=`printf "all:\\n\\t@echo \\\$(CC)\\n" | env -i PATH="${PATH}" make -sf -`
- CFLAGS=
- LDADD=
- LDFLAGS=
-@@ -289,8 +289,6 @@
- runtest EFTYPE		EFTYPE		|| true
- runtest err		ERR		|| true
- runtest getline		GETLINE		|| true
--singletest getsubopt	GETSUBOPT	|| \
--   runtest getsubopt	GETSUBOPT	-D_GNU_SOURCE || true
- runtest isblank		ISBLANK		|| true
- runtest mkdtemp		MKDTEMP		|| true
- runtest ntohl		NTOHL		|| true
-@@ -299,8 +297,6 @@
- runtest pledge		PLEDGE		|| true
- runtest sandbox_init	SANDBOX_INIT	|| true
- runtest progname	PROGNAME	|| true
--singletest reallocarray	REALLOCARRAY	|| \
--   runtest reallocarray	REALLOCARRAY	-D_OPENBSD_SOURCE || true
- singletest recallocarray RECALLOCARRAY	|| \
-    runtest recallocarray RECALLOCARRAY	-D_OPENBSD_SOURCE || true
- runtest rewb-bsd	REWB_BSD	|| true
-@@ -361,20 +357,6 @@
- 	echo 1>&3
- fi
- 
--# --- nanosleep ---
--if [ -n "${LD_NANOSLEEP}" ]; then
--	runtest nanosleep NANOSLEEP "${LD_NANOSLEEP}" || true
--elif singletest nanosleep NANOSLEEP; then
--	:
--elif runtest nanosleep NANOSLEEP "-lrt"; then
--	LD_NANOSLEEP="-lrt"
--fi
--if [ "${HAVE_NANOSLEEP}" -eq 0 ]; then
--	echo "FATAL: nanosleep: no" 1>&2
--	echo "FATAL: nanosleep: no" 1>&3
--	exit 1
--fi
--
- if [ ${BUILD_CATMAN} -gt 0 ]; then
- 	# --- recvmsg ---
- 	if [ -n "${LD_RECVMSG}" ]; then
-diff -Nru mandoc-1.14.5.orig/configure.local mandoc-1.14.5/configure.local
---- mandoc-1.14.5.orig/configure.local	1970-01-01 01:00:00.000000000 +0100
-+++ mandoc-1.14.5/configure.local	2020-06-02 13:35:25.328930766 +0200
-@@ -0,0 +1,54 @@
-+PREFIX=
-+MANDIR=/share/man
-+LIBDIR=/lib
-+UTF8_LOCALE="en_US.UTF-8"
-+MANPATH_DEFAULT="/share/man"
-+LN="ln -sf"
-+
-+# no gnu man, so this is fine.
-+BINM_MAN=man
-+BINM_APROPOS=apropos
-+BINM_WHATIS=whatis
-+BINM_MAKEWHATIS=makewhatis
-+BINM_SOELIM=soelim
-+MANM_MANCONF="man.conf"
-+
-+# *sigh*
-+HAVE_DIRENT_NAMLEN=0
-+HAVE_ISBLANK=1
-+HAVE_ENDIAN=1
-+HAVE_EFTYPE=0
-+HAVE_ERR=1
-+HAVE_FTS=1
-+HAVE_FTS_COMPARE_CONST=1
-+HAVE_GETLINE=1
-+HAVE_GETSUBOPT=1
-+HAVE_ISBLANK=1
-+HAVE_LESS_T=0
-+HAVE_MKDTEMP=1
-+HAVE_NTOHL=1
-+HAVE_O_DIRECTORY=1
-+HAVE_OHASH=0
-+HAVE_PATH_MAX=1
-+HAVE_PLEDGE=0
-+HAVE_PROGNAME=0
-+HAVE_REALLOCARRAY=0
-+HAVE_RECALLOCARRAY=0
-+HAVE_REWB_BSD=0
-+HAVE_REWB_SYSV=1
-+HAVE_STRCASESTR=1
-+HAVE_STRINGLIST=0
-+HAVE_STRLCAT=1
-+HAVE_STRLCPY=1
-+HAVE_STRPTIME=1
-+HAVE_STRSEP=1
-+HAVE_STRTONUM=0
-+HAVE_SYS_ENDIAN=0
-+HAVE_VASPRINTF=1
-+HAVE_WCHAR=1
-+HAVE_STRNDUP=1
-+HAVE_SANDBOX_INIT=0
-+
-+# *sigh x2* 
-+OSENUM=MANDOC_OS_OTHER
-+OSNAME="Midipix"
diff --git a/patches/mandoc-1.14.6.local.patch b/patches/mandoc-1.14.6.local.patch
new file mode 100644
index 00000000..ebd3dace
--- /dev/null
+++ b/patches/mandoc-1.14.6.local.patch
@@ -0,0 +1,109 @@
+diff -ru mandoc-1.14.6.orig/Makefile mandoc-1.14.6/Makefile
+--- mandoc-1.14.6.orig/Makefile 2021-09-23 20:03:23.000000000 +0200
++++ mandoc-1.14.6/Makefile      2024-02-26 15:20:48.758788836 +0100
+@@ -369,11 +369,40 @@
+
+ # === USER CONFIGURATION ===============================================
+
+-include Makefile.local
++MANDOC_COBJS    =  compat_fts.o compat_ohash.o compat_progname.o compat_recallocarray.o compat_strtonum.o
++SOELIM_COBJS    =  compat_progname.o compat_stringlist.o
++PREFIX      = 
++BINDIR      = /bin
++SBINDIR     = /sbin
++BIN_FROM_SBIN   = ../bin
++INCLUDEDIR  = /include/mandoc
++LIBDIR      = /lib/mandoc
++MANDIR      = /man
++WWWPREFIX   = /var/www
++HTDOCDIR    = /var/www/htdocs
++CGIBINDIR   = /var/www/cgi-bin
++BINM_APROPOS    = apropos
++BINM_CATMAN = catman
++BINM_MAKEWHATIS = makewhatis
++BINM_MAN    = man
++BINM_SOELIM = soelim
++BINM_WHATIS = whatis
++MANM_MAN    = man
++MANM_MANCONF    = man.conf
++MANM_MDOC   = mdoc
++MANM_ROFF   = roff
++MANM_EQN    = eqn
++MANM_TBL    = tbl
++INSTALL     = install
++INSTALL_PROGRAM = install -m 0555
++INSTALL_LIB = install -m 0444
++INSTALL_MAN = install -m 0444
++INSTALL_DATA    = install -m 0444
++LN = ln -f
+
+ # === DEPENDENCY HANDLING ==============================================
+
+-all: mandoc man demandoc soelim $(BUILD_TARGETS) Makefile.local
++all: mandoc man demandoc soelim $(BUILD_TARGETS)
+
+ install: base-install $(INSTALL_TARGETS)
+
+diff -ruN mandoc-1.14.6.orig/config.h mandoc-1.14.6/config.h
+--- mandoc-1.14.6.orig/config.h	1970-01-01 01:00:00.000000000 +0100
++++ mandoc-1.14.6/config.h	2024-02-26 14:41:39.744045181 +0100
+@@ -0,0 +1,59 @@
++#ifdef __cplusplus
++#error "Do not use C++.  See the INSTALL file."
++#endif
++
++#include <sys/types.h>
++
++#define MAN_CONF_FILE "/etc/man.conf"
++#define MANPATH_BASE "/usr/share/man:/usr/X11R6/man"
++#define MANPATH_DEFAULT "/share/man"
++#define OSENUM MANDOC_OS_OTHER
++#define OSNAME "Midipix"
++#define UTF8_LOCALE "en_US.UTF-8"
++#define EFTYPE EINVAL
++
++#define HAVE_DIRENT_NAMLEN 0
++#define HAVE_ENDIAN 1
++#define HAVE_ERR 1
++#define HAVE_FTS 1
++#define HAVE_FTS_COMPARE_CONST 0
++#define HAVE_GETLINE 1
++#define HAVE_GETSUBOPT 1
++#define HAVE_ISBLANK 1
++#define HAVE_LESS_T 0
++#define HAVE_MKDTEMP 1
++#define HAVE_MKSTEMPS 1
++#define HAVE_NTOHL 1
++#define HAVE_PLEDGE 0
++#define HAVE_PROGNAME 0
++#define HAVE_REALLOCARRAY 1
++#define HAVE_RECALLOCARRAY 0
++#define HAVE_REWB_BSD 0
++#define HAVE_REWB_SYSV 1
++#define HAVE_SANDBOX_INIT 0
++#define HAVE_STRCASESTR 1
++#define HAVE_STRINGLIST 0
++#define HAVE_STRLCAT 1
++#define HAVE_STRLCPY 1
++#define HAVE_STRNDUP 1
++#define HAVE_STRPTIME 1
++#define HAVE_STRSEP 1
++#define HAVE_STRTONUM 0
++#define HAVE_SYS_ENDIAN 0
++#define HAVE_VASPRINTF 1
++#define HAVE_WCHAR 1
++#define HAVE_OHASH 0
++#define NEED_XPG4_2 0
++
++#define BINM_APROPOS "apropos"
++#define BINM_CATMAN "catman"
++#define BINM_MAKEWHATIS "makewhatis"
++#define BINM_MAN "man"
++#define BINM_SOELIM "soelim"
++#define BINM_WHATIS "whatis"
++#define BINM_PAGER "less"
++
++extern	const char *getprogname(void);
++extern	void	  setprogname(const char *);
++extern	void	 *recallocarray(void *, size_t, size_t, size_t);
++extern	long long strtonum(const char *, long long, long long, const char **);
diff --git a/patches/mesa-18.0.0.local.patch b/patches/mesa-18.0.0.local.patch
deleted file mode 100644
index e5278bda..00000000
--- a/patches/mesa-18.0.0.local.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-diff -ru mesa-18.0.0.orig/src/gallium/auxiliary/os/os_misc.c mesa-18.0.0/src/gallium/auxiliary/os/os_misc.c
---- mesa-18.0.0.orig/src/gallium/auxiliary/os/os_misc.c	2018-03-27 19:35:14.000000000 +0200
-+++ mesa-18.0.0/src/gallium/auxiliary/os/os_misc.c	2018-03-31 17:16:02.843416010 +0200
-@@ -47,7 +47,7 @@
- #endif
- 
- 
--#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_SOLARIS)
-+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_MIDIPIX)
- #  include <unistd.h>
- #elif defined(PIPE_OS_APPLE) || defined(PIPE_OS_BSD)
- #  include <sys/sysctl.h>
-@@ -124,7 +124,7 @@
- bool
- os_get_total_physical_memory(uint64_t *size)
- {
--#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_SOLARIS)
-+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_MIDIPIX)
-    const long phys_pages = sysconf(_SC_PHYS_PAGES);
-    const long page_size = sysconf(_SC_PAGE_SIZE);
- 
-diff -ru mesa-18.0.0.orig/src/gallium/auxiliary/rtasm/rtasm_x86sse.h mesa-18.0.0/src/gallium/auxiliary/rtasm/rtasm_x86sse.h
---- mesa-18.0.0.orig/src/gallium/auxiliary/rtasm/rtasm_x86sse.h	2018-03-27 19:35:14.000000000 +0200
-+++ mesa-18.0.0/src/gallium/auxiliary/rtasm/rtasm_x86sse.h	2018-03-31 17:12:28.412711185 +0200
-@@ -140,7 +140,7 @@
- {
- #ifdef PIPE_ARCH_X86
-    return X86_32;
--#elif (defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_WINDOWS)) && defined(PIPE_ARCH_X86_64)
-+#elif (defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_WINDOWS) || defined(PIPE_OS_MIDIPIX)) && defined(PIPE_ARCH_X86_64)
-    return X86_64_WIN64_ABI;
- #elif defined(PIPE_ARCH_X86_64)
-    return X86_64_STD_ABI;
-diff -ru mesa-18.0.0.orig/src/gallium/auxiliary/util/u_network.c mesa-18.0.0/src/gallium/auxiliary/util/u_network.c
---- mesa-18.0.0.orig/src/gallium/auxiliary/util/u_network.c	2018-03-27 19:35:14.000000000 +0200
-+++ mesa-18.0.0/src/gallium/auxiliary/util/u_network.c	2018-03-31 17:14:07.064114855 +0200
-@@ -10,7 +10,7 @@
- #  include <windows.h>
- #  include <ws2tcpip.h>
- #elif defined(PIPE_OS_LINUX) || defined(PIPE_OS_HAIKU) || \
--   defined(PIPE_OS_APPLE) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_SOLARIS)
-+   defined(PIPE_OS_APPLE) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_MIDIPIX)
- #  include <sys/socket.h>
- #  include <netinet/in.h>
- #  include <unistd.h>
-diff -ru mesa-18.0.0.orig/src/gallium/include/pipe/p_config.h mesa-18.0.0/src/gallium/include/pipe/p_config.h
---- mesa-18.0.0.orig/src/gallium/include/pipe/p_config.h	2018-03-27 19:35:15.000000000 +0200
-+++ mesa-18.0.0/src/gallium/include/pipe/p_config.h	2018-03-31 17:16:40.779187231 +0200
-@@ -213,6 +213,11 @@
- #define PIPE_OS_UNIX
- #endif
- 
-+#if defined(__midipix__)
-+#define PIPE_OS_MIDIPIX
-+#define PIPE_OS_UNIX
-+#endif
-+
- /*
-  * Try to auto-detect the subsystem.
-  * 
-diff -ru mesa-18.0.0.orig/src/util/xmlconfig.c mesa-18.0.0/src/util/xmlconfig.c
---- mesa-18.0.0.orig/src/util/xmlconfig.c	2018-03-27 19:35:15.000000000 +0200
-+++ mesa-18.0.0/src/util/xmlconfig.c	2018-03-31 17:36:30.362136400 +0200
-@@ -40,7 +40,7 @@
- 
- #undef GET_PROGRAM_NAME
- 
--#if (defined(__GNU_LIBRARY__) || defined(__GLIBC__)) && !defined(__UCLIBC__)
-+#if (defined(__GNU_LIBRARY__) || defined(__GLIBC__) || defined(__midipix__)) && !defined(__UCLIBC__)
- #    if !defined(__GLIBC__) || (__GLIBC__ < 2)
- /* These aren't declared in any libc5 header */
- extern char *program_invocation_name, *program_invocation_short_name;
diff --git a/patches/moe-1.12_pre.local.patch b/patches/moe-1.12_pre.local.patch
deleted file mode 100644
index b5abbc7a..00000000
--- a/patches/moe-1.12_pre.local.patch
+++ /dev/null
@@ -1,15 +0,0 @@
-diff -ru moe-1.12.orig/configure moe-1.12/configure
---- moe-1.12.orig/configure	2022-01-20 17:28:29.000000000 +0100
-+++ moe-1.12/configure	2022-02-03 23:41:43.452057383 +0100
-@@ -23,9 +23,9 @@
- sysconfdir='$(prefix)/etc'
- CXX=g++
- CPPFLAGS=
--CXXFLAGS='-Wall -W -O2'
-+CXXFLAGS ?= '-Wall -W -O2'
- LDFLAGS=
--LIBS=-lncurses
-+LIBS='-lncurses -ltinfo'
- 
- # checking whether we are using GNU C++.
- /bin/sh -c "${CXX} --version" > /dev/null 2>&1 || { CXX=c++ ; CXXFLAGS=-O2 ; }
diff --git a/patches/moe-1.13_pre.local.patch b/patches/moe-1.13_pre.local.patch
new file mode 100644
index 00000000..b764aa21
--- /dev/null
+++ b/patches/moe-1.13_pre.local.patch
@@ -0,0 +1,14 @@
+diff -ru moe-1.13.orig/configure moe-1.13/configure
+--- moe-1.13.orig/configure	2023-02-12 02:02:08.000000000 +0100
++++ moe-1.13/configure	2023-02-27 15:49:22.285591646 +0100
+@@ -23,9 +23,8 @@
+ sysconfdir='$(prefix)/etc'
+ CXX=g++
+ CPPFLAGS=
+-CXXFLAGS='-Wall -W -O2'
+ LDFLAGS=
+-LIBS=-lncurses
++LIBS='-lncurses -ltinfo'
+ MAKEINFO=makeinfo
+ 
+ # checking whether we are using GNU C++.
diff --git a/patches/musl_compat.local.patch b/patches/musl_compat.local.patch
new file mode 100644
index 00000000..1e4d6af3
--- /dev/null
+++ b/patches/musl_compat.local.patch
@@ -0,0 +1,116 @@
+diff --git a/bin/iconv.c b/bin/iconv.c
+deleted file mode 100644
+index f5d5ce2..0000000
+--- a/bin/iconv.c
++++ /dev/null
+@@ -1,110 +0,0 @@
+-/*
+- * iconv.c
+- * Implementation of SUSv4 XCU iconv utility
+- * Copyright © 2011 Rich Felker
+- * Licensed under the terms of the GNU General Public License, v2 or later
+- */
+-
+-#include <stdlib.h>
+-#include <stdio.h>
+-#include <iconv.h>
+-#include <locale.h>
+-#include <langinfo.h>
+-#include <unistd.h>
+-#include <errno.h>
+-#include <string.h>
+-
+-int main(int argc, char **argv)
+-{
+-	const char *from=0, *to=0;
+-	int b;
+-	iconv_t cd;
+-	char buf[BUFSIZ];
+-	char outbuf[BUFSIZ*4];
+-	char *in, *out;
+-	size_t inb;
+-	size_t l;
+-	size_t unitsize=0;
+-	int err=0;
+-	FILE *f;
+-
+-	while ((b = getopt(argc, argv, "f:t:csl")) != EOF) switch(b) {
+-	case 'l':
+-		puts("UTF-8, UTF-16BE, UTF-16LE, UTF-32BE, UTF32-LE, UCS-2BE, UCS-2LE, WCHAR_T,\n"
+-			"US_ASCII, ISO8859-1, ISO8859-2, ISO8859-3, ISO8859-4, ISO8859-5,\n"
+-			"ISO8859-6, ISO8859-7, ...");
+-		exit(0);
+-	case 'c': case 's': break;
+-	case 'f': from=optarg; break;
+-	case 't': to=optarg; break;
+-	default: exit(1);
+-	}
+-
+-	if (!from || !to) {
+-		setlocale(LC_CTYPE, "");
+-		if (!to) to = nl_langinfo(CODESET);
+-		if (!from) from = nl_langinfo(CODESET);
+-	}
+-	cd = iconv_open(to, from);
+-	if (cd == (iconv_t)-1) {
+-		if (iconv_open(to, "WCHAR_T") == (iconv_t)-1)
+-			fprintf(stderr, "iconv: destination charset %s: ", to);
+-		else
+-			fprintf(stderr, "iconv: source charset %s: ", from);
+-		perror("");
+-		exit(1);
+-	}
+-	if (optind == argc) argv[argc++] = "-";
+-
+-	for (; optind < argc; optind++) {
+-		if (argv[optind][0]=='-' && !argv[optind][1]) {
+-			f = stdin;
+-			argv[optind] = "(stdin)";
+-		} else if (!(f = fopen(argv[optind], "rb"))) {
+-			fprintf(stderr, "iconv: %s: ", argv[optind]);
+-			perror("");
+-			err = 1;
+-			continue;
+-		}
+-		inb = 0;
+-		for (;;) {
+-			in = buf;
+-			out = outbuf;
+-			l = fread(buf+inb, 1, sizeof(buf)-inb, f);
+-			inb += l;
+-			if (!inb) break;
+-			if (iconv(cd, &in, &inb, &out, (size_t [1]){sizeof outbuf})==-1
+-			 && errno == EILSEQ) {
+-				if (!unitsize) {
+-					wchar_t wc='0';
+-					char dummy[4], *dummyp=dummy;
+-					iconv_t cd2 = iconv_open(from, "WCHAR_T");
+-					if (cd == (iconv_t)-1) {
+-						unitsize = 1;
+-					} else {
+-						iconv(cd2,
+-							(char *[1]){(char *)&wc},
+-							(size_t[1]){1},
+-							&dummyp, (size_t[1]){4});
+-						unitsize = dummyp-dummy;
+-						if (!unitsize) unitsize=1;
+-					}
+-				}
+-				inb-=unitsize;
+-				in+=unitsize;
+-			}
+-			if (inb && !l && errno==EINVAL) break;
+-			if (out>outbuf && !fwrite(outbuf, out-outbuf, 1, stdout)) {
+-				perror("iconv: write error");
+-				exit(1);
+-			}
+-			if (inb) memmove(buf, in, inb);
+-		}
+-		if (ferror(f)) {
+-			fprintf(stderr, "iconv: %s: ", argv[optind]);
+-			perror("");
+-			err = 1;
+-		}
+-	}
+-	return err;
+-}
diff --git a/patches/nasm-2.14.02.local.patch b/patches/nasm-2.14.02.local.patch
deleted file mode 120000
index 0a3acf14..00000000
--- a/patches/nasm-2.14.02.local.patch
+++ /dev/null
@@ -1 +0,0 @@
-nasm_host-2.14.02.local.patch
\ No newline at end of file
diff --git a/patches/nasm-2.16.01.local.patch b/patches/nasm-2.16.01.local.patch
new file mode 120000
index 00000000..b2cff0eb
--- /dev/null
+++ b/patches/nasm-2.16.01.local.patch
@@ -0,0 +1 @@
+nasm_host-2.16.01.local.patch
\ No newline at end of file
diff --git a/patches/nasm_cross-2.16.01.local.patch b/patches/nasm_cross-2.16.01.local.patch
new file mode 120000
index 00000000..b2cff0eb
--- /dev/null
+++ b/patches/nasm_cross-2.16.01.local.patch
@@ -0,0 +1 @@
+nasm_host-2.16.01.local.patch
\ No newline at end of file
diff --git a/patches/nasm_host-2.14.02.local.patch b/patches/nasm_host-2.16.01.local.patch
index defc369b..5e61a289 100644
--- a/patches/nasm_host-2.14.02.local.patch
+++ b/patches/nasm_host-2.16.01.local.patch
@@ -1,6 +1,8 @@
---- nasm-2.14.02/output/outcoff.c.orig	2018-12-26 13:44:06.000000000 +0000
-+++ nasm-2.14.02/output/outcoff.c	2019-01-20 13:18:06.240000000 +0000
-@@ -701,6 +701,7 @@
+diff --git nasm-2.16.01/output/outcoff.c.orig nasm-2.16.01/output/outcoff.c
+index c2b4eb6..fc57c1e 100644
+--- nasm-2.16.01/output/outcoff.c.orig
++++ nasm-2.16.01/output/outcoff.c
+@@ -820,6 +820,7 @@ static void coff_sect_write(struct coff_Section *sect,
      sect->len += len;
  }
  
@@ -8,7 +10,7 @@
  typedef struct tagString {
      struct tagString *next;
      int len;
-@@ -765,6 +766,98 @@
+@@ -884,6 +885,98 @@ static void BuildExportTable(STRING **rvp)
  
      *rvp = NULL;
  }
@@ -105,10 +107,10 @@
 +}
 +#endif
  
- static enum directive_result
- coff_directives(enum directive directive, char *value, int pass)
-@@ -793,7 +886,9 @@
-             nasm_error(ERR_NONFATAL, "unrecognized export qualifier `%s'", q);
+ static void coff_defcomdatname(char *name, int32_t segment)
+ {
+@@ -924,7 +1017,9 @@ coff_directives(enum directive directive, char *value)
+             nasm_nonfatal("unrecognized export qualifier `%s'", q);
              return DIRR_ERROR;
          }
 +#ifndef COFF_MIDIPIX
@@ -117,7 +119,7 @@
          return DIRR_OK;
      }
      case D_SAFESEH:
-@@ -888,8 +983,12 @@
+@@ -1039,8 +1134,12 @@ static void coff_write(void)
      int32_t pos, sympos, vsize;
      int i;
  
@@ -130,7 +132,7 @@
  
      if (win32) {
          /* add default value for @feat.00, this allows to 'link /safeseh' */
-@@ -1086,7 +1185,10 @@
+@@ -1278,7 +1377,10 @@ static void coff_write_symbols(void)
      memset(filename, 0, 18);    /* useful zeroed buffer */
  
      for (i = 0; i < (uint32_t) coff_nsects; i++) {
@@ -141,4 +143,4 @@
 +            coff_symbol(NULL, coff_sects[i]->namepos, 0L, i + 1, 0, 3, 1);
          fwriteint32_t(coff_sects[i]->len,    ofile);
          fwriteint16_t(coff_sects[i]->nrelocs,ofile);
-         nasm_write(filename, 12, ofile);
+         if (coff_sects[i]->flags & IMAGE_SCN_LNK_COMDAT) {
diff --git a/patches/ncdu-1.18.local.patch b/patches/ncdu-1.18.local.patch
new file mode 100644
index 00000000..72f20723
--- /dev/null
+++ b/patches/ncdu-1.18.local.patch
@@ -0,0 +1,62 @@
+diff -ru ncdu-1.18.orig/src/dir.h ncdu-1.18/src/dir.h
+--- ncdu-1.18.orig/src/dir.h	2022-04-28 11:16:45.000000000 +0200
++++ ncdu-1.18/src/dir.h	2022-12-23 15:57:39.201824078 +0100
+@@ -113,7 +113,7 @@
+ extern int dir_import_active;
+ int dir_import_init(const char *fn);
+ 
+-#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS
++#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS || __midipix__
+ extern int exclude_kernfs;
+ #endif
+ 
+diff -ru ncdu-1.18.orig/src/dir_scan.c ncdu-1.18/src/dir_scan.c
+--- ncdu-1.18.orig/src/dir_scan.c	2022-04-28 11:16:57.000000000 +0200
++++ ncdu-1.18/src/dir_scan.c	2022-12-23 15:57:10.769823906 +0100
+@@ -38,10 +38,12 @@
+ #include <sys/attr.h>
+ #endif
+ 
+-#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS
++#if HAVE_SYS_STATFS_H && HAVE_STATFS
+ #include <sys/statfs.h>
++#if HAVE_LINUX_MAGIC_H
+ #include <linux/magic.h>
+ #endif
++#endif
+ 
+ 
+ /* set S_BLKSIZE if not defined already in sys/stat.h */
+@@ -60,7 +62,7 @@
+ static unsigned int buf_nlink;
+ 
+ 
+-#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS
++#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS || __midipix__
+ int exclude_kernfs; /* Exclude Linux pseudo filesystems */
+ 
+ static int is_kernfs(unsigned long type) {
+diff -ru ncdu-1.18.orig/src/main.c ncdu-1.18/src/main.c
+--- ncdu-1.18.orig/src/main.c	2022-11-30 11:30:55.000000000 +0100
++++ ncdu-1.18/src/main.c	2022-12-23 15:58:20.801824331 +0100
+@@ -291,7 +291,7 @@
+   printf("  -X, --exclude-from FILE    Exclude files that match any pattern in FILE\n");
+   printf("  -L, --follow-symlinks      Follow symbolic links (excluding directories)\n");
+   printf("  --exclude-caches           Exclude directories containing CACHEDIR.TAG\n");
+-#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS
++#if HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS || __midipix__
+   printf("  --exclude-kernfs           Exclude Linux pseudo filesystems (procfs,sysfs,cgroup,...)\n");
+ #endif
+ #if HAVE_SYS_ATTR_H && HAVE_GETATTRLIST && HAVE_DECL_ATTR_CMNEXT_NOFIRMLINKPATH
+@@ -395,9 +395,11 @@
+     else if(!arg_option()) die("Unknown option '%s'.\n", argparser_state.last);
+   }
+ 
++#ifndef __midipix__
+ #if !(HAVE_LINUX_MAGIC_H && HAVE_SYS_STATFS_H && HAVE_STATFS)
+   if(exclude_kernfs) die("The --exclude-kernfs flag is currently only supported on Linux.\n");
+ #endif
++#endif
+ 
+   if(export) {
+     if(dir_export_init(export)) die("Can't open %s: %s\n", export, strerror(errno));
diff --git a/patches/ncurses-6.3.local.patch b/patches/ncurses-6.3.local.patch
index d77d715a..5dfd9b6a 100644
--- a/patches/ncurses-6.3.local.patch
+++ b/patches/ncurses-6.3.local.patch
@@ -19,10 +19,9 @@ diff -ru ncurses-6.3.orig/configure ncurses-6.3/configure
  		if test "$DFT_LWR_MODEL" = "shared" && test -n "$LD_RPATH_OPT" ; then
  			LOCAL_LDFLAGS="${LD_RPATH_OPT}\$(LOCAL_LIBDIR)"
  			LOCAL_LDFLAGS2="$LOCAL_LDFLAGS"
-diff -ru ncurses-6.3.orig/misc/gen-pkgconfig.in ncurses-6.3/misc/gen-pkgconfig.in
---- ncurses-6.3.orig/misc/gen-pkgconfig.in	2021-08-07 23:36:33.000000000 +0200
-+++ ncurses-6.3/misc/gen-pkgconfig.in	2021-11-17 20:35:45.111876569 +0100
-@@ -71,17 +71,7 @@
+--- ncurses-6.3/misc/gen-pkgconfig.in.orig	2021-08-07 23:36:33.000000000 +0200
++++ ncurses-6.3/misc/gen-pkgconfig.in	2022-12-27 09:17:07.295020120 +0100
+@@ -71,19 +71,9 @@
  MENU_LIBRARY="${MENU_NAME}@USE_ARG_SUFFIX@"
  PANEL_LIBRARY="${PANEL_NAME}@USE_ARG_SUFFIX@"
  
@@ -39,8 +38,11 @@ diff -ru ncurses-6.3.orig/misc/gen-pkgconfig.in ncurses-6.3/misc/gen-pkgconfig.i
 -
 +CFLAGS='-I${includedir}'
  lib_flags=
- for opt in -L$libdir @EXTRA_PKG_LDFLAGS@ @LIBS@
+-for opt in -L$libdir @EXTRA_PKG_LDFLAGS@ @LIBS@
++for opt in @EXTRA_PKG_LDFLAGS@ @LIBS@
  do
+ 	case $opt in
+ 	-l*) # LIBS is handled specially below
 diff -ru ncurses-6.3.orig/misc/Makefile.in ncurses-6.3/misc/Makefile.in
 --- ncurses-6.3.orig/misc/Makefile.in	2021-07-03 21:07:50.000000000 +0200
 +++ ncurses-6.3/misc/Makefile.in	2021-11-17 20:44:37.633501552 +0100
@@ -116,3 +118,14 @@ diff -ru ncurses-6.3.orig/misc/run_tic.in ncurses-6.3/misc/run_tic.in
  : ${source:=@TERMINFO_SRC@}
  : ${LN_S:="@LN_S@"}
  : ${cross_compiling:=no}
+--- ncurses-6.3/misc/ncurses-config.in.orig	2021-08-07 23:36:14.000000000 +0200
++++ ncurses-6.3/misc/ncurses-config.in	2022-12-27 10:22:34.532835499 +0100
+@@ -101,7 +101,7 @@
+ # There is no portable way to find the list of standard library directories.
+ # Require a POSIX shell anyway, to keep this simple.
+ lib_flags=
+-for opt in -L$libdir @EXTRA_PKG_LDFLAGS@ $LIBS
++for opt in @EXTRA_PKG_LDFLAGS@ $LIBS
+ do
+ 	case $opt in
+ 	-specs*) # ignore linker specs-files which were used to build library
diff --git a/patches/nettle-3.7.3.local.patch b/patches/nettle-3.8.1.local.patch
index 87596831..08e0560b 100644
--- a/patches/nettle-3.7.3.local.patch
+++ b/patches/nettle-3.8.1.local.patch
@@ -1,3 +1,287 @@
+diff -ru nettle-3.8.1.orig/x86_64/fat/aes128-decrypt-2.asm nettle-3.8.1/x86_64/fat/aes128-decrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/aes128-decrypt-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/aes128-decrypt-2.asm        2023-02-17 13:40:13.492569768 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/aes128-decrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_aes128_decrypt_aesni,"r"
++        .global __imp__nettle_aes128_decrypt_aesni
++__imp__nettle_aes128_decrypt_aesni:
++        .quad   _nettle_aes128_decrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/aes128-encrypt-2.asm nettle-3.8.1/x86_64/fat/aes128-encrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/aes128-encrypt-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/aes128-encrypt-2.asm        2023-02-17 13:39:44.528569389 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/aes128-encrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_aes128_encrypt_aesni,"r"
++        .global __imp__nettle_aes128_encrypt_aesni
++__imp__nettle_aes128_encrypt_aesni:
++        .quad   _nettle_aes128_encrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/aes192-decrypt-2.asm nettle-3.8.1/x86_64/fat/aes192-decrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/aes192-decrypt-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/aes192-decrypt-2.asm        2023-02-17 13:41:00.400570382 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/aes192-decrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_aes192_decrypt_aesni,"r"
++        .global __imp__nettle_aes192_decrypt_aesni
++__imp__nettle_aes192_decrypt_aesni:
++        .quad   _nettle_aes192_decrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/aes192-encrypt-2.asm nettle-3.8.1/x86_64/fat/aes192-encrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/aes192-encrypt-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/aes192-encrypt-2.asm        2023-02-17 13:40:37.196570078 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/aes192-encrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_aes192_encrypt_aesni,"r"
++        .global __imp__nettle_aes192_encrypt_aesni
++__imp__nettle_aes192_encrypt_aesni:
++        .quad   _nettle_aes192_encrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/aes256-decrypt-2.asm nettle-3.8.1/x86_64/fat/aes256-decrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/aes256-decrypt-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/aes256-decrypt-2.asm        2023-02-17 13:44:55.409072440 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/aes256-decrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_aes256_decrypt_aesni,"r"
++        .global __imp__nettle_aes256_decrypt_aesni
++__imp__nettle_aes256_decrypt_aesni:
++        .quad   _nettle_aes256_decrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/aes256-encrypt-2.asm nettle-3.8.1/x86_64/fat/aes256-encrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/aes256-encrypt-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/aes256-encrypt-2.asm        2023-02-17 13:44:31.165072123 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/aes256-encrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_aes256_encrypt_aesni,"r"
++        .global __imp__nettle_aes256_encrypt_aesni
++__imp__nettle_aes256_encrypt_aesni:
++        .quad   _nettle_aes256_encrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/cbc-aes128-encrypt-2.asm nettle-3.8.1/x86_64/fat/cbc-aes128-encrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/cbc-aes128-encrypt-2.asm       2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/cbc-aes128-encrypt-2.asm    2023-02-17 13:45:43.369073067 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/cbc-aes128-encrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_cbc_aes128_encrypt_aesni,"r"
++        .global __imp__nettle_cbc_aes128_encrypt_aesni
++__imp__nettle_cbc_aes128_encrypt_aesni:
++        .quad   _nettle_cbc_aes128_encrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/cbc-aes192-encrypt-2.asm nettle-3.8.1/x86_64/fat/cbc-aes192-encrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/cbc-aes192-encrypt-2.asm       2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/cbc-aes192-encrypt-2.asm    2023-02-17 13:46:09.457073408 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/cbc-aes192-encrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_cbc_aes192_encrypt_aesni,"r"
++        .global __imp__nettle_cbc_aes192_encrypt_aesni
++__imp__nettle_cbc_aes192_encrypt_aesni:
++        .quad   _nettle_cbc_aes192_encrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/cbc-aes256-encrypt-2.asm nettle-3.8.1/x86_64/fat/cbc-aes256-encrypt-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/cbc-aes256-encrypt-2.asm       2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/cbc-aes256-encrypt-2.asm    2023-02-17 13:46:31.545073697 +0100
+@@ -34,3 +34,11 @@
+
+ define(`fat_transform', `_$1_aesni')
+ include_src(`x86_64/aesni/cbc-aes256-encrypt.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_cbc_aes256_encrypt_aesni,"r"
++        .global __imp__nettle_cbc_aes256_encrypt_aesni
++__imp__nettle_cbc_aes256_encrypt_aesni:
++        .quad   _nettle_cbc_aes256_encrypt_aesni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/sha1-compress-2.asm nettle-3.8.1/x86_64/fat/sha1-compress-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/sha1-compress-2.asm    2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/sha1-compress-2.asm 2023-02-17 12:37:28.782267505 +0100
+@@ -32,3 +32,11 @@
+
+ define(`fat_transform', `_$1_sha_ni')
+ include_src(`x86_64/sha_ni/sha1-compress.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_sha1_compress_sha_ni,"r"
++        .global __imp__nettle_sha1_compress_sha_ni
++__imp__nettle_sha1_compress_sha_ni:
++        .quad   _nettle_sha1_compress_sha_ni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/sha1-compress.asm nettle-3.8.1/x86_64/fat/sha1-compress.asm
+--- nettle-3.8.1.orig/x86_64/fat/sha1-compress.asm      2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/sha1-compress.asm   2023-02-17 12:37:57.546267881 +0100
+@@ -32,3 +32,11 @@
+
+ define(`fat_transform', `_$1_x86_64')
+ include_src(`x86_64/sha1-compress.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_sha1_compress_x86_64,"r"
++        .global __imp__nettle_sha1_compress_x86_64
++__imp__nettle_sha1_compress_x86_64:
++        .quad   _nettle_sha1_compress_x86_64
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/ghash-set-key-2.asm nettle-3.8.1/x86_64/fat/ghash-set-key-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/ghash-set-key-2.asm    2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/ghash-set-key-2.asm 2023-02-17 12:32:21.594437764 +0100
+@@ -35,3 +35,11 @@
+
+ define(`fat_transform', `$1_pclmul')
+ include_src(`x86_64/pclmul/ghash-set-key.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_ghash_set_key_pclmul,"r"
++        .global __imp__nettle_ghash_set_key_pclmul
++__imp__nettle_ghash_set_key_pclmul:
++        .quad   _nettle_ghash_set_key_pclmul
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/sha256-compress-2.asm nettle-3.8.1/x86_64/fat/sha256-compress-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/sha256-compress-2.asm  2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/sha256-compress-2.asm       2023-02-17 12:35:29.438265944 +0100
+@@ -32,3 +32,11 @@
+
+ define(`fat_transform', `$1_sha_ni')
+ include_src(`x86_64/sha_ni/sha256-compress.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_sha256_compress_sha_ni,"r"
++        .global __imp__nettle_sha256_compress_sha_ni
++__imp__nettle_sha256_compress_sha_ni:
++        .quad   _nettle_sha256_compress_sha_ni
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/sha256-compress.asm nettle-3.8.1/x86_64/fat/sha256-compress.asm
+--- nettle-3.8.1.orig/x86_64/fat/sha256-compress.asm    2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/sha256-compress.asm 2023-02-17 12:34:02.826264811 +0100
+@@ -32,3 +32,11 @@
+
+ define(`fat_transform', `$1_x86_64')
+ include_src(`x86_64/sha256-compress.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_sha256_compress_x86_64,"r"
++        .global __imp__nettle_sha256_compress_x86_64
++__imp__nettle_sha256_compress_x86_64:
++        .quad   _nettle_sha256_compress_x86_64
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/ghash-update-2.asm nettle-3.8.1/x86_64/fat/ghash-update-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/ghash-update-2.asm     2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/ghash-update-2.asm  2023-02-17 12:29:12.138435285 +0100
+@@ -35,3 +35,11 @@
+
+ define(`fat_transform', `$1_pclmul')
+ include_src(`x86_64/pclmul/ghash-update.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_ghash_update_pclmul,"r"
++        .global __imp__nettle_ghash_update_pclmul
++__imp__nettle_ghash_update_pclmul:
++        .quad   _nettle_ghash_update_pclmul
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/memxor-2.asm nettle-3.8.1/x86_64/fat/memxor-2.asm
+--- nettle-3.8.1.orig/x86_64/fat/memxor-2.asm   2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/memxor-2.asm        2023-02-17 12:27:46.702434168 +0100
+@@ -34,3 +34,11 @@
+ define(`fat_transform', `_$1_sse2')
+ define(`USE_SSE2', `yes')
+ include_src(`x86_64/memxor.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_memxor_sse2,"r"
++        .global __imp__nettle_memxor_sse2
++__imp__nettle_memxor_sse2:
++        .quad   _nettle_memxor_sse2
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/memxor.asm nettle-3.8.1/x86_64/fat/memxor.asm
+--- nettle-3.8.1.orig/x86_64/fat/memxor.asm     2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/memxor.asm  2023-02-17 12:25:20.797229091 +0100
+@@ -33,3 +33,11 @@
+
+ define(`fat_transform', `_$1_x86_64')
+ include_src(`x86_64/memxor.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_memxor_x86_64,"r"
++        .global __imp__nettle_memxor_x86_64
++__imp__nettle_memxor_x86_64:
++        .quad   _nettle_memxor_x86_64
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/cpuid.asm nettle-3.8.1/x86_64/fat/cpuid.asm
+--- nettle-3.8.1.orig/x86_64/fat/cpuid.asm      2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/cpuid.asm   2023-02-17 12:20:01.842500301 +0100
+@@ -57,3 +57,10 @@
+        ret
+ EPILOGUE(_nettle_cpuid)
+
++#ifdef __midipix__
++        .section .got$_nettle_cpuid,"r"
++        .global __imp__nettle_cpuid
++__imp__nettle_cpuid:
++        .quad   _nettle_cpuid
++        .linkonce discard
++#endif
+diff -ru nettle-3.8.1.orig/x86_64/fat/ghash-update.asm nettle-3.8.1/x86_64/fat/ghash-update.asm
+--- nettle-3.8.1.orig/x86_64/fat/ghash-update.asm       2022-07-27 21:23:20.000000000 +0200
++++ nettle-3.8.1/x86_64/fat/ghash-update.asm    2023-02-17 12:22:38.869226973 +0100
+@@ -35,3 +35,11 @@
+
+ define(`fat_transform', `$1_table')
+ include_src(`x86_64/ghash-update.asm')
++
++#ifdef __midipix__
++        .section .got$_nettle_ghash_update_table,"r"
++        .global __imp__nettle_ghash_update_table
++__imp__nettle_ghash_update_table:
++        .quad   _nettle_ghash_update_table
++        .linkonce discard
++#endif
 diff -ru nettle-3.7.2.orig/x86_64/salsa20-2core.asm nettle-3.7.2/x86_64/salsa20-2core.asm
 --- nettle-3.7.2.orig/x86_64/salsa20-2core.asm  2021-03-21 09:32:25.000000000 +0100
 +++ nettle-3.7.2/x86_64/salsa20-2core.asm       2021-04-10 14:56:55.970009499 +0200
@@ -178,21 +462,6 @@ diff -ru nettle-3.6.orig/x86_64/ecc-secp521r1-modp.asm nettle-3.6/x86_64/ecc-sec
 +	.quad   _nettle_ecc_secp521r1_modp
 +	.linkonce discard
 +#endif
-diff -ru nettle-3.6.orig/x86_64/gcm-hash8.asm nettle-3.6/x86_64/gcm-hash8.asm
---- nettle-3.6.orig/x86_64/gcm-hash8.asm	2020-04-29 20:11:44.000000000 +0200
-+++ nettle-3.6/x86_64/gcm-hash8.asm	2020-09-07 13:42:31.107641232 +0200
-@@ -238,3 +238,11 @@
- .value W(a7,d0),W(a6,12),W(a4,54),W(a5,96),W(a0,d8),W(a1,1a),W(a3,5c),W(a2,9e)
- .value W(b5,e0),W(b4,22),W(b6,64),W(b7,a6),W(b2,e8),W(b3,2a),W(b1,6c),W(b0,ae)
- .value W(bb,f0),W(ba,32),W(b8,74),W(b9,b6),W(bc,f8),W(bd,3a),W(bf,7c),W(be,be)
-+
-+#ifdef __midipix__
-+	.section .got$_nettle_gcm_hash8,"r"
-+	.global __imp__nettle_gcm_hash8
-+__imp__nettle_gcm_hash8:
-+	.quad   _nettle_gcm_hash8
-+	.linkonce discard
-+#endif
 diff -ru nettle-3.6.orig/x86_64/md5-compress.asm nettle-3.6/x86_64/md5-compress.asm
 --- nettle-3.6.orig/x86_64/md5-compress.asm	2020-04-29 20:11:44.000000000 +0200
 +++ nettle-3.6/x86_64/md5-compress.asm	2020-09-07 13:44:12.135638069 +0200
@@ -223,21 +492,6 @@ diff -ru nettle-3.6.orig/x86_64/memxor3.asm nettle-3.6/x86_64/memxor3.asm
 +	.quad   nettle_memxor3
 +	.linkonce discard
 +#endif
-diff -ru nettle-3.6.orig/x86_64/memxor.asm nettle-3.6/x86_64/memxor.asm
---- nettle-3.6.orig/x86_64/memxor.asm	2020-04-29 20:11:44.000000000 +0200
-+++ nettle-3.6/x86_64/memxor.asm	2020-09-07 13:46:40.999633408 +0200
-@@ -171,3 +171,11 @@
- >)	
- 
- EPILOGUE(nettle_memxor)
-+
-+#ifdef __midipix__
-+	.section .got$nettle_memxor,"r"
-+	.global __imp_nettle_memxor
-+__imp_nettle_memxor:
-+	.quad   nettle_memxor
-+	.linkonce discard
-+#endif
 diff -ru nettle-3.6.orig/x86_64/poly1305-internal.asm nettle-3.6/x86_64/poly1305-internal.asm
 --- nettle-3.6.orig/x86_64/poly1305-internal.asm	2020-04-29 20:11:44.000000000 +0200
 +++ nettle-3.6/x86_64/poly1305-internal.asm	2020-09-07 13:51:14.239748557 +0200
@@ -309,36 +563,6 @@ diff -ru nettle-3.6.orig/x86_64/serpent-encrypt.asm nettle-3.6/x86_64/serpent-en
 +        .quad   nettle_serpent_encrypt
 +        .linkonce discard
 +#endif
-diff -ru nettle-3.6.orig/x86_64/sha1-compress.asm nettle-3.6/x86_64/sha1-compress.asm
---- nettle-3.6.orig/x86_64/sha1-compress.asm	2020-04-29 20:11:44.000000000 +0200
-+++ nettle-3.6/x86_64/sha1-compress.asm	2020-09-07 13:56:37.603788439 +0200
-@@ -305,3 +305,11 @@
- 	W64_EXIT(2, 0)
- 	ret
- EPILOGUE(nettle_sha1_compress)
-+
-+#ifdef __midipix__
-+        .section .got$nettle_sha1_compress,"r"
-+        .global __imp_nettle_sha1_compress
-+__imp_nettle_sha1_compress:
-+        .quad   nettle_sha1_compress
-+        .linkonce discard
-+#endif
-diff -ru nettle-3.6.orig/x86_64/sha256-compress.asm nettle-3.6/x86_64/sha256-compress.asm
---- nettle-3.6.orig/x86_64/sha256-compress.asm	2020-04-29 20:11:44.000000000 +0200
-+++ nettle-3.6/x86_64/sha256-compress.asm	2020-09-07 13:56:57.671787810 +0200
-@@ -208,3 +208,11 @@
- 	W64_EXIT(3, 0)
- 	ret
- EPILOGUE(_nettle_sha256_compress)
-+
-+#ifdef __midipix__
-+        .section .got$_nettle_sha256_compress,"r"
-+        .global __imp__nettle_sha256_compress
-+__imp__nettle_sha256_compress:
-+        .quad   _nettle_sha256_compress
-+        .linkonce discard
-+#endif
 diff -ru nettle-3.6.orig/x86_64/sha3-permute.asm nettle-3.6/x86_64/sha3-permute.asm
 --- nettle-3.6.orig/x86_64/sha3-permute.asm	2020-04-29 20:11:44.000000000 +0200
 +++ nettle-3.6/x86_64/sha3-permute.asm	2020-09-07 13:57:35.427786628 +0200
diff --git a/patches/opensmtpd-7.3.0p2_pre.local.patch b/patches/opensmtpd-7.3.0p2_pre.local.patch
new file mode 100644
index 00000000..dcc53c95
--- /dev/null
+++ b/patches/opensmtpd-7.3.0p2_pre.local.patch
@@ -0,0 +1,12 @@
+diff -ru opensmtpd-7.3.0p2.orig/configure opensmtpd-7.3.0p2/configure
+--- opensmtpd-7.3.0p2.orig/configure	2023-09-16 20:13:41.000000000 +0200
++++ opensmtpd-7.3.0p2/configure	2024-02-22 11:56:12.905668537 +0100
+@@ -21333,7 +21333,7 @@
+ fi
+ 
+ 
+- if test "x$ac_cv_func_arc4random" != "xyes" -a "x$ac_cv_have_decl_LIBRESSL_VERSION_NUMBER" != "xyes"; then
++ if test "x$ac_cv_func_arc4random" != "xyes"; then
+   NEED_ARC4RANDOM_TRUE=
+   NEED_ARC4RANDOM_FALSE='#'
+ else
diff --git a/patches/openssh-9.5p1.local.patch b/patches/openssh-9.5p1.local.patch
new file mode 100644
index 00000000..8e995354
--- /dev/null
+++ b/patches/openssh-9.5p1.local.patch
@@ -0,0 +1,11 @@
+--- openssh-9.0p1/configure.orig	2022-04-07 06:51:43.000000000 +0200
++++ openssh-9.0p1/configure	2022-09-20 05:19:31.505197136 +0200
+@@ -11394,8 +11394,6 @@
+ 		if test "x$use_pkgconfig_for_libedit" = "xyes"; then
+ 			LIBEDIT=`$PKGCONFIG --libs libedit`
+ 			CPPFLAGS="$CPPFLAGS `$PKGCONFIG --cflags libedit`"
+-		else
+-			LIBEDIT="-ledit -lcurses"
+ 		fi
+ 		OTHERLIBS=`echo $LIBEDIT | sed 's/-ledit//'`
+ 		{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for el_init in -ledit" >&5
diff --git a/patches/p2c-2.02.local.patch b/patches/p2c-2.02.local.patch
new file mode 100644
index 00000000..207ae68a
--- /dev/null
+++ b/patches/p2c-2.02.local.patch
@@ -0,0 +1,203 @@
+diff -ru p2c-2.02.orig/Makefile p2c-2.02/Makefile
+--- p2c-2.02.orig/Makefile	1993-12-08 06:37:05.000000000 +0100
++++ p2c-2.02/Makefile	2024-03-20 10:32:36.899062261 +0100
+@@ -24,25 +24,7 @@
+ # and src/Makefile.
+ 
+ test:
+-	@echo "Compiling p2c, installing in `pwd`/home..."
+-	cd src; make install
+-	@echo ""
+-	@echo "Translating and compiling example files..."
+-	cd examples; make comp
+-	@echo ""
+-	@echo "Running the factorial example..."
+-	examples/fact
+-	@echo ""
+-	@echo "Running the 'e' computation example..."
+-	examples/e
+-	@echo ""
+-	@echo "Running the self-printing Pascal example..."
+-	examples/self >examples/self.out
+-	cat examples/self.out
+-	diff examples/self.p examples/self.out
+-	@echo ""
+-	@echo "Also try 'cref' and 'basic' in the examples directory."
+-
++	cd src; make
+ 
+ install:
+ 	cd src; make install
+diff -ru p2c-2.02.orig/src/Makefile p2c-2.02/src/Makefile
+--- p2c-2.02.orig/src/Makefile	2015-11-18 21:12:06.000000000 +0100
++++ p2c-2.02/src/Makefile	2024-03-20 10:32:36.899062261 +0100
+@@ -19,25 +19,21 @@
+ SHELL = /bin/sh
+ 
+ # Directories (private version)
+-HOMEDIR = ../home
+-INCDIR = ../home/p2c
+-BINDIR = ..
+-LIBDIR = ../home
+-MANDIR = ../home
+-MANFILE = p2c.cat          # human-readable manual (for cat.1)
+ #MANFILE = p2c.man.inst    # uncompressed nroff source (for man.1)
+ #MANFILE = p2c.man.Z       # compressed nroff source (for man.1.Z)
+ 
+ # Directories (public version)
+-#HOMEDIR = /usr/lib/p2c
+-#INCDIR = /usr/include/p2c
+-#BINDIR = /usr/bin
+-#LIBDIR = /usr/lib
+-#MANDIR = /usr/man/man1
+-#MANFILE = p2c.man.inst
++HOMEDIR = /usr/lib/p2c
++INCDIR = /usr/include/p2c
++BINDIR = /usr/bin
++LIBDIR = /usr/lib
++MANDIR = /usr/man/man1
++MANFILE = p2c.man.inst
++DESTDIR ?=
+ 
+ # Compiler options
+ CC = cc                    # you may wish to use gcc here instead
++AR = ar
+ OPT = # -O		   # uncomment this for optimization
+ DEB = # -g		   # uncomment this for debugging
+ DEFS =	-DTEST_MALLOC      # place other -D types of things here # TDS 2015nov18
+@@ -74,7 +70,7 @@
+ 
+ 
+ # Top-level targets
+-all: proto p2c libp2c.a p2c.cat
++all: proto p2c libp2c.a p2c.cat proto
+ proto: $(PROTOS)
+ 
+ 
+@@ -86,7 +82,7 @@
+ 	$(CC) -c $(CFLAGS) $(CUSTDEFS) dir.c
+ 
+ trans.o: trans.c trans.h
+-	$(CC) -c $(CFLAGS) -DHASDUMPS -DP2C_HOME=\"$(ABSHOMEDIR)\" trans.c
++	$(CC) -c $(CFLAGS) -DHASDUMPS -DP2C_HOME=\"/usr/lib/p2c\" trans.c
+ 
+ 
+ # Making and using makeproto
+@@ -97,12 +93,12 @@
+ 	./makeproto -n -m -h -t16 -a35 -s1 -i $(SRCS) -o p2c.proto
+ 
+ makeproto: makeproto.c
+-	$(CC) $(CFLAGS) $(LFLAGS) makeproto.c -o makeproto
++	$(HOST_CC) $(CFLAGS) $(LFLAGS) makeproto.c -o makeproto
+ 
+ 
+ # Making the p2c runtime library
+ libp2c.a: $(LIBOBJS)
+-	ar r libp2c.a $(LIBOBJS) $(OTHERLIBOBJS)
++	$(AR) r libp2c.a $(LIBOBJS) $(OTHERLIBOBJS)
+ 
+ p2clib.o: p2clib.c
+ 	$(CC) -c $(CFLAGS) p2clib.c
+@@ -145,61 +141,23 @@
+ newhome:
+ 	rm -f trans.o     # force trans.c to be recompiled (if HOMEDIR changes)
+ 
+-install: proto \
+-	makedirs \
+-	$(BINDIR)/p2c         \
+-	$(BINDIR)/p2cc        \
+-	$(LIBDIR)/libp2c.a    \
+-	$(MANDIR)/p2c.1	      \
+-	$(INCDIR)/p2c.h	      \
+-	$(HOMEDIR)/p2crc      \
+-	$(HOMEDIR)/loc.p2crc  \
+-	$(HOMEDIR)/system.imp \
+-	$(HOMEDIR)/system.m2  \
+-	$(HOMEDIR)/turbo.imp  \
+-	$(HOMEDIR)/string.pas
+-
+-SHELL=/bin/sh
+-makedirs:
+-	if [ ! -d $(HOMEDIR) ]; then mkdir $(HOMEDIR); else true; fi
+-	if [ ! -d $(BINDIR) ]; then mkdir $(BINDIR); else true; fi
+-	if [ ! -d $(LIBDIR) ]; then mkdir $(LIBDIR); else true; fi
+-	if [ ! -d $(MANDIR) ]; then mkdir $(MANDIR); else true; fi
+-	if [ ! -d $(INCDIR) ]; then mkdir $(INCDIR); else true; fi
+-
+-$(BINDIR)/p2c: p2c
+-	$(COPY)  p2c          $(BINDIR)/p2c
+-
+-$(BINDIR)/p2cc: p2cc
+-	$(COPY)  p2cc         $(BINDIR)/p2cc
+-
+-$(LIBDIR)/libp2c.a: libp2c.a
+-	$(COPY)  libp2c.a     $(LIBDIR)/libp2c.a
+-	if [ -f /usr/bin/ranlib -o -f /bin/ranlib ]; then ranlib $(LIBDIR)/libp2c.a; fi
+-
+-$(MANDIR)/p2c.1: $(MANFILE)
+-	$(COPY)  $(MANFILE)   $(MANDIR)/p2c.1
+-
+-$(INCDIR)/p2c.h: p2c.h
+-	$(COPY)  p2c.h        $(INCDIR)/p2c.h
+-
+-$(HOMEDIR)/p2crc: sys.p2crc
+-	$(COPY)  sys.p2crc    $(HOMEDIR)/p2crc
+-
+-$(HOMEDIR)/loc.p2crc: loc.p2crc
+-	$(COPY)  loc.p2crc    $(HOMEDIR)/loc.p2crc
+-
+-$(HOMEDIR)/system.imp: system.imp
+-	$(COPY)  system.imp   $(HOMEDIR)/system.imp
+-
+-$(HOMEDIR)/system.m2: system.m2
+-	$(COPY)  system.m2    $(HOMEDIR)/system.m2
+-
+-$(HOMEDIR)/turbo.imp: turbo.imp
+-	$(COPY)  turbo.imp    $(HOMEDIR)/turbo.imp
+-
+-$(HOMEDIR)/string.pas: string.pas
+-	$(COPY)  string.pas   $(HOMEDIR)/string.pas
++install:
++	if [ ! -d $(DESTDIR)$(HOMEDIR) ]; then mkdir $(DESTDIR)$(HOMEDIR); else true; fi
++	if [ ! -d $(DESTDIR)$(BINDIR) ]; then mkdir $(DESTDIR)$(BINDIR); else true; fi
++	if [ ! -d $(DESTDIR)$(LIBDIR) ]; then mkdir $(DESTDIR)$(LIBDIR); else true; fi
++	if [ ! -d $(DESTDIR)$(MANDIR) ]; then mkdir $(DESTDIR)$(MANDIR); else true; fi
++	if [ ! -d $(DESTDIR)$(INCDIR) ]; then mkdir $(DESTDIR)$(INCDIR); else true; fi
++	$(COPY)  p2c          $(DESTDIR)$(BINDIR)/p2c
++	$(COPY)  libp2c.a     $(DESTDIR)$(LIBDIR)/libp2c.a
++	$(AR) -s $(DESTDIR)$(LIBDIR)/libp2c.a
++	$(COPY)  $(MANFILE)   $(DESTDIR)$(MANDIR)/p2c.1
++	$(COPY)  p2c.h        $(DESTDIR)$(INCDIR)/p2c.h
++	$(COPY)  sys.p2crc    $(DESTDIR)$(HOMEDIR)/p2crc
++	$(COPY)  loc.p2crc    $(DESTDIR)$(HOMEDIR)/loc.p2crc
++	$(COPY)  system.imp   $(DESTDIR)$(HOMEDIR)/system.imp
++	$(COPY)  system.m2    $(DESTDIR)$(HOMEDIR)/system.m2
++	$(COPY)  turbo.imp    $(DESTDIR)$(HOMEDIR)/turbo.imp
++	$(COPY)  string.pas   $(DESTDIR)$(HOMEDIR)/string.pas
+ 
+ 
+ 
+diff -ru p2c-2.02.orig/src/stuff.c p2c-2.02/src/stuff.c
+--- p2c-2.02.orig/src/stuff.c	1993-12-08 06:36:48.000000000 +0100
++++ p2c-2.02/src/stuff.c	2024-03-20 10:43:13.059760161 +0100
+@@ -316,7 +316,7 @@
+     cp = my_strrchr(fn, '.');
+     if (!cp)
+         return;
+-#if defined(unix) || defined(__unix)
++#if defined(unix) || defined(__unix) || defined(__midipix__)
+     cp2 = my_strrchr(fn, '/');
+     if (cp2 && cp < cp2)
+         return;
+diff -ru p2c-2.02.orig/src/trans.c p2c-2.02/src/trans.c
+--- p2c-2.02.orig/src/trans.c	2015-10-02 19:52:53.000000000 +0200
++++ p2c-2.02/src/trans.c	2024-03-20 10:45:31.173956389 +0100
+@@ -558,7 +558,7 @@
+ void saveoldfile(fname)
+ char *fname;
+ {
+-#if defined(unix) || defined(__unix) || defined(CAN_LINK)
++#if defined(unix) || defined(__unix) || defined(CAN_LINK) || defined(__midipix__)
+     (void) unlink(format_s("%s~", fname));
+     if (link(fname, format_s("%s~", fname)) == 0)
+         (void) unlink(fname);
diff --git a/patches/patch/no-ownership-hack.patch b/patches/patch/no-ownership-hack.patch
new file mode 100644
index 00000000..0d74cdd2
--- /dev/null
+++ b/patches/patch/no-ownership-hack.patch
@@ -0,0 +1,19 @@
+diff -ru patch-2.7.6.orig/src/util.c patch-2.7.6/src/util.c
+--- patch-2.7.6.orig/src/util.c	2018-02-03 13:41:49.000000000 +0100
++++ patch-2.7.6/src/util.c	2024-01-01 18:44:53.339218111 +0100
+@@ -269,6 +269,7 @@
+       uid = (euid == st->st_uid) ? -1 : st->st_uid;
+       gid = (egid == st->st_gid) ? -1 : st->st_gid;
+ 
++#ifndef __midipix__
+       /* May fail if we are not privileged to set the file owner, or we are
+          not in group instat.st_gid.  Ignore those errors.  */
+       if ((uid != -1 || gid != -1)
+@@ -281,6 +282,7 @@
+ 		(uid == -1) ? "owner" : "owning group",
+ 		S_ISLNK (mode) ? "symbolic link" : "file",
+ 		quotearg (to));
++#endif
+     }
+   if (attr & FA_XATTRS)
+     if (copy_attr (from, to) != 0
diff --git a/patches/patch_minipix b/patches/patch_minipix
new file mode 120000
index 00000000..dbcae144
--- /dev/null
+++ b/patches/patch_minipix
@@ -0,0 +1 @@
+patch
\ No newline at end of file
diff --git a/patches/perl-5.22.1.local.patch b/patches/perl-5.22.1.local.patch
deleted file mode 100644
index 2113c540..00000000
--- a/patches/perl-5.22.1.local.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-diff -ru perl-5.22.1.orig/installman perl-5.22.1/installman
---- perl-5.22.1.orig/installman	2017-11-17 23:35:34.386593179 +0100
-+++ perl-5.22.1/installman	2017-11-17 23:03:41.388858972 +0100
-@@ -146,9 +146,10 @@
- 	    next;
- 	}
- 
--	if ($^O eq 'os2' || $^O eq 'amigaos' || $^O eq 'uwin' || $^O eq 'cygwin') {
-+	#Fix me later?
-+	#if ($^O eq 'os2' || $^O eq 'amigaos' || $^O eq 'uwin' || $^O eq 'cygwin' || $^O eq 'midipix') {
-             $manpage =~ s#::#.#g;
--	}
-+	#}
-         my $tmp = "${mandir}/${manpage}.tmp";
- 	$manpage = "${mandir}/${manpage}.${manext}";
- 
-diff -ru perl-5.22.1.orig/Makefile perl-5.22.1/Makefile
---- perl-5.22.1.orig/Makefile	2017-11-17 19:06:50.298908618 +0100
-+++ perl-5.22.1/Makefile	2017-11-17 23:32:21.687695934 +0100
-@@ -135,7 +135,7 @@
- perl$x: perlmain$o $(LIBPERL) $(static_tgt) static.list ext.libs
- 	$(eval extlibs=$(shell cat ext.libs))
- 	$(eval statars=$(shell cat static.list))
--	$(CC) $(LDFLAGS) -o $@ $(filter %$o,$^) $(LIBPERL) $(statars) $(LIBS) $(extlibs)
-+	$(CC) $(LDFLAGS) -o $@ $(filter %$o,$^) -L. -lperl $(statars) $(LIBS) $(extlibs)
- 
- %$o: %.c config.h
- 	$(CC) $(CFLAGS) -c -o $@ $<
diff --git a/patches/perl-5.36.0.local.patch b/patches/perl-5.36.0.local.patch
new file mode 100644
index 00000000..b56ecc69
--- /dev/null
+++ b/patches/perl-5.36.0.local.patch
@@ -0,0 +1,13 @@
+diff -ru perl-5.36.0.orig/installman perl-5.36.0/installman
+--- perl-5.36.0.orig/installman	2022-10-12 21:41:08.169953621 +0200
++++ perl-5.36.0/installman	2022-10-12 21:59:24.769494586 +0200
+@@ -152,9 +152,7 @@
+ 	    next;
+ 	}
+ 
+-	if ($^O eq 'os2' || $^O eq 'amigaos' || $^O eq 'cygwin') {
+             $manpage =~ s#::#.#g;
+-	}
+         my $tmp = "${mandir}/${manpage}.tmp";
+ 	$manpage = "${mandir}/${manpage}.${manext}";
+ 
diff --git a/patches/perl/yes-we-can-hack.patch b/patches/perl/yes-we-can-hack.patch
new file mode 100644
index 00000000..ce0616c8
--- /dev/null
+++ b/patches/perl/yes-we-can-hack.patch
@@ -0,0 +1,12 @@
+diff -ru perl-5.36.0.orig/doio.c perl-5.36.0/doio.c
+--- perl-5.36.0.orig/doio.c	2022-05-20 02:01:22.000000000 +0200
++++ perl-5.36.0/doio.c	2022-10-30 18:20:57.721541670 +0100
+@@ -2892,6 +2892,8 @@
+     PERL_ARGS_ASSERT_CANDO;
+     PERL_UNUSED_CONTEXT;
+ 
++    return TRUE;
++
+ #ifdef DOSISH
+     /* [Comments and code from Len Reed]
+      * MS-DOS "user" is similar to UNIX's "superuser," but can't write
diff --git a/patches/php-8.1.6_pre.local.patch b/patches/php-8.1.6_pre.local.patch
deleted file mode 100644
index dda9bf5b..00000000
--- a/patches/php-8.1.6_pre.local.patch
+++ /dev/null
@@ -1,968 +0,0 @@
-diff -Nru php-8.1.0.orig/build/libtool.m4 php-8.1.0/build/libtool.m4
---- php-8.1.0.orig/build/libtool.m4	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/build/libtool.m4	2021-11-26 11:59:47.795396689 +0100
-@@ -56,10 +56,6 @@
- # This can be used to rebuild libtool when needed
- LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh"
- 
--# Always use our own libtool.
--LIBTOOL='$(SHELL) $(top_builddir)/libtool'
--AC_SUBST(LIBTOOL)dnl
--
- # Prevent multiple expansion
- define([AC_PROG_LIBTOOL], [])
- ])# _AC_PROG_LIBTOOL
-diff -Nru php-8.1.0.orig/build/Makefile.global php-8.1.0/build/Makefile.global
---- php-8.1.0.orig/build/Makefile.global	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/build/Makefile.global	2021-11-26 11:59:25.139396233 +0100
-@@ -11,9 +11,9 @@
- 	@echo "Don't forget to run 'make test'."
- 	@echo
- 
--build-modules: $(PHP_MODULES) $(PHP_ZEND_EX)
-+build-modules: $(PHP_MODULES) $(PHP_ZEND_EX) libphp.la
- 
--build-binaries: $(PHP_BINARIES)
-+build-binaries: $(PHP_BINARIES) libphp.la
- 
- libphp.la: $(PHP_GLOBAL_OBJS) $(PHP_SAPI_OBJS)
- 	$(LIBTOOL) --mode=link $(CC) $(LIBPHP_CFLAGS) $(CFLAGS) $(EXTRA_CFLAGS) -rpath $(phptempdir) $(EXTRA_LDFLAGS) $(LDFLAGS) $(PHP_RPATHS) $(PHP_GLOBAL_OBJS) $(PHP_SAPI_OBJS) $(EXTRA_LIBS) $(ZEND_EXTRA_LIBS) -o $@
-diff -Nru php-8.1.0.orig/configure php-8.1.0/configure
---- php-8.1.0.orig/configure	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/configure	2021-11-28 11:23:38.328485103 +0100
-@@ -7771,6 +7771,9 @@
-   *darwin*)
-     BUILD_CLI="\$(CC) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(NATIVE_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_CLI_OBJS:.lo=.o) \$(PHP_FRAMEWORKS) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CLI_PATH)"
-     ;;
-+  *midipix*)
-+    BUILD_CLI="\$(LIBTOOL) --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_CLI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CLI_PATH) \$(top_builddir)/libs/libphp.so"
-+    ;;
-   *)
-     BUILD_CLI="\$(LIBTOOL) --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_CLI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CLI_PATH)"
-     ;;
-@@ -11403,14 +11406,12 @@
- 
-   BUILD_PHPDBG="\$(LIBTOOL) --mode=link \
-         \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \
--                \$(PHP_GLOBAL_OBJS:.lo=.o) \
--                \$(PHP_BINARY_OBJS:.lo=.o) \
-                 \$(PHP_PHPDBG_OBJS:.lo=.o) \
-                 \$(EXTRA_LIBS) \
-                 \$(PHPDBG_EXTRA_LIBS) \
-                 \$(ZEND_EXTRA_LIBS) \
-                 \$(PHP_FRAMEWORKS) \
--         -o \$(BUILD_BINARY)"
-+         -o \$(BUILD_BINARY) \$(top_builddir)/libs/libphp.so"
- 
-   BUILD_PHPDBG_SHARED="\$(LIBTOOL) --mode=link \
-         \$(CC) -shared -Wl,-soname,libphpdbg.so -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \
-@@ -11636,6 +11637,9 @@
-       *darwin*)
-         BUILD_CGI="\$(CC) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(NATIVE_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_FASTCGI_OBJS:.lo=.o) \$(PHP_CGI_OBJS:.lo=.o) \$(PHP_FRAMEWORKS) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CGI_PATH)"
-       ;;
-+      *midipix*)
-+        BUILD_CGI="\$(LIBTOOL) --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_FASTCGI_OBJS:.lo=.o) \$(PHP_CGI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CGI_PATH) \$(top_builddir)/libs/libphp.so"
-+      ;;
-       *)
-         BUILD_CGI="\$(LIBTOOL) --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_FASTCGI_OBJS:.lo=.o) \$(PHP_CGI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CGI_PATH)"
-       ;;
-@@ -21247,7 +21251,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/libxml.$suffix \$(phplibdir)
- 
- $ext_builddir/libxml.$suffix: \$(shared_objects_libxml) \$(LIBXML_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_libxml) \$(LIBXML_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_libxml) \$(LIBXML_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -21624,7 +21628,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/openssl.$suffix \$(phplibdir)
- 
- $ext_builddir/openssl.$suffix: \$(shared_objects_openssl) \$(OPENSSL_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_openssl) \$(OPENSSL_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_openssl) \$(OPENSSL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -22705,7 +22709,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/pcre.$suffix \$(phplibdir)
- 
- $ext_builddir/pcre.$suffix: \$(shared_objects_pcre) \$(PCRE_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcre) \$(PCRE_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcre) \$(PCRE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -24106,7 +24110,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/sqlite3.$suffix \$(phplibdir)
- 
- $ext_builddir/sqlite3.$suffix: \$(shared_objects_sqlite3) \$(SQLITE3_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sqlite3) \$(SQLITE3_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sqlite3) \$(SQLITE3_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -24652,7 +24656,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/zlib.$suffix \$(phplibdir)
- 
- $ext_builddir/zlib.$suffix: \$(shared_objects_zlib) \$(ZLIB_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zlib) \$(ZLIB_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zlib) \$(ZLIB_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -24969,7 +24973,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/bcmath.$suffix \$(phplibdir)
- 
- $ext_builddir/bcmath.$suffix: \$(shared_objects_bcmath) \$(BCMATH_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bcmath) \$(BCMATH_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bcmath) \$(BCMATH_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -25606,7 +25610,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/bz2.$suffix \$(phplibdir)
- 
- $ext_builddir/bz2.$suffix: \$(shared_objects_bz2) \$(BZ2_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bz2) \$(BZ2_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bz2) \$(BZ2_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -25918,7 +25922,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/calendar.$suffix \$(phplibdir)
- 
- $ext_builddir/calendar.$suffix: \$(shared_objects_calendar) \$(CALENDAR_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_calendar) \$(CALENDAR_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_calendar) \$(CALENDAR_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -26227,7 +26231,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/ctype.$suffix \$(phplibdir)
- 
- $ext_builddir/ctype.$suffix: \$(shared_objects_ctype) \$(CTYPE_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ctype) \$(CTYPE_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ctype) \$(CTYPE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -27277,7 +27281,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/curl.$suffix \$(phplibdir)
- 
- $ext_builddir/curl.$suffix: \$(shared_objects_curl) \$(CURL_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_curl) \$(CURL_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_curl) \$(CURL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -31630,7 +31634,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/dba.$suffix \$(phplibdir)
- 
- $ext_builddir/dba.$suffix: \$(shared_objects_dba) \$(DBA_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dba) \$(DBA_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dba) \$(DBA_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -32221,7 +32225,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/dom.$suffix \$(phplibdir)
- 
- $ext_builddir/dom.$suffix: \$(shared_objects_dom) \$(DOM_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dom) \$(DOM_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dom) \$(DOM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -33684,7 +33688,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/exif.$suffix \$(phplibdir)
- 
- $ext_builddir/exif.$suffix: \$(shared_objects_exif) \$(EXIF_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_exif) \$(EXIF_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_exif) \$(EXIF_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -34870,7 +34874,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/fileinfo.$suffix \$(phplibdir)
- 
- $ext_builddir/fileinfo.$suffix: \$(shared_objects_fileinfo) \$(FILEINFO_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_fileinfo) \$(FILEINFO_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_fileinfo) \$(FILEINFO_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-lpcre2-8
- 
- EOF
- 
-@@ -35202,7 +35206,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/filter.$suffix \$(phplibdir)
- 
- $ext_builddir/filter.$suffix: \$(shared_objects_filter) \$(FILTER_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_filter) \$(FILTER_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_filter) \$(FILTER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-lpcre2-8
- 
- EOF
- 
-@@ -35577,7 +35581,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/ftp.$suffix \$(phplibdir)
- 
- $ext_builddir/ftp.$suffix: \$(shared_objects_ftp) \$(FTP_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ftp) \$(FTP_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ftp) \$(FTP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -40772,7 +40776,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/gettext.$suffix \$(phplibdir)
- 
- $ext_builddir/gettext.$suffix: \$(shared_objects_gettext) \$(GETTEXT_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gettext) \$(GETTEXT_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gettext) \$(GETTEXT_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -43440,7 +43444,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/iconv.$suffix \$(phplibdir)
- 
- $ext_builddir/iconv.$suffix: \$(shared_objects_iconv) \$(ICONV_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_iconv) \$(ICONV_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_iconv) \$(ICONV_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-liconv
- 
- EOF
- 
-@@ -49790,7 +49794,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/mbstring.$suffix \$(phplibdir)
- 
- $ext_builddir/mbstring.$suffix: \$(shared_objects_mbstring) \$(MBSTRING_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mbstring) \$(MBSTRING_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mbstring) \$(MBSTRING_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-lpcre2-8
- 
- EOF
- 
-@@ -54970,7 +54974,16 @@
- printf %s "checking for sysvipc shared memory support... " >&6; }
-   if test "$cross_compiling" = yes
- then :
--  have_shm_ipc=no
-+
-+  case $host_alias in
-+    *midipix*)
-+      have_shm_ipc=yes
-+      ;;
-+    *)
-+      have_shm_ipc=no
-+      ;;
-+  esac
-+
- else $as_nop
-   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
- /* end confdefs.h.  */
-@@ -55846,7 +55859,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/opcache.$suffix \$(phplibdir)
- 
- $ext_builddir/opcache.$suffix: \$(shared_objects_opcache) \$(OPCACHE_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_opcache) \$(OPCACHE_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_opcache) \$(OPCACHE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-lpcre2-8
- 
- EOF
- 
-@@ -65092,7 +65105,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/posix.$suffix \$(phplibdir)
- 
- $ext_builddir/posix.$suffix: \$(shared_objects_posix) \$(POSIX_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_posix) \$(POSIX_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_posix) \$(POSIX_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -68635,7 +68648,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/readline.$suffix \$(phplibdir)
- 
- $ext_builddir/readline.$suffix: \$(shared_objects_readline) \$(READLINE_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_readline) \$(READLINE_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_readline) \$(READLINE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -69464,7 +69477,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/session.$suffix \$(phplibdir)
- 
- $ext_builddir/session.$suffix: \$(shared_objects_session) \$(SESSION_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_session) \$(SESSION_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_session) \$(SESSION_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -70001,7 +70014,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/shmop.$suffix \$(phplibdir)
- 
- $ext_builddir/shmop.$suffix: \$(shared_objects_shmop) \$(SHMOP_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_shmop) \$(SHMOP_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_shmop) \$(SHMOP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -70553,7 +70566,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/simplexml.$suffix \$(phplibdir)
- 
- $ext_builddir/simplexml.$suffix: \$(shared_objects_simplexml) \$(SIMPLEXML_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_simplexml) \$(SIMPLEXML_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_simplexml) \$(SIMPLEXML_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -72343,7 +72356,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/soap.$suffix \$(phplibdir)
- 
- $ext_builddir/soap.$suffix: \$(shared_objects_soap) \$(SOAP_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_soap) \$(SOAP_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_soap) \$(SOAP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -72854,7 +72867,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/sockets.$suffix \$(phplibdir)
- 
- $ext_builddir/sockets.$suffix: \$(shared_objects_sockets) \$(SOCKETS_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sockets) \$(SOCKETS_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sockets) \$(SOCKETS_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -78714,7 +78727,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/sysvmsg.$suffix \$(phplibdir)
- 
- $ext_builddir/sysvmsg.$suffix: \$(shared_objects_sysvmsg) \$(SYSVMSG_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvmsg) \$(SYSVMSG_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvmsg) \$(SYSVMSG_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -79020,7 +79033,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/sysvsem.$suffix \$(phplibdir)
- 
- $ext_builddir/sysvsem.$suffix: \$(shared_objects_sysvsem) \$(SYSVSEM_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvsem) \$(SYSVSEM_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvsem) \$(SYSVSEM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -79377,7 +79390,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/sysvshm.$suffix \$(phplibdir)
- 
- $ext_builddir/sysvshm.$suffix: \$(shared_objects_sysvshm) \$(SYSVSHM_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvshm) \$(SYSVSHM_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvshm) \$(SYSVSHM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -80659,7 +80672,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/tokenizer.$suffix \$(phplibdir)
- 
- $ext_builddir/tokenizer.$suffix: \$(shared_objects_tokenizer) \$(TOKENIZER_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_tokenizer) \$(TOKENIZER_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_tokenizer) \$(TOKENIZER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -81503,7 +81516,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/xml.$suffix \$(phplibdir)
- 
- $ext_builddir/xml.$suffix: \$(shared_objects_xml) \$(XML_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xml) \$(XML_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xml) \$(XML_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -82079,7 +82092,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/xmlreader.$suffix \$(phplibdir)
- 
- $ext_builddir/xmlreader.$suffix: \$(shared_objects_xmlreader) \$(XMLREADER_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlreader) \$(XMLREADER_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlreader) \$(XMLREADER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -82655,7 +82668,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/xmlwriter.$suffix \$(phplibdir)
- 
- $ext_builddir/xmlwriter.$suffix: \$(shared_objects_xmlwriter) \$(XMLWRITER_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlwriter) \$(XMLWRITER_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlwriter) \$(XMLWRITER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -83426,7 +83439,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/xsl.$suffix \$(phplibdir)
- 
- $ext_builddir/xsl.$suffix: \$(shared_objects_xsl) \$(XSL_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xsl) \$(XSL_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xsl) \$(XSL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -83754,7 +83767,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/zend_test.$suffix \$(phplibdir)
- 
- $ext_builddir/zend_test.$suffix: \$(shared_objects_zend_test) \$(ZEND_TEST_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zend_test) \$(ZEND_TEST_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zend_test) \$(ZEND_TEST_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
- 
- EOF
- 
-@@ -85286,7 +85299,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/zip.$suffix \$(phplibdir)
- 
- $ext_builddir/zip.$suffix: \$(shared_objects_zip) \$(ZIP_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zip) \$(ZIP_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zip) \$(ZIP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-lpcre2-8
- 
- EOF
- 
-@@ -86122,7 +86135,7 @@
- 	\$(LIBTOOL) --mode=install cp $ext_builddir/mysqlnd.$suffix \$(phplibdir)
- 
- $ext_builddir/mysqlnd.$suffix: \$(shared_objects_mysqlnd) \$(MYSQLND_SHARED_DEPENDENCIES)
--	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mysqlnd) \$(MYSQLND_SHARED_LIBADD)
-+	\$(LIBTOOL) --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mysqlnd) \$(MYSQLND_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \-lcrypto \-lz
- 
- EOF
- 
-@@ -86355,7 +86368,7 @@
- enable_static=yes
- 
- case $php_sapi_module in
--  shared)
-+  *)
-     if test "$PHP_CGI" = "no" && test "$PHP_CLI" = "no" && test "$PHP_FPM" = "no" && test "$PHP_LITESPEED" = "no" && test "$PHP_PHPDBG" = "no"; then
-       enable_static=no
-     fi
-@@ -86369,12 +86382,6 @@
-     esac
-     EXTRA_LDFLAGS="$EXTRA_LDFLAGS -avoid-version -module"
-     ;;
--  *)
--    standard_libtool_flag='-prefer-non-pic -static'
--    if test -z "$PHP_MODULES" && test -z "$PHP_ZEND_EX"; then
--      enable_shared=no
--    fi
--    ;;
- esac
- 
- EXTRA_LIBS="$EXTRA_LIBS $DLIBS $LIBS"
-@@ -86541,6 +86548,8 @@
-     fiber_os="mac" ;; #(
-   aix*|os400*) :
-     fiber_os="aix" ;; #(
-+  midipix*) :
-+    fiber_os="midipix" ;; #(
-   *) :
-     fiber_os="other"
-  ;;
-@@ -86572,6 +86581,8 @@
- 
- if test "$fiber_os" = 'mac'; then
-   fiber_asm_file="combined_sysv_macho_gas"
-+elif test "$fiber_os" = 'midipix'; then
-+  fiber_asm_file="x86_64_ms_pe_gas"
- elif test "$fiber_os" = 'aix'; then
-   # AIX uses a different calling convention (shared with non-_CALL_ELF Linux).
-   # The AIX assembler isn't GNU, but the file is compatible.
-@@ -86646,8 +86657,14 @@
- if test "x$ac_cv_header_ucontext_h" = xyes
- then :
- 
--
--printf "%s\n" "#define ZEND_FIBER_UCONTEXT 1" >>confdefs.h
-+  case $host_alias in
-+    *midipix*)
-+      # not supported
-+      ;;
-+    *)
-+      printf "%s\n" "#define ZEND_FIBER_UCONTEXT 1" >>confdefs.h
-+      ;;
-+  esac
- 
- 
- else $as_nop
-@@ -90670,7 +90687,7 @@
-       lt_prog_compiler_static='-Bstatic'
-       ;;
- 
--    linux* | k*bsd*-gnu)
-+    linux* | k*bsd*-gnu | midipix*)
-       case $cc_basename in
-       # old Intel for x86_64 which still supported -KPIC.
-       ecc*)
-@@ -92390,6 +92407,17 @@
-   dynamic_linker='GNU/Linux ld.so'
-   ;;
- 
-+midipix*)
-+  version_type=linux # correct to gnu/linux during the next big refactor
-+  need_lib_prefix=no
-+  need_version=no
-+  library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext'
-+  soname_spec='$libname$release$shared_ext$major'
-+  finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
-+  shlibpath_var=LD_LIBRARY_PATH
-+  dynamic_linker='GNU/Linux ld.so'
-+  ;;
-+
- netbsd*)
-   version_type=sunos
-   need_lib_prefix=no
-@@ -94461,7 +94489,7 @@
-     hardcode_libdir_flag_spec_CXX='${wl}-rpath ${wl}$libdir'
-     hardcode_libdir_separator_CXX=:
-     ;;
--  linux* | k*bsd*-gnu)
-+  linux* | k*bsd*-gnu | midipix*)
-     case $cc_basename in
-       KCC*)
- 	# Kuck and Associates, Inc. (KAI) C++ Compiler
-diff -Nru php-8.1.0.orig/sapi/cgi/Makefile.frag php-8.1.0/sapi/cgi/Makefile.frag
---- php-8.1.0.orig/sapi/cgi/Makefile.frag	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/sapi/cgi/Makefile.frag	2021-11-26 12:00:32.631397589 +0100
-@@ -6,7 +6,7 @@
- install-cgi: $(SAPI_CGI_PATH)
- 	@echo "Installing PHP CGI binary:        $(INSTALL_ROOT)$(bindir)/"
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
--	@$(INSTALL) -m 0755 $(SAPI_CGI_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)php-cgi$(program_suffix)$(EXEEXT)
-+	@$(LIBTOOL) --mode=install cp $(SAPI_CGI_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)php-cgi$(program_suffix)$(EXEEXT)
- 	@echo "Installing PHP CGI man page:      $(INSTALL_ROOT)$(mandir)/man1/"
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
- 	@$(INSTALL_DATA) sapi/cgi/php-cgi.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)php-cgi$(program_suffix).1
-diff -Nru php-8.1.0.orig/sapi/cli/Makefile.frag php-8.1.0/sapi/cli/Makefile.frag
---- php-8.1.0.orig/sapi/cli/Makefile.frag	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/sapi/cli/Makefile.frag	2021-11-26 12:01:05.943398259 +0100
-@@ -6,7 +6,7 @@
- install-cli: $(SAPI_CLI_PATH)
- 	@echo "Installing PHP CLI binary:        $(INSTALL_ROOT)$(bindir)/"
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
--	@$(INSTALL) -m 0755 $(SAPI_CLI_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)php$(program_suffix)$(EXEEXT)
-+	@$(LIBTOOL) --mode=install cp $(SAPI_CLI_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)php$(program_suffix)$(EXEEXT)
- 	@echo "Installing PHP CLI man page:      $(INSTALL_ROOT)$(mandir)/man1/"
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
- 	@$(INSTALL_DATA) sapi/cli/php.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)php$(program_suffix).1
-diff -Nru php-8.1.0.orig/sapi/phpdbg/Makefile.frag php-8.1.0/sapi/phpdbg/Makefile.frag
---- php-8.1.0.orig/sapi/phpdbg/Makefile.frag	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/sapi/phpdbg/Makefile.frag	2021-11-26 12:01:32.975398802 +0100
-@@ -25,7 +25,7 @@
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(localstatedir)/log
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(localstatedir)/run
--	@$(INSTALL) -m 0755 $(BUILD_BINARY) $(INSTALL_ROOT)$(bindir)/$(program_prefix)phpdbg$(program_suffix)$(EXEEXT)
-+	@$(LIBTOOL) --mode=install cp $(BUILD_BINARY) $(INSTALL_ROOT)$(bindir)/$(program_prefix)phpdbg$(program_suffix)$(EXEEXT)
- 	@echo "Installing phpdbg man page:       $(INSTALL_ROOT)$(mandir)/man1/"
- 	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
- 	@$(INSTALL_DATA) sapi/phpdbg/phpdbg.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)phpdbg$(program_suffix).1
-diff -Nru php-8.1.0.orig/TSRM/TSRM.h php-8.1.0/TSRM/TSRM.h
---- php-8.1.0.orig/TSRM/TSRM.h	2021-11-23 19:56:11.000000000 +0100
-+++ php-8.1.0/TSRM/TSRM.h	2021-11-26 12:02:01.263399370 +0100
-@@ -147,7 +147,7 @@
- # define __has_attribute(x) 0
- #endif
- 
--#if !__has_attribute(tls_model) || defined(__FreeBSD__) || defined(__MUSL__) || defined(__HAIKU__)
-+#if !__has_attribute(tls_model) || defined(__FreeBSD__) || defined(__MUSL__) || defined(__HAIKU__) || defined(__midipix__)
- # define TSRM_TLS_MODEL_ATTR
- #elif __PIC__
- # define TSRM_TLS_MODEL_ATTR __attribute__((tls_model("initial-exec")))
-diff -Nru php-8.1.0.orig/Zend/asm/jump_x86_64_ms_pe_gas.S php-8.1.0/Zend/asm/jump_x86_64_ms_pe_gas.S
---- php-8.1.0.orig/Zend/asm/jump_x86_64_ms_pe_gas.S	1970-01-01 01:00:00.000000000 +0100
-+++ php-8.1.0/Zend/asm/jump_x86_64_ms_pe_gas.S	2021-11-28 11:43:11.689492139 +0100
-@@ -0,0 +1,213 @@
-+/*
-+            Copyright Oliver Kowalke 2009.
-+            Copyright Thomas Sailer 2013.
-+   Distributed under the Boost Software License, Version 1.0.
-+      (See accompanying file LICENSE_1_0.txt or copy at
-+            http://www.boost.org/LICENSE_1_0.txt)
-+*/
-+
-+/*************************************************************************************
-+* ---------------------------------------------------------------------------------- *
-+* |     0   |     1   |     2    |     3   |     4   |     5   |     6   |     7   | *
-+* ---------------------------------------------------------------------------------- *
-+* |    0x0  |    0x4  |    0x8   |    0xc  |   0x10  |   0x14  |   0x18  |   0x1c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |     8   |    9    |    10    |    11   |    12   |    13   |    14   |    15   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0x20  |  0x24   |   0x28   |   0x2c  |   0x30  |   0x34  |   0x38  |   0x3c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    16   |    17   |    18   |    19    |    20   |    21   |    22   |    23   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xe40  |   0x44 |   0x48  |   0x4c   |   0x50  |   0x54  |   0x58  |   0x5c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    24   |   25    |    26    |   27    |    28   |    29   |    30   |    31   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0x60  |   0x64  |   0x68   |   0x6c  |   0x70  |   0x74  |   0x78  |   0x7c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    32   |   32    |    33    |   34    |    35   |    36   |    37   |    38   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0x80  |   0x84  |   0x88   |   0x8c  |   0x90  |   0x94  |   0x98  |   0x9c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    39   |   40    |    41    |   42    |    43   |    44   |    45   |    46   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xa0  |   0xa4  |   0xa8   |   0xac  |   0xb0  |   0xb4  |   0xb8  |   0xbc  | *
-+* ---------------------------------------------------------------------------------- *
-+* | fc_mxcsr|fc_x87_cw|     <alignment>    |       fbr_strg    |      fc_dealloc   | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    47   |   48    |    49    |   50    |    51   |    52   |    53   |    54   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xc0  |   0xc4  |   0xc8   |   0xcc  |   0xd0  |   0xd4  |   0xd8  |   0xdc  | *
-+* ---------------------------------------------------------------------------------- *
-+* |        limit      |         base       |         R12       |         R13       | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    55   |   56    |    57    |   58    |    59   |    60   |    61   |    62   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xe0  |   0xe4  |   0xe8   |   0xec  |   0xf0  |   0xf4  |   0xf8  |   0xfc  | *
-+* ---------------------------------------------------------------------------------- *
-+* |        R14        |         R15        |         RDI       |        RSI        | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    63   |   64    |    65    |   66    |    67   |    68   |    69   |    70   | *
-+* ---------------------------------------------------------------------------------- *
-+* |  0x100  |  0x104  |  0x108   |  0x10c  |  0x110  |  0x114  |  0x118  |  0x11c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |        RBX        |         RBP        |       hidden      |        RIP        | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    71   |   72    |    73    |   74    |    75   |    76   |    77   |    78   | *
-+* ---------------------------------------------------------------------------------- *
-+* |  0x120  |  0x124  |  0x128   |  0x12c  |  0x130  |  0x134  |  0x138  |  0x13c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                                   parameter area                               | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    79   |   80    |    81    |   82    |    83   |    84   |    85   |    86   | *
-+* ---------------------------------------------------------------------------------- *
-+* |  0x140  |  0x144  |  0x148   |  0x14c  |  0x150  |  0x154  |  0x158  |  0x15c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |       FCTX        |        DATA        |                                       | *
-+* ---------------------------------------------------------------------------------- *
-+**************************************************************************************/
-+
-+.file	"jump_x86_64_ms_pe_gas.asm"
-+.text
-+.p2align 4,,15
-+.def	jump_fcontext;	.scl	2;	.type	32;	.endef
-+.seh_proc	jump_fcontext
-+jump_fcontext:
-+.seh_endprologue
-+
-+    leaq  -0x118(%rsp), %rsp /* prepare stack */
-+
-+#if !defined(BOOST_USE_TSX)
-+    /* save XMM storage */
-+    movaps  %xmm6, 0x0(%rsp)
-+    movaps  %xmm7, 0x10(%rsp)
-+    movaps  %xmm8, 0x20(%rsp)
-+    movaps  %xmm9, 0x30(%rsp)
-+    movaps  %xmm10, 0x40(%rsp)
-+    movaps  %xmm11, 0x50(%rsp)
-+    movaps  %xmm12, 0x60(%rsp)
-+    movaps  %xmm13, 0x70(%rsp)
-+    movaps  %xmm14, 0x80(%rsp)
-+    movaps  %xmm15, 0x90(%rsp)
-+    stmxcsr  0xa0(%rsp)  /* save MMX control- and status-word */
-+    fnstcw   0xa4(%rsp)  /* save x87 control-word */
-+#endif
-+
-+    /* load NT_TIB */
-+    movq  %gs:(0x30), %r10
-+    /* save fiber local storage */
-+    movq  0x20(%r10), %rax
-+    movq  %rax, 0xb0(%rsp)
-+    /* save current deallocation stack */
-+    movq  0x1478(%r10), %rax
-+    movq  %rax, 0xb8(%rsp)
-+    /* save current stack limit */
-+    movq  0x10(%r10), %rax
-+    movq  %rax, 0xc0(%rsp)
-+    /* save current stack base */
-+    movq  0x08(%r10), %rax
-+    movq  %rax, 0xc8(%rsp)
-+
-+    movq  %r12, 0xd0(%rsp)  /* save R12 */
-+    movq  %r13, 0xd8(%rsp)  /* save R13 */
-+    movq  %r14, 0xe0(%rsp)  /* save R14 */
-+    movq  %r15, 0xe8(%rsp)  /* save R15 */
-+    movq  %rdi, 0xf0(%rsp)  /* save RDI */
-+    movq  %rsi, 0xf8(%rsp)  /* save RSI */
-+    movq  %rbx, 0x100(%rsp)  /* save RBX */
-+    movq  %rbp, 0x108(%rsp)  /* save RBP */
-+
-+    movq  %rcx, 0x110(%rsp)  /* save hidden address of transport_t */
-+
-+    /* preserve RSP (pointing to context-data) in R9 */
-+    movq  %rsp, %r9
-+
-+    /* restore RSP (pointing to context-data) from RDX */
-+    movq  %rdx, %rsp
-+
-+#if !defined(BOOST_USE_TSX)
-+    /* restore XMM storage */
-+    movaps  0x0(%rsp), %xmm6
-+    movaps  0x10(%rsp), %xmm7
-+    movaps  0x20(%rsp), %xmm8
-+    movaps  0x30(%rsp), %xmm9
-+    movaps  0x40(%rsp), %xmm10
-+    movaps  0x50(%rsp), %xmm11
-+    movaps  0x60(%rsp), %xmm12
-+    movaps  0x70(%rsp), %xmm13
-+    movaps  0x80(%rsp), %xmm14
-+    movaps  0x90(%rsp), %xmm15
-+ 	ldmxcsr 0xa0(%rsp) /* restore MMX control- and status-word */
-+ 	fldcw   0xa4(%rsp) /* restore x87 control-word */
-+#endif
-+
-+    /* load NT_TIB */
-+    movq  %gs:(0x30), %r10
-+    /* restore fiber local storage */
-+    movq  0xb0(%rsp), %rax
-+    movq  %rax, 0x20(%r10)
-+    /* restore current deallocation stack */
-+    movq  0xb8(%rsp), %rax
-+    movq  %rax, 0x1478(%r10)
-+    /* restore current stack limit */
-+    movq  0xc0(%rsp), %rax
-+    movq  %rax, 0x10(%r10)
-+    /* restore current stack base */
-+    movq  0xc8(%rsp), %rax
-+    movq  %rax, 0x08(%r10)
-+
-+    movq  0xd0(%rsp),  %r12  /* restore R12 */
-+    movq  0xd8(%rsp),  %r13  /* restore R13 */
-+    movq  0xe0(%rsp),  %r14  /* restore R14 */
-+    movq  0xe8(%rsp),  %r15  /* restore R15 */
-+    movq  0xf0(%rsp),  %rdi  /* restore RDI */
-+    movq  0xf8(%rsp),  %rsi  /* restore RSI */
-+    movq  0x100(%rsp), %rbx  /* restore RBX */
-+    movq  0x108(%rsp), %rbp  /* restore RBP */
-+
-+    movq  0x110(%rsp), %rax  /* restore hidden address of transport_t */
-+
-+    leaq  0x118(%rsp), %rsp /* prepare stack */
-+
-+    /* restore return-address */
-+    popq  %r10
-+
-+    /* transport_t returned in RAX */
-+    /* return parent fcontext_t */
-+    movq  %r9, 0x0(%rax)
-+    /* return data */
-+    movq  %r8, 0x8(%rax)
-+
-+    /* transport_t as 1.arg of context-function */
-+    movq  %rax, %rcx
-+
-+    /* indirect jump to context */
-+    jmp  *%r10
-+.seh_endproc
-+
-+#ifdef __midipix__
-+        .section .got$jump_fcontext,"r"
-+        .global __imp_jump_fcontext
-+__imp_jump_fcontext:
-+        .quad   jump_fcontext
-+        .linkonce discard
-+#endif
-diff -Nru php-8.1.0.orig/Zend/asm/make_x86_64_ms_pe_gas.S php-8.1.0/Zend/asm/make_x86_64_ms_pe_gas.S
---- php-8.1.0.orig/Zend/asm/make_x86_64_ms_pe_gas.S	1970-01-01 01:00:00.000000000 +0100
-+++ php-8.1.0/Zend/asm/make_x86_64_ms_pe_gas.S	2021-11-28 11:44:29.385178672 +0100
-@@ -0,0 +1,178 @@
-+/*
-+            Copyright Oliver Kowalke 2009.
-+            Copyright Thomas Sailer 2013.
-+   Distributed under the Boost Software License, Version 1.0.
-+      (See accompanying file LICENSE_1_0.txt or copy at
-+            http://www.boost.org/LICENSE_1_0.txt)
-+*/
-+
-+/*************************************************************************************
-+* ---------------------------------------------------------------------------------- *
-+* |     0   |     1   |     2    |     3   |     4   |     5   |     6   |     7   | *
-+* ---------------------------------------------------------------------------------- *
-+* |    0x0  |    0x4  |    0x8   |    0xc  |   0x10  |   0x14  |   0x18  |   0x1c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |     8   |    9    |    10    |    11   |    12   |    13   |    14   |    15   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0x20  |  0x24   |   0x28   |   0x2c  |   0x30  |   0x34  |   0x38  |   0x3c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    16   |    17   |    18   |    19    |    20   |    21   |    22   |    23   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xe40  |   0x44 |   0x48  |   0x4c   |   0x50  |   0x54  |   0x58  |   0x5c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    24   |   25    |    26    |   27    |    28   |    29   |    30   |    31   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0x60  |   0x64  |   0x68   |   0x6c  |   0x70  |   0x74  |   0x78  |   0x7c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    32   |   32    |    33    |   34    |    35   |    36   |    37   |    38   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0x80  |   0x84  |   0x88   |   0x8c  |   0x90  |   0x94  |   0x98  |   0x9c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                          SEE registers (XMM6-XMM15)                            | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    39   |   40    |    41    |   42    |    43   |    44   |    45   |    46   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xa0  |   0xa4  |   0xa8   |   0xac  |   0xb0  |   0xb4  |   0xb8  |   0xbc  | *
-+* ---------------------------------------------------------------------------------- *
-+* | fc_mxcsr|fc_x87_cw|     <alignment>    |       fbr_strg    |      fc_dealloc   | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    47   |   48    |    49    |   50    |    51   |    52   |    53   |    54   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xc0  |   0xc4  |   0xc8   |   0xcc  |   0xd0  |   0xd4  |   0xd8  |   0xdc  | *
-+* ---------------------------------------------------------------------------------- *
-+* |        limit      |         base       |         R12       |         R13       | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    55   |   56    |    57    |   58    |    59   |    60   |    61   |    62   | *
-+* ---------------------------------------------------------------------------------- *
-+* |   0xe0  |   0xe4  |   0xe8   |   0xec  |   0xf0  |   0xf4  |   0xf8  |   0xfc  | *
-+* ---------------------------------------------------------------------------------- *
-+* |        R14        |         R15        |         RDI       |        RSI        | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    63   |   64    |    65    |   66    |    67   |    68   |    69   |    70   | *
-+* ---------------------------------------------------------------------------------- *
-+* |  0x100  |  0x104  |  0x108   |  0x10c  |  0x110  |  0x114  |  0x118  |  0x11c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |        RBX        |         RBP        |       hidden      |        RIP        | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    71   |   72    |    73    |   74    |    75   |    76   |    77   |    78   | *
-+* ---------------------------------------------------------------------------------- *
-+* |  0x120  |  0x124  |  0x128   |  0x12c  |  0x130  |  0x134  |  0x138  |  0x13c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |                                   parameter area                               | *
-+* ---------------------------------------------------------------------------------- *
-+* ---------------------------------------------------------------------------------- *
-+* |    79   |   80    |    81    |   82    |    83   |    84   |    85   |    86   | *
-+* ---------------------------------------------------------------------------------- *
-+* |  0x140  |  0x144  |  0x148   |  0x14c  |  0x150  |  0x154  |  0x158  |  0x15c  | *
-+* ---------------------------------------------------------------------------------- *
-+* |       FCTX        |        DATA        |                                       | *
-+* ---------------------------------------------------------------------------------- *
-+**************************************************************************************/
-+
-+.file	"make_x86_64_ms_pe_gas.asm"
-+.text
-+.p2align 4,,15
-+.def	make_fcontext;	.scl	2;	.type	32;	.endef
-+.seh_proc	make_fcontext
-+make_fcontext:
-+.seh_endprologue
-+
-+    /* first arg of make_fcontext() == top of context-stack */
-+    movq  %rcx, %rax
-+
-+    /* shift address in RAX to lower 16 byte boundary */
-+    /* == pointer to fcontext_t and address of context stack */
-+    andq  $-16, %rax
-+
-+    /* reserve space for context-data on context-stack */
-+    /* on context-function entry: (RSP -0x8) % 16 == 0 */
-+    leaq  -0x150(%rax), %rax
-+
-+    /* third arg of make_fcontext() == address of context-function */
-+    movq  %r8, 0x100(%rax)
-+
-+    /* first arg of make_fcontext() == top of context-stack */
-+    /* save top address of context stack as 'base' */
-+    movq  %rcx, 0xc8(%rax)
-+    /* second arg of make_fcontext() == size of context-stack */
-+    /* negate stack size for LEA instruction (== substraction) */
-+    negq  %rdx
-+    /* compute bottom address of context stack (limit) */
-+    leaq  (%rcx,%rdx), %rcx
-+    /* save bottom address of context stack as 'limit' */
-+    movq  %rcx, 0xc0(%rax)
-+    /* save address of context stack limit as 'dealloction stack' */
-+    movq  %rcx, 0xb8(%rax)
-+	/* set fiber-storage to zero */
-+    xorq  %rcx, %rcx
-+    movq  %rcx, 0xb0(%rax)
-+
-+	/* save MMX control- and status-word */
-+    stmxcsr  0xa0(%rax)
-+    /* save x87 control-word */
-+    fnstcw   0xa4(%rax)
-+
-+    /* compute address of transport_t */
-+    leaq  0x140(%rax), %rcx
-+    /* store address of transport_t in hidden field */
-+    movq %rcx, 0x110(%rax)
-+
-+    /* compute abs address of label trampoline */
-+    leaq  trampoline(%rip), %rcx
-+    /* save address of finish as return-address for context-function */
-+    /* will be entered after jump_fcontext() first time */
-+    movq  %rcx, 0x118(%rax)
-+
-+    /* compute abs address of label finish */
-+    leaq  finish(%rip), %rcx
-+    /* save address of finish as return-address for context-function */
-+    /* will be entered after context-function returns */
-+    movq  %rcx, 0x108(%rax)
-+
-+    ret /* return pointer to context-data */
-+
-+trampoline:
-+    /* store return address on stack */
-+    /* fix stack alignment */ 
-+    pushq %rbp
-+    /* jump to context-function */
-+    jmp *%rbx
-+
-+finish:
-+    /* 32byte shadow-space for _exit() */
-+    andq  $-32, %rsp
-+    /* 32byte shadow-space for _exit() are */
-+    /* already reserved by make_fcontext() */
-+    /* exit code is zero */
-+    xorq  %rcx, %rcx
-+    /* exit application */
-+    call  _exit
-+    hlt
-+.seh_endproc
-+
-+.def	_exit;	.scl	2;	.type	32;	.endef  /* standard C library function */
-+
-+#ifdef __midipix__
-+        .section .got$make_fcontext,"r"
-+        .global __imp_make_fcontext
-+__imp_make_fcontext:
-+        .quad   make_fcontext
-+        .linkonce discard
-+#endif
diff --git a/patches/php-8.3.4.local.patch b/patches/php-8.3.4.local.patch
new file mode 100644
index 00000000..e9f551a1
--- /dev/null
+++ b/patches/php-8.3.4.local.patch
@@ -0,0 +1,399 @@
+diff -Nru php-8.1.0.orig/Zend/asm/jump_x86_64_ms_pe_gas.S php-8.1.0/Zend/asm/jump_x86_64_ms_pe_gas.S
+--- php-8.1.0.orig/Zend/asm/jump_x86_64_ms_pe_gas.S	1970-01-01 01:00:00.000000000 +0100
++++ php-8.1.0/Zend/asm/jump_x86_64_ms_pe_gas.S	2021-11-28 11:43:11.689492139 +0100
+@@ -0,0 +1,213 @@
++/*
++            Copyright Oliver Kowalke 2009.
++            Copyright Thomas Sailer 2013.
++   Distributed under the Boost Software License, Version 1.0.
++      (See accompanying file LICENSE_1_0.txt or copy at
++            http://www.boost.org/LICENSE_1_0.txt)
++*/
++
++/*************************************************************************************
++* ---------------------------------------------------------------------------------- *
++* |     0   |     1   |     2    |     3   |     4   |     5   |     6   |     7   | *
++* ---------------------------------------------------------------------------------- *
++* |    0x0  |    0x4  |    0x8   |    0xc  |   0x10  |   0x14  |   0x18  |   0x1c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |     8   |    9    |    10    |    11   |    12   |    13   |    14   |    15   | *
++* ---------------------------------------------------------------------------------- *
++* |   0x20  |  0x24   |   0x28   |   0x2c  |   0x30  |   0x34  |   0x38  |   0x3c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    16   |    17   |    18   |    19    |    20   |    21   |    22   |    23   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xe40  |   0x44 |   0x48  |   0x4c   |   0x50  |   0x54  |   0x58  |   0x5c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    24   |   25    |    26    |   27    |    28   |    29   |    30   |    31   | *
++* ---------------------------------------------------------------------------------- *
++* |   0x60  |   0x64  |   0x68   |   0x6c  |   0x70  |   0x74  |   0x78  |   0x7c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    32   |   32    |    33    |   34    |    35   |    36   |    37   |    38   | *
++* ---------------------------------------------------------------------------------- *
++* |   0x80  |   0x84  |   0x88   |   0x8c  |   0x90  |   0x94  |   0x98  |   0x9c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    39   |   40    |    41    |   42    |    43   |    44   |    45   |    46   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xa0  |   0xa4  |   0xa8   |   0xac  |   0xb0  |   0xb4  |   0xb8  |   0xbc  | *
++* ---------------------------------------------------------------------------------- *
++* | fc_mxcsr|fc_x87_cw|     <alignment>    |       fbr_strg    |      fc_dealloc   | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    47   |   48    |    49    |   50    |    51   |    52   |    53   |    54   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xc0  |   0xc4  |   0xc8   |   0xcc  |   0xd0  |   0xd4  |   0xd8  |   0xdc  | *
++* ---------------------------------------------------------------------------------- *
++* |        limit      |         base       |         R12       |         R13       | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    55   |   56    |    57    |   58    |    59   |    60   |    61   |    62   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xe0  |   0xe4  |   0xe8   |   0xec  |   0xf0  |   0xf4  |   0xf8  |   0xfc  | *
++* ---------------------------------------------------------------------------------- *
++* |        R14        |         R15        |         RDI       |        RSI        | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    63   |   64    |    65    |   66    |    67   |    68   |    69   |    70   | *
++* ---------------------------------------------------------------------------------- *
++* |  0x100  |  0x104  |  0x108   |  0x10c  |  0x110  |  0x114  |  0x118  |  0x11c  | *
++* ---------------------------------------------------------------------------------- *
++* |        RBX        |         RBP        |       hidden      |        RIP        | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    71   |   72    |    73    |   74    |    75   |    76   |    77   |    78   | *
++* ---------------------------------------------------------------------------------- *
++* |  0x120  |  0x124  |  0x128   |  0x12c  |  0x130  |  0x134  |  0x138  |  0x13c  | *
++* ---------------------------------------------------------------------------------- *
++* |                                   parameter area                               | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    79   |   80    |    81    |   82    |    83   |    84   |    85   |    86   | *
++* ---------------------------------------------------------------------------------- *
++* |  0x140  |  0x144  |  0x148   |  0x14c  |  0x150  |  0x154  |  0x158  |  0x15c  | *
++* ---------------------------------------------------------------------------------- *
++* |       FCTX        |        DATA        |                                       | *
++* ---------------------------------------------------------------------------------- *
++**************************************************************************************/
++
++.file	"jump_x86_64_ms_pe_gas.asm"
++.text
++.p2align 4,,15
++.def	jump_fcontext;	.scl	2;	.type	32;	.endef
++.seh_proc	jump_fcontext
++jump_fcontext:
++.seh_endprologue
++
++    leaq  -0x118(%rsp), %rsp /* prepare stack */
++
++#if !defined(BOOST_USE_TSX)
++    /* save XMM storage */
++    movaps  %xmm6, 0x0(%rsp)
++    movaps  %xmm7, 0x10(%rsp)
++    movaps  %xmm8, 0x20(%rsp)
++    movaps  %xmm9, 0x30(%rsp)
++    movaps  %xmm10, 0x40(%rsp)
++    movaps  %xmm11, 0x50(%rsp)
++    movaps  %xmm12, 0x60(%rsp)
++    movaps  %xmm13, 0x70(%rsp)
++    movaps  %xmm14, 0x80(%rsp)
++    movaps  %xmm15, 0x90(%rsp)
++    stmxcsr  0xa0(%rsp)  /* save MMX control- and status-word */
++    fnstcw   0xa4(%rsp)  /* save x87 control-word */
++#endif
++
++    /* load NT_TIB */
++    movq  %gs:(0x30), %r10
++    /* save fiber local storage */
++    movq  0x20(%r10), %rax
++    movq  %rax, 0xb0(%rsp)
++    /* save current deallocation stack */
++    movq  0x1478(%r10), %rax
++    movq  %rax, 0xb8(%rsp)
++    /* save current stack limit */
++    movq  0x10(%r10), %rax
++    movq  %rax, 0xc0(%rsp)
++    /* save current stack base */
++    movq  0x08(%r10), %rax
++    movq  %rax, 0xc8(%rsp)
++
++    movq  %r12, 0xd0(%rsp)  /* save R12 */
++    movq  %r13, 0xd8(%rsp)  /* save R13 */
++    movq  %r14, 0xe0(%rsp)  /* save R14 */
++    movq  %r15, 0xe8(%rsp)  /* save R15 */
++    movq  %rdi, 0xf0(%rsp)  /* save RDI */
++    movq  %rsi, 0xf8(%rsp)  /* save RSI */
++    movq  %rbx, 0x100(%rsp)  /* save RBX */
++    movq  %rbp, 0x108(%rsp)  /* save RBP */
++
++    movq  %rcx, 0x110(%rsp)  /* save hidden address of transport_t */
++
++    /* preserve RSP (pointing to context-data) in R9 */
++    movq  %rsp, %r9
++
++    /* restore RSP (pointing to context-data) from RDX */
++    movq  %rdx, %rsp
++
++#if !defined(BOOST_USE_TSX)
++    /* restore XMM storage */
++    movaps  0x0(%rsp), %xmm6
++    movaps  0x10(%rsp), %xmm7
++    movaps  0x20(%rsp), %xmm8
++    movaps  0x30(%rsp), %xmm9
++    movaps  0x40(%rsp), %xmm10
++    movaps  0x50(%rsp), %xmm11
++    movaps  0x60(%rsp), %xmm12
++    movaps  0x70(%rsp), %xmm13
++    movaps  0x80(%rsp), %xmm14
++    movaps  0x90(%rsp), %xmm15
++ 	ldmxcsr 0xa0(%rsp) /* restore MMX control- and status-word */
++ 	fldcw   0xa4(%rsp) /* restore x87 control-word */
++#endif
++
++    /* load NT_TIB */
++    movq  %gs:(0x30), %r10
++    /* restore fiber local storage */
++    movq  0xb0(%rsp), %rax
++    movq  %rax, 0x20(%r10)
++    /* restore current deallocation stack */
++    movq  0xb8(%rsp), %rax
++    movq  %rax, 0x1478(%r10)
++    /* restore current stack limit */
++    movq  0xc0(%rsp), %rax
++    movq  %rax, 0x10(%r10)
++    /* restore current stack base */
++    movq  0xc8(%rsp), %rax
++    movq  %rax, 0x08(%r10)
++
++    movq  0xd0(%rsp),  %r12  /* restore R12 */
++    movq  0xd8(%rsp),  %r13  /* restore R13 */
++    movq  0xe0(%rsp),  %r14  /* restore R14 */
++    movq  0xe8(%rsp),  %r15  /* restore R15 */
++    movq  0xf0(%rsp),  %rdi  /* restore RDI */
++    movq  0xf8(%rsp),  %rsi  /* restore RSI */
++    movq  0x100(%rsp), %rbx  /* restore RBX */
++    movq  0x108(%rsp), %rbp  /* restore RBP */
++
++    movq  0x110(%rsp), %rax  /* restore hidden address of transport_t */
++
++    leaq  0x118(%rsp), %rsp /* prepare stack */
++
++    /* restore return-address */
++    popq  %r10
++
++    /* transport_t returned in RAX */
++    /* return parent fcontext_t */
++    movq  %r9, 0x0(%rax)
++    /* return data */
++    movq  %r8, 0x8(%rax)
++
++    /* transport_t as 1.arg of context-function */
++    movq  %rax, %rcx
++
++    /* indirect jump to context */
++    jmp  *%r10
++.seh_endproc
++
++#ifdef __midipix__
++        .section .got$jump_fcontext,"r"
++        .global __imp_jump_fcontext
++__imp_jump_fcontext:
++        .quad   jump_fcontext
++        .linkonce discard
++#endif
+diff -Nru php-8.1.0.orig/Zend/asm/make_x86_64_ms_pe_gas.S php-8.1.0/Zend/asm/make_x86_64_ms_pe_gas.S
+--- php-8.1.0.orig/Zend/asm/make_x86_64_ms_pe_gas.S	1970-01-01 01:00:00.000000000 +0100
++++ php-8.1.0/Zend/asm/make_x86_64_ms_pe_gas.S	2021-11-28 11:44:29.385178672 +0100
+@@ -0,0 +1,178 @@
++/*
++            Copyright Oliver Kowalke 2009.
++            Copyright Thomas Sailer 2013.
++   Distributed under the Boost Software License, Version 1.0.
++      (See accompanying file LICENSE_1_0.txt or copy at
++            http://www.boost.org/LICENSE_1_0.txt)
++*/
++
++/*************************************************************************************
++* ---------------------------------------------------------------------------------- *
++* |     0   |     1   |     2    |     3   |     4   |     5   |     6   |     7   | *
++* ---------------------------------------------------------------------------------- *
++* |    0x0  |    0x4  |    0x8   |    0xc  |   0x10  |   0x14  |   0x18  |   0x1c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |     8   |    9    |    10    |    11   |    12   |    13   |    14   |    15   | *
++* ---------------------------------------------------------------------------------- *
++* |   0x20  |  0x24   |   0x28   |   0x2c  |   0x30  |   0x34  |   0x38  |   0x3c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    16   |    17   |    18   |    19    |    20   |    21   |    22   |    23   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xe40  |   0x44 |   0x48  |   0x4c   |   0x50  |   0x54  |   0x58  |   0x5c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    24   |   25    |    26    |   27    |    28   |    29   |    30   |    31   | *
++* ---------------------------------------------------------------------------------- *
++* |   0x60  |   0x64  |   0x68   |   0x6c  |   0x70  |   0x74  |   0x78  |   0x7c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    32   |   32    |    33    |   34    |    35   |    36   |    37   |    38   | *
++* ---------------------------------------------------------------------------------- *
++* |   0x80  |   0x84  |   0x88   |   0x8c  |   0x90  |   0x94  |   0x98  |   0x9c  | *
++* ---------------------------------------------------------------------------------- *
++* |                          SEE registers (XMM6-XMM15)                            | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    39   |   40    |    41    |   42    |    43   |    44   |    45   |    46   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xa0  |   0xa4  |   0xa8   |   0xac  |   0xb0  |   0xb4  |   0xb8  |   0xbc  | *
++* ---------------------------------------------------------------------------------- *
++* | fc_mxcsr|fc_x87_cw|     <alignment>    |       fbr_strg    |      fc_dealloc   | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    47   |   48    |    49    |   50    |    51   |    52   |    53   |    54   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xc0  |   0xc4  |   0xc8   |   0xcc  |   0xd0  |   0xd4  |   0xd8  |   0xdc  | *
++* ---------------------------------------------------------------------------------- *
++* |        limit      |         base       |         R12       |         R13       | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    55   |   56    |    57    |   58    |    59   |    60   |    61   |    62   | *
++* ---------------------------------------------------------------------------------- *
++* |   0xe0  |   0xe4  |   0xe8   |   0xec  |   0xf0  |   0xf4  |   0xf8  |   0xfc  | *
++* ---------------------------------------------------------------------------------- *
++* |        R14        |         R15        |         RDI       |        RSI        | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    63   |   64    |    65    |   66    |    67   |    68   |    69   |    70   | *
++* ---------------------------------------------------------------------------------- *
++* |  0x100  |  0x104  |  0x108   |  0x10c  |  0x110  |  0x114  |  0x118  |  0x11c  | *
++* ---------------------------------------------------------------------------------- *
++* |        RBX        |         RBP        |       hidden      |        RIP        | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    71   |   72    |    73    |   74    |    75   |    76   |    77   |    78   | *
++* ---------------------------------------------------------------------------------- *
++* |  0x120  |  0x124  |  0x128   |  0x12c  |  0x130  |  0x134  |  0x138  |  0x13c  | *
++* ---------------------------------------------------------------------------------- *
++* |                                   parameter area                               | *
++* ---------------------------------------------------------------------------------- *
++* ---------------------------------------------------------------------------------- *
++* |    79   |   80    |    81    |   82    |    83   |    84   |    85   |    86   | *
++* ---------------------------------------------------------------------------------- *
++* |  0x140  |  0x144  |  0x148   |  0x14c  |  0x150  |  0x154  |  0x158  |  0x15c  | *
++* ---------------------------------------------------------------------------------- *
++* |       FCTX        |        DATA        |                                       | *
++* ---------------------------------------------------------------------------------- *
++**************************************************************************************/
++
++.file	"make_x86_64_ms_pe_gas.asm"
++.text
++.p2align 4,,15
++.def	make_fcontext;	.scl	2;	.type	32;	.endef
++.seh_proc	make_fcontext
++make_fcontext:
++.seh_endprologue
++
++    /* first arg of make_fcontext() == top of context-stack */
++    movq  %rcx, %rax
++
++    /* shift address in RAX to lower 16 byte boundary */
++    /* == pointer to fcontext_t and address of context stack */
++    andq  $-16, %rax
++
++    /* reserve space for context-data on context-stack */
++    /* on context-function entry: (RSP -0x8) % 16 == 0 */
++    leaq  -0x150(%rax), %rax
++
++    /* third arg of make_fcontext() == address of context-function */
++    movq  %r8, 0x100(%rax)
++
++    /* first arg of make_fcontext() == top of context-stack */
++    /* save top address of context stack as 'base' */
++    movq  %rcx, 0xc8(%rax)
++    /* second arg of make_fcontext() == size of context-stack */
++    /* negate stack size for LEA instruction (== substraction) */
++    negq  %rdx
++    /* compute bottom address of context stack (limit) */
++    leaq  (%rcx,%rdx), %rcx
++    /* save bottom address of context stack as 'limit' */
++    movq  %rcx, 0xc0(%rax)
++    /* save address of context stack limit as 'dealloction stack' */
++    movq  %rcx, 0xb8(%rax)
++	/* set fiber-storage to zero */
++    xorq  %rcx, %rcx
++    movq  %rcx, 0xb0(%rax)
++
++	/* save MMX control- and status-word */
++    stmxcsr  0xa0(%rax)
++    /* save x87 control-word */
++    fnstcw   0xa4(%rax)
++
++    /* compute address of transport_t */
++    leaq  0x140(%rax), %rcx
++    /* store address of transport_t in hidden field */
++    movq %rcx, 0x110(%rax)
++
++    /* compute abs address of label trampoline */
++    leaq  trampoline(%rip), %rcx
++    /* save address of finish as return-address for context-function */
++    /* will be entered after jump_fcontext() first time */
++    movq  %rcx, 0x118(%rax)
++
++    /* compute abs address of label finish */
++    leaq  finish(%rip), %rcx
++    /* save address of finish as return-address for context-function */
++    /* will be entered after context-function returns */
++    movq  %rcx, 0x108(%rax)
++
++    ret /* return pointer to context-data */
++
++trampoline:
++    /* store return address on stack */
++    /* fix stack alignment */ 
++    pushq %rbp
++    /* jump to context-function */
++    jmp *%rbx
++
++finish:
++    /* 32byte shadow-space for _exit() */
++    andq  $-32, %rsp
++    /* 32byte shadow-space for _exit() are */
++    /* already reserved by make_fcontext() */
++    /* exit code is zero */
++    xorq  %rcx, %rcx
++    /* exit application */
++    call  _exit
++    hlt
++.seh_endproc
++
++.def	_exit;	.scl	2;	.type	32;	.endef  /* standard C library function */
++
++#ifdef __midipix__
++        .section .got$make_fcontext,"r"
++        .global __imp_make_fcontext
++__imp_make_fcontext:
++        .quad   make_fcontext
++        .linkonce discard
++#endif
diff --git a/patches/php-8.3.4_pre.local.patch b/patches/php-8.3.4_pre.local.patch
new file mode 100644
index 00000000..3d2fba04
--- /dev/null
+++ b/patches/php-8.3.4_pre.local.patch
@@ -0,0 +1,1146 @@
+diff -ru php-8.3.4.orig/build/Makefile.global php-8.3.4/build/Makefile.global
+--- php-8.3.4.orig/build/Makefile.global	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/build/Makefile.global	2024-04-05 18:32:27.722533671 +0200
+@@ -11,9 +11,9 @@
+ 	@echo "Don't forget to run 'make test'."
+ 	@echo
+ 
+-build-modules: $(PHP_MODULES) $(PHP_ZEND_EX)
++build-modules: $(PHP_MODULES) $(PHP_ZEND_EX) libphp.la
+ 
+-build-binaries: $(PHP_BINARIES)
++build-binaries: $(PHP_BINARIES) libphp.la
+ 
+ libphp.la: $(PHP_GLOBAL_OBJS) $(PHP_SAPI_OBJS)
+ 	$(LIBTOOL) --tag=CC --mode=link $(CC) $(LIBPHP_CFLAGS) $(CFLAGS) $(EXTRA_CFLAGS) -rpath $(phptempdir) $(EXTRA_LDFLAGS) $(LDFLAGS) $(PHP_RPATHS) $(PHP_GLOBAL_OBJS) $(PHP_SAPI_OBJS) $(EXTRA_LIBS) $(ZEND_EXTRA_LIBS) -o $@
+@@ -26,7 +26,7 @@
+ 
+ install-sapi: $(OVERALL_TARGET)
+ 	@echo "Installing PHP SAPI module:       $(PHP_SAPI)"
+-	-@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
++	-@$(mkinstalldirs) $(DESTDIR)$(bindir)
+ 	-@if test ! -r $(phptempdir)/libphp.$(SHLIB_DL_SUFFIX_NAME); then \
+ 		for i in 0.0.0 0.0 0; do \
+ 			if test -r $(phptempdir)/libphp.$(SHLIB_DL_SUFFIX_NAME).$$i; then \
+@@ -41,19 +41,19 @@
+ 
+ install-modules: build-modules
+ 	@test -d modules && \
+-	$(mkinstalldirs) $(INSTALL_ROOT)$(EXTENSION_DIR)
+-	@echo "Installing shared extensions:     $(INSTALL_ROOT)$(EXTENSION_DIR)/"
++	$(mkinstalldirs) $(DESTDIR)$(EXTENSION_DIR)
++	@echo "Installing shared extensions:     $(DESTDIR)$(EXTENSION_DIR)/"
+ 	@rm -f modules/*.la >/dev/null 2>&1
+-	@$(INSTALL) modules/* $(INSTALL_ROOT)$(EXTENSION_DIR)
++	@$(INSTALL) modules/* $(DESTDIR)$(EXTENSION_DIR)
+ 
+ install-headers:
+ 	-@if test "$(INSTALL_HEADERS)"; then \
+ 		for i in `echo $(INSTALL_HEADERS)`; do \
+ 			i=`$(top_srcdir)/build/shtool path -d $$i`; \
+-			paths="$$paths $(INSTALL_ROOT)$(phpincludedir)/$$i"; \
++			paths="$$paths $(DESTDIR)$(phpincludedir)/$$i"; \
+ 		done; \
+ 		$(mkinstalldirs) $$paths && \
+-		echo "Installing header files:          $(INSTALL_ROOT)$(phpincludedir)/" && \
++		echo "Installing header files:          $(DESTDIR)$(phpincludedir)/" && \
+ 		for i in `echo $(INSTALL_HEADERS)`; do \
+ 			if test "$(PHP_PECL_EXTENSION)"; then \
+ 				src=`echo $$i | $(SED) -e "s#ext/$(PHP_PECL_EXTENSION)/##g"`; \
+@@ -61,12 +61,12 @@
+ 				src=$$i; \
+ 			fi; \
+ 			if test -f "$(top_srcdir)/$$src"; then \
+-				$(INSTALL_DATA) $(top_srcdir)/$$src $(INSTALL_ROOT)$(phpincludedir)/$$i; \
++				$(INSTALL_DATA) $(top_srcdir)/$$src $(DESTDIR)$(phpincludedir)/$$i; \
+ 			elif test -f "$(top_builddir)/$$src"; then \
+-				$(INSTALL_DATA) $(top_builddir)/$$src $(INSTALL_ROOT)$(phpincludedir)/$$i; \
++				$(INSTALL_DATA) $(top_builddir)/$$src $(DESTDIR)$(phpincludedir)/$$i; \
+ 			else \
+-				(cd $(top_srcdir)/$$src && $(INSTALL_DATA) *.h $(INSTALL_ROOT)$(phpincludedir)/$$i; \
+-				cd $(top_builddir)/$$src && $(INSTALL_DATA) *.h $(INSTALL_ROOT)$(phpincludedir)/$$i) 2>/dev/null || true; \
++				(cd $(top_srcdir)/$$src && $(INSTALL_DATA) *.h $(DESTDIR)$(phpincludedir)/$$i; \
++				cd $(top_builddir)/$$src && $(INSTALL_DATA) *.h $(DESTDIR)$(phpincludedir)/$$i) 2>/dev/null || true; \
+ 			fi \
+ 		done; \
+ 	fi
+diff -ru php-8.3.4.orig/configure php-8.3.4/configure
+--- php-8.3.4.orig/configure	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/configure	2024-04-05 18:54:20.076691855 +0200
+@@ -6487,13 +6487,13 @@
+     as_fn_error $? "Please note that Apache version >= 2.0.44 is required" "$LINENO" 5
+   fi
+ 
+-  APXS_LIBEXECDIR='$(INSTALL_ROOT)'`$APXS -q LIBEXECDIR`
++  APXS_LIBEXECDIR='$(DESTDIR)'`$APXS -q LIBEXECDIR`
+   if test -z `$APXS -q SYSCONFDIR`; then
+     INSTALL_IT="\$(mkinstalldirs) '$APXS_LIBEXECDIR' && \
+                  $APXS -S LIBEXECDIR='$APXS_LIBEXECDIR' \
+                        -i -n php"
+   else
+-    APXS_SYSCONFDIR='$(INSTALL_ROOT)'`$APXS -q SYSCONFDIR`
++    APXS_SYSCONFDIR='$(DESTDIR)'`$APXS -q SYSCONFDIR`
+     INSTALL_IT="\$(mkinstalldirs) '$APXS_LIBEXECDIR' && \
+                 \$(mkinstalldirs) '$APXS_SYSCONFDIR' && \
+                  $APXS -S LIBEXECDIR='$APXS_LIBEXECDIR' \
+@@ -6622,7 +6622,7 @@
+   php_sapi_module=static
+ ;;
+     esac
+-    install_sapi="install-sapi"
++    install_sapi=""
+ 
+ 
+   case sapi/apache2handler in
+@@ -7253,6 +7253,9 @@
+   *darwin*)
+     BUILD_CLI="\$(CC) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(NATIVE_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_CLI_OBJS:.lo=.o) \$(PHP_FRAMEWORKS) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CLI_PATH)"
+     ;;
++  *midipix*)
++    BUILD_CLI="\$(LIBTOOL) --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_CLI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CLI_PATH) \$(top_builddir)/libs/libphp.so"
++    ;;
+   *)
+     BUILD_CLI="\$(LIBTOOL) --tag=CC --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_CLI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CLI_PATH)"
+     ;;
+@@ -7328,12 +7331,12 @@
+     yes|shared)
+       LIBPHP_CFLAGS="-shared"
+       PHP_EMBED_TYPE=shared
+-      INSTALL_IT="\$(mkinstalldirs) \$(INSTALL_ROOT)\$(prefix)/lib; \$(INSTALL) -m 0755 $SAPI_SHARED \$(INSTALL_ROOT)\$(prefix)/lib"
++      INSTALL_IT="\$(mkinstalldirs) \$(DESTDIR)\$(prefix)/lib; \$(INSTALL) -m 0755 $SAPI_SHARED \$(DESTDIR)\$(prefix)/lib"
+       ;;
+     static)
+       LIBPHP_CFLAGS="-static"
+       PHP_EMBED_TYPE=static
+-      INSTALL_IT="\$(mkinstalldirs) \$(INSTALL_ROOT)\$(prefix)/lib; \$(INSTALL) -m 0644 $SAPI_STATIC \$(INSTALL_ROOT)\$(prefix)/lib"
++      INSTALL_IT="\$(mkinstalldirs) \$(DESTDIR)\$(prefix)/lib; \$(INSTALL) -m 0644 $SAPI_STATIC \$(DESTDIR)\$(prefix)/lib"
+       ;;
+     *)
+       PHP_EMBED_TYPE=no
+@@ -7456,7 +7459,7 @@
+   php_sapi_module=static
+ ;;
+     esac
+-    install_sapi="install-sapi"
++    install_sapi=""
+ 
+ 
+   case sapi/embed in
+@@ -11213,14 +11216,12 @@
+ 
+   BUILD_PHPDBG="\$(LIBTOOL) --tag=CC --mode=link \
+         \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \
+-                \$(PHP_GLOBAL_OBJS:.lo=.o) \
+-                \$(PHP_BINARY_OBJS:.lo=.o) \
+                 \$(PHP_PHPDBG_OBJS:.lo=.o) \
+                 \$(EXTRA_LIBS) \
+                 \$(PHPDBG_EXTRA_LIBS) \
+                 \$(ZEND_EXTRA_LIBS) \
+                 \$(PHP_FRAMEWORKS) \
+-         -o \$(BUILD_BINARY)"
++         -o \$(BUILD_BINARY) \$(top_builddir)/libs/libphp.so"
+ 
+   BUILD_PHPDBG_SHARED="\$(LIBTOOL) --tag=CC --mode=link \
+         \$(CC) -shared -Wl,-soname,libphpdbg.so -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \
+@@ -11444,6 +11445,9 @@
+       *darwin*)
+         BUILD_CGI="\$(CC) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(NATIVE_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_FASTCGI_OBJS:.lo=.o) \$(PHP_CGI_OBJS:.lo=.o) \$(PHP_FRAMEWORKS) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CGI_PATH)"
+       ;;
++      *midipix*)
++        BUILD_CGI="\$(LIBTOOL) --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_FASTCGI_OBJS:.lo=.o) \$(PHP_CGI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CGI_PATH) \$(top_builddir)/libs/libphp.so"
++      ;;
+       *)
+         BUILD_CGI="\$(LIBTOOL) --tag=CC --mode=link \$(CC) -export-dynamic \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(EXTRA_LDFLAGS_PROGRAM) \$(LDFLAGS) \$(PHP_RPATHS) \$(PHP_GLOBAL_OBJS:.lo=.o) \$(PHP_BINARY_OBJS:.lo=.o) \$(PHP_FASTCGI_OBJS:.lo=.o) \$(PHP_CGI_OBJS:.lo=.o) \$(EXTRA_LIBS) \$(ZEND_EXTRA_LIBS) -o \$(SAPI_CGI_PATH)"
+       ;;
+@@ -11728,10 +11732,6 @@
+   fi
+ 
+ 
+-if test -d /usr/pkg/include -a -d /usr/pkg/lib ; then
+-   CPPFLAGS="$CPPFLAGS -I/usr/pkg/include"
+-   LDFLAGS="$LDFLAGS -L/usr/pkg/lib"
+-fi
+ test -d /usr/ucblib &&
+   if test "/usr/ucblib" != "/usr/$PHP_LIBDIR" && test "/usr/ucblib" != "/usr/lib"; then
+ 
+@@ -19311,7 +19311,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/date.$suffix \$(phplibdir)
+ 
+ $ext_builddir/date.$suffix: \$(shared_objects_date) \$(DATE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_date) \$(DATE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_date) \$(DATE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -19973,7 +19973,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/libxml.$suffix \$(phplibdir)
+ 
+ $ext_builddir/libxml.$suffix: \$(shared_objects_libxml) \$(LIBXML_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_libxml) \$(LIBXML_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_libxml) \$(LIBXML_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -20349,7 +20349,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/openssl.$suffix \$(phplibdir)
+ 
+ $ext_builddir/openssl.$suffix: \$(shared_objects_openssl) \$(OPENSSL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_openssl) \$(OPENSSL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_openssl) \$(OPENSSL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -21431,7 +21431,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pcre.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pcre.$suffix: \$(shared_objects_pcre) \$(PCRE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcre) \$(PCRE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcre) \$(PCRE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -21775,7 +21775,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pcre.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pcre.$suffix: \$(shared_objects_pcre) \$(PCRE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcre) \$(PCRE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcre) \$(PCRE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -22833,7 +22833,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/sqlite3.$suffix \$(phplibdir)
+ 
+ $ext_builddir/sqlite3.$suffix: \$(shared_objects_sqlite3) \$(SQLITE3_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sqlite3) \$(SQLITE3_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sqlite3) \$(SQLITE3_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -23380,7 +23380,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/zlib.$suffix \$(phplibdir)
+ 
+ $ext_builddir/zlib.$suffix: \$(shared_objects_zlib) \$(ZLIB_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zlib) \$(ZLIB_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zlib) \$(ZLIB_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -23698,7 +23698,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/bcmath.$suffix \$(phplibdir)
+ 
+ $ext_builddir/bcmath.$suffix: \$(shared_objects_bcmath) \$(BCMATH_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bcmath) \$(BCMATH_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bcmath) \$(BCMATH_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -24336,7 +24336,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/bz2.$suffix \$(phplibdir)
+ 
+ $ext_builddir/bz2.$suffix: \$(shared_objects_bz2) \$(BZ2_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bz2) \$(BZ2_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_bz2) \$(BZ2_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -24649,7 +24649,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/calendar.$suffix \$(phplibdir)
+ 
+ $ext_builddir/calendar.$suffix: \$(shared_objects_calendar) \$(CALENDAR_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_calendar) \$(CALENDAR_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_calendar) \$(CALENDAR_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -24959,7 +24959,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/ctype.$suffix \$(phplibdir)
+ 
+ $ext_builddir/ctype.$suffix: \$(shared_objects_ctype) \$(CTYPE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ctype) \$(CTYPE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ctype) \$(CTYPE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -26012,7 +26012,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/curl.$suffix \$(phplibdir)
+ 
+ $ext_builddir/curl.$suffix: \$(shared_objects_curl) \$(CURL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_curl) \$(CURL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_curl) \$(CURL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -30370,7 +30370,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/dba.$suffix \$(phplibdir)
+ 
+ $ext_builddir/dba.$suffix: \$(shared_objects_dba) \$(DBA_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dba) \$(DBA_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dba) \$(DBA_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -30698,7 +30698,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/dl_test.$suffix \$(phplibdir)
+ 
+ $ext_builddir/dl_test.$suffix: \$(shared_objects_dl_test) \$(DL_TEST_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dl_test) \$(DL_TEST_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dl_test) \$(DL_TEST_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -31269,7 +31269,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/dom.$suffix \$(phplibdir)
+ 
+ $ext_builddir/dom.$suffix: \$(shared_objects_dom) \$(DOM_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dom) \$(DOM_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_dom) \$(DOM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -32421,7 +32421,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/enchant.$suffix \$(phplibdir)
+ 
+ $ext_builddir/enchant.$suffix: \$(shared_objects_enchant) \$(ENCHANT_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_enchant) \$(ENCHANT_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_enchant) \$(ENCHANT_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -32734,7 +32734,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/exif.$suffix \$(phplibdir)
+ 
+ $ext_builddir/exif.$suffix: \$(shared_objects_exif) \$(EXIF_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_exif) \$(EXIF_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_exif) \$(EXIF_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -33534,7 +33534,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/ffi.$suffix \$(phplibdir)
+ 
+ $ext_builddir/ffi.$suffix: \$(shared_objects_ffi) \$(FFI_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ffi) \$(FFI_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ffi) \$(FFI_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -33907,7 +33907,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/fileinfo.$suffix \$(phplibdir)
+ 
+ $ext_builddir/fileinfo.$suffix: \$(shared_objects_fileinfo) \$(FILEINFO_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_fileinfo) \$(FILEINFO_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_fileinfo) \$(FILEINFO_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lpcre2-8
+ 
+ EOF
+ 
+@@ -34239,7 +34239,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/filter.$suffix \$(phplibdir)
+ 
+ $ext_builddir/filter.$suffix: \$(shared_objects_filter) \$(FILTER_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_filter) \$(FILTER_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_filter) \$(FILTER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lpcre2-8
+ 
+ EOF
+ 
+@@ -34614,7 +34614,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/ftp.$suffix \$(phplibdir)
+ 
+ $ext_builddir/ftp.$suffix: \$(shared_objects_ftp) \$(FTP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ftp) \$(FTP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ftp) \$(FTP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -37083,7 +37083,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/gd.$suffix \$(phplibdir)
+ 
+ $ext_builddir/gd.$suffix: \$(shared_objects_gd) \$(GD_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gd) \$(GD_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gd) \$(GD_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -38539,7 +38539,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/gd.$suffix \$(phplibdir)
+ 
+ $ext_builddir/gd.$suffix: \$(shared_objects_gd) \$(GD_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gd) \$(GD_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gd) \$(GD_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -39149,7 +39149,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/gettext.$suffix \$(phplibdir)
+ 
+ $ext_builddir/gettext.$suffix: \$(shared_objects_gettext) \$(GETTEXT_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gettext) \$(GETTEXT_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gettext) \$(GETTEXT_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -40268,7 +40268,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/gmp.$suffix \$(phplibdir)
+ 
+ $ext_builddir/gmp.$suffix: \$(shared_objects_gmp) \$(GMP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gmp) \$(GMP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_gmp) \$(GMP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -40672,7 +40672,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/hash.$suffix \$(phplibdir)
+ 
+ $ext_builddir/hash.$suffix: \$(shared_objects_hash) \$(HASH_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_hash) \$(HASH_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_hash) \$(HASH_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -41805,7 +41805,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/iconv.$suffix \$(phplibdir)
+ 
+ $ext_builddir/iconv.$suffix: \$(shared_objects_iconv) \$(ICONV_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_iconv) \$(ICONV_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_iconv) \$(ICONV_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -liconv
+ 
+ EOF
+ 
+@@ -42198,7 +42198,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/imap.$suffix \$(phplibdir)
+ 
+ $ext_builddir/imap.$suffix: \$(shared_objects_imap) \$(IMAP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_imap) \$(IMAP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_imap) \$(IMAP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -45653,7 +45653,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/json.$suffix \$(phplibdir)
+ 
+ $ext_builddir/json.$suffix: \$(shared_objects_json) \$(JSON_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_json) \$(JSON_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_json) \$(JSON_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -46019,7 +46019,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/ldap.$suffix \$(phplibdir)
+ 
+ $ext_builddir/ldap.$suffix: \$(shared_objects_ldap) \$(LDAP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ldap) \$(LDAP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_ldap) \$(LDAP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -47933,7 +47933,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/mbstring.$suffix \$(phplibdir)
+ 
+ $ext_builddir/mbstring.$suffix: \$(shared_objects_mbstring) \$(MBSTRING_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mbstring) \$(MBSTRING_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mbstring) \$(MBSTRING_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lpcre2-8
+ 
+ EOF
+ 
+@@ -48436,7 +48436,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/mysqli.$suffix \$(phplibdir)
+ 
+ $ext_builddir/mysqli.$suffix: \$(shared_objects_mysqli) \$(MYSQLI_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mysqli) \$(MYSQLI_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mysqli) \$(MYSQLI_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -49531,7 +49531,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/oci8.$suffix \$(phplibdir)
+ 
+ $ext_builddir/oci8.$suffix: \$(shared_objects_oci8) \$(OCI8_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_oci8) \$(OCI8_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_oci8) \$(OCI8_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -50147,7 +50147,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/oci8.$suffix \$(phplibdir)
+ 
+ $ext_builddir/oci8.$suffix: \$(shared_objects_oci8) \$(OCI8_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_oci8) \$(OCI8_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_oci8) \$(OCI8_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -52121,7 +52121,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/odbc.$suffix \$(phplibdir)
+ 
+ $ext_builddir/odbc.$suffix: \$(shared_objects_odbc) \$(ODBC_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_odbc) \$(ODBC_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_odbc) \$(ODBC_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -52677,7 +52677,7 @@
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysvipc shared memory support" >&5
+ $as_echo_n "checking for sysvipc shared memory support... " >&6; }
+   if test "$cross_compiling" = yes; then :
+-  have_shm_ipc=no
++  have_shm_ipc=yes
+ else
+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+@@ -53544,7 +53544,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/opcache.$suffix \$(phplibdir)
+ 
+ $ext_builddir/opcache.$suffix: \$(shared_objects_opcache) \$(OPCACHE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_opcache) \$(OPCACHE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_opcache) \$(OPCACHE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lpcre2-8
+ 
+ EOF
+ 
+@@ -54004,7 +54004,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pcntl.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pcntl.$suffix: \$(shared_objects_pcntl) \$(PCNTL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcntl) \$(PCNTL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pcntl) \$(PCNTL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -54314,7 +54314,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo.$suffix: \$(shared_objects_pdo) \$(PDO_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo) \$(PDO_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo) \$(PDO_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -55031,7 +55031,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_dblib.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_dblib.$suffix: \$(shared_objects_pdo_dblib) \$(PDO_DBLIB_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_dblib) \$(PDO_DBLIB_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_dblib) \$(PDO_DBLIB_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -56351,7 +56351,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_firebird.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_firebird.$suffix: \$(shared_objects_pdo_firebird) \$(PDO_FIREBIRD_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_firebird) \$(PDO_FIREBIRD_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_firebird) \$(PDO_FIREBIRD_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -57070,7 +57070,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_mysql.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_mysql.$suffix: \$(shared_objects_pdo_mysql) \$(PDO_MYSQL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_mysql) \$(PDO_MYSQL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_mysql) \$(PDO_MYSQL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -58854,7 +58854,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_oci.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_oci.$suffix: \$(shared_objects_pdo_oci) \$(PDO_OCI_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_oci) \$(PDO_OCI_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_oci) \$(PDO_OCI_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -60019,7 +60019,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_odbc.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_odbc.$suffix: \$(shared_objects_pdo_odbc) \$(PDO_ODBC_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_odbc) \$(PDO_ODBC_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_odbc) \$(PDO_ODBC_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -60634,7 +60634,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_pgsql.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_pgsql.$suffix: \$(shared_objects_pdo_pgsql) \$(PDO_PGSQL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_pgsql) \$(PDO_PGSQL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_pgsql) \$(PDO_PGSQL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -61551,7 +61551,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pdo_sqlite.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pdo_sqlite.$suffix: \$(shared_objects_pdo_sqlite) \$(PDO_SQLITE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_sqlite) \$(PDO_SQLITE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pdo_sqlite) \$(PDO_SQLITE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -62258,7 +62258,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pgsql.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pgsql.$suffix: \$(shared_objects_pgsql) \$(PGSQL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pgsql) \$(PGSQL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pgsql) \$(PGSQL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -62565,7 +62565,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/phar.$suffix \$(phplibdir)
+ 
+ $ext_builddir/phar.$suffix: \$(shared_objects_phar) \$(PHAR_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_phar) \$(PHAR_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_phar) \$(PHAR_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -62961,7 +62961,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/posix.$suffix \$(phplibdir)
+ 
+ $ext_builddir/posix.$suffix: \$(shared_objects_posix) \$(POSIX_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_posix) \$(POSIX_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_posix) \$(POSIX_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -63395,7 +63395,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/pspell.$suffix \$(phplibdir)
+ 
+ $ext_builddir/pspell.$suffix: \$(shared_objects_pspell) \$(PSPELL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pspell) \$(PSPELL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_pspell) \$(PSPELL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -64118,7 +64118,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/random.$suffix \$(phplibdir)
+ 
+ $ext_builddir/random.$suffix: \$(shared_objects_random) \$(RANDOM_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_random) \$(RANDOM_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_random) \$(RANDOM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -66792,7 +66792,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/readline.$suffix \$(phplibdir)
+ 
+ $ext_builddir/readline.$suffix: \$(shared_objects_readline) \$(READLINE_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_readline) \$(READLINE_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_readline) \$(READLINE_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -67057,7 +67057,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/reflection.$suffix \$(phplibdir)
+ 
+ $ext_builddir/reflection.$suffix: \$(shared_objects_reflection) \$(REFLECTION_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_reflection) \$(REFLECTION_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_reflection) \$(REFLECTION_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -67613,7 +67613,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/session.$suffix \$(phplibdir)
+ 
+ $ext_builddir/session.$suffix: \$(shared_objects_session) \$(SESSION_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_session) \$(SESSION_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_session) \$(SESSION_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -68151,7 +68151,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/shmop.$suffix \$(phplibdir)
+ 
+ $ext_builddir/shmop.$suffix: \$(shared_objects_shmop) \$(SHMOP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_shmop) \$(SHMOP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_shmop) \$(SHMOP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -68704,7 +68704,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/simplexml.$suffix \$(phplibdir)
+ 
+ $ext_builddir/simplexml.$suffix: \$(shared_objects_simplexml) \$(SIMPLEXML_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_simplexml) \$(SIMPLEXML_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_simplexml) \$(SIMPLEXML_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -69935,7 +69935,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/snmp.$suffix \$(phplibdir)
+ 
+ $ext_builddir/snmp.$suffix: \$(shared_objects_snmp) \$(SNMP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_snmp) \$(SNMP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_snmp) \$(SNMP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -70491,7 +70491,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/soap.$suffix \$(phplibdir)
+ 
+ $ext_builddir/soap.$suffix: \$(shared_objects_soap) \$(SOAP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_soap) \$(SOAP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_soap) \$(SOAP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -71069,7 +71069,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/sockets.$suffix \$(phplibdir)
+ 
+ $ext_builddir/sockets.$suffix: \$(shared_objects_sockets) \$(SOCKETS_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sockets) \$(SOCKETS_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sockets) \$(SOCKETS_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -71669,7 +71669,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/sodium.$suffix \$(phplibdir)
+ 
+ $ext_builddir/sodium.$suffix: \$(shared_objects_sodium) \$(SODIUM_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sodium) \$(SODIUM_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sodium) \$(SODIUM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -71934,7 +71934,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/spl.$suffix \$(phplibdir)
+ 
+ $ext_builddir/spl.$suffix: \$(shared_objects_spl) \$(SPL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_spl) \$(SPL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_spl) \$(SPL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -76512,7 +76512,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/standard.$suffix \$(phplibdir)
+ 
+ $ext_builddir/standard.$suffix: \$(shared_objects_standard) \$(STANDARD_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_standard) \$(STANDARD_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_standard) \$(STANDARD_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -76884,7 +76884,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/sysvmsg.$suffix \$(phplibdir)
+ 
+ $ext_builddir/sysvmsg.$suffix: \$(shared_objects_sysvmsg) \$(SYSVMSG_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvmsg) \$(SYSVMSG_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvmsg) \$(SYSVMSG_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -77191,7 +77191,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/sysvsem.$suffix \$(phplibdir)
+ 
+ $ext_builddir/sysvsem.$suffix: \$(shared_objects_sysvsem) \$(SYSVSEM_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvsem) \$(SYSVSEM_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvsem) \$(SYSVSEM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -77547,7 +77547,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/sysvshm.$suffix \$(phplibdir)
+ 
+ $ext_builddir/sysvshm.$suffix: \$(shared_objects_sysvshm) \$(SYSVSHM_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvshm) \$(SYSVSHM_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_sysvshm) \$(SYSVSHM_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -78518,7 +78518,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/tidy.$suffix \$(phplibdir)
+ 
+ $ext_builddir/tidy.$suffix: \$(shared_objects_tidy) \$(TIDY_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_tidy) \$(TIDY_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_tidy) \$(TIDY_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -78831,7 +78831,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/tokenizer.$suffix \$(phplibdir)
+ 
+ $ext_builddir/tokenizer.$suffix: \$(shared_objects_tokenizer) \$(TOKENIZER_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_tokenizer) \$(TOKENIZER_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_tokenizer) \$(TOKENIZER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -79675,7 +79675,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/xml.$suffix \$(phplibdir)
+ 
+ $ext_builddir/xml.$suffix: \$(shared_objects_xml) \$(XML_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xml) \$(XML_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xml) \$(XML_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -80252,7 +80252,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/xmlreader.$suffix \$(phplibdir)
+ 
+ $ext_builddir/xmlreader.$suffix: \$(shared_objects_xmlreader) \$(XMLREADER_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlreader) \$(XMLREADER_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlreader) \$(XMLREADER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \$(top_builddir)/ext/dom/dom.la
+ 
+ EOF
+ 
+@@ -80829,7 +80829,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/xmlwriter.$suffix \$(phplibdir)
+ 
+ $ext_builddir/xmlwriter.$suffix: \$(shared_objects_xmlwriter) \$(XMLWRITER_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlwriter) \$(XMLWRITER_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xmlwriter) \$(XMLWRITER_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so
+ 
+ EOF
+ 
+@@ -81601,7 +81601,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/xsl.$suffix \$(phplibdir)
+ 
+ $ext_builddir/xsl.$suffix: \$(shared_objects_xsl) \$(XSL_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xsl) \$(XSL_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_xsl) \$(XSL_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so \$(top_builddir)/ext/dom/dom.la
+ 
+ EOF
+ 
+@@ -81930,7 +81930,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/zend_test.$suffix \$(phplibdir)
+ 
+ $ext_builddir/zend_test.$suffix: \$(shared_objects_zend_test) \$(ZEND_TEST_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zend_test) \$(ZEND_TEST_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zend_test) \$(ZEND_TEST_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lxml2
+ 
+ EOF
+ 
+@@ -83463,7 +83463,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/zip.$suffix \$(phplibdir)
+ 
+ $ext_builddir/zip.$suffix: \$(shared_objects_zip) \$(ZIP_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zip) \$(ZIP_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_zip) \$(ZIP_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lpcre2-8
+ 
+ EOF
+ 
+@@ -84292,7 +84292,7 @@
+ 	\$(LIBTOOL) --tag=CC --mode=install cp $ext_builddir/mysqlnd.$suffix \$(phplibdir)
+ 
+ $ext_builddir/mysqlnd.$suffix: \$(shared_objects_mysqlnd) \$(MYSQLND_SHARED_DEPENDENCIES)
+-	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mysqlnd) \$(MYSQLND_SHARED_LIBADD)
++	\$(LIBTOOL) --tag=CC --mode=link \$(CC) -shared \$(COMMON_FLAGS) \$(CFLAGS_CLEAN) \$(EXTRA_CFLAGS) \$(LDFLAGS) $additional_flags -o \$@ -export-dynamic -avoid-version -prefer-pic -module -rpath \$(phplibdir) \$(EXTRA_LDFLAGS) \$(shared_objects_mysqlnd) \$(MYSQLND_SHARED_LIBADD) \$(top_builddir)/libs/libphp.so -lz -lcrypto
+ 
+ EOF
+ 
+@@ -84523,7 +84523,7 @@
+ enable_static=yes
+ 
+ case $php_sapi_module in
+-  shared)
++  *)
+     if test "$PHP_CGI" = "no" && test "$PHP_CLI" = "no" && test "$PHP_FPM" = "no" && test "$PHP_LITESPEED" = "no" && test "$PHP_PHPDBG" = "no"; then
+       enable_static=no
+     fi
+@@ -84537,12 +84537,6 @@
+     esac
+     EXTRA_LDFLAGS="$EXTRA_LDFLAGS -avoid-version -module"
+     ;;
+-  *)
+-    standard_libtool_flag='-prefer-non-pic -static'
+-    if test -z "$PHP_MODULES" && test -z "$PHP_ZEND_EX"; then
+-      enable_shared=no
+-    fi
+-    ;;
+ esac
+ 
+ EXTRA_LIBS="$EXTRA_LIBS $DLIBS $LIBS"
+@@ -84707,6 +84701,8 @@
+     fiber_os="mac" ;; #(
+   aix*|os400*) :
+     fiber_os="aix" ;; #(
++  midipix) :
++    fiber_os="midipix" ;; #(
+   freebsd*) :
+     fiber_os="freebsd" ;; #(
+   *) :
+@@ -84742,6 +84738,8 @@
+ 
+ if test "$fiber_os" = 'mac'; then
+   fiber_asm_file="combined_sysv_macho_gas"
++elif test "$fiber_os" = 'midipix'; then
++  fiber_asm_file="x86_64_ms_pe_gas"
+ elif test "$fiber_os" = 'aix'; then
+   # AIX uses a different calling convention (shared with non-_CALL_ELF Linux).
+   # The AIX assembler isn't GNU, but the file is compatible.
+@@ -89077,7 +89075,7 @@
+       lt_prog_compiler_static='-Bstatic'
+       ;;
+ 
+-    linux* | k*bsd*-gnu)
++    linux* | k*bsd*-gnu | midipix*)
+       case $cc_basename in
+       # old Intel for x86_64 which still supported -KPIC.
+       ecc*)
+@@ -90794,6 +90792,17 @@
+   dynamic_linker='GNU/Linux ld.so'
+   ;;
+ 
++midipix*)
++  version_type=linux # correct to gnu/linux during the next big refactor
++  need_lib_prefix=no
++  need_version=no
++  library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext'
++  soname_spec='$libname$release$shared_ext$major'
++  finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
++  shlibpath_var=LD_LIBRARY_PATH
++  dynamic_linker='GNU/Linux ld.so'
++  ;;
++
+ netbsd*)
+   version_type=sunos
+   need_lib_prefix=no
+@@ -92854,7 +92863,7 @@
+     hardcode_libdir_flag_spec_CXX='${wl}-rpath ${wl}$libdir'
+     hardcode_libdir_separator_CXX=:
+     ;;
+-  linux* | k*bsd*-gnu)
++  linux* | k*bsd*-gnu | midipix*)
+     case $cc_basename in
+       KCC*)
+ 	# Kuck and Associates, Inc. (KAI) C++ Compiler
+@@ -95134,9 +95143,6 @@
+ # This can be used to rebuild libtool when needed
+ LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh"
+ 
+-# Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
+-
+ # Prevent multiple expansion
+ 
+ 
+diff -ru php-8.3.4.orig/ext/pdo/Makefile.frag php-8.3.4/ext/pdo/Makefile.frag
+--- php-8.3.4.orig/ext/pdo/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/ext/pdo/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -15,17 +15,17 @@
+ 	fi)
+ 
+ install-pdo-headers:
+-	@echo "Installing PDO headers:           $(INSTALL_ROOT)$(phpincludedir)/ext/pdo/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(phpincludedir)/ext/pdo
++	@echo "Installing PDO headers:           $(DESTDIR)$(phpincludedir)/ext/pdo/"
++	@$(mkinstalldirs) $(DESTDIR)$(phpincludedir)/ext/pdo
+ 	@for f in $(PDO_HEADER_FILES); do \
+ 		if test -f "$(top_srcdir)/$$f"; then \
+-			$(INSTALL_DATA) $(top_srcdir)/$$f $(INSTALL_ROOT)$(phpincludedir)/ext/pdo; \
++			$(INSTALL_DATA) $(top_srcdir)/$$f $(DESTDIR)$(phpincludedir)/ext/pdo; \
+ 		elif test -f "$(top_builddir)/$$f"; then \
+-			$(INSTALL_DATA) $(top_builddir)/$$f $(INSTALL_ROOT)$(phpincludedir)/ext/pdo; \
++			$(INSTALL_DATA) $(top_builddir)/$$f $(DESTDIR)$(phpincludedir)/ext/pdo; \
+ 		elif test -f "$(top_srcdir)/ext/pdo/$$f"; then \
+-			$(INSTALL_DATA) $(top_srcdir)/ext/pdo/$$f $(INSTALL_ROOT)$(phpincludedir)/ext/pdo; \
++			$(INSTALL_DATA) $(top_srcdir)/ext/pdo/$$f $(DESTDIR)$(phpincludedir)/ext/pdo; \
+ 		elif test -f "$(top_builddir)/ext/pdo/$$f"; then \
+-			$(INSTALL_DATA) $(top_builddir)/ext/pdo/$$f $(INSTALL_ROOT)$(phpincludedir)/ext/pdo; \
++			$(INSTALL_DATA) $(top_builddir)/ext/pdo/$$f $(DESTDIR)$(phpincludedir)/ext/pdo; \
+ 		else \
+ 			echo "hmmm"; \
+ 		fi \
+diff -ru php-8.3.4.orig/ext/phar/Makefile.frag php-8.3.4/ext/phar/Makefile.frag
+--- php-8.3.4.orig/ext/phar/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/ext/phar/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -23,7 +23,7 @@
+ 	else \
+ 		$(top_srcdir)/build/shtool echo -n -- "$(PHP_EXECUTABLE)"; \
+ 	fi;`
+-PHP_PHARCMD_BANG = `$(top_srcdir)/build/shtool echo -n -- "$(INSTALL_ROOT)$(bindir)/$(program_prefix)php$(program_suffix)$(EXEEXT)";`
++PHP_PHARCMD_BANG = `$(top_srcdir)/build/shtool echo -n -- "$(DESTDIR)$(bindir)/$(program_prefix)php$(program_suffix)$(EXEEXT)";`
+ 
+ $(builddir)/phar/phar.inc: $(srcdir)/phar/phar.inc
+ 	-@test -d $(builddir)/phar || mkdir $(builddir)/phar
+diff -ru php-8.3.4.orig/pear/Makefile.frag php-8.3.4/pear/Makefile.frag
+--- php-8.3.4.orig/pear/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/pear/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -13,7 +13,7 @@
+ 	@$(top_builddir)/sapi/cli/php $(PEAR_INSTALL_FLAGS) pear/install-pear-nozlib.phar -d "$(peardir)" -b "$(bindir)" ${PEAR_PREFIX} ${PEAR_SUFFIX}
+ 
+ install-pear:
+-	@echo "Installing PEAR environment:      $(INSTALL_ROOT)$(peardir)/"
++	@echo "Installing PEAR environment:      $(DESTDIR)$(peardir)/"
+ 	@if test ! -f $(builddir)/install-pear-nozlib.phar; then \
+ 		if test -f $(srcdir)/install-pear-nozlib.phar; then \
+ 			cp $(srcdir)/install-pear-nozlib.phar $(builddir)/install-pear-nozlib.phar; \
+@@ -27,7 +27,7 @@
+ 			fi \
+ 		fi \
+ 	fi
+-	@if test -f $(builddir)/install-pear-nozlib.phar && $(mkinstalldirs) $(INSTALL_ROOT)$(peardir); then \
++	@if test -f $(builddir)/install-pear-nozlib.phar && $(mkinstalldirs) $(DESTDIR)$(peardir); then \
+ 		$(MAKE) -s install-pear-installer; \
+ 	else \
+ 		cat $(srcdir)/install-pear.txt; \
+diff -ru php-8.3.4.orig/sapi/cgi/Makefile.frag php-8.3.4/sapi/cgi/Makefile.frag
+--- php-8.3.4.orig/sapi/cgi/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/sapi/cgi/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -4,9 +4,9 @@
+ 	$(BUILD_CGI)
+ 
+ install-cgi: $(SAPI_CGI_PATH)
+-	@echo "Installing PHP CGI binary:        $(INSTALL_ROOT)$(bindir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
+-	@$(INSTALL) -m 0755 $(SAPI_CGI_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)php-cgi$(program_suffix)$(EXEEXT)
+-	@echo "Installing PHP CGI man page:      $(INSTALL_ROOT)$(mandir)/man1/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
+-	@$(INSTALL_DATA) sapi/cgi/php-cgi.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)php-cgi$(program_suffix).1
++	@echo "Installing PHP CGI binary:        $(DESTDIR)$(bindir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(bindir)
++	@$(LIBTOOL) --mode=install cp $(SAPI_CGI_PATH) $(DESTDIR)$(bindir)/$(program_prefix)php-cgi$(program_suffix)$(EXEEXT)
++	@echo "Installing PHP CGI man page:      $(DESTDIR)$(mandir)/man1/"
++	@$(mkinstalldirs) $(DESTDIR)$(mandir)/man1
++	@$(INSTALL_DATA) sapi/cgi/php-cgi.1 $(DESTDIR)$(mandir)/man1/$(program_prefix)php-cgi$(program_suffix).1
+diff -ru php-8.3.4.orig/sapi/cli/Makefile.frag php-8.3.4/sapi/cli/Makefile.frag
+--- php-8.3.4.orig/sapi/cli/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/sapi/cli/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -4,9 +4,9 @@
+ 	$(BUILD_CLI)
+ 
+ install-cli: $(SAPI_CLI_PATH)
+-	@echo "Installing PHP CLI binary:        $(INSTALL_ROOT)$(bindir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
+-	@$(INSTALL) -m 0755 $(SAPI_CLI_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)php$(program_suffix)$(EXEEXT)
+-	@echo "Installing PHP CLI man page:      $(INSTALL_ROOT)$(mandir)/man1/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
+-	@$(INSTALL_DATA) sapi/cli/php.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)php$(program_suffix).1
++	@echo "Installing PHP CLI binary:        $(DESTDIR)$(bindir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(bindir)
++	@$(LIBTOOL) --mode=install cp $(SAPI_CLI_PATH) $(DESTDIR)$(bindir)/$(program_prefix)php$(program_suffix)$(EXEEXT)
++	@echo "Installing PHP CLI man page:      $(DESTDIR)$(mandir)/man1/"
++	@$(mkinstalldirs) $(DESTDIR)$(mandir)/man1
++	@$(INSTALL_DATA) sapi/cli/php.1 $(DESTDIR)$(mandir)/man1/$(program_prefix)php$(program_suffix).1
+diff -ru php-8.3.4.orig/sapi/fpm/Makefile.frag php-8.3.4/sapi/fpm/Makefile.frag
+--- php-8.3.4.orig/sapi/fpm/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/sapi/fpm/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -4,25 +4,25 @@
+ 	$(BUILD_FPM)
+ 
+ install-fpm: $(SAPI_FPM_PATH)
+-	@echo "Installing PHP FPM binary:        $(INSTALL_ROOT)$(sbindir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(sbindir)
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(localstatedir)/log
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(localstatedir)/run
+-	@$(INSTALL) -m 0755 $(SAPI_FPM_PATH) $(INSTALL_ROOT)$(sbindir)/$(program_prefix)php-fpm$(program_suffix)$(EXEEXT)
++	@echo "Installing PHP FPM binary:        $(DESTDIR)$(sbindir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(sbindir)
++	@$(mkinstalldirs) $(DESTDIR)$(localstatedir)/log
++	@$(mkinstalldirs) $(DESTDIR)$(localstatedir)/run
++	@$(INSTALL) -m 0755 $(SAPI_FPM_PATH) $(DESTDIR)$(sbindir)/$(program_prefix)php-fpm$(program_suffix)$(EXEEXT)
+ 
+-	@if test -f "$(INSTALL_ROOT)$(sysconfdir)/php-fpm.conf"; then \
++	@if test -f "$(DESTDIR)$(sysconfdir)/php-fpm.conf"; then \
+ 		echo "Installing PHP FPM defconfig:     skipping"; \
+ 	else \
+-		echo "Installing PHP FPM defconfig:     $(INSTALL_ROOT)$(sysconfdir)/" && \
+-		$(mkinstalldirs) $(INSTALL_ROOT)$(sysconfdir)/php-fpm.d; \
+-		$(INSTALL_DATA) sapi/fpm/php-fpm.conf $(INSTALL_ROOT)$(sysconfdir)/php-fpm.conf.default; \
+-		$(INSTALL_DATA) sapi/fpm/www.conf $(INSTALL_ROOT)$(sysconfdir)/php-fpm.d/www.conf.default; \
++		echo "Installing PHP FPM defconfig:     $(DESTDIR)$(sysconfdir)/" && \
++		$(mkinstalldirs) $(DESTDIR)$(sysconfdir)/php-fpm.d; \
++		$(INSTALL_DATA) sapi/fpm/php-fpm.conf $(DESTDIR)$(sysconfdir)/php-fpm.conf.default; \
++		$(INSTALL_DATA) sapi/fpm/www.conf $(DESTDIR)$(sysconfdir)/php-fpm.d/www.conf.default; \
+ 	fi
+ 
+-	@echo "Installing PHP FPM man page:      $(INSTALL_ROOT)$(mandir)/man8/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man8
+-	@$(INSTALL_DATA) sapi/fpm/php-fpm.8 $(INSTALL_ROOT)$(mandir)/man8/php-fpm$(program_suffix).8
++	@echo "Installing PHP FPM man page:      $(DESTDIR)$(mandir)/man8/"
++	@$(mkinstalldirs) $(DESTDIR)$(mandir)/man8
++	@$(INSTALL_DATA) sapi/fpm/php-fpm.8 $(DESTDIR)$(mandir)/man8/php-fpm$(program_suffix).8
+ 
+-	@echo "Installing PHP FPM status page:   $(INSTALL_ROOT)$(datadir)/fpm/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(datadir)/fpm
+-	@$(INSTALL_DATA) sapi/fpm/status.html $(INSTALL_ROOT)$(datadir)/fpm/status.html
++	@echo "Installing PHP FPM status page:   $(DESTDIR)$(datadir)/fpm/"
++	@$(mkinstalldirs) $(DESTDIR)$(datadir)/fpm
++	@$(INSTALL_DATA) sapi/fpm/status.html $(DESTDIR)$(datadir)/fpm/status.html
+diff -ru php-8.3.4.orig/sapi/litespeed/Makefile.frag php-8.3.4/sapi/litespeed/Makefile.frag
+--- php-8.3.4.orig/sapi/litespeed/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/sapi/litespeed/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -4,6 +4,6 @@
+ 	$(BUILD_LITESPEED)
+ 
+ install-litespeed: $(SAPI_LITESPEED_PATH)
+-	@echo "Installing PHP LiteSpeed binary:  $(INSTALL_ROOT)$(bindir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
+-	@$(INSTALL) -m 0755 $(SAPI_LITESPEED_PATH) $(INSTALL_ROOT)$(bindir)/$(program_prefix)lsphp$(program_suffix)
++	@echo "Installing PHP LiteSpeed binary:  $(DESTDIR)$(bindir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(bindir)
++	@$(INSTALL) -m 0755 $(SAPI_LITESPEED_PATH) $(DESTDIR)$(bindir)/$(program_prefix)lsphp$(program_suffix)
+diff -ru php-8.3.4.orig/sapi/phpdbg/Makefile.frag php-8.3.4/sapi/phpdbg/Makefile.frag
+--- php-8.3.4.orig/sapi/phpdbg/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/sapi/phpdbg/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -21,11 +21,11 @@
+ 	@$(YACC) $(YFLAGS) -v -d $(srcdir)/phpdbg_parser.y -o $@
+ 
+ install-phpdbg: $(BUILD_BINARY)
+-	@echo "Installing phpdbg binary:         $(INSTALL_ROOT)$(bindir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(localstatedir)/log
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(localstatedir)/run
+-	@$(INSTALL) -m 0755 $(BUILD_BINARY) $(INSTALL_ROOT)$(bindir)/$(program_prefix)phpdbg$(program_suffix)$(EXEEXT)
+-	@echo "Installing phpdbg man page:       $(INSTALL_ROOT)$(mandir)/man1/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
+-	@$(INSTALL_DATA) sapi/phpdbg/phpdbg.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)phpdbg$(program_suffix).1
++	@echo "Installing phpdbg binary:         $(DESTDIR)$(bindir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(bindir)
++	@$(mkinstalldirs) $(DESTDIR)$(localstatedir)/log
++	@$(mkinstalldirs) $(DESTDIR)$(localstatedir)/run
++	@$(LIBTOOL) --mode=install cp $(BUILD_BINARY) $(DESTDIR)$(bindir)/$(program_prefix)phpdbg$(program_suffix)$(EXEEXT)
++	@echo "Installing phpdbg man page:       $(DESTDIR)$(mandir)/man1/"
++	@$(mkinstalldirs) $(DESTDIR)$(mandir)/man1
++	@$(INSTALL_DATA) sapi/phpdbg/phpdbg.1 $(DESTDIR)$(mandir)/man1/$(program_prefix)phpdbg$(program_suffix).1
+diff -ru php-8.3.4.orig/scripts/Makefile.frag php-8.3.4/scripts/Makefile.frag
+--- php-8.3.4.orig/scripts/Makefile.frag	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/scripts/Makefile.frag	2024-04-05 18:32:27.849200335 +0200
+@@ -27,24 +27,24 @@
+ man_PAGES = phpize php-config
+ 
+ install-build:
+-	@echo "Installing build environment:     $(INSTALL_ROOT)$(phpbuilddir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(phpbuilddir) $(INSTALL_ROOT)$(bindir) && \
++	@echo "Installing build environment:     $(DESTDIR)$(phpbuilddir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(phpbuilddir) $(DESTDIR)$(bindir) && \
+ 	(cd $(top_srcdir) && \
+-	$(INSTALL) $(BUILD_FILES_EXEC) $(INSTALL_ROOT)$(phpbuilddir) && \
+-	$(INSTALL_DATA) $(BUILD_FILES) $(INSTALL_ROOT)$(phpbuilddir))
++	$(INSTALL) $(BUILD_FILES_EXEC) $(DESTDIR)$(phpbuilddir) && \
++	$(INSTALL_DATA) $(BUILD_FILES) $(DESTDIR)$(phpbuilddir))
+ 
+ install-programs: $(builddir)/phpize $(builddir)/php-config
+-	@echo "Installing helper programs:       $(INSTALL_ROOT)$(bindir)/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(bindir)
++	@echo "Installing helper programs:       $(DESTDIR)$(bindir)/"
++	@$(mkinstalldirs) $(DESTDIR)$(bindir)
+ 	@for prog in $(bin_SCRIPTS); do \
+ 		echo "  program: $(program_prefix)$${prog}$(program_suffix)"; \
+-		$(INSTALL) -m 755 $(builddir)/$${prog} $(INSTALL_ROOT)$(bindir)/$(program_prefix)$${prog}$(program_suffix); \
++		$(INSTALL) -m 755 $(builddir)/$${prog} $(DESTDIR)$(bindir)/$(program_prefix)$${prog}$(program_suffix); \
+ 	done
+-	@echo "Installing man pages:             $(INSTALL_ROOT)$(mandir)/man1/"
+-	@$(mkinstalldirs) $(INSTALL_ROOT)$(mandir)/man1
++	@echo "Installing man pages:             $(DESTDIR)$(mandir)/man1/"
++	@$(mkinstalldirs) $(DESTDIR)$(mandir)/man1
+ 	@for page in $(man_PAGES); do \
+ 		echo "  page: $(program_prefix)$${page}$(program_suffix).1"; \
+-		$(INSTALL_DATA) $(builddir)/man1/$${page}.1 $(INSTALL_ROOT)$(mandir)/man1/$(program_prefix)$${page}$(program_suffix).1; \
++		$(INSTALL_DATA) $(builddir)/man1/$${page}.1 $(DESTDIR)$(mandir)/man1/$(program_prefix)$${page}$(program_suffix).1; \
+ 	done
+ 
+ $(builddir)/phpize: $(srcdir)/phpize.in $(top_builddir)/config.status
+diff -ru php-8.3.4.orig/TSRM/TSRM.h php-8.3.4/TSRM/TSRM.h
+--- php-8.3.4.orig/TSRM/TSRM.h	2024-03-13 00:42:26.000000000 +0100
++++ php-8.3.4/TSRM/TSRM.h	2024-04-05 18:32:27.849200335 +0200
+@@ -149,7 +149,7 @@
+ # define __has_attribute(x) 0
+ #endif
+ 
+-#if !__has_attribute(tls_model) || defined(__FreeBSD__) || defined(__MUSL__) || defined(__HAIKU__)
++#if !__has_attribute(tls_model) || defined(__FreeBSD__) || defined(__MUSL__) || defined(__HAIKU__) || defined(__midipix__)
+ # define TSRM_TLS_MODEL_ATTR
+ #elif __PIC__
+ # define TSRM_TLS_MODEL_ATTR __attribute__((tls_model("initial-exec")))
diff --git a/patches/posix_cc-1.4_pre.local.patch b/patches/posix_cc-1.4_pre.local.patch
new file mode 100644
index 00000000..e217b1d4
--- /dev/null
+++ b/patches/posix_cc-1.4_pre.local.patch
@@ -0,0 +1,132 @@
+diff -Nru posix_cc-1.4.orig/config.h.in posix_cc-1.4/config.h.in
+--- posix_cc-1.4.orig/config.h.in	2001-12-12 13:45:12.000000000 +0100
++++ posix_cc-1.4/config.h.in	2024-04-09 09:22:44.846399546 +0200
+@@ -1,46 +1,63 @@
+-/* config.h.in.  Generated automatically from configure.in by autoheader.  */
++/* config.h.in.  Generated from configure.ac by autoheader.  */
+ 
+-/* Define if you have the <inttypes.h> header file. */
++/* Define to 1 if you have the <inttypes.h> header file. */
+ #undef HAVE_INTTYPES_H
+ 
+-/* Define if your system has a working `malloc' function. */
+-#undef HAVE_MALLOC
+-
+-/* Define if you have the <memory.h> header file. */
+-#undef HAVE_MEMORY_H
+-
+-/* Define if you have the <stdint.h> header file. */
++/* Define to 1 if you have the <stdint.h> header file. */
+ #undef HAVE_STDINT_H
+ 
+-/* Define if you have the <stdlib.h> header file. */
++/* Define to 1 if you have the <stdio.h> header file. */
++#undef HAVE_STDIO_H
++
++/* Define to 1 if you have the <stdlib.h> header file. */
+ #undef HAVE_STDLIB_H
+ 
+-/* Define if you have the <strings.h> header file. */
++/* Define to 1 if you have the <strings.h> header file. */
+ #undef HAVE_STRINGS_H
+ 
+-/* Define if you have the <string.h> header file. */
++/* Define to 1 if you have the <string.h> header file. */
+ #undef HAVE_STRING_H
+ 
+-/* Define if you have the <sys/stat.h> header file. */
++/* Define to 1 if you have the <sys/stat.h> header file. */
+ #undef HAVE_SYS_STAT_H
+ 
+-/* Define if you have the <sys/types.h> header file. */
++/* Define to 1 if you have the <sys/types.h> header file. */
+ #undef HAVE_SYS_TYPES_H
+ 
+-/* Define if you have the <unistd.h> header file. */
++/* Define to 1 if you have the <unistd.h> header file. */
+ #undef HAVE_UNISTD_H
+ 
+ /* Name of package */
+ #undef PACKAGE
+ 
+-/* Define if you have the ANSI C header files. */
++/* Define to the address where bug reports for this package should be sent. */
++#undef PACKAGE_BUGREPORT
++
++/* Define to the full name of this package. */
++#undef PACKAGE_NAME
++
++/* Define to the full name and version of this package. */
++#undef PACKAGE_STRING
++
++/* Define to the one symbol short name of this package. */
++#undef PACKAGE_TARNAME
++
++/* Define to the home page for this package. */
++#undef PACKAGE_URL
++
++/* Define to the version of this package. */
++#undef PACKAGE_VERSION
++
++/* Define to 1 if all of the C89 standard headers exist (not just the ones
++   required in a freestanding environment). This macro is provided for
++   backward compatibility; new code need not use it. */
+ #undef STDC_HEADERS
+ 
+ /* Version number of package */
+ #undef VERSION
+ 
+-/* Define to empty if `const' does not conform to ANSI C. */
++/* Define to empty if 'const' does not conform to ANSI C. */
+ #undef const
+ 
+-/* Define to `unsigned' if <sys/types.h> does not define. */
++/* Define as 'unsigned int' if <stddef.h> doesn't define. */
+ #undef size_t
+diff -Nru posix_cc-1.4.orig/configure.ac posix_cc-1.4/configure.ac
+--- posix_cc-1.4.orig/configure.ac	1970-01-01 01:00:00.000000000 +0100
++++ posix_cc-1.4/configure.ac	2024-04-09 09:20:54.446401106 +0200
+@@ -0,0 +1,15 @@
++# Process this file with autoconf to produce a configure script.
++AC_INIT(posix_cc, 1.4)
++AC_CONFIG_SRCDIR([c89.c])
++AC_CONFIG_HEADERS([config.h])
++AM_INIT_AUTOMAKE
++
++# Checks for programs.
++AC_PROG_CC
++
++# Checks for typedefs, structures, and compiler characteristics.
++AC_C_CONST
++AC_TYPE_SIZE_T
++
++AC_CONFIG_FILES([Makefile])
++AC_OUTPUT
+diff -Nru posix_cc-1.4.orig/configure.in posix_cc-1.4/configure.in
+--- posix_cc-1.4.orig/configure.in	2001-12-12 15:53:13.000000000 +0100
++++ posix_cc-1.4/configure.in	1970-01-01 01:00:00.000000000 +0100
+@@ -1,24 +0,0 @@
+-# Process this file with autoconf to produce a configure script.
+-AC_INIT(posix_cc, 1.4)
+-AM_INIT_AUTOMAKE(posix_c, 1.4)
+-AC_CONFIG_SRCDIR([c89.c])
+-AM_CONFIG_HEADER([config.h])
+-
+-# Checks for programs.
+-AC_PROG_CC
+-
+-# Checks for libraries.
+-
+-# Checks for header files.
+-AC_HEADER_STDC
+-AC_CHECK_HEADERS([stdlib.h string.h unistd.h])
+-
+-# Checks for typedefs, structures, and compiler characteristics.
+-AC_C_CONST
+-AC_TYPE_SIZE_T
+-
+-# Checks for library functions.
+-AC_FUNC_MALLOC
+-
+-AC_CONFIG_FILES([Makefile])
+-AC_OUTPUT
diff --git a/patches/procps_ng-3.3.17.local.patch b/patches/procps_ng-3.3.17.local.patch
index 40afa885..d4f8119d 100644
--- a/patches/procps_ng-3.3.17.local.patch
+++ b/patches/procps_ng-3.3.17.local.patch
@@ -1,6 +1,59 @@
+diff -ru procps-3.3.17.orig/lib/nsutils.c procps-3.3.17/lib/nsutils.c
+--- procps-3.3.17.orig/lib/nsutils.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/lib/nsutils.c	2022-11-07 00:01:25.779153614 +0100
+@@ -16,7 +16,7 @@
+ 	int i, rc = 0;
+ 
+ 	for (i = 0; i < NUM_NS; i++) {
+-		snprintf(buff, sizeof(buff), "/proc/%i/ns/%s", pid,
++		snprintf(buff, sizeof(buff), "/proc/sysproc/%i/ns/%s", pid,
+ 			get_ns_name(i));
+ 		if (stat(buff, &st)) {
+ 			if (errno != ENOENT)
+diff -ru procps-3.3.17.orig/pidof.c procps-3.3.17/pidof.c
+--- procps-3.3.17.orig/pidof.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/pidof.c	2022-11-07 00:01:45.927153736 +0100
+@@ -117,7 +117,7 @@
+ 	ssize_t path_alloc_size;
+ 	ssize_t len;
+ 
+-	snprintf(link, sizeof(link), "/proc/%d/%s", pid, base_name);
++	snprintf(link, sizeof(link), "/proc/sysproc/%d/%s", pid, base_name);
+ 
+ 	len = path_alloc_size = 0;
+ 	result = NULL;
+diff -ru procps-3.3.17.orig/pmap.c procps-3.3.17/pmap.c
+--- procps-3.3.17.orig/pmap.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/pmap.c	2022-11-07 00:02:54.791154154 +0100
+@@ -539,11 +539,11 @@
+ 	printf("%u:   %s\n", p->tgid, cmdbuf);
+ 
+ 	if (x_option || X_option || c_option) {
+-		snprintf(buf, sizeof buf, "/proc/%u/smaps", p->tgid);
++		snprintf(buf, sizeof buf, "/proc/sysproc/%u/smaps", p->tgid);
+ 		if ((fp = fopen(buf, "r")) == NULL)
+ 			return 1;
+ 	} else {
+-		snprintf(buf, sizeof buf, "/proc/%u/maps", p->tgid);
++		snprintf(buf, sizeof buf, "/proc/sysproc/%u/maps", p->tgid);
+ 		if ((fp = fopen(buf, "r")) == NULL)
+ 			return 1;
+ 	}
+diff -ru procps-3.3.17.orig/proc/devname.c procps-3.3.17/proc/devname.c
+--- procps-3.3.17.orig/proc/devname.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/proc/devname.c	2022-11-06 23:54:22.462970842 +0100
+@@ -289,7 +289,7 @@
+   struct stat sbuf;
+   char path[32];
+   ssize_t count;
+-  const int len = snprintf(path, sizeof path, "/proc/%d/%s", pid, name);  /* often permission denied */
++  const int len = snprintf(path, sizeof path, "/proc/sysproc/%d/%s", pid, name);  /* often permission denied */
+   if(len <= 0 || (size_t)len >= sizeof path) return 0;
+   count = readlink(path,buf,TTY_NAME_SIZE-1);
+   if(count <= 0 || count >= TTY_NAME_SIZE-1) return 0;
 diff -ru procps-3.3.17.orig/proc/escape.c procps-3.3.17/proc/escape.c
---- procps-3.3.17.orig/proc/escape.c	2022-02-05 23:39:09.677115085 +0100
-+++ procps-3.3.17/proc/escape.c	2022-02-05 23:32:43.385130312 +0100
+--- procps-3.3.17.orig/proc/escape.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/proc/escape.c	2022-11-04 15:46:20.305190037 +0100
 @@ -21,6 +21,7 @@
  #include <sys/types.h>
  #include <string.h>
@@ -9,9 +62,144 @@ diff -ru procps-3.3.17.orig/proc/escape.c procps-3.3.17/proc/escape.c
  #include "procps.h"
  #include "escape.h"
  #include "readproc.h"
+diff -ru procps-3.3.17.orig/proc/readproc.c procps-3.3.17/proc/readproc.c
+--- procps-3.3.17.orig/proc/readproc.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/proc/readproc.c	2022-11-06 23:57:14.382411315 +0100
+@@ -883,7 +883,7 @@
+ // warning: interface may change
+ int read_cmdline(char *restrict const dst, unsigned sz, unsigned pid) {
+     char path[PROCPATHLEN];
+-    snprintf(path, sizeof(path), "/proc/%u", pid);
++    snprintf(path, sizeof(path), "/proc/sysproc/%u", pid);
+     return read_unvectored(dst, sz, path, "cmdline", ' ');
+ }
+ 
+@@ -1239,7 +1239,7 @@
+   }
+   p->tgid = strtoul(ent->d_name, NULL, 10);
+   p->tid = p->tgid;
+-  snprintf(path, PROCPATHLEN, "/proc/%s", ent->d_name);
++  snprintf(path, PROCPATHLEN, "/proc/sysproc/%s", ent->d_name);
+   return 1;
+ }
+ 
+@@ -1253,7 +1253,7 @@
+       closedir(PT->taskdir);
+     }
+     // use "path" as some tmp space
+-    snprintf(path, PROCPATHLEN, "/proc/%d/task", p->tgid);
++    snprintf(path, PROCPATHLEN, "/proc/sysproc/%d/task", p->tgid);
+     PT->taskdir = opendir(path);
+     if(!PT->taskdir) return 0;
+     PT->taskdir_user = p->tgid;
+@@ -1266,7 +1266,7 @@
+   t->tid = strtoul(ent->d_name, NULL, 10);
+   t->tgid = p->tgid;
+ //t->ppid = p->ppid;  // cover for kernel behavior? we want both actually...?
+-  snprintf(path, PROCPATHLEN, "/proc/%d/task/%s", p->tgid, ent->d_name);
++  snprintf(path, PROCPATHLEN, "/proc/sysproc/%d/task/%s", p->tgid, ent->d_name);
+   return 1;
+ }
+ 
+@@ -1277,7 +1277,7 @@
+   char *restrict const path = PT->path;
+   pid_t tgid = *(PT->pids)++;
+   if(likely(tgid)){
+-    snprintf(path, PROCPATHLEN, "/proc/%d", tgid);
++    snprintf(path, PROCPATHLEN, "/proc/sysproc/%d", tgid);
+     p->tgid = tgid;
+     p->tid = tgid;  // they match for leaders
+   }
+@@ -1677,7 +1677,7 @@
+     static char path[32];
+     struct stat statbuf;
+ 
+-    snprintf(path, sizeof path, "/proc/%d", pid);
++    snprintf(path, sizeof path, "/proc/sysproc/%d", pid);
+     if (stat(path, &statbuf)) {
+         perror("stat");
+         return NULL;
+diff -ru procps-3.3.17.orig/proc/sysinfo.c procps-3.3.17/proc/sysinfo.c
+--- procps-3.3.17.orig/proc/sysinfo.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/proc/sysinfo.c	2022-11-06 23:53:23.999176866 +0100
+@@ -488,7 +488,7 @@
+     char c;
+ 
+     if (!isdigit(ent->d_name[0])) continue;
+-    snprintf(tbuf, sizeof(tbuf), "/proc/%s/stat", ent->d_name);
++    snprintf(tbuf, sizeof(tbuf), "/proc/sysproc/%s/stat", ent->d_name);
+ 
+     fd = open(tbuf, O_RDONLY, 0);
+     if (fd == -1) continue;
+diff -ru procps-3.3.17.orig/proc/wchan.c procps-3.3.17/proc/wchan.c
+--- procps-3.3.17.orig/proc/wchan.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/proc/wchan.c	2022-11-06 23:55:15.750410595 +0100
+@@ -32,7 +32,7 @@
+    ssize_t num;
+    int fd;
+ 
+-   snprintf(buf, sizeof buf, "/proc/%d/wchan", pid);
++   snprintf(buf, sizeof buf, "/proc/sysproc/%d/wchan", pid);
+    fd = open(buf, O_RDONLY);
+    if (fd==-1) return "?";
+ 
+diff -ru procps-3.3.17.orig/ps/output.c procps-3.3.17/ps/output.c
+--- procps-3.3.17.orig/ps/output.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/ps/output.c	2022-11-06 23:59:52.026412271 +0100
+@@ -1229,7 +1229,7 @@
+     int fd;
+     u_int32_t luid;
+ 
+-    snprintf(filename, sizeof filename, "/proc/%d/loginuid", pp->tgid);
++    snprintf(filename, sizeof filename, "/proc/sysproc/%d/loginuid", pp->tgid);
+ 
+     if ((fd = open(filename, O_RDONLY, 0)) != -1) {
+         num_read = read(fd, outbuf, OUTBUF_SIZE - 1);
+@@ -1255,7 +1255,7 @@
+     char filename[48];
+     ssize_t num_read;
+ 
+-    snprintf(filename, sizeof filename, "/proc/%d/exe", pp->tgid);
++    snprintf(filename, sizeof filename, "/proc/sysproc/%d/exe", pp->tgid);
+ 
+     num_read = readlink(filename, outbuf, OUTBUF_SIZE-1);
+     if (num_read > 0) {
+@@ -1371,7 +1371,7 @@
+ 
+ // wchan file is suitable for testing
+ //snprintf(filename, sizeof filename, "/proc/%d/wchan", pp->tgid);
+-    snprintf(filename, sizeof filename, "/proc/%d/attr/current", pp->tgid);
++    snprintf(filename, sizeof filename, "/proc/sysproc/%d/attr/current", pp->tgid);
+ 
+     if ((fd = open(filename, O_RDONLY, 0)) != -1) {
+       num_read = read(fd, outbuf, OUTBUF_SIZE-1);
+diff -ru procps-3.3.17.orig/pwdx.c procps-3.3.17/pwdx.c
+--- procps-3.3.17.orig/pwdx.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/pwdx.c	2022-11-07 00:00:51.339153405 +0100
+@@ -118,7 +118,7 @@
+ 		 * the first char is possible
+ 		 */
+ 		if (argv[i][0] != '/')
+-			snprintf(buf, buflen, "/proc/%s/cwd", argv[i]);
++			snprintf(buf, buflen, "/proc/sysproc/%s/cwd", argv[i]);
+ 		else
+ 			snprintf(buf, buflen, "%s/cwd", argv[i]);
+ 
+diff -ru procps-3.3.17.orig/skill.c procps-3.3.17/skill.c
+--- procps-3.3.17.orig/skill.c	2021-02-09 11:11:25.000000000 +0100
++++ procps-3.3.17/skill.c	2022-11-07 00:00:34.811153304 +0100
+@@ -181,7 +181,7 @@
+ 	if (pid == my_pid || pid == 0)
+ 		return;
+ 	/* pid (cmd) state ppid pgrp session tty */
+-	sprintf(buf, "/proc/%d/stat", pid);
++	sprintf(buf, "/proc/sysproc/%d/stat", pid);
+ 	fd = open(buf, O_RDONLY);
+ 	if (fd == -1) {
+ 		/* process exited maybe */
 diff -ru procps-3.3.17.orig/w.c procps-3.3.17/w.c
 --- procps-3.3.17.orig/w.c	2021-02-09 11:11:25.000000000 +0100
-+++ procps-3.3.17/w.c	2022-02-05 23:38:48.901114668 +0100
++++ procps-3.3.17/w.c	2022-11-04 15:46:20.305190037 +0100
 @@ -55,11 +55,7 @@
  #include <termios.h>
  #include <time.h>
diff --git a/patches/proxytunnel-1.10.20200507.local.patch b/patches/proxytunnel-1.12.1.local.patch
index f5ff82d8..f5ff82d8 100644
--- a/patches/proxytunnel-1.10.20200507.local.patch
+++ b/patches/proxytunnel-1.12.1.local.patch
diff --git a/patches/python2-2.7.18.local.patch b/patches/python2-2.7.18.local.patch
new file mode 100644
index 00000000..74bcd7e2
--- /dev/null
+++ b/patches/python2-2.7.18.local.patch
@@ -0,0 +1,23 @@
+diff -ru Python-2.7.18.orig/Modules/_ssl.c Python-2.7.18/Modules/_ssl.c
+--- Python-2.7.18.orig/Modules/_ssl.c   2020-04-19 23:13:39.000000000 +0200
++++ Python-2.7.18/Modules/_ssl.c        2024-03-10 13:58:48.445497909 +0100
+@@ -592,7 +592,6 @@
+     Py_INCREF(sslctx);
+
+     /* Make sure the SSL error state is initialized */
+-    (void) ERR_get_state();
+     ERR_clear_error();
+
+     PySSL_BEGIN_ALLOW_THREADS
+diff -ru Python-2.7.18.orig/Modules/_hashopenssl.c Python-2.7.18/Modules/_hashopenssl.c
+--- Python-2.7.18.orig/Modules/_hashopenssl.c	2020-04-19 23:13:39.000000000 +0200
++++ Python-2.7.18/Modules/_hashopenssl.c	2022-02-24 22:29:09.497683912 +0100
+@@ -56,7 +56,7 @@
+ #define _OPENSSL_SUPPORTS_SHA2
+ #endif
+ 
+-#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER)
++#if (OPENSSL_VERSION_NUMBER < 0x10100000L)
+ /* OpenSSL < 1.1.0 */
+ #define EVP_MD_CTX_new EVP_MD_CTX_create
+ #define EVP_MD_CTX_free EVP_MD_CTX_destroy
diff --git a/patches/python2-2.7.18_pre.local.patch b/patches/python2-2.7.18_pre.local.patch
new file mode 120000
index 00000000..8b4aef09
--- /dev/null
+++ b/patches/python2-2.7.18_pre.local.patch
@@ -0,0 +1 @@
+python2_host-2.7.18_pre.local.patch
\ No newline at end of file
diff --git a/patches/python2_host-2.7.18.local.patch b/patches/python2_host-2.7.18.local.patch
new file mode 120000
index 00000000..84a09096
--- /dev/null
+++ b/patches/python2_host-2.7.18.local.patch
@@ -0,0 +1 @@
+python2-2.7.18.local.patch
\ No newline at end of file
diff --git a/patches/python2_host-2.7.18_pre.local.patch b/patches/python2_host-2.7.18_pre.local.patch
new file mode 100644
index 00000000..103d4869
--- /dev/null
+++ b/patches/python2_host-2.7.18_pre.local.patch
@@ -0,0 +1,11 @@
+--- build/sbpython2/project/config/cfgdefs.sh.orig	2022-12-26 19:52:02.067193887 +0100
++++ build/sbpython2/project/config/cfgdefs.sh	2023-03-20 20:11:46.912982474 +0100
+@@ -70,7 +70,7 @@
+ 		exit 2
+ 	fi
+ 
+-	"$mb_native_cc" -E -dM "$mb_source_dir/Include/patchlevel.h" \
++	$mb_native_cc -E -dM "$mb_source_dir/Include/patchlevel.h" \
+ 		> "$mb_internal_verinfo"
+ 
+ 	python_major=$(grep '#define PY_MAJOR_VERSION ' "$mb_internal_verinfo" | cut -d' ' -f3)
diff --git a/patches/python2_minipix-2.7.18.local.patch b/patches/python2_minipix-2.7.18.local.patch
new file mode 120000
index 00000000..84a09096
--- /dev/null
+++ b/patches/python2_minipix-2.7.18.local.patch
@@ -0,0 +1 @@
+python2-2.7.18.local.patch
\ No newline at end of file
diff --git a/patches/python2_minipix-2.7.18_pre.local.patch b/patches/python2_minipix-2.7.18_pre.local.patch
new file mode 120000
index 00000000..8b4aef09
--- /dev/null
+++ b/patches/python2_minipix-2.7.18_pre.local.patch
@@ -0,0 +1 @@
+python2_host-2.7.18_pre.local.patch
\ No newline at end of file
diff --git a/patches/python3-3.7.10.local.patch b/patches/python3-3.7.10.local.patch
new file mode 100644
index 00000000..e101fc7a
--- /dev/null
+++ b/patches/python3-3.7.10.local.patch
@@ -0,0 +1,23 @@
+diff -ru Python-3.7.10.orig/Modules/_ssl.c Python-3.7.10/Modules/_ssl.c
+--- Python-3.7.10.orig/Modules/_ssl.c   2021-02-16 02:29:22.000000000 +0100
++++ Python-3.7.10/Modules/_ssl.c        2024-03-10 14:05:44.867860819 +0100
+@@ -921,7 +921,6 @@
+     self->err = err;
+
+     /* Make sure the SSL error state is initialized */
+-    (void) ERR_get_state();
+     ERR_clear_error();
+
+     PySSL_BEGIN_ALLOW_THREADS
+diff -ru Python-3.7.10.orig/Modules/_hashopenssl.c Python-3.7.10/Modules/_hashopenssl.c
+--- Python-3.7.10.orig/Modules/_hashopenssl.c	2021-02-16 02:29:22.000000000 +0100
++++ Python-3.7.10/Modules/_hashopenssl.c	2022-02-24 22:45:05.056189097 +0100
+@@ -42,7 +42,7 @@
+ #define HASH_OBJ_CONSTRUCTOR 0
+ #endif
+ 
+-#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER)
++#if (OPENSSL_VERSION_NUMBER < 0x10100000L)
+ /* OpenSSL < 1.1.0 */
+ #define EVP_MD_CTX_new EVP_MD_CTX_create
+ #define EVP_MD_CTX_free EVP_MD_CTX_destroy
diff --git a/patches/python3-3.7.10_pre.local.patch b/patches/python3-3.7.10_pre.local.patch
new file mode 120000
index 00000000..4a56d158
--- /dev/null
+++ b/patches/python3-3.7.10_pre.local.patch
@@ -0,0 +1 @@
+python3_host-3.7.10_pre.local.patch
\ No newline at end of file
diff --git a/patches/python3_host-3.7.10.local.patch b/patches/python3_host-3.7.10.local.patch
new file mode 120000
index 00000000..48c0a404
--- /dev/null
+++ b/patches/python3_host-3.7.10.local.patch
@@ -0,0 +1 @@
+python3-3.7.10.local.patch
\ No newline at end of file
diff --git a/patches/python3_host-3.7.10_pre.local.patch b/patches/python3_host-3.7.10_pre.local.patch
new file mode 100644
index 00000000..c93558c4
--- /dev/null
+++ b/patches/python3_host-3.7.10_pre.local.patch
@@ -0,0 +1,11 @@
+--- build/sbpython3/project/config/cfgdefs.sh.orig	2023-03-20 20:14:07.834307552 +0100
++++ build/sbpython3/project/config/cfgdefs.sh	2023-03-20 20:13:42.911489879 +0100
+@@ -70,7 +70,7 @@
+ 		exit 2
+ 	fi
+ 
+-	"$mb_native_cc" -E -dM "$mb_source_dir/Include/patchlevel.h" \
++	$mb_native_cc -E -dM "$mb_source_dir/Include/patchlevel.h" \
+ 		> "$mb_internal_verinfo"
+ 
+ 	python_major=$(grep '#define PY_MAJOR_VERSION ' "$mb_internal_verinfo" | cut -d' ' -f3)
diff --git a/patches/qpdf-6.0.0.local.patch b/patches/qpdf-6.0.0.local.patch
index 42ca3c19..af2c5c51 100644
--- a/patches/qpdf-6.0.0.local.patch
+++ b/patches/qpdf-6.0.0.local.patch
@@ -819,3 +819,14 @@
  done # for ac_tag
  
  
+--- qpdf-6.0.0/libqpdf/build.mk.orig	2024-03-07 05:05:23.245504473 +0000
++++ qpdf-6.0.0/libqpdf/build.mk	2024-03-07 05:05:49.293514684 +0000
+@@ -2,7 +2,7 @@
+ 
+ INCLUDES_libqpdf = include libqpdf
+ LDFLAGS_libqpdf = -Llibqpdf/$(OUTPUT_DIR)
+-LIBS_libqpdf = -lqpdf
++LIBS_libqpdf = libqpdf/$(OUTPUT_DIR)/libqpdf.la
+ 
+ SRCS_libqpdf = \
+ 	libqpdf/BitStream.cc \
diff --git a/patches/readline-8.1.2.local.patch b/patches/readline-8.2.local.patch
index 6e6a9bad..6e6a9bad 100644
--- a/patches/readline-8.1.2.local.patch
+++ b/patches/readline-8.2.local.patch
diff --git a/patches/readline_host-8.1.2.local.patch b/patches/readline_host-8.1.2.local.patch
deleted file mode 120000
index b8fdbfa6..00000000
--- a/patches/readline_host-8.1.2.local.patch
+++ /dev/null
@@ -1 +0,0 @@
-readline-8.1.2.local.patch
\ No newline at end of file
diff --git a/patches/readline_host-8.2.local.patch b/patches/readline_host-8.2.local.patch
new file mode 120000
index 00000000..e459969f
--- /dev/null
+++ b/patches/readline_host-8.2.local.patch
@@ -0,0 +1 @@
+readline-8.2.local.patch
\ No newline at end of file
diff --git a/patches/rxvt_unicode-9.22.local.patch b/patches/rxvt_unicode-9.22.local.patch
new file mode 100644
index 00000000..a81b6e4e
--- /dev/null
+++ b/patches/rxvt_unicode-9.22.local.patch
@@ -0,0 +1,39 @@
+diff -ru rxvt-unicode-9.22.orig/src/rxvtperl.xs rxvt-unicode-9.22/src/rxvtperl.xs
+--- rxvt-unicode-9.22.orig/src/rxvtperl.xs      2015-06-04 18:38:04.000000000 +0200
++++ rxvt-unicode-9.22/src/rxvtperl.xs   2023-04-02 03:42:14.101495245 +0200
+@@ -940,7 +940,7 @@
+     const_iv (XIMVisibleToForward),
+     const_iv (XIMVisibleToBackword),
+     const_iv (XIMVisibleToCenter),
+-#if XRENDER
++#if 0
+     const_iv (PictStandardARGB32),
+     const_iv (PictStandardRGB24),
+     const_iv (PictStandardA8),
+diff -ru rxvt-unicode-9.22.orig/src/rxvttoolkit.C rxvt-unicode-9.22/src/rxvttoolkit.C
+--- rxvt-unicode-9.22.orig/src/rxvttoolkit.C    2015-10-11 18:23:17.000000000 +0200
++++ rxvt-unicode-9.22/src/rxvttoolkit.C 2023-04-02 03:41:59.813495158 +0200
+@@ -491,7 +491,7 @@
+ #endif
+
+   flags = 0;
+-#if XRENDER
++#if 0
+   int major, minor;
+   if (XRenderQueryVersion (dpy, &major, &minor))
+     if (major > 0 || (major == 0 && minor >= 11))
+diff -ru rxvt-unicode-9.22.orig/src/rxvt.h rxvt-unicode-9.22/src/rxvt.h
+--- rxvt-unicode-9.22.orig/src/rxvt.h	2015-06-17 13:57:42.000000000 +0200
++++ rxvt-unicode-9.22/src/rxvt.h	2023-04-02 03:33:44.070672503 +0200
+@@ -76,11 +76,6 @@
+ # include <gdk-pixbuf/gdk-pixbuf.h>
+ #endif
+ 
+-#if XRENDER && (HAVE_PIXBUF || ENABLE_TRANSPARENCY)
+-# define HAVE_BG_PIXMAP 1
+-# define HAVE_IMG 1
+-#endif
+-
+ #if HAVE_BG_PIXMAP
+ # if HAVE_PIXBUF
+ #  define BG_IMAGE_FROM_FILE 1
diff --git a/patches/rxvt_unicode-9.22_pre.local.patch b/patches/rxvt_unicode-9.22_pre.local.patch
new file mode 100644
index 00000000..20f0c32b
--- /dev/null
+++ b/patches/rxvt_unicode-9.22_pre.local.patch
@@ -0,0 +1,14 @@
+diff -ru rxvt-unicode-9.22.orig/src/Makefile.in rxvt-unicode-9.22/src/Makefile.in
+--- rxvt-unicode-9.22.orig/src/Makefile.in	2016-01-23 21:09:22.000000000 +0100
++++ rxvt-unicode-9.22/src/Makefile.in	2023-03-30 18:57:07.555416723 +0200
+@@ -21,8 +21,8 @@
+ LDFLAGS = @LDFLAGS@
+ DEFS = @DEFS@
+ LIBS = @LIBS@
+-XINC = @X_CFLAGS@ @PIXBUF_CFLAGS@ @STARTUP_NOTIFICATION_CFLAGS@
+-XLIB = @X_LIBS@ -lX11 @X_EXTRA_LIBS@ @PIXBUF_LIBS@ @STARTUP_NOTIFICATION_LIBS@
++XINC = @PIXBUF_CFLAGS@ @STARTUP_NOTIFICATION_CFLAGS@
++XLIB = -lX11 -lXmu @X_EXTRA_LIBS@ @PIXBUF_LIBS@ @STARTUP_NOTIFICATION_LIBS@
+ COMPILE = $(CXX) -I.. -I$(srcdir) -I. -I$(srcdir)/../libev -I$(srcdir)/../libptytty/src $(DEFS) $(CPPFLAGS) $(CXXFLAGS) $(XINC)
+ LINK = @LINKER@ $(LDFLAGS)
+ EXEEXT = @EXEEXT@
diff --git a/patches/sbase.local.patch b/patches/sbase.local.patch
deleted file mode 100644
index 164febab..00000000
--- a/patches/sbase.local.patch
+++ /dev/null
@@ -1,9 +0,0 @@
-diff -ru sbase.orig/config.mk sbase/config.mk
---- sbase.orig/config.mk	2017-10-17 18:50:00.118534627 +0200
-+++ sbase/config.mk	2017-10-17 18:53:49.429001349 +0200
-@@ -13,4 +13,4 @@
- # -lrt might be needed on some systems
- CPPFLAGS = -D_DEFAULT_SOURCE -D_BSD_SOURCE -D_XOPEN_SOURCE=700 -D_FILE_OFFSET_BITS=64
- CFLAGS   = -std=c99 -Wall -pedantic
--LDFLAGS  = -s
-+LDFLAGS  =
diff --git a/patches/sbsigntools_pre.local.patch b/patches/sbsigntools_pre.local.patch
index 4fb79276..cda74a55 100644
--- a/patches/sbsigntools_pre.local.patch
+++ b/patches/sbsigntools_pre.local.patch
@@ -1,13 +1,12 @@
-diff -ru sbsigntools-0.9.3.orig/configure.ac sbsigntools/configure.ac
---- sbsigntools-0.9.3.orig/configure.ac	2020-01-09 18:33:38.000000000 +0100
-+++ sbsigntools/configure.ac	2020-05-02 22:04:59.758305183 +0200
-@@ -63,32 +63,6 @@
+--- sbsigntools-master/configure.ac.orig	2023-03-20 07:11:16.967711226 +0100
++++ sbsigntools-master/configure.ac	2023-03-20 07:13:01.314687693 +0100
+@@ -66,32 +66,6 @@
      [],
      AC_MSG_ERROR([libuuid (from the uuid package) is required]))
  
 -dnl gnu-efi headers require extra include dirs
 -EFI_ARCH=$(uname -m | sed 's/i.86/ia32/;s/arm.*/arm/')
--AM_CONDITIONAL(TEST_BINARY_FORMAT, [ test "$EFI_ARCH" = "arm" -o "$EFI_ARCH" = "aarch64" ])
+-AM_CONDITIONAL(TEST_BINARY_FORMAT, [ test "$EFI_ARCH" = "arm" -o "$EFI_ARCH" = "aarch64" -o "$EFI_ARCH" = riscv64 ])
 -
 -##
 -# no consistent view of where gnu-efi should dump the efi stuff, so find it
diff --git a/patches/screen-4.9.0.local.patch b/patches/screen-4.9.0.local.patch
new file mode 100644
index 00000000..d44d343c
--- /dev/null
+++ b/patches/screen-4.9.0.local.patch
@@ -0,0 +1,15 @@
+diff -ru screen-4.9.0.orig/screen.c screen-4.9.0/screen.c
+--- screen-4.9.0.orig/screen.c  2022-01-28 15:06:02.694612196 +0100
++++ screen-4.9.0/screen.c       2022-12-27 13:12:29.464261795 +0100
+@@ -1145,9 +1145,11 @@
+ /* if SOCKDIR is not defined, the socket is in $HOME.
+    in that case it does not make sense to compare uids. */
+
++#ifndef __midipix__
+     if ((int)st.st_uid != real_uid)
+       Panic(0, "You are not the owner of %s.", SockPath);
+ #endif
++#endif
+   }
+
+   if ((st.st_mode & 0777) != 0700)
diff --git a/patches/slang-2.3.2.local.patch b/patches/slang-2.3.3.local.patch
index 33ea1090..33ea1090 100644
--- a/patches/slang-2.3.2.local.patch
+++ b/patches/slang-2.3.3.local.patch
diff --git a/patches/tar/CVE-2022-48303.patch b/patches/tar/CVE-2022-48303.patch
new file mode 100644
index 00000000..6dd068b9
--- /dev/null
+++ b/patches/tar/CVE-2022-48303.patch
@@ -0,0 +1,30 @@
+From 3da78400eafcccb97e2f2fd4b227ea40d794ede8 Mon Sep 17 00:00:00 2001
+From: Sergey Poznyakoff <gray@gnu.org>
+Date: Sat, 11 Feb 2023 11:57:39 +0200
+Subject: Fix boundary checking in base-256 decoder
+
+* src/list.c (from_header): Base-256 encoding is at least 2 bytes
+long.
+---
+ src/list.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+diff --git a/src/list.c b/src/list.c
+index 9fafc42..86bcfdd 100644
+--- a/src/list.c
++++ b/src/list.c
+@@ -881,8 +881,9 @@ from_header (char const *where0, size_t digs, char const *type,
+ 	  where++;
+ 	}
+     }
+-  else if (*where == '\200' /* positive base-256 */
+-	   || *where == '\377' /* negative base-256 */)
++  else if (where <= lim - 2
++	   && (*where == '\200' /* positive base-256 */
++	       || *where == '\377' /* negative base-256 */))
+     {
+       /* Parse base-256 output.  A nonnegative number N is
+ 	 represented as (256**DIGS)/2 + N; a negative number -N is
+-- 
+cgit v1.1
+
diff --git a/patches/tar_minipix b/patches/tar_minipix
new file mode 120000
index 00000000..e1d18b02
--- /dev/null
+++ b/patches/tar_minipix
@@ -0,0 +1 @@
+tar
\ No newline at end of file
diff --git a/patches/tcsh-6.24.01.local.patch b/patches/tcsh-6.24.12.local.patch
index 2e8b6283..2e9fbd26 100644
--- a/patches/tcsh-6.24.01.local.patch
+++ b/patches/tcsh-6.24.12.local.patch
@@ -1,3 +1,50 @@
+diff -ru tcsh-6.24.07.orig/configure tcsh-6.24.07/configure
+--- tcsh-6.24.07.orig/configure 2022-12-21 20:44:53.000000000 +0100
++++ tcsh-6.24.07/configure      2022-12-27 12:27:29.897963800 +0100
+@@ -6171,6 +6171,10 @@
+   *-qnx6*) :
+         tcsh_config_file=qnx6
+    ;; #(
++  ## Midipix
++  *-midipix*) :
++        tcsh_config_file=midipix
++   ;; #(
+   *) :
+     as_fn_error $? "Tcsh can't guess the configuration file name
+ for \`${host}' systems.
+--- tcsh-6.24.10/Makefile.in.orig	2023-04-14 13:52:38.000000000 +0200
++++ tcsh-6.24.10/Makefile.in	2024-01-13 10:48:11.122576967 +0100
+@@ -431,6 +431,7 @@
+ #CC=	cc	-h0,ansi,novector,float0
+ #CC=	lcc	-wa 
+ CC_FOR_GETHOST = @CC_FOR_GETHOST@
++CPPFLAGS_FOR_GETHOST=-I. -I$(srcdir)
+ ED=	ed
+ AS=	as
+ RM=	rm
+@@ -506,11 +507,11 @@
+ #	emxbind tcsh
+ 
+ gethost.${SUF}: gethost.c sh.err.h tc.const.h sh.h
+-	${CC_FOR_GETHOST} ${CF} ${CPPFLAGS} ${CFLAGS} $(srcdir)/gethost.c
++	${CC_FOR_GETHOST} ${CF} ${CPPFLAGS_FOR_GETHOST} ${CFLAGS_FOR_GETHOST} $(srcdir)/gethost.c
+ 
+ gethost:  gethost.${SUF}
+ 	rm -f gethost
+-	${CC_FOR_GETHOST} -o gethost ${CPPFLAGS} ${CFLAGS} ${LDFLAGS} gethost.${SUF}
++	${CC_FOR_GETHOST} -o gethost ${CPPFLAGS_FOR_GETHOST} ${CFLAGS_FOR_GETHOST} ${LDFLAGS_FOR_GETHOST} gethost.${SUF}
+ 
+ tc.defs.c:	gethost host.defs
+ 	@rm -f $@.tmp
+@@ -595,7 +596,7 @@
+ 	@echo '/* Do not edit this file, make creates it. */' > $@.tmp
+ 	@echo '#ifndef _h_tc_const' >> $@.tmp
+ 	@echo '#define _h_tc_const' >> $@.tmp
+-	${CPP} $(CPPFLAGS) ${DFLAGS} ${EXTRAFLAGS} -D_h_tc_const\
++	${CPP} $(CFLAGS) $(CPPFLAGS) ${DFLAGS} ${EXTRAFLAGS} -D_h_tc_const\
+ 	    $(srcdir)/tc.const.c | \
+ 	    sed -n -e 's/^\(Char STR[a-zA-Z0-9_]*\) *\[ *\].*/extern \1[];/p' | \
+ 	    LC_COLLATE=C sort >> $@.tmp
 diff -ru tcsh-6.23.02.orig/config_f.h tcsh-6.23.02/config_f.h
 --- tcsh-6.23.02.orig/config_f.h        2022-01-03 09:03:03.000000000 +0100
 +++ tcsh-6.23.02/config_f.h     2022-02-01 11:36:23.327968800 +0100
@@ -5,14 +52,14 @@ diff -ru tcsh-6.23.02.orig/config_f.h tcsh-6.23.02/config_f.h
   *             This can be much slower and no memory statistics will be
   *             provided.
   */
--#if defined(__MACHTEN__) || defined(PURIFY) || defined(MALLOC_TRACE) || defined(_OSD_POSIX) || defined(__MVS__) || defined (__CYGWIN__) || defined(__GLIBC__) || defined(__OpenBSD__) || defined(__APPLE__) || defined (__ANDROID__) || defined(__NetBSD__)
-+#if defined(__MACHTEN__) || defined(PURIFY) || defined(MALLOC_TRACE) || defined(_OSD_POSIX) || defined(__MVS__) || defined (__CYGWIN__) || defined(__GLIBC__) || defined(__OpenBSD__) || defined(__APPLE__) || defined (__ANDROID__) || defined(__NetBSD__) || defined(__midipix__)
+-#if defined(__MACHTEN__) || defined(PURIFY) || defined(MALLOC_TRACE) || defined(_OSD_POSIX) || defined(__MVS__) || defined (__CYGWIN__) || defined(__GLIBC__) || defined(__OpenBSD__) || defined(__APPLE__) || defined (__ANDROID__) || defined(__NetBSD__) || !defined(HAVE_WORKING_SBRK)
++#if defined(__MACHTEN__) || defined(PURIFY) || defined(MALLOC_TRACE) || defined(_OSD_POSIX) || defined(__MVS__) || defined (__CYGWIN__) || defined(__GLIBC__) || defined(__OpenBSD__) || defined(__APPLE__) || defined (__ANDROID__) || defined(__NetBSD__) || defined(__midipix__) || !defined(HAVE_WORKING_SBRK)
  # define SYSMALLOC
  #else
  # undef SYSMALLOC
 diff -Nru tcsh-6.22.00.orig/config/midipix tcsh-6.22.00/config/midipix
---- tcsh-6.22.00.orig/config/midipix	1970-01-01 01:00:00.000000000 +0100
-+++ tcsh-6.22.00/config/midipix	2020-08-21 19:12:56.066600827 +0200
+--- tcsh-6.22.00.orig/system/midipix	1970-01-01 01:00:00.000000000 +0100
++++ tcsh-6.22.00/system/midipix	2020-08-21 19:12:56.066600827 +0200
 @@ -0,0 +1,138 @@
 +/*
 + * config.h -- configure various defines for tcsh
@@ -152,21 +199,6 @@ diff -Nru tcsh-6.22.00.orig/config/midipix tcsh-6.22.00/config/midipix
 +#define HAVE_SLASHSLASH 1
 +
 +#endif /* _h_config */
-diff -Nru tcsh-6.22.00.orig/configure tcsh-6.22.00/configure
---- tcsh-6.22.00.orig/configure	2019-11-28 17:00:05.000000000 +0100
-+++ tcsh-6.22.00/configure	2020-08-21 19:08:03.600976202 +0200
-@@ -2975,6 +2975,11 @@
-     tcsh_config_file=qnx6
-   ;;
- 
-+  ## midipix
-+  *-midipix*)
-+    tcsh_config_file=midipix
-+  ;;
-+
-   * )
-     as_fn_error $? "Tcsh can't guess the configuration file name
- for \`${host}' systems.
 diff -Nru tcsh-6.22.00.orig/ed.inputl.c tcsh-6.22.00/ed.inputl.c
 --- tcsh-6.22.00.orig/ed.inputl.c	2019-11-28 17:00:05.000000000 +0100
 +++ tcsh-6.22.00/ed.inputl.c	2020-08-21 19:22:12.899460169 +0200
@@ -179,26 +211,6 @@ diff -Nru tcsh-6.22.00.orig/ed.inputl.c tcsh-6.22.00/ed.inputl.c
  #define OKCMD INT_MAX
  
  /* ed.inputl -- routines to get a single line from the input. */
-diff -Nru tcsh-6.22.00.orig/Makefile.in tcsh-6.22.00/Makefile.in
---- tcsh-6.22.00.orig/Makefile.in	2019-11-28 17:00:05.000000000 +0100
-+++ tcsh-6.22.00/Makefile.in	2020-08-21 19:28:01.686381892 +0200
-@@ -339,6 +339,7 @@
- #CC=	cc	-h0,ansi,novector,float0
- #CC=	lcc	-wa 
- CC_FOR_GETHOST = @CC_FOR_GETHOST@
-+CPPFLAGS_FOR_GETHOST=-I. -I$(srcdir)
- ED=	ed
- AS=	as
- RM=	rm
-@@ -447,7 +448,7 @@
- 
- gethost:  gethost.c sh.err.h tc.const.h sh.h
- 	rm -f gethost
--	${CC_FOR_GETHOST} -o gethost ${CPPFLAGS} ${CFLAGS} ${LDFLAGS} $(srcdir)/gethost.c
-+	${CC_FOR_GETHOST} -o gethost ${CPPFLAGS_FOR_GETHOST} ${CFLAGS_FOR_GETHOST} ${LDFLAGS_FOR_GETHOST} $(srcdir)/gethost.c
- 
- tc.defs.c:	gethost host.defs
- 	@rm -f $@.tmp
 diff -Nru tcsh-6.22.00.orig/sh.h tcsh-6.22.00/sh.h
 --- tcsh-6.22.00.orig/sh.h	2019-11-28 17:00:05.000000000 +0100
 +++ tcsh-6.22.00/sh.h	2020-08-21 19:10:44.030604961 +0200
diff --git a/patches/tiff/CVE-2018-12900.patch b/patches/tiff/CVE-2018-12900.patch
deleted file mode 100644
index f95cd06a..00000000
--- a/patches/tiff/CVE-2018-12900.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 86861b86f26be5301ccfa96f9bf765051f4e644a Mon Sep 17 00:00:00 2001
-From: pgajdos <pgajdos@suse.cz>
-Date: Tue, 13 Nov 2018 09:03:31 +0100
-Subject: [PATCH] prevent integer overflow
-
----
- tools/tiffcp.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/tools/tiffcp.c b/tools/tiffcp.c
-index 2f406e2d..ece7ba13 100644
---- a/tools/tiffcp.c
-+++ b/tools/tiffcp.c
-@@ -1435,6 +1435,12 @@ DECLAREreadFunc(readSeparateTilesIntoBuffer)
-             status = 0;
-             goto done;
-         }
-+        if (0xFFFFFFFF / tilew < spp)
-+        {
-+            TIFFError(TIFFFileName(in), "Error, either TileWidth (%u) or BitsPerSample (%u) is too large", tilew, bps);
-+            status = 0;
-+            goto done;
-+        }
- 	bytes_per_sample = bps/8;
- 
- 	for (row = 0; row < imagelength; row += tl) {
--- 
-2.18.1
-
diff --git a/patches/tk-8.7a1.local.patch b/patches/tk-8.7a1.local.patch
index 30bc5ca0..86b930e0 100644
--- a/patches/tk-8.7a1.local.patch
+++ b/patches/tk-8.7a1.local.patch
@@ -1,23 +1,33 @@
-diff -ru a/unix/configure b/unix/configure
---- a/unix/configure	2017-09-06 07:52:06.000000000 -0400
-+++ b/unix/configure	2019-08-20 12:46:31.097935159 -0400
-@@ -8054,13 +8054,21 @@
+diff -ru tk8.7a1.orig/unix/configure tk8.7a1/unix/configure
+--- tk8.7a1.orig/unix/configure	2023-03-30 14:25:29.062891597 +0200
++++ tk8.7a1/unix/configure	2023-03-30 14:25:08.830891475 +0200
+@@ -7752,8 +7752,8 @@
+   *)
+     # Record where we found X for the cache.
+     ac_cv_have_x="have_x=yes\
+-	ac_x_includes='$ac_x_includes'\
+-	ac_x_libraries='$ac_x_libraries'"
++	ac_x_includes=''\
++	ac_x_libraries=''"
+ esac
+ fi
+ ;; #(
+@@ -8054,13 +8054,20 @@
  	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_xft" >&5
  $as_echo "$enable_xft" >&6; }
      else
-+	if [ $cross_compiling = yes ]; then
-+		XFT_CONFIG=${host}-xft-config
-+		PKG_CONFIG=${host}-pkg-config
-+	else
-+		XFT_CONFIG=xft-config
-+		PKG_CONFIG=pkg-config
-+	fi
-+
++    if [ $cross_compiling = yes ]; then
++        XFT_CONFIG=${host}-xft-config
++        PKG_CONFIG=${host}-pkg-config
++    else
++        XFT_CONFIG=xft-config
++        PKG_CONFIG=pkg-config
++   fi
  	found_xft="yes"
 -			XFT_CFLAGS=`xft-config --cflags 2>/dev/null` || found_xft="no"
 -	XFT_LIBS=`xft-config --libs 2>/dev/null` || found_xft="no"
-+	XFT_CFLAGS=`"${XFT_CONFIG}" --cflags 2>/dev/null` || found_xft="no"
-+	XFT_LIBS=`"${XFT_CONFIG}" --libs 2>/dev/null` || found_xft="no"
++	XFT_CFLAGS=`"${PKG_CONFIG}" --cflags 2>/dev/null` || found_xft="no"
++	XFT_LIBS=`"${PKG_CONFIG}" --libs 2>/dev/null` || found_xft="no"
  	if test "$found_xft" = "no" ; then
  	    found_xft=yes
 -	    XFT_CFLAGS=`pkg-config --cflags xft 2>/dev/null` || found_xft="no"
diff --git a/patches/tree-2.0.2_pre.local.patch b/patches/tree-2.0.2_pre.local.patch
deleted file mode 100644
index 09dccba9..00000000
--- a/patches/tree-2.0.2_pre.local.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-diff -ru tree-2.0.2.orig/Makefile tree-2.0.2/Makefile
---- tree-2.0.2.orig/Makefile	2022-02-16 22:45:43.000000000 +0100
-+++ tree-2.0.2/Makefile	2022-02-17 22:49:24.340545322 +0100
-@@ -26,15 +26,13 @@
- DESTDIR=${PREFIX}/bin
- MAN=tree.1
- # Probably needs to be ${PREFIX}/share/man for most systems now
--MANDIR=${PREFIX}/man
-+MANDIR=${DESTDIR}${PREFIX}/share/man
- OBJS=tree.o list.o hash.o color.o file.o filter.o info.o unix.o xml.o json.o html.o strverscmp.o
- 
- # Uncomment options below for your particular OS:
- 
- # Linux defaults:
- #CFLAGS=-ggdb -pedantic -Wall -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64
--CFLAGS=-O3 -pedantic -Wall -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64
--LDFLAGS=-s
- 
- # Uncomment for FreeBSD:
- #CC=cc
-@@ -105,7 +103,7 @@
- install: tree
- 	$(INSTALL) -d $(DESTDIR)
- 	$(INSTALL) -d $(MANDIR)/man1
--	$(INSTALL) $(TREE_DEST) $(DESTDIR)/$(TREE_DEST); \
-+	$(INSTALL) $(TREE_DEST) $(DESTDIR)${PREFIX}/bin/$(TREE_DEST); \
- 	$(INSTALL) -m 644 doc/$(MAN) $(MANDIR)/man1/$(MAN)
- 
- distclean:
diff --git a/patches/tree-2.1.1_pre.local.patch b/patches/tree-2.1.1_pre.local.patch
new file mode 100644
index 00000000..2c868850
--- /dev/null
+++ b/patches/tree-2.1.1_pre.local.patch
@@ -0,0 +1,21 @@
+diff -ru tree-2.0.4.orig/Makefile tree-2.0.4/Makefile
+--- tree-2.0.4.orig/Makefile	2022-09-06 15:31:53.000000000 +0200
++++ tree-2.0.4/Makefile	2022-09-10 22:06:29.081774574 +0200
+@@ -26,7 +26,7 @@
+ DESTDIR=${PREFIX}/bin
+ MAN=tree.1
+ # Probably needs to be ${PREFIX}/share/man for most systems now
+-MANDIR=${PREFIX}/man
++MANDIR=${DESTDIR}${PREFIX}/man
+ OBJS=tree.o list.o hash.o color.o file.o filter.o info.o unix.o xml.o json.o html.o strverscmp.o
+ 
+ # Uncomment options below for your particular OS:
+@@ -105,7 +105,7 @@
+ install: tree
+ 	$(INSTALL) -d $(DESTDIR)
+ 	$(INSTALL) -d $(MANDIR)/man1
+-	$(INSTALL) $(TREE_DEST) $(DESTDIR)/$(TREE_DEST); \
++	$(INSTALL) $(TREE_DEST) $(DESTDIR)/bin/$(TREE_DEST); \
+ 	$(INSTALL) -m 644 doc/$(MAN) $(MANDIR)/man1/$(MAN)
+ 
+ distclean:
diff --git a/patches/vim-8.2.5062.local.patch b/patches/vim-8.2.5062.local.patch
deleted file mode 100644
index f91e2645..00000000
--- a/patches/vim-8.2.5062.local.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -ru vim-8.2.4230.orig/src/libvterm/src/vterm_internal.h vim-8.2.4230/src/libvterm/src/vterm_internal.h
---- vim-8.2.4230.orig/src/libvterm/src/vterm_internal.h	2022-01-27 16:04:22.000000000 +0100
-+++ vim-8.2.4230/src/libvterm/src/vterm_internal.h	2022-01-27 17:07:13.522370456 +0100
-@@ -5,7 +5,7 @@
- 
- #include <stdarg.h>
- 
--#if defined(__GNUC__) && !defined(__MINGW32__)
-+#if defined(__GNUC__) && !defined(__MINGW32__) && !defined(__midipix__)
- # define INTERNAL __attribute__((visibility("internal")))
- # define UNUSED __attribute__((unused))
- #else
diff --git a/patches/vim-8.2.5062_pre.local.patch b/patches/vim-9.0.1927_pre.local.patch
index 5913b9f7..d3a4eca7 100644
--- a/patches/vim-8.2.5062_pre.local.patch
+++ b/patches/vim-9.0.1927_pre.local.patch
@@ -1,3 +1,15 @@
+diff -ru vim-8.2.4230.orig/src/libvterm/src/vterm_internal.h vim-8.2.4230/src/libvterm/src/vterm_internal.h
+--- vim-8.2.4230.orig/src/libvterm/src/vterm_internal.h 2022-01-27 16:04:22.000000000 +0100
++++ vim-8.2.4230/src/libvterm/src/vterm_internal.h  2022-01-27 17:07:13.522370456 +0100
+@@ -5,7 +5,7 @@
+
+ #include <stdarg.h>
+
+-#if defined(__GNUC__) && !defined(__MINGW32__)
++#if defined(__GNUC__) && !defined(__MINGW32__) && !defined(__midipix__)
+ # define INTERNAL __attribute__((visibility("internal")))
+ # define UNUSED __attribute__((unused))
+ #else
 diff -ru vim-8.2.4230.orig/src/auto/configure vim-8.2.4230/src/auto/configure
 --- vim-8.2.4230.orig/src/auto/configure	2022-01-27 16:04:22.000000000 +0100
 +++ vim-8.2.4230/src/auto/configure	2022-01-27 17:15:07.217234738 +0100
diff --git a/patches/vim/no-timers.patch b/patches/vim/no-timers.patch
new file mode 100644
index 00000000..b06c9b4b
--- /dev/null
+++ b/patches/vim/no-timers.patch
@@ -0,0 +1,19 @@
+diff -ru vim-9.0.1128.orig/src/feature.h vim-9.0.1128/src/feature.h
+--- vim-9.0.1128.orig/src/feature.h	2023-01-01 21:31:30.000000000 +0100
++++ vim-9.0.1128/src/feature.h	2023-01-02 11:59:16.584845483 +0100
+@@ -270,6 +270,7 @@
+ /*
+  * +reltime		reltime() function
+  */
++#ifndef __midipix__
+ #if defined(FEAT_NORMAL) \
+ 	&& defined(FEAT_EVAL) \
+ 	&& ((defined(HAVE_GETTIMEOFDAY) && defined(HAVE_SYS_TIME_H) \
+@@ -277,6 +278,7 @@
+ 		|| defined(MSWIN))
+ # define FEAT_RELTIME
+ #endif
++#endif
+ 
+ /*
+  * +timers		timer_start()
diff --git a/patches/vim_minipix b/patches/vim_minipix
new file mode 120000
index 00000000..7923f59d
--- /dev/null
+++ b/patches/vim_minipix
@@ -0,0 +1 @@
+vim
\ No newline at end of file
diff --git a/patches/vim_minipix-8.2.5062.local.patch b/patches/vim_minipix-8.2.5062.local.patch
deleted file mode 120000
index 3d9596c2..00000000
--- a/patches/vim_minipix-8.2.5062.local.patch
+++ /dev/null
@@ -1 +0,0 @@
-vim-8.2.5062.local.patch
\ No newline at end of file
diff --git a/patches/vim_minipix-8.2.5062_pre.local.patch b/patches/vim_minipix-8.2.5062_pre.local.patch
deleted file mode 120000
index 7676a047..00000000
--- a/patches/vim_minipix-8.2.5062_pre.local.patch
+++ /dev/null
@@ -1 +0,0 @@
-vim-8.2.5062_pre.local.patch
\ No newline at end of file
diff --git a/patches/vim_minipix-9.0.1927_pre.local.patch b/patches/vim_minipix-9.0.1927_pre.local.patch
new file mode 120000
index 00000000..e570e709
--- /dev/null
+++ b/patches/vim_minipix-9.0.1927_pre.local.patch
@@ -0,0 +1 @@
+vim-9.0.1927_pre.local.patch
\ No newline at end of file
diff --git a/patches/weechat-3.5_pre.local.patch b/patches/weechat-3.5_pre.local.patch
deleted file mode 100644
index 1144a869..00000000
--- a/patches/weechat-3.5_pre.local.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-diff -ru weechat-2.9.orig/configure.ac weechat-2.9/configure.ac
---- weechat-2.9.orig/configure.ac	2020-07-18 13:59:02.000000000 +0200
-+++ weechat-2.9/configure.ac	2020-10-06 22:27:28.776471083 +0200
-@@ -192,18 +192,6 @@
- fi
- 
- # ------------------------------------------------------------------------------
--#                                  pkg-config
--# ------------------------------------------------------------------------------
--
--PKGCONFIG=""
--AC_CHECK_PROGS(PKGCONFIG, pkg-config)
--if test "x$PKGCONFIG" = "x"; then
--    AC_MSG_ERROR([
--*** "pkg-config" couldn't be found on your system.
--*** Try to install it with your software package manager.])
--fi
--
--# ------------------------------------------------------------------------------
- #                                dynamic loader
- # ------------------------------------------------------------------------------
- 
-@@ -1049,8 +1037,8 @@
- *** or try to install it with your software package manager.])
- else
-     AC_MSG_RESULT(yes)
--    GCRYPT_CFLAGS=`libgcrypt-config --cflags`
--    GCRYPT_LFLAGS=`libgcrypt-config --libs`
-+    GCRYPT_CFLAGS=`$LIBGCRYPT_CONFIG --cflags`
-+    GCRYPT_LFLAGS=`$LIBGCRYPT_CONFIG --libs`
-     AC_SUBST(GCRYPT_CFLAGS)
-     AC_SUBST(GCRYPT_LFLAGS)
- fi
-@@ -1070,8 +1058,8 @@
- *** or try to install it with your software package manager.])
- else
-     AC_MSG_RESULT(yes)
--    GNUTLS_CFLAGS=`pkg-config gnutls --cflags`
--    GNUTLS_LFLAGS=`pkg-config gnutls --libs`
-+    GNUTLS_CFLAGS=`$PKGCONFIG gnutls --cflags`
-+    GNUTLS_LFLAGS=`$PKGCONFIG gnutls --libs`
-     AC_SUBST(GNUTLS_CFLAGS)
-     AC_SUBST(GNUTLS_LFLAGS)
- fi
-@@ -1160,8 +1148,8 @@
- *** or try to install it with your software package manager.])
- else
-     AC_MSG_RESULT(yes)
--    ZLIB_CFLAGS=`pkg-config zlib --cflags`
--    ZLIB_LFLAGS=`pkg-config zlib --libs`
-+    ZLIB_CFLAGS=`$PKGCONFIG zlib --cflags`
-+    ZLIB_LFLAGS=`$PKGCONFIG zlib --libs`
-     AC_SUBST(ZLIB_CFLAGS)
-     AC_SUBST(ZLIB_LFLAGS)
- fi
diff --git a/patches/weechat-3.5.local.patch b/patches/weechat-3.8.local.patch
index 4d41b8ad..4d41b8ad 100644
--- a/patches/weechat-3.5.local.patch
+++ b/patches/weechat-3.8.local.patch
diff --git a/patches/weechat-3.8_pre.local.patch b/patches/weechat-3.8_pre.local.patch
new file mode 100644
index 00000000..ebb73eed
--- /dev/null
+++ b/patches/weechat-3.8_pre.local.patch
@@ -0,0 +1,117 @@
+diff -ru weechat-3.8.orig/configure.ac weechat-3.8/configure.ac
+--- weechat-3.8.orig/configure.ac	2023-01-08 10:07:07.000000000 +0100
++++ weechat-3.8/configure.ac	2024-02-17 14:04:48.583831305 +0100
+@@ -184,18 +184,6 @@
+ fi
+ 
+ # ------------------------------------------------------------------------------
+-#                                  pkg-config
+-# ------------------------------------------------------------------------------
+-
+-PKGCONFIG=""
+-AC_CHECK_PROGS(PKGCONFIG, pkg-config)
+-if test "x$PKGCONFIG" = "x"; then
+-    AC_MSG_ERROR([
+-*** "pkg-config" couldn't be found on your system.
+-*** Try to install it with your software package manager.])
+-fi
+-
+-# ------------------------------------------------------------------------------
+ #                                dynamic loader
+ # ------------------------------------------------------------------------------
+ 
+@@ -231,7 +219,7 @@
+             NCURSES_LFLAGS="-lncurses"
+         fi
+     else
+-        NCURSES_LFLAGS="-lncursesw"
++        NCURSES_LFLAGS="-lncursesw -ltinfow"
+     fi
+     AC_CHECK_HEADERS([ncurses.h ncursesw/curses.h])
+     AC_SUBST(NCURSES_LFLAGS)
+@@ -409,52 +397,6 @@
+ 
+ # ---------------------------------- perl --------------------------------------
+ 
+-PERL_VERSION=
+-
+-if test "x$enable_perl" = "xyes" ; then
+-    AC_PATH_PROGS(PERL, perl perl5)
+-    if test -z $PERL ; then
+-        AC_MSG_WARN([
+-*** Perl must be installed on your system but perl interpreter couldn't be found in path.
+-*** Please check that perl is in path, or install it with your software package manager.
+-*** WeeChat will be built without Perl support.])
+-        enable_perl="no"
+-        not_found="$not_found perl"
+-    else
+-        PERL_VERSION=`perl -V:version | sed "s/version='\(.*\)';/\1/"`
+-        AC_MSG_CHECKING(for Perl headers files)
+-
+-        PERL_HEADER_TEST=`PT=perltest.c ; echo "#include <EXTERN.h>" > $PT;  echo "#include <perl.h>" >> $PT;  echo "#include <XSUB.h>" >> $PT ;  echo "int main() { return 0; }" >> $PT ; $CC -Wall $PT -o $PT.out $($PERL -MExtUtils::Embed -e ccopts -e ldopts) 1>/dev/null 2>&1; echo $?; rm -f $PT $PT.out 1>/dev/null 2>&1`
+-
+-        if test "x$PERL_HEADER_TEST" = "x0" ; then
+-            PERL_CFLAGS=`$PERL -MExtUtils::Embed -e ccopts`
+-            AC_MSG_RESULT(found)
+-            AC_MSG_CHECKING(for Perl library)
+-            PERL_LIB_TEST=`PT=perltest.c ; echo "int main() { return 0; }" > $PT ; $CC -Wall $PT -o $PT.out $($PERL -MExtUtils::Embed -e ldopts) 1>/dev/null 2>&1; echo $?; rm -f $PT $PT.out 1>/dev/null 2>&1`
+-            if test "x$PERL_LIB_TEST" = "x0" ; then
+-                PERL_LFLAGS=`$PERL -MExtUtils::Embed -e ldopts`
+-                AC_MSG_RESULT(found)
+-            else
+-                AC_MSG_WARN([
+-*** Perl library couldn't be found on your system.
+-*** Try to install it with your software package manager.
+-*** WeeChat will be built without Perl support.])
+-                enable_perl="no"
+-                not_found="$not_found perl"
+-            fi
+-        else
+-            AC_MSG_WARN([
+-*** Perl headers couldn't be found on your system.
+-*** Try to install it with your software package manager.
+-*** WeeChat will be built without Perl support.])
+-            enable_perl="no"
+-            not_found="$not_found perl"
+-        fi
+-    fi
+-else
+-    not_asked="$not_asked perl"
+-fi
+-
+ if test "x$enable_perl" = "xyes" ; then
+     AC_SUBST(PERL_CFLAGS)
+     AC_SUBST(PERL_LFLAGS)
+@@ -1053,8 +995,8 @@
+ *** or try to install it with your software package manager.])
+ else
+     AC_MSG_RESULT(yes)
+-    GCRYPT_CFLAGS=`libgcrypt-config --cflags`
+-    GCRYPT_LFLAGS=`libgcrypt-config --libs`
++    GCRYPT_CFLAGS=`$LIBGCRYPT_CONFIG --cflags`
++    GCRYPT_LFLAGS=`$LIBGCRYPT_CONFIG --libs`
+     AC_SUBST(GCRYPT_CFLAGS)
+     AC_SUBST(GCRYPT_LFLAGS)
+ fi
+@@ -1074,8 +1016,8 @@
+ *** or try to install it with your software package manager.])
+ else
+     AC_MSG_RESULT(yes)
+-    GNUTLS_CFLAGS=`pkg-config gnutls --cflags`
+-    GNUTLS_LFLAGS=`pkg-config gnutls --libs`
++    GNUTLS_CFLAGS=`$PKGCONFIG gnutls --cflags`
++    GNUTLS_LFLAGS=`$PKGCONFIG gnutls --libs`
+     AC_SUBST(GNUTLS_CFLAGS)
+     AC_SUBST(GNUTLS_LFLAGS)
+ fi
+@@ -1164,8 +1106,8 @@
+ *** or try to install it with your software package manager.])
+ else
+     AC_MSG_RESULT(yes)
+-    ZLIB_CFLAGS=`pkg-config zlib --cflags`
+-    ZLIB_LFLAGS=`pkg-config zlib --libs`
++    ZLIB_CFLAGS=`$PKGCONFIG zlib --cflags`
++    ZLIB_LFLAGS=`$PKGCONFIG zlib --libs`
+     AC_SUBST(ZLIB_CFLAGS)
+     AC_SUBST(ZLIB_LFLAGS)
+ fi
diff --git a/patches/wget-1.24.5.local.patch b/patches/wget-1.24.5.local.patch
new file mode 100644
index 00000000..0fb393c4
--- /dev/null
+++ b/patches/wget-1.24.5.local.patch
@@ -0,0 +1,12 @@
+diff -ru wget-1.21.4.orig/src/ptimer.c wget-1.21.4/src/ptimer.c
+--- wget-1.21.4.orig/src/ptimer.c	2023-05-11 00:18:48.000000000 +0200
++++ wget-1.21.4/src/ptimer.c	2024-03-05 20:15:46.700140687 +0100
+@@ -80,8 +80,6 @@
+ 
+ #if defined(WINDOWS) || defined(__CYGWIN__)
+ # define PTIMER_WINDOWS         /* use Windows timers */
+-#elif _POSIX_TIMERS - 0 > 0
+-# define PTIMER_POSIX           /* use POSIX timers (clock_gettime) */
+ #else
+ # define PTIMER_GETTIMEOFDAY    /* use gettimeofday */
+ #endif
diff --git a/patches/wget2-2.0.0_pre.local.patch b/patches/wget2-2.0.0_pre.local.patch
deleted file mode 100644
index 0b67c8b1..00000000
--- a/patches/wget2-2.0.0_pre.local.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-diff -ru wget2-2.0.0.orig/libwget/Makefile.in wget2-2.0.0/libwget/Makefile.in
---- wget2-2.0.0.orig/libwget/Makefile.in	2021-09-12 13:37:52.000000000 +0200
-+++ wget2-2.0.0/libwget/Makefile.in	2021-09-27 01:45:33.013896090 +0200
-@@ -2527,95 +2527,95 @@
- @ENABLE_MANYLIBS_TRUE@libwget_alloc_la_SOURCES = xalloc.c
- @ENABLE_MANYLIBS_TRUE@libwget_alloc_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_alloc_la_LIBADD = ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_alloc_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_alloc_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_ip_la_SOURCES = ip.c
- @ENABLE_MANYLIBS_TRUE@libwget_ip_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_ip_la_LIBADD = $(INET_PTON_LIB) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_ip_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_ip_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_common_la_SOURCES = buffer.c buffer_printf.c base64.c bitmap.c hashmap.c list.c log.c mem.c printf.c stringmap.c strlcpy.c strscpy.c utils.c vector.c error.c
- @ENABLE_MANYLIBS_TRUE@libwget_common_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_common_la_LIBADD = libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_common_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_common_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_thread_la_SOURCES = thread.c
- @ENABLE_MANYLIBS_TRUE@libwget_thread_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_thread_la_LIBADD = libwget_alloc.la $(LIB_CLOCK_GETTIME) $(LTLIBMULTITHREAD) $(LTLIBTHREAD) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_thread_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_thread_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_encoding_la_SOURCES = encoding.c
- @ENABLE_MANYLIBS_TRUE@libwget_encoding_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_encoding_la_LIBADD = libwget_common.la libwget_alloc.la $(LIBIDN_LIBS) $(LIBIDN2_LIBS) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_encoding_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_encoding_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_iri_la_SOURCES = iri.c
- @ENABLE_MANYLIBS_TRUE@libwget_iri_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_iri_la_LIBADD = libwget_encoding.la libwget_ip.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_iri_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_iri_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_io_la_SOURCES = io.c
- @ENABLE_MANYLIBS_TRUE@libwget_io_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_io_la_LIBADD = libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_io_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_io_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_hashfile_la_SOURCES = hashfile.c
- @ENABLE_MANYLIBS_TRUE@libwget_hashfile_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_hashfile_la_LIBADD = libwget_common.la libwget_alloc.la $(GNUTLS_LIBS) $(WOLFSSL_LIBS) $(OPENSSL_LIBS) $(NETTLE_LIBS) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_hashfile_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_hashfile_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_hpkp_db_la_SOURCES = hpkp_db.c hpkp.c hpkp.h
- @ENABLE_MANYLIBS_TRUE@libwget_hpkp_db_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_hpkp_db_la_LIBADD = libwget_hashfile.la libwget_io.la libwget_thread.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_hpkp_db_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_hpkp_db_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_hsts_la_SOURCES = hsts.c
- @ENABLE_MANYLIBS_TRUE@libwget_hsts_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_hsts_la_LIBADD = libwget_io.la libwget_thread.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_hsts_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_hsts_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_ocsp_la_SOURCES = ocsp.c
- @ENABLE_MANYLIBS_TRUE@libwget_ocsp_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_ocsp_la_LIBADD = libwget_io.la libwget_thread.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_ocsp_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_ocsp_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_tls_session_la_SOURCES = tls_session.c
- @ENABLE_MANYLIBS_TRUE@libwget_tls_session_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_tls_session_la_LIBADD = libwget_io.la libwget_thread.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_tls_session_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_tls_session_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_http_parse_la_SOURCES = http_parse.c cookie_parse.c cookie.h hpkp.c cookie.h
- @ENABLE_MANYLIBS_TRUE@libwget_http_parse_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_http_parse_la_LIBADD = libwget_encoding.la libwget_common.la libwget_alloc.la $(LIBPSL_LIBS) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_http_parse_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_http_parse_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_logger_la_SOURCES = logger.c
- @ENABLE_MANYLIBS_TRUE@libwget_logger_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_logger_la_LIBADD = libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_logger_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_logger_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_dnscache_la_SOURCES = dns_cache.c
- @ENABLE_MANYLIBS_TRUE@libwget_dnscache_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_dnscache_la_LIBADD = libwget_thread.la libwget_common.la libwget_alloc.la $(GETADDRINFO_LIB) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_dnscache_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_dnscache_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_dns_la_SOURCES = dns.c
- @ENABLE_MANYLIBS_TRUE@libwget_dns_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_dns_la_LIBADD = libwget_dnscache.la libwget_ip.la libwget_logger.la libwget_thread.la libwget_common.la libwget_alloc.la $(GETADDRINFO_LIB) ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_dns_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_dns_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_robots_la_SOURCES = robots.c
- @ENABLE_MANYLIBS_TRUE@libwget_robots_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_robots_la_LIBADD = libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_robots_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_robots_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_xml_la_SOURCES = xml.c
- @ENABLE_MANYLIBS_TRUE@libwget_xml_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_xml_la_LIBADD = libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_xml_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_xml_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_metalink_la_SOURCES = metalink.c
- @ENABLE_MANYLIBS_TRUE@libwget_metalink_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_metalink_la_LIBADD = libwget_xml.la libwget_iri.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_metalink_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_metalink_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_netrc_la_SOURCES = netrc.c
- @ENABLE_MANYLIBS_TRUE@libwget_netrc_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_netrc_la_LIBADD = libwget_io.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_netrc_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_netrc_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_decompress_la_SOURCES = decompressor.c
- @ENABLE_MANYLIBS_TRUE@libwget_decompress_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_decompress_la_LIBADD = libwget_common.la libwget_alloc.la ../lib/libgnu.la $(ZSTD_LIBS) $(BROTLIDEC_LIBS) $(LZMA_LIBS) $(ZLIB_LIBS) $(BZ2_LIBS) $(LZIP_LIBS)
--@ENABLE_MANYLIBS_TRUE@libwget_decompress_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_decompress_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_css_la_SOURCES = css_url.c css.c css_tokenizer.h
- @ENABLE_MANYLIBS_TRUE@libwget_css_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_css_la_LIBADD = libcsstokenizer.la libwget_iri.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_css_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_css_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_progress_la_SOURCES = bar.c
- @ENABLE_MANYLIBS_TRUE@libwget_progress_la_CPPFLAGS = $(libwget_la_CPPFLAGS)
- @ENABLE_MANYLIBS_TRUE@libwget_progress_la_LIBADD = libwget_thread.la libwget_common.la libwget_alloc.la ../lib/libgnu.la
--@ENABLE_MANYLIBS_TRUE@libwget_progress_la_LDFLAGS = $(libwget_la_LDFLAGS) -no-whole-archive
-+@ENABLE_MANYLIBS_TRUE@libwget_progress_la_LDFLAGS = $(libwget_la_LDFLAGS)
- @ENABLE_MANYLIBS_TRUE@test_linking_common_SOURCES = test_linking_common.c
- @ENABLE_MANYLIBS_TRUE@test_linking_common_CPPFLAGS = -I$(top_srcdir)/include/wget -I$(top_builddir)/include/wget
- @ENABLE_MANYLIBS_TRUE@test_linking_common_LDADD = libwget_common.la
diff --git a/patches/wget2-2.0.1.local.patch b/patches/wget2-2.0.1.local.patch
new file mode 100644
index 00000000..c4ecc7d4
--- /dev/null
+++ b/patches/wget2-2.0.1.local.patch
@@ -0,0 +1,31 @@
+diff -ru wget2-2.0.1.orig/libwget/net.c wget2-2.0.1/libwget/net.c
+--- wget2-2.0.1.orig/libwget/net.c	2022-12-21 13:17:32.426227872 +0100
++++ wget2-2.0.1/libwget/net.c	2022-12-21 13:16:45.802227589 +0100
+@@ -52,6 +52,7 @@
+ # include <fcntl.h>
+ #endif
+ 
++#if 0
+ #if defined __APPLE__ && defined __MACH__ && defined CONNECT_DATA_IDEMPOTENT && defined CONNECT_RESUME_ON_READ_WRITE
+ # define TCP_FASTOPEN_OSX
+ #elif defined TCP_FASTOPEN_CONNECT // since Linux 4.11
+@@ -59,6 +60,7 @@
+ #elif defined TCP_FASTOPEN && defined MSG_FASTOPEN
+ # define TCP_FASTOPEN_LINUX
+ #endif
++#endif
+ 
+ #include <wget.h>
+ #include "private.h"
+@@ -608,9 +610,11 @@
+ 	if (setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void *)&on, sizeof(on)) == -1)
+ 		error_printf(_("Failed to set socket option REUSEADDR\n"));
+ 
++#ifndef __midipix__
+ 	on = 1;
+ 	if (setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (void *)&on, sizeof(on)) == -1)
+ 		error_printf(_("Failed to set socket option NODELAY\n"));
++#endif
+ 
+ #ifdef SO_BINDTODEVICE
+ 	if (tcp->bind_interface) {
diff --git a/patches/wget_minipix-1.24.5.local.patch b/patches/wget_minipix-1.24.5.local.patch
new file mode 120000
index 00000000..23954a74
--- /dev/null
+++ b/patches/wget_minipix-1.24.5.local.patch
@@ -0,0 +1 @@
+wget-1.24.5.local.patch
\ No newline at end of file
diff --git a/patches/whois-5.5.13.local.patch b/patches/whois-5.5.22.local.patch
index 432f7fac..6fb35b17 100644
--- a/patches/whois-5.5.13.local.patch
+++ b/patches/whois-5.5.22.local.patch
@@ -11,11 +11,11 @@
 -whois_LDADD += $(shell $(PKG_CONFIG) --libs libidn)
 -DEFS += -DHAVE_LIBIDN $(shell $(PKG_CONFIG) --cflags libidn)
 +ifeq ($(shell ${PKG_CONFIG} --exists 'libidn2 >= 2.0.3' || echo NO),)
-+whois_LDADD += $(shell ${PKG_CONFIG} --libs libidn2)
-+DEFS += -DHAVE_LIBIDN2 $(shell ${PKG_CONFIG} --cflags libidn2)
++whois_LDADD += $(shell ${PKG_CONFIG} --libs-only-l libidn2)
++DEFS += -DHAVE_LIBIDN2 $(shell ${PKG_CONFIG} --cflags-only-other libidn2)
 +else ifeq ($(shell ${PKG_CONFIG} --exists 'libidn' || echo NO),)
-+whois_LDADD += $(shell ${PKG_CONFIG} --libs libidn)
-+DEFS += -DHAVE_LIBIDN $(shell ${PKG_CONFIG} --cflags libidn)
++whois_LDADD += $(shell ${PKG_CONFIG} --libs-only-l libidn)
++DEFS += -DHAVE_LIBIDN $(shell ${PKG_CONFIG} --cflags-only-other libidn)
  endif
  
  ifdef HAVE_ICONV
@@ -32,28 +32,8 @@
  	nice afl-fuzz -i ../afl_in -o ../afl_out -- ./whois
  
  ##############################################################################
--install: install-whois install-mkpasswd install-pos
-+install: install-whois install-mkpasswd
+-install: install-whois install-mkpasswd install-pos install-bashcomp
++install: install-whois install-mkpasswd install-bashcomp
  
  install-whois: whois
  	$(INSTALL) -d $(BASEDIR)$(prefix)/bin/
-@@ -137,9 +137,6 @@
- 	$(INSTALL) -m 0755 mkpasswd $(BASEDIR)$(prefix)/bin/
- 	$(INSTALL) -m 0644 mkpasswd.1 $(BASEDIR)$(prefix)/share/man/man1/
- 
--install-pos:
--	cd po && $(MAKE) install
--
- distclean: clean
- 	rm -f po/whois.pot
- 
-@@ -148,9 +145,6 @@
- 		new_gtlds.h tld_serv.h servers_charset.h *.o whois mkpasswd
- 	rm -f po/*.mo
- 
--pos:
--	cd po && $(MAKE)
--
- depend: Makefile.depend
- Makefile.depend:
- 	$(CC) $(CPPFLAGS) $(CFLAGS) -MM -MG *.c > $@
diff --git a/patches/xcb-1.12.local.patch b/patches/xcb-1.12.local.patch
deleted file mode 100644
index bbac9a96..00000000
--- a/patches/xcb-1.12.local.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 8740a288ca468433141341347aa115b9544891d3 Mon Sep 17 00:00:00 2001
-From: Thomas Klausner <wiz@NetBSD.org>
-Date: Thu, 19 May 2016 17:31:18 +0200
-Subject: Fix inconsistent use of tabs vs. space.
-
-Needed for at least python-3.5.x.
-
-Signed-off-by: Thomas Klausner <wiz@NetBSD.org>
-Signed-off-by: Uli Schlachter <psychon@znc.in>
-
-diff --git a/src/c_client.py b/src/c_client.py
-index 57de3fb..043338d 100644
---- a/src/c_client.py
-+++ b/src/c_client.py
-@@ -1364,7 +1364,7 @@ def _c_serialize(context, self):
-             _c('    unsigned int xcb_align_to = 0;')
-         if self.is_switch:
-             _c('    unsigned int xcb_padding_offset = %d;',
--	       self.get_align_offset() )
-+               self.get_align_offset() )
-         prefix = [('_aux', '->', self)]
-         aux_ptr = 'xcb_out'
- 
-@@ -1390,7 +1390,7 @@ def _c_serialize(context, self):
-         _c('    unsigned int xcb_align_to = 0;')
-         if self.is_switch:
-             _c('    unsigned int xcb_padding_offset = %d;',
--	       self.get_align_offset() )
-+               self.get_align_offset() )
- 
-     elif 'sizeof' == context:
-         param_names = [p[2] for p in params]
-@@ -1930,14 +1930,14 @@ def _c_accessors_list(self, field):
-                     # from the request size and divide that by the member size
-                     return '(((R->length * 4) - sizeof('+ self.c_type + '))/'+'sizeof('+field.type.member.c_wiretype+'))'
-                 else:
--		    # use the accessor to get the start of the list, then
--		    # compute the length of it by subtracting it from
-+                    # use the accessor to get the start of the list, then
-+                    # compute the length of it by subtracting it from
-                     # the adress of the first byte after the end of the
-                     # request
--		    after_end_of_request = '(((char*)R) + R->length * 4)'
--		    start_of_list = '%s(R)' % (field.c_accessor_name)
-+                    after_end_of_request = '(((char*)R) + R->length * 4)'
-+                    start_of_list = '%s(R)' % (field.c_accessor_name)
-                     bytesize_of_list = '%s - (char*)(%s)' % (after_end_of_request, start_of_list)
--		    return '(%s) / sizeof(%s)' % (bytesize_of_list, field.type.member.c_wiretype)
-+                    return '(%s) / sizeof(%s)' % (bytesize_of_list, field.type.member.c_wiretype)
-             else:
-                 raise Exception(
-                     "lengthless lists with varsized members are not supported. Fieldname '%s'"
--- 
-cgit v0.10.2
-
diff --git a/patches/xcb-1.16.1_pre.local.patch b/patches/xcb-1.16.1_pre.local.patch
new file mode 100644
index 00000000..2f66288d
--- /dev/null
+++ b/patches/xcb-1.16.1_pre.local.patch
@@ -0,0 +1,19 @@
+diff -ru libxcb-1.16.1.orig/configure libxcb-1.16.1/configure
+--- libxcb-1.16.1.orig/configure	2024-03-02 20:38:27.000000000 +0100
++++ libxcb-1.16.1/configure	2024-04-14 20:26:41.346651860 +0200
+@@ -21716,7 +21716,6 @@
+ # Find the xcb-proto protocol descriptions
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking XCBPROTO_XCBINCLUDEDIR" >&5
+ printf %s "checking XCBPROTO_XCBINCLUDEDIR... " >&6; }
+-XCBPROTO_XCBINCLUDEDIR=`$PKG_CONFIG --variable=xcbincludedir xcb-proto`
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $XCBPROTO_XCBINCLUDEDIR" >&5
+ printf "%s\n" "$XCBPROTO_XCBINCLUDEDIR" >&6; }
+ 
+@@ -21728,7 +21727,6 @@
+ # Find the xcbgen Python package
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking XCBPROTO_XCBPYTHONDIR" >&5
+ printf %s "checking XCBPROTO_XCBPYTHONDIR... " >&6; }
+-XCBPROTO_XCBPYTHONDIR=`$PKG_CONFIG --variable=pythondir xcb-proto`
+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $XCBPROTO_XCBPYTHONDIR" >&5
+ printf "%s\n" "$XCBPROTO_XCBPYTHONDIR" >&6; }
+ 
diff --git a/patches/xcb_proto-1.12.local.patch b/patches/xcb_proto-1.12.local.patch
deleted file mode 100644
index 9930c12b..00000000
--- a/patches/xcb_proto-1.12.local.patch
+++ /dev/null
@@ -1,276 +0,0 @@
-From ea7a3ac6c658164690e0febb55f4467cb9e0bcac Mon Sep 17 00:00:00 2001
-From: Thomas Klausner <wiz@NetBSD.org>
-Date: Thu, 19 May 2016 17:30:04 +0200
-Subject: Make whitespace use consistent.
-
-At least python-3.5.x complains about this forcefully.
-
-Signed-off-by: Thomas Klausner <wiz@NetBSD.org>
-Signed-off-by: Uli Schlachter <psychon@znc.in>
-
-diff --git a/xcbgen/align.py b/xcbgen/align.py
-index 5e31838..d4c12ee 100644
---- a/xcbgen/align.py
-+++ b/xcbgen/align.py
-@@ -16,12 +16,12 @@ class Alignment(object):
-         return self.align == other.align and self.offset == other.offset
- 
-     def __str__(self):
--	return "(align=%d, offset=%d)" % (self.align, self.offset)
-+        return "(align=%d, offset=%d)" % (self.align, self.offset)
- 
-     @staticmethod
-     def for_primitive_type(size):
--	# compute the required start_alignment based on the size of the type
--	if size % 8 == 0:
-+        # compute the required start_alignment based on the size of the type
-+        if size % 8 == 0:
-             # do 8-byte primitives require 8-byte alignment in X11?
-             return Alignment(8,0)
-         elif size % 4 == 0:
-@@ -33,7 +33,7 @@ class Alignment(object):
- 
- 
-     def align_after_fixed_size(self, size):
--	new_offset = (self.offset + size) % self.align
-+        new_offset = (self.offset + size) % self.align
-         return Alignment(self.align, new_offset)
- 
- 
-@@ -41,7 +41,7 @@ class Alignment(object):
-         '''
-         Assuming the given external_align, checks whether
-         self is fulfilled for all cases.
--	Returns True if yes, False otherwise.
-+        Returns True if yes, False otherwise.
-         '''
-         if self.align == 1 and self.offset == 0:
-             # alignment 1 with offset 0 is always fulfilled
-@@ -55,9 +55,9 @@ class Alignment(object):
-             # the external align guarantees less alignment -> not guaranteed
-             return False
- 
--	if external_align.align % self.align != 0:
-+        if external_align.align % self.align != 0:
-             # the external align cannot be divided by our align
--	    # -> not guaranteed
-+            # -> not guaranteed
-             # (this can only happen if there are alignments that are not
-             # a power of 2, which is highly discouraged. But better be
-             # safe and check for it)
-@@ -72,7 +72,7 @@ class Alignment(object):
- 
-     def combine_with(self, other):
-         # returns the alignment that is guaranteed when
--	# both, self or other, can happen
-+        # both, self or other, can happen
-         new_align = gcd(self.align, other.align)
-         new_offset_candidate1 = self.offset % new_align
-         new_offset_candidate2 = other.offset % new_align
-@@ -83,8 +83,8 @@ class Alignment(object):
-             new_align = gcd(new_align, offset_diff)
-             new_offset_candidate1 = self.offset % new_align
-             new_offset_candidate2 = other.offset % new_align
--	    assert new_offset_candidate1 == new_offset_candidate2
--	    new_offset = new_offset_candidate1
-+            assert new_offset_candidate1 == new_offset_candidate2
-+            new_offset = new_offset_candidate1
-         # return the result
-         return Alignment(new_align, new_offset)
- 
-@@ -92,44 +92,44 @@ class Alignment(object):
- class AlignmentLog(object):
- 
-     def __init__(self):
--	self.ok_list = []
--	self.fail_list = []
--	self.verbosity = 1
-+        self.ok_list = []
-+        self.fail_list = []
-+        self.verbosity = 1
- 
-     def __str__(self):
--	result = ""
-+        result = ""
- 
--	# output the OK-list
--	for (align_before, field_name, type_obj, callstack, align_after) in self.ok_list:
--	    stacksize = len(callstack)
-+        # output the OK-list
-+        for (align_before, field_name, type_obj, callstack, align_after) in self.ok_list:
-+            stacksize = len(callstack)
-             indent = '  ' * stacksize
--	    if self.ok_callstack_is_relevant(callstack):
-+            if self.ok_callstack_is_relevant(callstack):
-                 if field_name is None or field_name == "":
--	            result += ("    %sok: %s:\n\t%sbefore: %s, after: %s\n"
--		        % (indent, str(type_obj), indent, str(align_before), str(align_after)))
--	        else:
--		    result += ("    %sok: field \"%s\" in %s:\n\t%sbefore: %s, after: %s\n"
--		        % (indent, str(field_name), str(type_obj),
--		           indent, str(align_before), str(align_after)))
-+                    result += ("    %sok: %s:\n\t%sbefore: %s, after: %s\n"
-+                        % (indent, str(type_obj), indent, str(align_before), str(align_after)))
-+                else:
-+                    result += ("    %sok: field \"%s\" in %s:\n\t%sbefore: %s, after: %s\n"
-+                        % (indent, str(field_name), str(type_obj),
-+                           indent, str(align_before), str(align_after)))
-                 if self.verbosity >= 1:
--		    result += self.callstack_to_str(indent, callstack)
-+                    result += self.callstack_to_str(indent, callstack)
- 
--	# output the fail-list
--	for (align_before, field_name, type_obj, callstack, reason) in self.fail_list:
--	    stacksize = len(callstack)
-+        # output the fail-list
-+        for (align_before, field_name, type_obj, callstack, reason) in self.fail_list:
-+            stacksize = len(callstack)
-             indent = '  ' * stacksize
--	    if field_name is None or field_name == "":
--	        result += ("    %sfail: align %s is incompatible with\n\t%s%s\n\t%sReason: %s\n"
--		    % (indent, str(align_before), indent, str(type_obj), indent, reason))
--	    else:
--		result += ("    %sfail: align %s is incompatible with\n\t%sfield \"%s\" in %s\n\t%sReason: %s\n"
--		    % (indent, str(align_before), indent, str(field_name), str(type_obj), indent, reason))
-+            if field_name is None or field_name == "":
-+                result += ("    %sfail: align %s is incompatible with\n\t%s%s\n\t%sReason: %s\n"
-+                    % (indent, str(align_before), indent, str(type_obj), indent, reason))
-+            else:
-+                result += ("    %sfail: align %s is incompatible with\n\t%sfield \"%s\" in %s\n\t%sReason: %s\n"
-+                    % (indent, str(align_before), indent, str(field_name), str(type_obj), indent, reason))
- 
-             if self.verbosity >= 1:
--	        result += self.callstack_to_str(indent, callstack)
-+                result += self.callstack_to_str(indent, callstack)
- 
- 
--	return result
-+        return result
- 
- 
-     def callstack_to_str(self, indent, callstack):
-@@ -137,41 +137,41 @@ class AlignmentLog(object):
-         for stack_elem in callstack:
-             result += "\t  %s%s\n" % (indent, str(stack_elem))
-         result += "\t%s]\n" % indent
--	return result
-+        return result
- 
- 
-     def ok_callstack_is_relevant(self, ok_callstack):
-         # determine whether an ok callstack is relevant for logging
--	if self.verbosity >= 2:
--	    return True
-+        if self.verbosity >= 2:
-+            return True
- 
-         # empty callstacks are always relevant
--	if len(ok_callstack) == 0:
-+        if len(ok_callstack) == 0:
-             return True
- 
--	# check whether the ok_callstack is a subset or equal to a fail_callstack
-+        # check whether the ok_callstack is a subset or equal to a fail_callstack
-         for (align_before, field_name, type_obj, fail_callstack, reason) in self.fail_list:
-             if len(ok_callstack) <= len(fail_callstack):
-                 zipped = zip(ok_callstack, fail_callstack[:len(ok_callstack)])
--		is_subset = all([i == j for i, j in zipped])
--		if is_subset:
-+                is_subset = all([i == j for i, j in zipped])
-+                if is_subset:
-                     return True
- 
-         return False
- 
- 
-     def ok(self, align_before, field_name, type_obj, callstack, align_after):
--	self.ok_list.append((align_before, field_name, type_obj, callstack, align_after))
-+        self.ok_list.append((align_before, field_name, type_obj, callstack, align_after))
- 
-     def fail(self, align_before, field_name, type_obj, callstack, reason):
--	self.fail_list.append((align_before, field_name, type_obj, callstack, reason))
-+        self.fail_list.append((align_before, field_name, type_obj, callstack, reason))
- 
-     def append(self, other):
--	self.ok_list.extend(other.ok_list)
--	self.fail_list.extend(other.fail_list)
-+        self.ok_list.extend(other.ok_list)
-+        self.fail_list.extend(other.fail_list)
- 
-     def ok_count(self):
--	return len(self.ok_list)
-+        return len(self.ok_list)
- 
- 
- 
--- 
-cgit v0.10.2
-
-From bea5e1c85bdc0950913790364e18228f20395a3d Mon Sep 17 00:00:00 2001
-From: Thomas Klausner <wiz@NetBSD.org>
-Date: Thu, 19 May 2016 17:30:05 +0200
-Subject: print() is a function and needs parentheses.
-
-Fixes build with python-3.x.
-
-Signed-off-by: Thomas Klausner <wiz@NetBSD.org>
-Signed-off-by: Uli Schlachter <psychon@znc.in>
-
-diff --git a/xcbgen/xtypes.py b/xcbgen/xtypes.py
-index c3b5758..b83b119 100644
---- a/xcbgen/xtypes.py
-+++ b/xcbgen/xtypes.py
-@@ -501,7 +501,7 @@ class ComplexType(Type):
-                 int(required_start_align_element.get('align', "4"), 0),
-                 int(required_start_align_element.get('offset', "0"), 0))
-             if verbose_align_log:
--                print "Explicit start-align for %s: %s\n" % (self, self.required_start_align)
-+                print ("Explicit start-align for %s: %s\n" % (self, self.required_start_align))
- 
-     def resolve(self, module):
-         if self.resolved:
-@@ -592,7 +592,7 @@ class ComplexType(Type):
-                 if verbose_align_log:
-                     print ("calc_required_start_align: %s has start-align %s"
-                         % (str(self), str(self.required_start_align)))
--                    print "Details:\n" + str(log)
-+                    print ("Details:\n" + str(log))
-                 if self.required_start_align.offset != 0:
-                     print (("WARNING: %s\n\thas start-align with non-zero offset: %s"
-                         + "\n\tsuggest to add explicit definition with:"
-@@ -619,12 +619,12 @@ class ComplexType(Type):
-             for offset in range(0,align):
-                 align_candidate = Alignment(align, offset)
-                 if verbose_align_log:
--                    print "trying %s for %s" % (str(align_candidate), str(self))
-+                    print ("trying %s for %s" % (str(align_candidate), str(self)))
-                 my_log = AlignmentLog()
-                 if self.is_possible_start_align(align_candidate, callstack, my_log):
-                     log.append(my_log)
-                     if verbose_align_log:
--                        print "found start-align %s for %s" % (str(align_candidate), str(self))
-+                        print ("found start-align %s for %s" % (str(align_candidate), str(self)))
-                     return align_candidate
-                 else:
-                     my_ok_count = my_log.ok_count()
-@@ -641,7 +641,7 @@ class ComplexType(Type):
-         # none of the candidates applies
-         # this type has illegal internal aligns for all possible start_aligns
-         if verbose_align_log:
--            print "didn't find start-align for %s" % str(self)
-+            print ("didn't find start-align for %s" % str(self))
-         log.append(best_log)
-         return None
- 
-@@ -900,7 +900,7 @@ class SwitchType(ComplexType):
-     # aux function for unchecked_get_alignment_after
-     def get_align_for_selected_case_field(self, case_field, start_align, callstack, log):
-         if verbose_align_log:
--            print "get_align_for_selected_case_field: %s, case_field = %s" % (str(self), str(case_field))
-+            print ("get_align_for_selected_case_field: %s, case_field = %s" % (str(self), str(case_field)))
-         total_align = start_align
-         for field in self.bitcases:
-             my_callstack = callstack[:]
--- 
-cgit v0.10.2
-
diff --git a/patches/xorgproto-2018.4.local.patch b/patches/xorgproto-2018.4.local.patch
deleted file mode 100644
index 37300c6b..00000000
--- a/patches/xorgproto-2018.4.local.patch
+++ /dev/null
@@ -1,439 +0,0 @@
-diff -ru xorgproto-2018.4.orig/include/X11/Xwindows.h xorgproto-2018.4/include/X11/Xwindows.h
---- xorgproto-2018.4.orig/include/X11/Xwindows.h        2018-02-28 17:45:07.000000000 +0100
-+++ xorgproto-2018.4/include/X11/Xwindows.h     2018-08-25 23:36:53.266741018 +0200
-@@ -98,10 +98,6 @@
- # define RT_CURSOR       ((RESTYPE)5)
- #endif
-
--#ifndef __CYGWIN__
--#define sleep(x) Sleep((x) * 1000)
--#endif
--
- #if defined(WIN32) && (!defined(PATH_MAX) || PATH_MAX < 1024)
- # undef PATH_MAX
- # define PATH_MAX 1024
-diff -Nru xorgproto-2018.4.orig/man/Xprint.man xorgproto-2018.4/man/Xprint.man
---- xorgproto-2018.4.orig/man/Xprint.man	1970-01-01 01:00:00.000000000 +0100
-+++ xorgproto-2018.4/man/Xprint.man	2018-07-29 01:06:04.000000000 +0200
-@@ -0,0 +1,421 @@
-+.\" -*- coding: us-ascii -*-
-+.TH Xprint __miscmansuffix__ "8 October 2004"
-+.SH NAME
-+Xprint \- The "X print service" - a portable, network-transparent printing system based on the X11 protocol
-+.SH SYNOPSIS
-+Xprint is a very flexible, extensible, scaleable, client/server
-+print system based on ISO 10175 (and some other specs) and the X11
-+rendering protocol.
-+Using Xprint an application can search, query and use devices like
-+printers, FAX machines or create documents in formats like PDF.
-+In particular, an application can seek a printer, query supported
-+attributes (like paper size, trays, fonts etc.), configure the printer
-+device to match it\(cqs needs and print on it like on any other X device
-+reusing parts of the code which is used for the video card Xserver.
-+.SH OVERVIEW
-+The "X Print Service" technology allows X rendering to devices such as
-+printers and fax. Most of the service is available in the X11
-+technology stack as Xp, with the remainder in single toolkit stacks (e.g. DtPrint for CDE).
-+Modifications have also been made to the LessTif/Motif/Qt technology
-+stacks to support Xprint.
-+.PP
-+The Xp portion consists of:
-+.TP 0.2i
-+\(bu
-+Xp Extension for the X-Server (included in the X-Server Xprt)
-+.TP 0.2i
-+\(bu
-+Xp Extension API for the client side (libXp/libXprintUtils)
-+.TP 0.2i
-+\(bu
-+PCL ddx driver that converts core X to native PCL
-+.TP 0.2i
-+\(bu
-+PDF ddx driver that converts core X to native PDF
-+.TP 0.2i
-+\(bu
-+PostScript ddx driver that converts core X to native PostScript
-+.TP 0.2i
-+\(bu
-+Raster ddx driver that generates xwd rasters which can be converted to PCL, PDF or PostScript rasters
-+.PP
-+.PP
-+From an X clients perspective, it can attach to one of two nearly
-+identical X-Servers, a "Video" X-Server, and a "Print" X-Server
-+which has the additional Xp capability but otherwise looks and
-+behaves the same.
-+.SH "HOW THE X PRINT SERVICE WORKS"
-+The X Print Service expands on the traditional X-Server and Xlib world
-+in four ways.
-+.TP 0.4i
-+1.
-+Most obvious is the use of "print ddx drivers" instead of
-+"video ddx drivers". While a video ddx driver modifies pixels
-+in a video frame buffer, a print ddx driver generates "page
-+description language (PDL)" output (such as PCL, PDF or PostScript)
-+or sends the print rendering instructions to a platform-specific
-+print API (like Win32/GDI).
-+
-+Once a print ddx driver generates PDL output, it can be sent to
-+a spooler such as \fBlp\fR(1)
-+or retrieved by the client (to implement functionality like "print-to-file").
-+
-+Though not currently done, a single X-Server can support both
-+print and video ddx drivers.
-+.TP 0.4i
-+2.
-+Since printers support "paged" output, unlike video, a portion
-+of the Xp Extension supports APIs to delineate printed output.
-+For example, XpStartPage and XpEndPage tell the X-Server where
-+a physical page starts and ends in an otherwise continuous
-+stream of X rendering primitives. Likewise, XpStartJob and
-+XpEndJob determine when a collection of pages starts and ends.
-+XpEndJob typically causes the generated PDL to be submitted to
-+a spooler, such as \fBlp\fR(1).
-+.TP 0.4i
-+3.
-+Since printers have extensive capabilities, another portion of
-+the Xp Extension supports APIs to manipulate "print contexts".
-+
-+Once a printer is selected using the Xp Extension API, a print
-+context to represent it can be created. A print context
-+embodies the printer selected - it contains the printer's
-+default capabilities, selectable range of capabilities,
-+printer state, and generated output. Some "attributes" within
-+the print context can be modified by the user, and the
-+X-Server and print ddx driver will react accordingly. For
-+example, the attribute "content-orientation" can be set to
-+"landscape" or "portrait" (if the printer supports these
-+values - which can be queried using the Xprint API as well).
-+.TP 0.4i
-+4.
-+Since printers can have "built in" fonts, the Xp Extension in
-+the X-Server works with the print ddx drivers to make
-+available (for printing only) additional fonts on a per print
-+context basis.
-+
-+When a print context is created and set for a given printer,
-+the X font calls may be able to access additional printer
-+fonts. To do this (typically), the X-Server must have access
-+to "printer metric files" (.pmf) that describe at minimum the
-+metrics of the built in fonts.
-+.PP
-+.SH USAGE
-+There are three tasks to start the X Print Service:
-+.TP 0.4i
-+1.
-+configuring the X Print Server,
-+.TP 0.4i
-+2.
-+starting the X Print Service
-+.TP 0.4i
-+3.
-+configuring the user session so that clients can find the running X Print Service
-+.PP
-+.PP
-+The tasks are described in detail below.
-+.SH "SERVER CONFIGURATION"
-+The X Print Server (Xprt) can read a number of configuration files which
-+control its behavior and support for printers. Each vendor platform has
-+a default location for this information. Xprt can also read the
-+environment variable \fBXPCONFIGDIR\fR to locate alternate configuration
-+directories. Common settings include:
-+
-+export XPCONFIGDIR=/X11/lib/X11/XpConfig/
-+.PP
-+export XPCONFIGDIR=/proj/x11/xc/programs/Xserver/XpConfig/
-+
-+.PP
-+Xprt has many built-in defaults, and lacking any configuration files,
-+will immediately try to support all printers visible via \fBlpstat\fR(1).
-+.PP
-+In order of importance for configuration by a system administrator, the
-+configuration files for a "C" locale are as follows (see \fBXprt\fR(__appmansuffix__) for more
-+details (including support for non-"C" locales)):
-+.TP
-+\fB${XPCONFIGDIR}/C/print/Xprinters\fR
-+\&'Xprinters' is the top most configuration file. It tells
-+Xprt which specific printer names (e.g. mylaser) should
-+be supported, and whether \fBlpstat\fR(1) or other commands
-+should be used to automatically supplement the list of
-+printers.
-+.TP
-+\fB${XPCONFIGDIR}/C/print/attributes/printer\fR
-+The 'printer' file maps printer names to model
-+configurations (see 'model-config' below). For example,
-+"mylaser" could be mapped to a "HPDJ1600C", and all other
-+arbitrary printers could be mapped to a default, such as
-+"HPLJ4SI". When depending on \fBlpstat\fR(1) in the Xprinters
-+file, setting up defaults in 'printer' becomes all the
-+more important.
-+.TP
-+\fB${XPCONFIGDIR}/C/print/attributes/document\fR
-+The 'document' file specifies the initial document values
-+for any print jobs. For example, which paper tray to
-+use, what default resolution, etc.
-+.TP
-+\fB${XPCONFIGDIR}/C/print/attributes/job\fR
-+The 'job' file specifies the initial job values for any
-+print jobs. For example, "notification-profile" can be
-+set so that when a print job is successfully sent to a
-+printer, e-mail is sent to the user.
-+.TP
-+\fB${XPCONFIGDIR}/C/print/models/PSdefault/model\-config\fR, \fB${XPCONFIGDIR}/C/print/models/PSdefault/fonts/fonts.dir\fR, \fB${XPCONFIGDIR}/C/print/models/PSdefault/fonts/9nb00051.pmf\fR, \fB${XPCONFIGDIR}/C/print/models/PSdefault/fonts/9nb00093.pmf\fR
-+The 'model-config' file has attributes that describe the
-+printer model\(cqs capabilities and default settings.
-+Printer model fonts may also be present. The model-config
-+file also identifies the print ddx driver to be used.
-+For each printer model supported, a complete hierarchy of
-+files should exist. In most cases, these files do not
-+need to be modified.
-+.TP
-+\fB${XPCONFIGDIR}/C/print/ddx\-config/raster/pcl\fR, \fB${XPCONFIGDIR}/C/print/ddx\-config/raster/pdf\fR, \fB${XPCONFIGDIR}/C/print/ddx\-config/raster/postscript\fR
-+The print ddx drivers can have highly specific
-+configuration files to control their behavior. In most
-+cases, these files do not need to be modified.
-+.PP
-+More information in how to configure and customize the X print server can be found in the
-+\fBXprt\fR(__appmansuffix__)
-+manual page.
-+.SH "STARTING UP"
-+The summary checklist for starting the X Print Service is as follows:
-+.TP 0.4i
-+1.
-+Choose an execution model for the X Print Service. The X
-+Print Service can be run on a per-user session basis, per
-+machine basis, or can be run on a few machines globally
-+available to a number of users.
-+.TP 0.4i
-+2.
-+If print jobs are to be submitted to a spooler (almost always
-+the case), make sure all needed printers are available to the
-+spooler subsystem (most often \fBlp\fR(1))
-+on the same machine running the X Print Service.
-+.TP 0.4i
-+3.
-+Configure the X Print Server. See ``X Print Server
-+Configuration''.
-+.TP 0.4i
-+4.
-+Depending on #1, start the X Print Server process "Xprt", and
-+then the toolkit-specific Print Dialog Manager Daemon process
-+(such as CDEnext's "dtpdmd") at the appropriate times.
-+Note that libXprintUtils-based applications/toolkits do not need
-+a Print Dialog Manager Daemon process to use Xprint.
-+.PP
-+The details are described below.
-+.PP
-+Because the X Print Service is based on X, it can be easily distributed.
-+The most significant factors in which execution model to choose will be
-+driven by:
-+.TP 0.2i
-+\(bu
-+how many printers will be accessable through the printer
-+subsystem on any given machine. A system administrator may
-+choose to cluster printers on a few given machines, or
-+scatter them across an organization and possibly make
-+extensive use of remote spoolers to make them globally
-+available.
-+.TP 0.2i
-+\(bu
-+how many machines will need a copy of the X Print Server
-+configuration files. The files have been architected so
-+that one super-set version of them can be maintained and
-+distributed (e.g. via NFS), and a per-machine or per-user
-+version of the `Xprinters' is all that is needed to have the
-+appropriate information in them utilized or ignored.
-+.TP 0.2i
-+\(bu
-+how many users can demand services from a given X Print
-+Service.
-+.PP
-+With the above in mind, some obvious execution models include:
-+.TP 0.2i
-+\(bu
-+Global - in this model, the system administrator is choosing
-+to run the X Print Service on a *few* select machines with
-+appropriate printers configured, and allow clients access to
-+the global resource. This can centralize the administration
-+of printers and configuration files, but may have to be
-+monitored for performance loading.
-+
-+Startup would likely be done by boot-up scripts (such as \fB/etc/init.d/xprint\fR).
-+.TP 0.2i
-+\(bu
-+Per-machine - every machine with potential X Print Service
-+users would run the service. Printer and configuration file
-+administration is decentralized, and usage would be limited
-+to the users on the machine.
-+
-+Startup would likely be done by boot-up scripts (such as \fB/etc/init.d/xprint\fR).
-+.TP 0.2i
-+\(bu
-+Per-user session - every user would run an entire X Print
-+Service for themselves. In the future, the Video X Server
-+normally started may contain Print X Server capability, so
-+this model becomes very natural.
-+
-+Startup would likely be done at session login or by
-+launching actions or processes manually once the user
-+logs in. Note: Deamons like "dtpdmd" must be started after Xprt.
-+.PP
-+.PP
-+Starting of the processes is straight forward. In strict order (example is for manually starting the X print server for CDEnext usage):
-+.TP 0.4i
-+1.
-+
-+.nf
-+[machineA] % Xprt [\-XpFile <Xprinters file>] [:dispNum] &
-+.fi
-+
-+
-+Note that Xprt will look for configuration files in either
-+a default location or where \fBXPCONFIGDIR\fR points.
-+
-+\fB\-XpFile\fR specifies an alternate `Xprinters' file, rather
-+than the default one or `\fB${XPCONFIGDIR}/C/print/Xprinters\fR'.
-+.TP 0.4i
-+2.
-+
-+.nf
-+[machineA] % dtpdmd \-d machineA[:dispNum] [\-l /tmp/dtpdmd.log] &
-+.fi
-+
-+
-+The dtpdmd will maintain an X-Selection on the X-Server,
-+and will start dtpdm's as required to service requests.
-+.PP
-+.PP
-+In all but the per-user session model, the machine running the dtpdmd
-+(thus dtpdm's) will need display authorization to the users video
-+display.
-+.SH "CLIENT CONFIGURATION"
-+Once a X Print Server and dtpdmd have been started -- many of them
-+in some cases -- clients will need to find and use them. There are
-+two mechanisms that allow clients to discover X Print Servers and
-+printers.
-+.TP 0.2i
-+\(bu
-+"X Print Specifier" - assuming usage of the DtPrint/XprintUtils-based print
-+applications, the following notation is understood:
-+
-+
-+.nf
-+printer_name@machine[:dispNum]
-+.fi
-+
-+
-+For example:
-+
-+
-+.nf
-+colorlj7@printhub:2
-+.fi
-+
-+
-+In the above example, the X Print Server running at `printhub:2'
-+is assumed to support the printer named `colorlj7'.
-+.TP 0.2i
-+\(bu
-+\fB${XPSERVERLIST}\fR - assuming usage of the DtPrint print dialogs,
-+the environment variable \fB${XPSERVERLIST}\fR can contain a list
-+of X Print Servers. For example:
-+
-+
-+.nf
-+XPSERVERLIST="printhub:2 printhub:3 otherdept:0"
-+.fi
-+
-+
-+Then in the dialogs, only a printer name needs to be entered.
-+The dialog will then search the X Print Servers in \fB${XPSERVERLIST}\fR
-+for a server than supports the printer, and then establish
-+contact.
-+.PP
-+.SH "END-USER SEQUENCE"
-+From most CDEnext applications, printing is accomplished by bringing
-+down the <File> menu and selecting <Print...>. This will result in
-+the DtPrintSetupBox dialog, which will request the name of a printer,
-+and offer limited capability to configure print options (e.g. number
-+of copies). If the user wishes, they can select <Setup...>, which
-+will start a dtpdm capable of modifying additional print options.
-+Finally, the user should select <Print>.
-+.SH ENVIRONMENT
-+.TP
-+\fB${XPCONFIGDIR}\fR
-+This environment variable points to the root
-+of the Xprint server configuration directory hierarchy.
-+If the variable is not defined, the default
-+path is be assumed. The default path may be
-+\fB/usr/X11R6/lib/X11/xserver/\fR,
-+\fB/usr/lib/X11/xserver/\fR,
-+\fB/usr/share/Xprint/xserver/\fR or
-+\fB/usr/openwin/server/etc/XpConfig\fR, depending on the
-+system, and may be configured in \fB/etc/init.d/xprint\fR.
-+.TP
-+\fB${LANG}\fR
-+This environment variable selects the locale settings used by the Xprint server.
-+Xprt allows language-specific settings (stored in \fB${XPCONFIGDIR}/${LANG}/print/\fR)
-+which will override the default settings (stored in \fB${XPCONFIGDIR}/C/print/\fR).
-+If \fB${LANG}\fR is not set "C" is assumed.
-+.TP
-+\fB${XPSERVERLIST}\fR
-+The environment variable \fB${XPSERVERLIST}\fR contains a list
-+of display identifiers (separated by whitespace) which tell an
-+application where it can find the Xprint servers. Usually
-+\fB${XPSERVERLIST}\fR is set by the profile startup scripts (e.g.
-+\fB/etc/profile\fR or \fB/etc/profile.d/xprint.sh\fR) using the output of
-+\fB/etc/init.d/xprint get_xpserverlist\fR.
-+
-+Example:
-+
-+.nf
-+
-+		export XPSERVERLIST="`/etc/init.d/xprint get_xpserverlist`"
-+.fi
-+
-+
-+Alternatively \fB${XPSERVERLIST}\fR can be set
-+manually. Example:
-+
-+.nf
-+
-+		export XPSERVERLIST="littlecat:80 bitdog:72"
-+.fi
-+
-+instructs an application to find an Xprint server at display
-+80 on the machine "littlecat" and at display 72 on the
-+machine bigdog.
-+.TP
-+\fB${XPRINTER}\fR
-+The environment variable \fB${XPRINTER}\fR
-+defines the default printer used by print
-+applications. The syntax is either
-+\fIprintername\fR or
-+\fIprintername\fR@\fIdisplay\fR.
-+
-+Examples:
-+.RS
-+.TP
-+\fBXPRINTER=ps003\fR
-+tells an application to look for the
-+first printer named "ps003" on all Xprint
-+servers.
-+.TP
-+\fBXPRINTER=hplaser19@littlecat:80\fR
-+tells an application to use the printer "hplaser19"
-+on the Xprint server at display
-+"littlecat:80".
-+.RE
-+
-+
-+If \fB${XPRINTER}\fR is not set the applications
-+will examine the values of the \fB${PDPRINTER}\fR,
-+\fB${LPDEST}\fR, and
-+\fB${PRINTER}\fR environment variables (in that order).
-+.SH "SEE ALSO"
-+\fBX11\fR(__miscmansuffix__), \fBxplsprinters\fR(__appmansuffix__), \fBxprehashprinterlist\fR(__appmansuffix__), \fBxphelloworld\fR(__appmansuffix__), \fBxpxmhelloworld\fR(__appmansuffix__), \fBxpawhelloworld\fR(__appmansuffix__), \fBxpxthelloworld\fR(__appmansuffix__), \fBxpsimplehelloworld\fR(__appmansuffix__), \fBXserver\fR(__appmansuffix__), \fBXprt\fR(__appmansuffix__), \fBlibXp\fR(__libmansuffix__), \fBlibXprintUtils\fR(__libmansuffix__), \fBlibXprintAppUtils\fR(__libmansuffix__), \fBXmPrintShell\fR(__libmansuffix__), \fBXawPrintShell\fR(__libmansuffix__), Xprint FAQ (http://xprint.mozdev.org/docs/Xprint_FAQ.html), Xprint main site (http://xprint.mozdev.org/)
-+.SH AUTHORS
-+This manual page was written by
-+Roland Mainz <roland.mainz@nrubsig.org> based on the original X11R6.6
-+\fBxc/programs/Xserver/XpConfig/README\fR.
diff --git a/patches/xorgproto-2022.2.local.patch b/patches/xorgproto-2022.2.local.patch
new file mode 100644
index 00000000..ff2661a8
--- /dev/null
+++ b/patches/xorgproto-2022.2.local.patch
@@ -0,0 +1,14 @@
+diff -ru xorgproto-2022.2.orig/include/X11/Xwindows.h xorgproto-2022.2/include/X11/Xwindows.h
+--- xorgproto-2022.2.orig/include/X11/Xwindows.h	2022-08-11 02:16:33.000000000 +0200
++++ xorgproto-2022.2/include/X11/Xwindows.h	2022-09-18 23:34:11.811510908 +0200
+@@ -101,10 +101,6 @@
+ # define RT_CURSOR       ((RESTYPE)5)
+ #endif
+ 
+-#ifndef __CYGWIN__
+-#define sleep(x) Sleep((x) * 1000)
+-#endif
+-
+ #if defined(WIN32) && (!defined(PATH_MAX) || PATH_MAX < 1024)
+ # undef PATH_MAX
+ # define PATH_MAX 1024
diff --git a/patches/xz-5.2.5.local.patch b/patches/xz-5.2.5.local.patch
deleted file mode 100644
index 406ded59..00000000
--- a/patches/xz-5.2.5.local.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 69d1b3fc29677af8ade8dc15dba83f0589cb63d6 Mon Sep 17 00:00:00 2001
-From: Lasse Collin <lasse.collin@tukaani.org>
-Date: Tue, 29 Mar 2022 19:19:12 +0300
-Subject: [PATCH] xzgrep: Fix escaping of malicious filenames (ZDI-CAN-16587).
-
-Malicious filenames can make xzgrep to write to arbitrary files
-or (with a GNU sed extension) lead to arbitrary code execution.
-
-xzgrep from XZ Utils versions up to and including 5.2.5 are
-affected. 5.3.1alpha and 5.3.2alpha are affected as well.
-This patch works for all of them.
-
-This bug was inherited from gzip's zgrep. gzip 1.12 includes
-a fix for zgrep.
-
-The issue with the old sed script is that with multiple newlines,
-the N-command will read the second line of input, then the
-s-commands will be skipped because it's not the end of the
-file yet, then a new sed cycle starts and the pattern space
-is printed and emptied. So only the last line or two get escaped.
-
-One way to fix this would be to read all lines into the pattern
-space first. However, the included fix is even simpler: All lines
-except the last line get a backslash appended at the end. To ensure
-that shell command substitution doesn't eat a possible trailing
-newline, a colon is appended to the filename before escaping.
-The colon is later used to separate the filename from the grep
-output so it is fine to add it here instead of a few lines later.
-
-The old code also wasn't POSIX compliant as it used \n in the
-replacement section of the s-command. Using \<newline> is the
-POSIX compatible method.
-
-LC_ALL=C was added to the two critical sed commands. POSIX sed
-manual recommends it when using sed to manipulate pathnames
-because in other locales invalid multibyte sequences might
-cause issues with some sed implementations. In case of GNU sed,
-these particular sed scripts wouldn't have such problems but some
-other scripts could have, see:
-
-    info '(sed)Locale Considerations'
-
-This vulnerability was discovered by:
-cleemy desu wayo working with Trend Micro Zero Day Initiative
-
-Thanks to Jim Meyering and Paul Eggert discussing the different
-ways to fix this and for coordinating the patch release schedule
-with gzip.
----
- src/scripts/xzgrep.in | 20 ++++++++++++--------
- 1 file changed, 12 insertions(+), 8 deletions(-)
-
-diff --git a/src/scripts/xzgrep.in b/src/scripts/xzgrep.in
-index b180936..e5186ba 100644
---- a/src/scripts/xzgrep.in
-+++ b/src/scripts/xzgrep.in
-@@ -180,22 +180,26 @@ for i; do
-          { test $# -eq 1 || test $no_filename -eq 1; }; then
-       eval "$grep"
-     else
-+      # Append a colon so that the last character will never be a newline
-+      # which would otherwise get lost in shell command substitution.
-+      i="$i:"
-+
-+      # Escape & \ | and newlines only if such characters are present
-+      # (speed optimization).
-       case $i in
-       (*'
- '* | *'&'* | *'\'* | *'|'*)
--        i=$(printf '%s\n' "$i" |
--            sed '
--              $!N
--              $s/[&\|]/\\&/g
--              $s/\n/\\n/g
--            ');;
-+        i=$(printf '%s\n' "$i" | LC_ALL=C sed 's/[&\|]/\\&/g; $!s/$/\\/');;
-       esac
--      sed_script="s|^|$i:|"
-+
-+      # $i already ends with a colon so don't add it here.
-+      sed_script="s|^|$i|"
- 
-       # Fail if grep or sed fails.
-       r=$(
-         exec 4>&1
--        (eval "$grep" 4>&-; echo $? >&4) 3>&- | sed "$sed_script" >&3 4>&-
-+        (eval "$grep" 4>&-; echo $? >&4) 3>&- |
-+            LC_ALL=C sed "$sed_script" >&3 4>&-
-       ) || r=2
-       exit $r
-     fi >&3 5>&-
--- 
-2.35.1
-
diff --git a/patches/yabasic-2.83.0.local.patch b/patches/yabasic-2.83.0.local.patch
deleted file mode 100644
index 8dee7982..00000000
--- a/patches/yabasic-2.83.0.local.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-diff -ru yabasic-2.83.0.orig/configure yabasic-2.83.0/configure
---- yabasic-2.83.0.orig/configure	2019-06-15 16:58:01.081213787 +0200
-+++ yabasic-2.83.0/configure	2019-06-15 16:58:27.697212954 +0200
-@@ -13304,7 +13304,7 @@
-   return 0;
- }
- _ACEOF
--for ac_lib in '' curses; do
-+for ac_lib in '' ncurses; do
-   if test -z "$ac_lib"; then
-     ac_res="none required"
-   else
-Only in yabasic-2.83.0: configure.orig
-diff -ru yabasic-2.83.0.orig/graphic.c yabasic-2.83.0/graphic.c
---- yabasic-2.83.0.orig/graphic.c	2019-05-16 06:01:06.000000000 +0200
-+++ yabasic-2.83.0/graphic.c	2019-06-15 17:03:51.116903177 +0200
-@@ -19,7 +19,11 @@
- #include "yabasic.h"		/* all prototypes and structures */
- #endif
- #ifdef UNIX
-+#ifdef HAVE_NCURSES_H
-+#include <ncurses.h>
-+#elif HAVE_CURSES_H
- #include <curses.h>
-+#endif
- #include <sys/types.h>
- #include <sys/stat.h>
- #include <unistd.h>
-diff -ru yabasic-2.83.0.orig/whereami.c yabasic-2.83.0/whereami.c
---- yabasic-2.83.0.orig/whereami.c	2019-03-10 16:36:25.000000000 +0100
-+++ yabasic-2.83.0/whereami.c	2019-06-15 17:08:39.723539493 +0200
-@@ -164,7 +164,7 @@
-   return length;
- }
- 
--#elif defined(__linux__) || defined(__CYGWIN__) || defined(__sun) || (defined(__NetBSD__) && !defined(KERN_PROC_PATHNAME))
-+#elif defined(__linux__) || defined(__midipix__) || defined(__CYGWIN__) || defined(__sun) || (defined(__NetBSD__) && !defined(KERN_PROC_PATHNAME))
- 
- #include <stdio.h>
- #include <stdlib.h>
diff --git a/patches/zstd-1.3.4.local.patch b/patches/zstd-1.3.4.local.patch
deleted file mode 100644
index 40e5250d..00000000
--- a/patches/zstd-1.3.4.local.patch
+++ /dev/null
@@ -1,21 +0,0 @@
-diff -ru a/programs/Makefile b/programs/Makefile
---- a/programs/Makefile	2018-03-26 22:19:34.000000000 +0000
-+++ b/programs/Makefile	2018-04-30 14:55:39.468000000 +0000
-@@ -38,7 +38,6 @@
- CPPFLAGS+= -I$(ZSTDDIR) -I$(ZSTDDIR)/common -I$(ZSTDDIR)/compress \
-            -I$(ZSTDDIR)/dictBuilder \
-            -DXXH_NAMESPACE=ZSTD_
--CFLAGS  ?= -O3
- DEBUGFLAGS+=-Wall -Wextra -Wcast-qual -Wcast-align -Wshadow \
-             -Wstrict-aliasing=1 -Wswitch-enum -Wdeclaration-after-statement \
-             -Wstrict-prototypes -Wundef -Wpointer-arith -Wformat-security \
-diff -ru a/lib/libzstd.pc.in b/lib/libzstd.pc.in
---- a/lib/libzstd.pc.in	2020-03-27 11:36:13.368590549 -0400
-+++ b/lib/libzstd.pc.in	2020-03-27 11:36:28.362034466 -0400
-@@ -10,5 +10,5 @@
- Description: fast lossless compression algorithm library
- URL: http://www.zstd.net/
- Version: @VERSION@
--Libs: -L${libdir} -lzstd
-+Libs: -lzstd
- Cflags: -I${includedir}
diff --git a/patches/zstd-1.5.5.local.patch b/patches/zstd-1.5.5.local.patch
new file mode 100644
index 00000000..3075a43f
--- /dev/null
+++ b/patches/zstd-1.5.5.local.patch
@@ -0,0 +1,11 @@
+diff -ru zstd-1.5.5.orig/lib/libzstd.pc.in zstd-1.5.5/lib/libzstd.pc.in
+--- zstd-1.5.5.orig/lib/libzstd.pc.in	2023-04-04 22:13:52.000000000 +0200
++++ zstd-1.5.5/lib/libzstd.pc.in	2024-03-30 16:49:30.898203602 +0100
+@@ -11,6 +11,6 @@
+ Description: fast lossless compression algorithm library
+ URL: https://facebook.github.io/zstd/
+ Version: @VERSION@
+-Libs: -L${libdir} -lzstd
++Libs: -lzstd
+ Libs.private: @LIBS_PRIVATE@
+ Cflags: -I${includedir}