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| author | midipix <writeonce@midipix.org> | 2019-09-23 19:15:28 +0000 |
|---|---|---|
| committer | midipix <writeonce@midipix.org> | 2019-09-26 04:12:45 +0000 |
| commit | a09d14a3ecb7014adb39c8f6407366c7e12aec2e (patch) | |
| tree | fe4ad2c4905781f1ade9c2a70e5d45506bd24d7d | |
| parent | 775481a3b439aca9f7a6a8c77f282d90cb9e9b30 (diff) | |
| download | chainport-a09d14a3ecb7014adb39c8f6407366c7e12aec2e.tar.bz2 chainport-a09d14a3ecb7014adb39c8f6407366c7e12aec2e.tar.xz | |
mgdb: amd64_winnt_supply_core_regs(): add missing bits.
| -rw-r--r-- | overlay/mgdb/gdb/amd64-winnt-regcache.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/overlay/mgdb/gdb/amd64-winnt-regcache.c b/overlay/mgdb/gdb/amd64-winnt-regcache.c index b052496..85caabe 100644 --- a/overlay/mgdb/gdb/amd64-winnt-regcache.c +++ b/overlay/mgdb/gdb/amd64-winnt-regcache.c @@ -37,6 +37,8 @@ static void amd64_winnt_supply_core_regs( struct regcache * rcache, mcontext_t * regctx) { + amd64_winnt_supply_reg(rcache,AMD64_RIP_REGNUM,regctx->uc_rip); + amd64_winnt_supply_reg(rcache,AMD64_RAX_REGNUM,regctx->uc_rax); amd64_winnt_supply_reg(rcache,AMD64_RBX_REGNUM,regctx->uc_rbx); amd64_winnt_supply_reg(rcache,AMD64_RCX_REGNUM,regctx->uc_rcx); @@ -62,6 +64,15 @@ static void amd64_winnt_supply_core_regs( amd64_winnt_supply_reg(rcache,AMD64_GS_REGNUM,regctx->uc_seg_gs); amd64_winnt_supply_reg(rcache,AMD64_EFLAGS_REGNUM,regctx->uc_eflags); + + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+0,regctx->uc_flt.uc_flt_save.uc_control_word); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+1,regctx->uc_flt.uc_flt_save.uc_status_word); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+2,regctx->uc_flt.uc_flt_save.uc_tag_word); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+3,regctx->uc_flt.uc_flt_save.uc_error_selector); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+4,regctx->uc_flt.uc_flt_save.uc_error_offset); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+5,regctx->uc_flt.uc_flt_save.uc_data_selector); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+6,regctx->uc_flt.uc_flt_save.uc_data_offset); + amd64_winnt_supply_reg(rcache,AMD64_ST0_REGNUM+7,regctx->uc_flt.uc_flt_save.uc_error_opcode); } void amd64_winnt_fetch_registers( |